* mi-console.exp: Update copyright.
[deliverable/binutils-gdb.git] / gdb / m32r-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the Mitsubishi m32r for GDB, the GNU debugger.
b6ba6518 2 Copyright 1996, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
c906108c 3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
c906108c
SS
24#include "target.h"
25#include "value.h"
26#include "bfd.h"
27#include "gdb_string.h"
28#include "gdbcore.h"
29#include "symfile.h"
4e052eda 30#include "regcache.h"
c906108c
SS
31
32/* Function: m32r_use_struct_convention
33 Return nonzero if call_function should allocate stack space for a
34 struct return? */
35int
fba45db2 36m32r_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
37{
38 return (TYPE_LENGTH (type) > 8);
39}
40
41/* Function: frame_find_saved_regs
42 Return the frame_saved_regs structure for the frame.
43 Doesn't really work for dummy frames, but it does pass back
44 an empty frame_saved_regs, so I guess that's better than total failure */
45
c5aa993b 46void
fba45db2
KB
47m32r_frame_find_saved_regs (struct frame_info *fi,
48 struct frame_saved_regs *regaddr)
c906108c 49{
c5aa993b 50 memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs));
c906108c
SS
51}
52
53/* Turn this on if you want to see just how much instruction decoding
54 if being done, its quite a lot
c5aa993b 55 */
c906108c 56#if 0
c5aa993b
JM
57static void
58dump_insn (char *commnt, CORE_ADDR pc, int insn)
c906108c 59{
c5aa993b
JM
60 printf_filtered (" %s %08x %08x ",
61 commnt, (unsigned int) pc, (unsigned int) insn);
2bf0cb65 62 TARGET_PRINT_INSN (pc, &tm_print_insn_info);
c5aa993b 63 printf_filtered ("\n");
c906108c
SS
64}
65#define insn_debug(args) { printf_filtered args; }
66#else
67#define dump_insn(a,b,c) {}
68#define insn_debug(args) {}
69#endif
70
c5aa993b 71#define DEFAULT_SEARCH_LIMIT 44
c906108c
SS
72
73/* Function: scan_prologue
74 This function decodes the target function prologue to determine
75 1) the size of the stack frame, and 2) which registers are saved on it.
76 It saves the offsets of saved regs in the frame_saved_regs argument,
77 and returns the frame size. */
78
79/*
c5aa993b
JM
80 The sequence it currently generates is:
81
82 if (varargs function) { ddi sp,#n }
83 push registers
84 if (additional stack <= 256) { addi sp,#-stack }
85 else if (additional stack < 65k) { add3 sp,sp,#-stack
86
87 } else if (additional stack) {
88 seth sp,#(stack & 0xffff0000)
89 or3 sp,sp,#(stack & 0x0000ffff)
90 sub sp,r4
91 }
92 if (frame pointer) {
93 mv sp,fp
94 }
c906108c 95
c5aa993b
JM
96 These instructions are scheduled like everything else, so you should stop at
97 the first branch instruction.
98
99 */
c906108c
SS
100
101/* This is required by skip prologue and by m32r_init_extra_frame_info.
102 The results of decoding a prologue should be cached because this
103 thrashing is getting nuts.
104 I am thinking of making a container class with two indexes, name and
105 address. It may be better to extend the symbol table.
c5aa993b 106 */
c906108c 107
c5aa993b 108static void
fba45db2
KB
109decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit, CORE_ADDR *pl_endptr, /* var parameter */
110 unsigned long *framelength, struct frame_info *fi,
111 struct frame_saved_regs *fsr)
c906108c
SS
112{
113 unsigned long framesize;
114 int insn;
115 int op1;
116 int maybe_one_more = 0;
117 CORE_ADDR after_prologue = 0;
118 CORE_ADDR after_stack_adjust = 0;
119 CORE_ADDR current_pc;
120
121
122 framesize = 0;
123 after_prologue = 0;
c5aa993b 124 insn_debug (("rd prolog l(%d)\n", scan_limit - current_pc));
c906108c
SS
125
126 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
127 {
128
129 insn = read_memory_unsigned_integer (current_pc, 2);
c5aa993b
JM
130 dump_insn ("insn-1", current_pc, insn); /* MTZ */
131
132 /* If this is a 32 bit instruction, we dont want to examine its
133 immediate data as though it were an instruction */
c906108c 134 if (current_pc & 0x02)
c5aa993b 135 { /* Clear the parallel execution bit from 16 bit instruction */
c906108c 136 if (maybe_one_more)
c5aa993b
JM
137 { /* The last instruction was a branch, usually terminates
138 the series, but if this is a parallel instruction,
139 it may be a stack framing instruction */
140 if (!(insn & 0x8000))
141 {
142 insn_debug (("Really done"));
143 break; /* nope, we are really done */
c906108c
SS
144 }
145 }
c5aa993b 146 insn &= 0x7fff; /* decode this instruction further */
c906108c
SS
147 }
148 else
149 {
c5aa993b
JM
150 if (maybe_one_more)
151 break; /* This isnt the one more */
c906108c
SS
152 if (insn & 0x8000)
153 {
c5aa993b 154 insn_debug (("32 bit insn\n"));
c906108c 155 if (current_pc == scan_limit)
c5aa993b
JM
156 scan_limit += 2; /* extend the search */
157 current_pc += 2; /* skip the immediate data */
158 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
c906108c 159 /* add 16 bit sign-extended offset */
c5aa993b
JM
160 {
161 insn_debug (("stack increment\n"));
162 framesize += -((short) read_memory_unsigned_integer (current_pc, 2));
c906108c
SS
163 }
164 else
165 {
c5aa993b
JM
166 if (((insn >> 8) == 0xe4) && /* ld24 r4, xxxxxx; sub sp, r4 */
167 read_memory_unsigned_integer (current_pc + 2, 2) == 0x0f24)
168 { /* subtract 24 bit sign-extended negative-offset */
169 dump_insn ("insn-2", current_pc + 2, insn);
c906108c 170 insn = read_memory_unsigned_integer (current_pc - 2, 4);
c5aa993b 171 dump_insn ("insn-3(l4)", current_pc - 2, insn);
c906108c 172 if (insn & 0x00800000) /* sign extend */
c5aa993b 173 insn |= 0xff000000; /* negative */
c906108c 174 else
c5aa993b 175 insn &= 0x00ffffff; /* positive */
c906108c
SS
176 framesize += insn;
177 }
178 }
179 after_prologue = current_pc;
180 continue;
181 }
182 }
c5aa993b
JM
183 op1 = insn & 0xf000; /* isolate just the first nibble */
184
c906108c 185 if ((insn & 0xf0ff) == 0x207f)
c5aa993b 186 { /* st reg, @-sp */
c906108c 187 int regno;
c5aa993b
JM
188 insn_debug (("push\n"));
189#if 0 /* No, PUSH FP is not an indication that we will use a frame pointer. */
190 if (((insn & 0xffff) == 0x2d7f) && fi)
c906108c
SS
191 fi->using_frame_pointer = 1;
192#endif
c5aa993b
JM
193 framesize += 4;
194#if 0
c906108c
SS
195/* Why should we increase the scan limit, just because we did a push?
196 And if there is a reason, surely we would only want to do it if we
197 had already reached the scan limit... */
198 if (current_pc == scan_limit)
199 scan_limit += 2;
200#endif
201 regno = ((insn >> 8) & 0xf);
c5aa993b 202 if (fsr) /* save_regs offset */
c906108c
SS
203 fsr->regs[regno] = framesize;
204 after_prologue = 0;
c5aa993b 205 continue;
c906108c 206 }
c5aa993b 207 if ((insn >> 8) == 0x4f) /* addi sp, xx */
c906108c
SS
208 /* add 8 bit sign-extended offset */
209 {
210 int stack_adjust = (char) (insn & 0xff);
211
212 /* there are probably two of these stack adjustments:
213 1) A negative one in the prologue, and
214 2) A positive one in the epilogue.
215 We are only interested in the first one. */
216
217 if (stack_adjust < 0)
218 {
219 framesize -= stack_adjust;
220 after_prologue = 0;
221 /* A frameless function may have no "mv fp, sp".
c5aa993b 222 In that case, this is the end of the prologue. */
c906108c
SS
223 after_stack_adjust = current_pc + 2;
224 }
225 continue;
226 }
c5aa993b
JM
227 if (insn == 0x1d8f)
228 { /* mv fp, sp */
229 if (fi)
230 fi->using_frame_pointer = 1; /* fp is now valid */
231 insn_debug (("done fp found\n"));
232 after_prologue = current_pc + 2;
233 break; /* end of stack adjustments */
234 }
235 if (insn == 0x7000) /* Nop looks like a branch, continue explicitly */
236 {
237 insn_debug (("nop\n"));
238 after_prologue = current_pc + 2;
239 continue; /* nop occurs between pushes */
c906108c
SS
240 }
241 /* End of prolog if any of these are branch instructions */
242 if ((op1 == 0x7000)
c5aa993b 243 || (op1 == 0xb000)
cff3e48b 244 || (op1 == 0xf000))
c906108c
SS
245 {
246 after_prologue = current_pc;
c5aa993b 247 insn_debug (("Done: branch\n"));
c906108c
SS
248 maybe_one_more = 1;
249 continue;
250 }
251 /* Some of the branch instructions are mixed with other types */
252 if (op1 == 0x1000)
c5aa993b
JM
253 {
254 int subop = insn & 0x0ff0;
c906108c 255 if ((subop == 0x0ec0) || (subop == 0x0fc0))
c5aa993b
JM
256 {
257 insn_debug (("done: jmp\n"));
c906108c
SS
258 after_prologue = current_pc;
259 maybe_one_more = 1;
c5aa993b 260 continue; /* jmp , jl */
c906108c
SS
261 }
262 }
263 }
264
265 if (current_pc >= scan_limit)
266 {
c5aa993b 267 if (pl_endptr)
7a292a7a 268 {
c906108c 269#if 1
7a292a7a
SS
270 if (after_stack_adjust != 0)
271 /* We did not find a "mv fp,sp", but we DID find
272 a stack_adjust. Is it safe to use that as the
273 end of the prologue? I just don't know. */
274 {
275 *pl_endptr = after_stack_adjust;
276 if (framelength)
277 *framelength = framesize;
278 }
279 else
c906108c 280#endif
7a292a7a
SS
281 /* We reached the end of the loop without finding the end
282 of the prologue. No way to win -- we should report failure.
283 The way we do that is to return the original start_pc.
284 GDB will set a breakpoint at the start of the function (etc.) */
285 *pl_endptr = start_pc;
c5aa993b 286 }
c906108c
SS
287 return;
288 }
c5aa993b 289 if (after_prologue == 0)
c906108c
SS
290 after_prologue = current_pc;
291
c5aa993b
JM
292 insn_debug ((" framesize %d, firstline %08x\n", framesize, after_prologue));
293 if (framelength)
c906108c 294 *framelength = framesize;
c5aa993b 295 if (pl_endptr)
c906108c 296 *pl_endptr = after_prologue;
c5aa993b 297} /* decode_prologue */
c906108c
SS
298
299/* Function: skip_prologue
300 Find end of function prologue */
301
302CORE_ADDR
fba45db2 303m32r_skip_prologue (CORE_ADDR pc)
c906108c
SS
304{
305 CORE_ADDR func_addr, func_end;
306 struct symtab_and_line sal;
307
308 /* See what the symbol table says */
309
310 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
311 {
312 sal = find_pc_line (func_addr, 0);
313
314 if (sal.line != 0 && sal.end <= func_end)
315 {
c5aa993b
JM
316
317 insn_debug (("BP after prologue %08x\n", sal.end));
c906108c
SS
318 func_end = sal.end;
319 }
320 else
321 /* Either there's no line info, or the line after the prologue is after
322 the end of the function. In this case, there probably isn't a
323 prologue. */
324 {
c5aa993b
JM
325 insn_debug (("No line info, line(%x) sal_end(%x) funcend(%x)\n",
326 sal.line, sal.end, func_end));
327 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
c906108c
SS
328 }
329 }
c5aa993b 330 else
c906108c
SS
331 func_end = pc + DEFAULT_SEARCH_LIMIT;
332 decode_prologue (pc, func_end, &sal.end, 0, 0, 0);
333 return sal.end;
334}
335
336static unsigned long
fba45db2 337m32r_scan_prologue (struct frame_info *fi, struct frame_saved_regs *fsr)
c906108c
SS
338{
339 struct symtab_and_line sal;
340 CORE_ADDR prologue_start, prologue_end, current_pc;
cff3e48b 341 unsigned long framesize = 0;
c906108c
SS
342
343 /* this code essentially duplicates skip_prologue,
344 but we need the start address below. */
345
346 if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
347 {
348 sal = find_pc_line (prologue_start, 0);
349
c5aa993b 350 if (sal.line == 0) /* no line info, use current PC */
c906108c
SS
351 if (prologue_start == entry_point_address ())
352 return 0;
353 }
354 else
355 {
356 prologue_start = fi->pc;
c5aa993b
JM
357 prologue_end = prologue_start + 48; /* We're in the boondocks:
358 allow for 16 pushes, an add,
359 and "mv fp,sp" */
c906108c
SS
360 }
361#if 0
362 prologue_end = min (prologue_end, fi->pc);
363#endif
c5aa993b
JM
364 insn_debug (("fipc(%08x) start(%08x) end(%08x)\n",
365 fi->pc, prologue_start, prologue_end));
366 prologue_end = min (prologue_end, prologue_start + DEFAULT_SEARCH_LIMIT);
367 decode_prologue (prologue_start, prologue_end, &prologue_end, &framesize,
368 fi, fsr);
c906108c
SS
369 return framesize;
370}
371
372/* Function: init_extra_frame_info
373 This function actually figures out the frame address for a given pc and
374 sp. This is tricky on the m32r because we sometimes don't use an explicit
375 frame pointer, and the previous stack pointer isn't necessarily recorded
376 on the stack. The only reliable way to get this info is to
377 examine the prologue. */
378
379void
fba45db2 380m32r_init_extra_frame_info (struct frame_info *fi)
c906108c
SS
381{
382 int reg;
383
384 if (fi->next)
385 fi->pc = FRAME_SAVED_PC (fi->next);
386
387 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
388
389 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
390 {
391 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
c5aa993b 392 by assuming it's always FP. */
c906108c
SS
393 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
394 fi->framesize = 0;
395 return;
396 }
c5aa993b 397 else
c906108c
SS
398 {
399 fi->using_frame_pointer = 0;
400 fi->framesize = m32r_scan_prologue (fi, &fi->fsr);
401
402 if (!fi->next)
403 if (fi->using_frame_pointer)
404 {
405 fi->frame = read_register (FP_REGNUM);
406 }
407 else
408 fi->frame = read_register (SP_REGNUM);
c5aa993b
JM
409 else
410 /* fi->next means this is not the innermost frame */ if (fi->using_frame_pointer)
411 /* we have an FP */
412 if (fi->next->fsr.regs[FP_REGNUM] != 0) /* caller saved our FP */
413 fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4);
c906108c
SS
414 for (reg = 0; reg < NUM_REGS; reg++)
415 if (fi->fsr.regs[reg] != 0)
416 fi->fsr.regs[reg] = fi->frame + fi->framesize - fi->fsr.regs[reg];
417 }
418}
419
4b33390a 420/* Function: m32r_virtual_frame_pointer
c906108c
SS
421 Return the register that the function uses for a frame pointer,
422 plus any necessary offset to be applied to the register before
423 any frame pointer offsets. */
424
425void
fba45db2 426m32r_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset)
c906108c
SS
427{
428 struct frame_info fi;
429
430 /* Set up a dummy frame_info. */
431 fi.next = NULL;
432 fi.prev = NULL;
433 fi.frame = 0;
434 fi.pc = pc;
435
436 /* Analyze the prolog and fill in the extra info. */
437 m32r_init_extra_frame_info (&fi);
438
439
440 /* Results will tell us which type of frame it uses. */
441 if (fi.using_frame_pointer)
442 {
c5aa993b 443 *reg = FP_REGNUM;
c906108c
SS
444 *offset = 0;
445 }
446 else
447 {
c5aa993b 448 *reg = SP_REGNUM;
c906108c
SS
449 *offset = 0;
450 }
451}
452
453/* Function: find_callers_reg
454 Find REGNUM on the stack. Otherwise, it's in an active register. One thing
455 we might want to do here is to check REGNUM against the clobber mask, and
456 somehow flag it as invalid if it isn't saved on the stack somewhere. This
457 would provide a graceful failure mode when trying to get the value of
458 caller-saves registers for an inner frame. */
459
460CORE_ADDR
fba45db2 461m32r_find_callers_reg (struct frame_info *fi, int regnum)
c906108c
SS
462{
463 for (; fi; fi = fi->next)
464 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
465 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
466 else if (fi->fsr.regs[regnum] != 0)
c5aa993b
JM
467 return read_memory_integer (fi->fsr.regs[regnum],
468 REGISTER_RAW_SIZE (regnum));
c906108c
SS
469 return read_register (regnum);
470}
471
472/* Function: frame_chain
473 Given a GDB frame, determine the address of the calling function's frame.
474 This will be used to create a new GDB frame struct, and then
475 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
476 For m32r, we save the frame size when we initialize the frame_info. */
477
478CORE_ADDR
fba45db2 479m32r_frame_chain (struct frame_info *fi)
c906108c
SS
480{
481 CORE_ADDR fn_start, callers_pc, fp;
482
483 /* is this a dummy frame? */
c5aa993b
JM
484 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
485 return fi->frame; /* dummy frame same as caller's frame */
c906108c
SS
486
487 /* is caller-of-this a dummy frame? */
c5aa993b 488 callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */
c906108c 489 fp = m32r_find_callers_reg (fi, FP_REGNUM);
c5aa993b
JM
490 if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
491 return fp; /* dummy frame's frame may bear no relation to ours */
c906108c
SS
492
493 if (find_pc_partial_function (fi->pc, 0, &fn_start, 0))
494 if (fn_start == entry_point_address ())
c5aa993b 495 return 0; /* in _start fn, don't chain further */
c906108c
SS
496 if (fi->framesize == 0)
497 {
d4f3574e
SS
498 printf_filtered ("cannot determine frame size @ %s , pc(%s)\n",
499 paddr (fi->frame),
500 paddr (fi->pc));
c906108c
SS
501 return 0;
502 }
c5aa993b 503 insn_debug (("m32rx frame %08x\n", fi->frame + fi->framesize));
c906108c
SS
504 return fi->frame + fi->framesize;
505}
506
507/* Function: push_return_address (pc)
508 Set up the return address for the inferior function call.
509 Necessary for targets that don't actually execute a JSR/BSR instruction
510 (ie. when using an empty CALL_DUMMY) */
511
512CORE_ADDR
fba45db2 513m32r_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c
SS
514{
515 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
516 return sp;
517}
518
519
520/* Function: pop_frame
521 Discard from the stack the innermost frame,
522 restoring all saved registers. */
523
524struct frame_info *
fba45db2 525m32r_pop_frame (struct frame_info *frame)
c906108c
SS
526{
527 int regnum;
528
529 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
530 generic_pop_dummy_frame ();
531 else
532 {
533 for (regnum = 0; regnum < NUM_REGS; regnum++)
534 if (frame->fsr.regs[regnum] != 0)
c5aa993b 535 write_register (regnum,
c906108c
SS
536 read_memory_integer (frame->fsr.regs[regnum], 4));
537
538 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
539 write_register (SP_REGNUM, read_register (FP_REGNUM));
540 if (read_register (PSW_REGNUM) & 0x80)
541 write_register (SPU_REGNUM, read_register (SP_REGNUM));
542 else
543 write_register (SPI_REGNUM, read_register (SP_REGNUM));
544 }
545 flush_cached_frames ();
546 return NULL;
547}
548
549/* Function: frame_saved_pc
550 Find the caller of this frame. We do this by seeing if RP_REGNUM is saved
551 in the stack anywhere, otherwise we get it from the registers. */
552
553CORE_ADDR
fba45db2 554m32r_frame_saved_pc (struct frame_info *fi)
c906108c 555{
c5aa993b
JM
556 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
557 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
558 else
559 return m32r_find_callers_reg (fi, RP_REGNUM);
560}
561
562/* Function: push_arguments
563 Setup the function arguments for calling a function in the inferior.
564
565 On the Mitsubishi M32R architecture, there are four registers (R0 to R3)
566 which are dedicated for passing function arguments. Up to the first
567 four arguments (depending on size) may go into these registers.
568 The rest go on the stack.
569
570 Arguments that are smaller than 4 bytes will still take up a whole
571 register or a whole 32-bit word on the stack, and will be
572 right-justified in the register or the stack word. This includes
573 chars, shorts, and small aggregate types.
c5aa993b 574
c906108c
SS
575 Arguments of 8 bytes size are split between two registers, if
576 available. If only one register is available, the argument will
577 be split between the register and the stack. Otherwise it is
578 passed entirely on the stack. Aggregate types with sizes between
579 4 and 8 bytes are passed entirely on the stack, and are left-justified
580 within the double-word (as opposed to aggregates smaller than 4 bytes
581 which are right-justified).
582
583 Aggregates of greater than 8 bytes are first copied onto the stack,
584 and then a pointer to the copy is passed in the place of the normal
585 argument (either in a register if available, or on the stack).
586
587 Functions that must return an aggregate type can return it in the
588 normal return value registers (R0 and R1) if its size is 8 bytes or
589 less. For larger return values, the caller must allocate space for
590 the callee to copy the return value to. A pointer to this space is
591 passed as an implicit first argument, always in R0. */
592
593CORE_ADDR
ea7c478f 594m32r_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
fba45db2 595 unsigned char struct_return, CORE_ADDR struct_addr)
c906108c
SS
596{
597 int stack_offset, stack_alloc;
598 int argreg;
599 int argnum;
600 struct type *type;
601 CORE_ADDR regval;
602 char *val;
603 char valbuf[4];
604 int len;
605 int odd_sized_struct;
606
607 /* first force sp to a 4-byte alignment */
608 sp = sp & ~3;
609
c5aa993b 610 argreg = ARG0_REGNUM;
c906108c
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611 /* The "struct return pointer" pseudo-argument goes in R0 */
612 if (struct_return)
c5aa993b
JM
613 write_register (argreg++, struct_addr);
614
c906108c
SS
615 /* Now make sure there's space on the stack */
616 for (argnum = 0, stack_alloc = 0;
617 argnum < nargs; argnum++)
c5aa993b
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618 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
619 sp -= stack_alloc; /* make room on stack for args */
620
621
c906108c
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622 /* Now load as many as possible of the first arguments into
623 registers, and push the rest onto the stack. There are 16 bytes
624 in four registers available. Loop thru args from first to last. */
c5aa993b 625
c906108c
SS
626 argreg = ARG0_REGNUM;
627 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
628 {
629 type = VALUE_TYPE (args[argnum]);
c5aa993b
JM
630 len = TYPE_LENGTH (type);
631 memset (valbuf, 0, sizeof (valbuf));
c906108c 632 if (len < 4)
c5aa993b
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633 { /* value gets right-justified in the register or stack word */
634 memcpy (valbuf + (4 - len),
635 (char *) VALUE_CONTENTS (args[argnum]), len);
636 val = valbuf;
637 }
c906108c 638 else
c5aa993b
JM
639 val = (char *) VALUE_CONTENTS (args[argnum]);
640
c906108c 641 if (len > 4 && (len & 3) != 0)
c5aa993b 642 odd_sized_struct = 1; /* such structs go entirely on stack */
c906108c 643 else
c5aa993b 644 odd_sized_struct = 0;
c906108c 645 while (len > 0)
c5aa993b
JM
646 {
647 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
648 { /* must go on the stack */
649 write_memory (sp + stack_offset, val, 4);
650 stack_offset += 4;
651 }
652 /* NOTE WELL!!!!! This is not an "else if" clause!!!
653 That's because some *&^%$ things get passed on the stack
654 AND in the registers! */
655 if (argreg <= ARGLAST_REGNUM)
656 { /* there's room in a register */
657 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
658 write_register (argreg++, regval);
659 }
660 /* Store the value 4 bytes at a time. This means that things
661 larger than 4 bytes may go partly in registers and partly
662 on the stack. */
663 len -= REGISTER_RAW_SIZE (argreg);
664 val += REGISTER_RAW_SIZE (argreg);
665 }
c906108c
SS
666 }
667 return sp;
668}
669
670/* Function: fix_call_dummy
671 If there is real CALL_DUMMY code (eg. on the stack), this function
672 has the responsability to insert the address of the actual code that
673 is the target of the target function call. */
674
675void
fba45db2 676m32r_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
ea7c478f 677 struct value **args, struct type *type, int gcc_p)
c906108c
SS
678{
679 /* ld24 r8, <(imm24) fun> */
680 *(unsigned long *) (dummy) = (fun & 0x00ffffff) | 0xe8000000;
681}
682
c906108c
SS
683
684/* Function: m32r_write_sp
685 Because SP is really a read-only register that mirrors either SPU or SPI,
686 we must actually write one of those two as well, depending on PSW. */
687
688void
fba45db2 689m32r_write_sp (CORE_ADDR val)
c906108c
SS
690{
691 unsigned long psw = read_register (PSW_REGNUM);
692
c5aa993b 693 if (psw & 0x80) /* stack mode: user or interrupt */
c906108c
SS
694 write_register (SPU_REGNUM, val);
695 else
696 write_register (SPI_REGNUM, val);
697 write_register (SP_REGNUM, val);
698}
699
700void
fba45db2 701_initialize_m32r_tdep (void)
c906108c
SS
702{
703 tm_print_insn = print_insn_m32r;
704}
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