Commit | Line | Data |
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908f682f | 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
51603483 | 2 | Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
ffe1f3ee | 3 | Contributed by Stephane Carrez, stcarrez@nerim.fr |
78073dd8 AC |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
78073dd8 | 21 | |
82c230c2 SC |
22 | #include "defs.h" |
23 | #include "frame.h" | |
82c230c2 SC |
24 | #include "symtab.h" |
25 | #include "gdbtypes.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "gdbcore.h" | |
28 | #include "gdb_string.h" | |
29 | #include "value.h" | |
30 | #include "inferior.h" | |
31 | #include "dis-asm.h" | |
32 | #include "symfile.h" | |
33 | #include "objfiles.h" | |
34 | #include "arch-utils.h" | |
4e052eda | 35 | #include "regcache.h" |
78073dd8 | 36 | |
82c230c2 SC |
37 | #include "target.h" |
38 | #include "opcode/m68hc11.h" | |
81967506 SC |
39 | #include "elf/m68hc11.h" |
40 | #include "elf-bfd.h" | |
78073dd8 | 41 | |
7df11f59 SC |
42 | /* Macros for setting and testing a bit in a minimal symbol. |
43 | For 68HC11/68HC12 we have two flags that tell which return | |
44 | type the function is using. This is used for prologue and frame | |
45 | analysis to compute correct stack frame layout. | |
46 | ||
47 | The MSB of the minimal symbol's "info" field is used for this purpose. | |
48 | This field is already being used to store the symbol size, so the | |
49 | assumption is that the symbol size cannot exceed 2^30. | |
50 | ||
51 | MSYMBOL_SET_RTC Actually sets the "RTC" bit. | |
52 | MSYMBOL_SET_RTI Actually sets the "RTI" bit. | |
53 | MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol. | |
54 | MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. | |
55 | MSYMBOL_SIZE Returns the size of the minimal symbol, | |
56 | i.e. the "info" field with the "special" bit | |
57 | masked out. */ | |
58 | ||
59 | #define MSYMBOL_SET_RTC(msym) \ | |
60 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ | |
61 | | 0x80000000) | |
62 | ||
63 | #define MSYMBOL_SET_RTI(msym) \ | |
64 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ | |
65 | | 0x40000000) | |
66 | ||
67 | #define MSYMBOL_IS_RTC(msym) \ | |
68 | (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0) | |
69 | ||
70 | #define MSYMBOL_IS_RTI(msym) \ | |
71 | (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0) | |
72 | ||
73 | #define MSYMBOL_SIZE(msym) \ | |
74 | ((long) MSYMBOL_INFO (msym) & 0x3fffffff) | |
75 | ||
76 | enum insn_return_kind { | |
77 | RETURN_RTS, | |
78 | RETURN_RTC, | |
79 | RETURN_RTI | |
80 | }; | |
81 | ||
82 | ||
78073dd8 AC |
83 | /* Register numbers of various important registers. |
84 | Note that some of these values are "real" register numbers, | |
85 | and correspond to the general registers of the machine, | |
86 | and some are "phony" register numbers which are too large | |
87 | to be actual register numbers as far as the user is concerned | |
88 | but do serve to get the desired values when passed to read_register. */ | |
89 | ||
82c230c2 SC |
90 | #define HARD_X_REGNUM 0 |
91 | #define HARD_D_REGNUM 1 | |
92 | #define HARD_Y_REGNUM 2 | |
93 | #define HARD_SP_REGNUM 3 | |
94 | #define HARD_PC_REGNUM 4 | |
95 | ||
96 | #define HARD_A_REGNUM 5 | |
97 | #define HARD_B_REGNUM 6 | |
98 | #define HARD_CCR_REGNUM 7 | |
5706502a SC |
99 | |
100 | /* 68HC12 page number register. | |
101 | Note: to keep a compatibility with gcc register naming, we must | |
102 | not have to rename FP and other soft registers. The page register | |
103 | is a real hard register and must therefore be counted by NUM_REGS. | |
104 | For this it has the same number as Z register (which is not used). */ | |
105 | #define HARD_PAGE_REGNUM 8 | |
106 | #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM) | |
82c230c2 SC |
107 | |
108 | /* Z is replaced by X or Y by gcc during machine reorg. | |
109 | ??? There is no way to get it and even know whether | |
110 | it's in X or Y or in ZS. */ | |
111 | #define SOFT_Z_REGNUM 8 | |
112 | ||
113 | /* Soft registers. These registers are special. There are treated | |
114 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). | |
115 | They are physically located in memory. */ | |
116 | #define SOFT_FP_REGNUM 9 | |
117 | #define SOFT_TMP_REGNUM 10 | |
118 | #define SOFT_ZS_REGNUM 11 | |
119 | #define SOFT_XY_REGNUM 12 | |
f91a8b6b SC |
120 | #define SOFT_UNUSED_REGNUM 13 |
121 | #define SOFT_D1_REGNUM 14 | |
82c230c2 SC |
122 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) |
123 | #define M68HC11_MAX_SOFT_REGS 32 | |
124 | ||
125 | #define M68HC11_NUM_REGS (8) | |
126 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) | |
127 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) | |
128 | ||
129 | #define M68HC11_REG_SIZE (2) | |
130 | ||
548bcbec SC |
131 | #define M68HC12_NUM_REGS (9) |
132 | #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1) | |
133 | #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1) | |
134 | ||
908f682f | 135 | struct insn_sequence; |
82c230c2 SC |
136 | struct gdbarch_tdep |
137 | { | |
5d1a66bd SC |
138 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
139 | to the next push location. An offset of 1 must be applied to obtain | |
140 | the address where the last value is saved. For 68hc12, the stack | |
141 | pointer points to the last value pushed. No offset is necessary. */ | |
142 | int stack_correction; | |
908f682f SC |
143 | |
144 | /* Description of instructions in the prologue. */ | |
145 | struct insn_sequence *prologue; | |
81967506 | 146 | |
7df11f59 SC |
147 | /* True if the page memory bank register is available |
148 | and must be used. */ | |
149 | int use_page_register; | |
150 | ||
81967506 SC |
151 | /* ELF flags for ABI. */ |
152 | int elf_flags; | |
82c230c2 SC |
153 | }; |
154 | ||
5d1a66bd SC |
155 | #define M6811_TDEP gdbarch_tdep (current_gdbarch) |
156 | #define STACK_CORRECTION (M6811_TDEP->stack_correction) | |
7df11f59 | 157 | #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register) |
5d1a66bd | 158 | |
82c230c2 SC |
159 | struct frame_extra_info |
160 | { | |
82c230c2 | 161 | CORE_ADDR return_pc; |
82c230c2 SC |
162 | int frameless; |
163 | int size; | |
7df11f59 | 164 | enum insn_return_kind return_kind; |
82c230c2 | 165 | }; |
78073dd8 | 166 | |
82c230c2 SC |
167 | /* Table of registers for 68HC11. This includes the hard registers |
168 | and the soft registers used by GCC. */ | |
169 | static char * | |
170 | m68hc11_register_names[] = | |
171 | { | |
172 | "x", "d", "y", "sp", "pc", "a", "b", | |
5706502a | 173 | "ccr", "page", "frame","tmp", "zs", "xy", 0, |
82c230c2 SC |
174 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
175 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", | |
176 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", | |
177 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", | |
178 | "d29", "d30", "d31", "d32" | |
179 | }; | |
78073dd8 | 180 | |
82c230c2 SC |
181 | struct m68hc11_soft_reg |
182 | { | |
183 | const char *name; | |
184 | CORE_ADDR addr; | |
185 | }; | |
78073dd8 | 186 | |
82c230c2 | 187 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
78073dd8 | 188 | |
82c230c2 | 189 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
78073dd8 | 190 | |
82c230c2 SC |
191 | static int soft_min_addr; |
192 | static int soft_max_addr; | |
193 | static int soft_reg_initialized = 0; | |
78073dd8 | 194 | |
82c230c2 SC |
195 | /* Look in the symbol table for the address of a pseudo register |
196 | in memory. If we don't find it, pretend the register is not used | |
197 | and not available. */ | |
198 | static void | |
199 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) | |
200 | { | |
201 | struct minimal_symbol *msymbol; | |
78073dd8 | 202 | |
82c230c2 SC |
203 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
204 | if (msymbol) | |
205 | { | |
206 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); | |
207 | reg->name = xstrdup (name); | |
208 | ||
209 | /* Keep track of the address range for soft registers. */ | |
210 | if (reg->addr < (CORE_ADDR) soft_min_addr) | |
211 | soft_min_addr = reg->addr; | |
212 | if (reg->addr > (CORE_ADDR) soft_max_addr) | |
213 | soft_max_addr = reg->addr; | |
214 | } | |
215 | else | |
216 | { | |
217 | reg->name = 0; | |
218 | reg->addr = 0; | |
219 | } | |
220 | } | |
78073dd8 | 221 | |
82c230c2 SC |
222 | /* Initialize the table of soft register addresses according |
223 | to the symbol table. */ | |
224 | static void | |
225 | m68hc11_initialize_register_info (void) | |
226 | { | |
227 | int i; | |
78073dd8 | 228 | |
82c230c2 SC |
229 | if (soft_reg_initialized) |
230 | return; | |
231 | ||
232 | soft_min_addr = INT_MAX; | |
233 | soft_max_addr = 0; | |
234 | for (i = 0; i < M68HC11_ALL_REGS; i++) | |
235 | { | |
236 | soft_regs[i].name = 0; | |
237 | } | |
238 | ||
239 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); | |
240 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); | |
241 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); | |
242 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; | |
243 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); | |
78073dd8 | 244 | |
82c230c2 SC |
245 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
246 | { | |
247 | char buf[10]; | |
78073dd8 | 248 | |
82c230c2 SC |
249 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
250 | m68hc11_get_register_info (&soft_regs[i], buf); | |
251 | } | |
78073dd8 | 252 | |
82c230c2 SC |
253 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
254 | { | |
255 | warning ("No frame soft register found in the symbol table.\n"); | |
256 | warning ("Stack backtrace will not work.\n"); | |
257 | } | |
258 | soft_reg_initialized = 1; | |
259 | } | |
78073dd8 | 260 | |
82c230c2 SC |
261 | /* Given an address in memory, return the soft register number if |
262 | that address corresponds to a soft register. Returns -1 if not. */ | |
263 | static int | |
264 | m68hc11_which_soft_register (CORE_ADDR addr) | |
265 | { | |
266 | int i; | |
267 | ||
268 | if (addr < soft_min_addr || addr > soft_max_addr) | |
269 | return -1; | |
270 | ||
271 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) | |
272 | { | |
273 | if (soft_regs[i].name && soft_regs[i].addr == addr) | |
274 | return i; | |
275 | } | |
276 | return -1; | |
277 | } | |
78073dd8 | 278 | |
82c230c2 SC |
279 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
280 | pseudo registers. They are located in memory. Translate the register | |
281 | fetch into a memory read. */ | |
46ce284d AC |
282 | static void |
283 | m68hc11_pseudo_register_read (struct gdbarch *gdbarch, | |
284 | struct regcache *regcache, | |
285 | int regno, void *buf) | |
82c230c2 | 286 | { |
548bcbec SC |
287 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
288 | addressing mode. */ | |
289 | if (regno == M68HC12_HARD_PC_REGNUM) | |
290 | { | |
291 | const int regsize = TYPE_LENGTH (builtin_type_uint32); | |
292 | CORE_ADDR pc = read_register (HARD_PC_REGNUM); | |
293 | int page = read_register (HARD_PAGE_REGNUM); | |
294 | ||
295 | if (pc >= 0x8000 && pc < 0xc000) | |
296 | { | |
297 | pc -= 0x8000; | |
298 | pc += (page << 14); | |
299 | pc += 0x1000000; | |
300 | } | |
301 | store_unsigned_integer (buf, regsize, pc); | |
302 | return; | |
303 | } | |
304 | ||
82c230c2 SC |
305 | m68hc11_initialize_register_info (); |
306 | ||
307 | /* Fetch a soft register: translate into a memory read. */ | |
308 | if (soft_regs[regno].name) | |
309 | { | |
310 | target_read_memory (soft_regs[regno].addr, buf, 2); | |
311 | } | |
312 | else | |
313 | { | |
314 | memset (buf, 0, 2); | |
315 | } | |
82c230c2 | 316 | } |
78073dd8 | 317 | |
82c230c2 SC |
318 | /* Store a pseudo register. Translate the register store |
319 | into a memory write. */ | |
320 | static void | |
46ce284d AC |
321 | m68hc11_pseudo_register_write (struct gdbarch *gdbarch, |
322 | struct regcache *regcache, | |
323 | int regno, const void *buf) | |
82c230c2 | 324 | { |
548bcbec SC |
325 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
326 | addressing mode. */ | |
327 | if (regno == M68HC12_HARD_PC_REGNUM) | |
328 | { | |
329 | const int regsize = TYPE_LENGTH (builtin_type_uint32); | |
330 | char *tmp = alloca (regsize); | |
331 | CORE_ADDR pc; | |
332 | ||
333 | memcpy (tmp, buf, regsize); | |
334 | pc = extract_unsigned_integer (tmp, regsize); | |
335 | if (pc >= 0x1000000) | |
336 | { | |
337 | pc -= 0x1000000; | |
338 | write_register (HARD_PAGE_REGNUM, (pc >> 14) & 0x0ff); | |
339 | pc &= 0x03fff; | |
340 | write_register (HARD_PC_REGNUM, pc + 0x8000); | |
341 | } | |
342 | else | |
343 | write_register (HARD_PC_REGNUM, pc); | |
344 | return; | |
345 | } | |
346 | ||
82c230c2 | 347 | m68hc11_initialize_register_info (); |
78073dd8 | 348 | |
82c230c2 SC |
349 | /* Store a soft register: translate into a memory write. */ |
350 | if (soft_regs[regno].name) | |
351 | { | |
46ce284d AC |
352 | const int regsize = 2; |
353 | char *tmp = alloca (regsize); | |
354 | memcpy (tmp, buf, regsize); | |
355 | target_write_memory (soft_regs[regno].addr, tmp, regsize); | |
82c230c2 SC |
356 | } |
357 | } | |
78073dd8 | 358 | |
fa88f677 | 359 | static const char * |
82c230c2 | 360 | m68hc11_register_name (int reg_nr) |
78073dd8 | 361 | { |
548bcbec SC |
362 | if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER) |
363 | return "pc"; | |
364 | if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER) | |
365 | return "ppc"; | |
366 | ||
82c230c2 SC |
367 | if (reg_nr < 0) |
368 | return NULL; | |
369 | if (reg_nr >= M68HC11_ALL_REGS) | |
370 | return NULL; | |
371 | ||
372 | /* If we don't know the address of a soft register, pretend it | |
373 | does not exist. */ | |
374 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) | |
375 | return NULL; | |
376 | return m68hc11_register_names[reg_nr]; | |
377 | } | |
78073dd8 | 378 | |
f4f9705a | 379 | static const unsigned char * |
82c230c2 | 380 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
78073dd8 | 381 | { |
82c230c2 SC |
382 | static unsigned char breakpoint[] = {0x0}; |
383 | ||
384 | *lenptr = sizeof (breakpoint); | |
385 | return breakpoint; | |
78073dd8 AC |
386 | } |
387 | ||
388 | /* Immediately after a function call, return the saved pc before the frame | |
82c230c2 | 389 | is setup. */ |
78073dd8 | 390 | |
82c230c2 | 391 | static CORE_ADDR |
78073dd8 AC |
392 | m68hc11_saved_pc_after_call (struct frame_info *frame) |
393 | { | |
82c230c2 SC |
394 | CORE_ADDR addr; |
395 | ||
5d1a66bd | 396 | addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION; |
78073dd8 AC |
397 | addr &= 0x0ffff; |
398 | return read_memory_integer (addr, 2) & 0x0FFFF; | |
399 | } | |
400 | ||
82c230c2 SC |
401 | static CORE_ADDR |
402 | m68hc11_frame_saved_pc (struct frame_info *frame) | |
403 | { | |
da50a4b7 | 404 | return get_frame_extra_info (frame)->return_pc; |
82c230c2 SC |
405 | } |
406 | ||
407 | static CORE_ADDR | |
408 | m68hc11_frame_args_address (struct frame_info *frame) | |
409 | { | |
7df11f59 SC |
410 | CORE_ADDR addr; |
411 | ||
da50a4b7 AC |
412 | addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION + 2; |
413 | if (get_frame_extra_info (frame)->return_kind == RETURN_RTC) | |
7df11f59 | 414 | addr += 1; |
da50a4b7 | 415 | else if (get_frame_extra_info (frame)->return_kind == RETURN_RTI) |
7df11f59 SC |
416 | addr += 7; |
417 | ||
418 | return addr; | |
82c230c2 SC |
419 | } |
420 | ||
421 | static CORE_ADDR | |
422 | m68hc11_frame_locals_address (struct frame_info *frame) | |
423 | { | |
1e2330ba | 424 | return get_frame_base (frame); |
82c230c2 SC |
425 | } |
426 | ||
78073dd8 AC |
427 | /* Discard from the stack the innermost frame, restoring all saved |
428 | registers. */ | |
429 | ||
82c230c2 | 430 | static void |
fba45db2 | 431 | m68hc11_pop_frame (void) |
78073dd8 | 432 | { |
82c230c2 SC |
433 | register struct frame_info *frame = get_current_frame (); |
434 | register CORE_ADDR fp, sp; | |
435 | register int regnum; | |
436 | ||
1e2330ba AC |
437 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), |
438 | get_frame_base (frame), | |
439 | get_frame_base (frame))) | |
82c230c2 SC |
440 | generic_pop_dummy_frame (); |
441 | else | |
442 | { | |
c193f6ac | 443 | fp = get_frame_base (frame); |
82c230c2 SC |
444 | FRAME_INIT_SAVED_REGS (frame); |
445 | ||
446 | /* Copy regs from where they were saved in the frame. */ | |
447 | for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++) | |
b2fb4676 | 448 | if (get_frame_saved_regs (frame)[regnum]) |
82c230c2 | 449 | write_register (regnum, |
b2fb4676 | 450 | read_memory_integer (get_frame_saved_regs (frame)[regnum], 2)); |
82c230c2 | 451 | |
da50a4b7 AC |
452 | write_register (HARD_PC_REGNUM, get_frame_extra_info (frame)->return_pc); |
453 | sp = (fp + get_frame_extra_info (frame)->size + 2) & 0x0ffff; | |
82c230c2 SC |
454 | write_register (HARD_SP_REGNUM, sp); |
455 | } | |
456 | flush_cached_frames (); | |
78073dd8 AC |
457 | } |
458 | ||
908f682f SC |
459 | \f |
460 | /* 68HC11 & 68HC12 prologue analysis. | |
461 | ||
462 | */ | |
463 | #define MAX_CODES 12 | |
464 | ||
465 | /* 68HC11 opcodes. */ | |
466 | #undef M6811_OP_PAGE2 | |
467 | #define M6811_OP_PAGE2 (0x18) | |
468 | #define M6811_OP_LDX (0xde) | |
469 | #define M6811_OP_PSHX (0x3c) | |
470 | #define M6811_OP_STS (0x9f) | |
471 | #define M6811_OP_TSX (0x30) | |
472 | #define M6811_OP_XGDX (0x8f) | |
473 | #define M6811_OP_ADDD (0xc3) | |
474 | #define M6811_OP_TXS (0x35) | |
475 | #define M6811_OP_DES (0x34) | |
476 | ||
477 | /* 68HC12 opcodes. */ | |
478 | #define M6812_OP_PAGE2 (0x18) | |
479 | #define M6812_OP_MOVW (0x01) | |
480 | #define M6812_PB_PSHW (0xae) | |
481 | #define M6812_OP_STS (0x7f) | |
482 | #define M6812_OP_LEAS (0x1b) | |
ffe1f3ee SC |
483 | #define M6812_OP_PSHX (0x34) |
484 | #define M6812_OP_PSHY (0x35) | |
908f682f SC |
485 | |
486 | /* Operand extraction. */ | |
487 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ | |
488 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ | |
489 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ | |
490 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ | |
491 | ||
492 | /* Identification of the sequence. */ | |
493 | enum m6811_seq_type | |
494 | { | |
495 | P_LAST = 0, | |
496 | P_SAVE_REG, /* Save a register on the stack. */ | |
497 | P_SET_FRAME, /* Setup the frame pointer. */ | |
498 | P_LOCAL_1, /* Allocate 1 byte for locals. */ | |
499 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ | |
500 | P_LOCAL_N /* Allocate N bytes for locals. */ | |
501 | }; | |
502 | ||
503 | struct insn_sequence { | |
504 | enum m6811_seq_type type; | |
505 | unsigned length; | |
506 | unsigned short code[MAX_CODES]; | |
507 | }; | |
508 | ||
509 | /* Sequence of instructions in the 68HC11 function prologue. */ | |
510 | static struct insn_sequence m6811_prologue[] = { | |
511 | /* Sequences to save a soft-register. */ | |
512 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, | |
513 | M6811_OP_PSHX } }, | |
514 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, | |
515 | M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
516 | ||
517 | /* Sequences to allocate local variables. */ | |
518 | { P_LOCAL_N, 7, { M6811_OP_TSX, | |
519 | M6811_OP_XGDX, | |
520 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
521 | M6811_OP_XGDX, | |
522 | M6811_OP_TXS } }, | |
523 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, | |
524 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
525 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
526 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
527 | M6811_OP_PAGE2, M6811_OP_TXS } }, | |
528 | { P_LOCAL_1, 1, { M6811_OP_DES } }, | |
529 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, | |
530 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
531 | ||
532 | /* Initialize the frame pointer. */ | |
533 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, | |
534 | { P_LAST, 0, { 0 } } | |
535 | }; | |
536 | ||
537 | ||
538 | /* Sequence of instructions in the 68HC12 function prologue. */ | |
539 | static struct insn_sequence m6812_prologue[] = { | |
540 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, | |
541 | OP_IMM_HIGH, OP_IMM_LOW } }, | |
542 | { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } }, | |
543 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, | |
ffe1f3ee SC |
544 | { P_LOCAL_2, 1, { M6812_OP_PSHX } }, |
545 | { P_LOCAL_2, 1, { M6812_OP_PSHY } }, | |
908f682f SC |
546 | { P_LAST, 0 } |
547 | }; | |
548 | ||
549 | ||
550 | /* Analyze the sequence of instructions starting at the given address. | |
551 | Returns a pointer to the sequence when it is recognized and | |
552 | the optional value (constant/address) associated with it. | |
553 | Advance the pc for the next sequence. */ | |
554 | static struct insn_sequence * | |
555 | m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc, | |
556 | CORE_ADDR *val) | |
557 | { | |
558 | unsigned char buffer[MAX_CODES]; | |
559 | unsigned bufsize; | |
560 | unsigned j; | |
561 | CORE_ADDR cur_val; | |
562 | short v = 0; | |
563 | ||
564 | bufsize = 0; | |
565 | for (; seq->type != P_LAST; seq++) | |
566 | { | |
567 | cur_val = 0; | |
568 | for (j = 0; j < seq->length; j++) | |
569 | { | |
570 | if (bufsize < j + 1) | |
571 | { | |
572 | buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize, | |
573 | 1); | |
574 | bufsize++; | |
575 | } | |
576 | /* Continue while we match the opcode. */ | |
577 | if (seq->code[j] == buffer[j]) | |
578 | continue; | |
579 | ||
580 | if ((seq->code[j] & 0xf00) == 0) | |
581 | break; | |
582 | ||
583 | /* Extract a sequence parameter (address or constant). */ | |
584 | switch (seq->code[j]) | |
585 | { | |
586 | case OP_DIRECT: | |
587 | cur_val = (CORE_ADDR) buffer[j]; | |
588 | break; | |
589 | ||
590 | case OP_IMM_HIGH: | |
591 | cur_val = cur_val & 0x0ff; | |
592 | cur_val |= (buffer[j] << 8); | |
593 | break; | |
594 | ||
595 | case OP_IMM_LOW: | |
596 | cur_val &= 0x0ff00; | |
597 | cur_val |= buffer[j]; | |
598 | break; | |
599 | ||
600 | case OP_PBYTE: | |
601 | if ((buffer[j] & 0xE0) == 0x80) | |
602 | { | |
603 | v = buffer[j] & 0x1f; | |
604 | if (v & 0x10) | |
605 | v |= 0xfff0; | |
606 | } | |
607 | else if ((buffer[j] & 0xfe) == 0xf0) | |
608 | { | |
609 | v = read_memory_unsigned_integer (*pc + j + 1, 1); | |
610 | if (buffer[j] & 1) | |
611 | v |= 0xff00; | |
b4fa4770 | 612 | *pc = *pc + 1; |
908f682f SC |
613 | } |
614 | else if (buffer[j] == 0xf2) | |
615 | { | |
616 | v = read_memory_unsigned_integer (*pc + j + 1, 2); | |
b4fa4770 | 617 | *pc = *pc + 2; |
908f682f SC |
618 | } |
619 | cur_val = v; | |
620 | break; | |
621 | } | |
622 | } | |
623 | ||
624 | /* We have a full match. */ | |
625 | if (j == seq->length) | |
626 | { | |
627 | *val = cur_val; | |
628 | *pc = *pc + j; | |
629 | return seq; | |
630 | } | |
631 | } | |
632 | return 0; | |
633 | } | |
634 | ||
7df11f59 SC |
635 | /* Return the instruction that the function at the PC is using. */ |
636 | static enum insn_return_kind | |
637 | m68hc11_get_return_insn (CORE_ADDR pc) | |
638 | { | |
639 | struct minimal_symbol *sym; | |
640 | ||
641 | /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT | |
642 | function is stored by elfread.c in the high bit of the info field. | |
643 | Use this to decide which instruction the function uses to return. */ | |
644 | sym = lookup_minimal_symbol_by_pc (pc); | |
645 | if (sym == 0) | |
646 | return RETURN_RTS; | |
647 | ||
648 | if (MSYMBOL_IS_RTC (sym)) | |
649 | return RETURN_RTC; | |
650 | else if (MSYMBOL_IS_RTI (sym)) | |
651 | return RETURN_RTI; | |
652 | else | |
653 | return RETURN_RTS; | |
654 | } | |
655 | ||
656 | ||
78073dd8 AC |
657 | /* Analyze the function prologue to find some information |
658 | about the function: | |
659 | - the PC of the first line (for m68hc11_skip_prologue) | |
660 | - the offset of the previous frame saved address (from current frame) | |
661 | - the soft registers which are pushed. */ | |
662 | static void | |
82c230c2 SC |
663 | m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp, |
664 | CORE_ADDR *first_line, | |
665 | int *frame_offset, CORE_ADDR *pushed_regs) | |
78073dd8 | 666 | { |
82c230c2 | 667 | CORE_ADDR save_addr; |
78073dd8 | 668 | CORE_ADDR func_end; |
78073dd8 AC |
669 | int size; |
670 | int found_frame_point; | |
82c230c2 | 671 | int saved_reg; |
78073dd8 | 672 | CORE_ADDR first_pc; |
908f682f SC |
673 | int done = 0; |
674 | struct insn_sequence *seq_table; | |
78073dd8 AC |
675 | |
676 | first_pc = get_pc_function_start (pc); | |
677 | size = 0; | |
678 | ||
82c230c2 | 679 | m68hc11_initialize_register_info (); |
78073dd8 AC |
680 | if (first_pc == 0) |
681 | { | |
682 | *frame_offset = 0; | |
78073dd8 AC |
683 | *first_line = pc; |
684 | return; | |
685 | } | |
686 | ||
908f682f SC |
687 | seq_table = gdbarch_tdep (current_gdbarch)->prologue; |
688 | ||
78073dd8 AC |
689 | /* The 68hc11 stack is as follows: |
690 | ||
691 | ||
692 | | | | |
693 | +-----------+ | |
694 | | | | |
695 | | args | | |
696 | | | | |
697 | +-----------+ | |
698 | | PC-return | | |
699 | +-----------+ | |
700 | | Old frame | | |
701 | +-----------+ | |
702 | | | | |
703 | | Locals | | |
704 | | | | |
705 | +-----------+ <--- current frame | |
706 | | | | |
707 | ||
708 | With most processors (like 68K) the previous frame can be computed | |
709 | easily because it is always at a fixed offset (see link/unlink). | |
710 | That is, locals are accessed with negative offsets, arguments are | |
711 | accessed with positive ones. Since 68hc11 only supports offsets | |
712 | in the range [0..255], the frame is defined at the bottom of | |
713 | locals (see picture). | |
714 | ||
715 | The purpose of the analysis made here is to find out the size | |
716 | of locals in this function. An alternative to this is to use | |
717 | DWARF2 info. This would be better but I don't know how to | |
718 | access dwarf2 debug from this function. | |
719 | ||
720 | Walk from the function entry point to the point where we save | |
721 | the frame. While walking instructions, compute the size of bytes | |
722 | which are pushed. This gives us the index to access the previous | |
723 | frame. | |
724 | ||
725 | We limit the search to 128 bytes so that the algorithm is bounded | |
726 | in case of random and wrong code. We also stop and abort if | |
727 | we find an instruction which is not supposed to appear in the | |
728 | prologue (as generated by gcc 2.95, 2.96). | |
729 | */ | |
730 | pc = first_pc; | |
731 | func_end = pc + 128; | |
78073dd8 | 732 | found_frame_point = 0; |
908f682f | 733 | *frame_offset = 0; |
b4fa4770 | 734 | save_addr = fp + STACK_CORRECTION; |
908f682f | 735 | while (!done && pc + 2 < func_end) |
78073dd8 | 736 | { |
908f682f SC |
737 | struct insn_sequence *seq; |
738 | CORE_ADDR val; | |
78073dd8 | 739 | |
908f682f SC |
740 | seq = m68hc11_analyze_instruction (seq_table, &pc, &val); |
741 | if (seq == 0) | |
742 | break; | |
78073dd8 | 743 | |
908f682f | 744 | if (seq->type == P_SAVE_REG) |
78073dd8 | 745 | { |
908f682f SC |
746 | if (found_frame_point) |
747 | { | |
748 | saved_reg = m68hc11_which_soft_register (val); | |
749 | if (saved_reg < 0) | |
750 | break; | |
78073dd8 | 751 | |
908f682f SC |
752 | save_addr -= 2; |
753 | if (pushed_regs) | |
754 | pushed_regs[saved_reg] = save_addr; | |
755 | } | |
756 | else | |
757 | { | |
758 | size += 2; | |
759 | } | |
78073dd8 | 760 | } |
908f682f | 761 | else if (seq->type == P_SET_FRAME) |
78073dd8 AC |
762 | { |
763 | found_frame_point = 1; | |
908f682f | 764 | *frame_offset = size; |
78073dd8 | 765 | } |
908f682f | 766 | else if (seq->type == P_LOCAL_1) |
78073dd8 | 767 | { |
6148eca7 SC |
768 | size += 1; |
769 | } | |
908f682f | 770 | else if (seq->type == P_LOCAL_2) |
78073dd8 | 771 | { |
908f682f | 772 | size += 2; |
78073dd8 | 773 | } |
908f682f | 774 | else if (seq->type == P_LOCAL_N) |
78073dd8 | 775 | { |
908f682f SC |
776 | /* Stack pointer is decremented for the allocation. */ |
777 | if (val & 0x8000) | |
778 | size -= (int) (val) | 0xffff0000; | |
779 | else | |
780 | size -= val; | |
78073dd8 AC |
781 | } |
782 | } | |
78073dd8 AC |
783 | *first_line = pc; |
784 | } | |
785 | ||
82c230c2 | 786 | static CORE_ADDR |
78073dd8 AC |
787 | m68hc11_skip_prologue (CORE_ADDR pc) |
788 | { | |
789 | CORE_ADDR func_addr, func_end; | |
790 | struct symtab_and_line sal; | |
791 | int frame_offset; | |
78073dd8 | 792 | |
82c230c2 SC |
793 | /* If we have line debugging information, then the end of the |
794 | prologue should be the first assembly instruction of the | |
78073dd8 AC |
795 | first source line. */ |
796 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
797 | { | |
798 | sal = find_pc_line (func_addr, 0); | |
799 | if (sal.end && sal.end < func_end) | |
800 | return sal.end; | |
801 | } | |
802 | ||
82c230c2 | 803 | m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0); |
78073dd8 AC |
804 | return pc; |
805 | } | |
806 | ||
a5afb99f AC |
807 | /* Given a GDB frame, determine the address of the calling function's |
808 | frame. This will be used to create a new GDB frame struct, and | |
809 | then INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC will be | |
810 | called for the new frame. */ | |
78073dd8 | 811 | |
82c230c2 | 812 | static CORE_ADDR |
78073dd8 AC |
813 | m68hc11_frame_chain (struct frame_info *frame) |
814 | { | |
82c230c2 | 815 | CORE_ADDR addr; |
78073dd8 | 816 | |
1e2330ba AC |
817 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), |
818 | get_frame_base (frame), | |
819 | get_frame_base (frame))) | |
820 | return get_frame_base (frame); /* dummy frame same as caller's frame */ | |
6148eca7 | 821 | |
da50a4b7 AC |
822 | if (get_frame_extra_info (frame)->return_pc == 0 |
823 | || inside_entry_file (get_frame_extra_info (frame)->return_pc)) | |
82c230c2 | 824 | return (CORE_ADDR) 0; |
78073dd8 | 825 | |
1e2330ba | 826 | if (get_frame_base (frame) == 0) |
78073dd8 AC |
827 | { |
828 | return (CORE_ADDR) 0; | |
829 | } | |
830 | ||
da50a4b7 | 831 | addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION - 2; |
78073dd8 | 832 | addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF; |
78073dd8 AC |
833 | return addr; |
834 | } | |
835 | ||
836 | /* Put here the code to store, into a struct frame_saved_regs, the | |
837 | addresses of the saved registers of frame described by FRAME_INFO. | |
838 | This includes special registers such as pc and fp saved in special | |
839 | ways in the stack frame. sp is even more special: the address we | |
840 | return for it IS the sp for the next frame. */ | |
82c230c2 SC |
841 | static void |
842 | m68hc11_frame_init_saved_regs (struct frame_info *fi) | |
78073dd8 AC |
843 | { |
844 | CORE_ADDR pc; | |
184651e3 | 845 | CORE_ADDR addr; |
7df11f59 | 846 | |
b2fb4676 | 847 | if (get_frame_saved_regs (fi) == NULL) |
82c230c2 SC |
848 | frame_saved_regs_zalloc (fi); |
849 | else | |
b2fb4676 | 850 | memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS); |
82c230c2 | 851 | |
50abf9e5 | 852 | pc = get_frame_pc (fi); |
da50a4b7 AC |
853 | get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (pc); |
854 | m68hc11_guess_from_prologue (pc, get_frame_base (fi), &pc, | |
855 | &get_frame_extra_info (fi)->size, | |
b2fb4676 | 856 | get_frame_saved_regs (fi)); |
82c230c2 | 857 | |
da50a4b7 | 858 | addr = get_frame_base (fi) + get_frame_extra_info (fi)->size + STACK_CORRECTION; |
908f682f | 859 | if (soft_regs[SOFT_FP_REGNUM].name) |
b2fb4676 | 860 | get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2; |
7df11f59 SC |
861 | |
862 | /* Take into account how the function was called/returns. */ | |
da50a4b7 | 863 | if (get_frame_extra_info (fi)->return_kind == RETURN_RTC) |
7df11f59 | 864 | { |
b2fb4676 | 865 | get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr; |
7df11f59 SC |
866 | addr++; |
867 | } | |
da50a4b7 | 868 | else if (get_frame_extra_info (fi)->return_kind == RETURN_RTI) |
7df11f59 | 869 | { |
b2fb4676 AC |
870 | get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr; |
871 | get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1; | |
872 | get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3; | |
873 | get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5; | |
7df11f59 SC |
874 | addr += 7; |
875 | } | |
b2fb4676 AC |
876 | get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr; |
877 | get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM]; | |
78073dd8 AC |
878 | } |
879 | ||
82c230c2 | 880 | static void |
78073dd8 AC |
881 | m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
882 | { | |
82c230c2 | 883 | CORE_ADDR addr; |
78073dd8 | 884 | |
a00a19e9 | 885 | frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info)); |
82c230c2 | 886 | |
11c02a10 AC |
887 | if (get_next_frame (fi)) |
888 | deprecated_update_frame_pc_hack (fi, FRAME_SAVED_PC (get_next_frame (fi))); | |
82c230c2 SC |
889 | |
890 | m68hc11_frame_init_saved_regs (fi); | |
78073dd8 AC |
891 | |
892 | if (fromleaf) | |
893 | { | |
da50a4b7 AC |
894 | get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (get_frame_pc (fi)); |
895 | get_frame_extra_info (fi)->return_pc = m68hc11_saved_pc_after_call (fi); | |
78073dd8 AC |
896 | } |
897 | else | |
898 | { | |
b2fb4676 | 899 | addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM]; |
82c230c2 | 900 | addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff; |
7df11f59 SC |
901 | |
902 | /* Take into account the 68HC12 specific call (PC + page). */ | |
da50a4b7 | 903 | if (get_frame_extra_info (fi)->return_kind == RETURN_RTC |
7df11f59 SC |
904 | && addr >= 0x08000 && addr < 0x0c000 |
905 | && USE_PAGE_REGISTER) | |
906 | { | |
b2fb4676 | 907 | CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM]; |
7df11f59 SC |
908 | |
909 | unsigned page = read_memory_unsigned_integer (page_addr, 1); | |
910 | addr -= 0x08000; | |
911 | addr += ((page & 0x0ff) << 14); | |
912 | addr += 0x1000000; | |
913 | } | |
da50a4b7 | 914 | get_frame_extra_info (fi)->return_pc = addr; |
78073dd8 AC |
915 | } |
916 | } | |
917 | ||
918 | /* Same as 'info reg' but prints the registers in a different way. */ | |
919 | static void | |
920 | show_regs (char *args, int from_tty) | |
921 | { | |
82c230c2 | 922 | int ccr = read_register (HARD_CCR_REGNUM); |
78073dd8 | 923 | int i; |
82c230c2 SC |
924 | int nr; |
925 | ||
78073dd8 | 926 | printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n", |
82c230c2 SC |
927 | (int) read_register (HARD_PC_REGNUM), |
928 | (int) read_register (HARD_SP_REGNUM), | |
929 | (int) read_register (SOFT_FP_REGNUM), | |
78073dd8 AC |
930 | ccr, |
931 | ccr & M6811_S_BIT ? 'S' : '-', | |
932 | ccr & M6811_X_BIT ? 'X' : '-', | |
933 | ccr & M6811_H_BIT ? 'H' : '-', | |
934 | ccr & M6811_I_BIT ? 'I' : '-', | |
935 | ccr & M6811_N_BIT ? 'N' : '-', | |
936 | ccr & M6811_Z_BIT ? 'Z' : '-', | |
937 | ccr & M6811_V_BIT ? 'V' : '-', | |
938 | ccr & M6811_C_BIT ? 'C' : '-'); | |
939 | ||
7df11f59 | 940 | printf_filtered ("D=%04x IX=%04x IY=%04x", |
82c230c2 SC |
941 | (int) read_register (HARD_D_REGNUM), |
942 | (int) read_register (HARD_X_REGNUM), | |
943 | (int) read_register (HARD_Y_REGNUM)); | |
944 | ||
7df11f59 SC |
945 | if (USE_PAGE_REGISTER) |
946 | { | |
947 | printf_filtered (" Page=%02x", | |
948 | (int) read_register (HARD_PAGE_REGNUM)); | |
949 | } | |
950 | printf_filtered ("\n"); | |
951 | ||
82c230c2 SC |
952 | nr = 0; |
953 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) | |
78073dd8 | 954 | { |
82c230c2 SC |
955 | /* Skip registers which are not defined in the symbol table. */ |
956 | if (soft_regs[i].name == 0) | |
957 | continue; | |
958 | ||
959 | printf_filtered ("D%d=%04x", | |
960 | i - SOFT_D1_REGNUM + 1, | |
961 | (int) read_register (i)); | |
962 | nr++; | |
963 | if ((nr % 8) == 7) | |
78073dd8 AC |
964 | printf_filtered ("\n"); |
965 | else | |
966 | printf_filtered (" "); | |
967 | } | |
82c230c2 SC |
968 | if (nr && (nr % 8) != 7) |
969 | printf_filtered ("\n"); | |
78073dd8 AC |
970 | } |
971 | ||
22df305e SC |
972 | static CORE_ADDR |
973 | m68hc11_stack_align (CORE_ADDR addr) | |
974 | { | |
975 | return ((addr + 1) & -2); | |
976 | } | |
977 | ||
82c230c2 | 978 | static CORE_ADDR |
78073dd8 | 979 | m68hc11_push_arguments (int nargs, |
ea7c478f | 980 | struct value **args, |
78073dd8 AC |
981 | CORE_ADDR sp, |
982 | int struct_return, | |
983 | CORE_ADDR struct_addr) | |
984 | { | |
82c230c2 SC |
985 | int stack_alloc; |
986 | int argnum; | |
987 | int first_stack_argnum; | |
988 | int stack_offset; | |
989 | struct type *type; | |
990 | char *val; | |
991 | int len; | |
992 | ||
993 | stack_alloc = 0; | |
994 | first_stack_argnum = 0; | |
995 | if (struct_return) | |
996 | { | |
184651e3 SC |
997 | /* The struct is allocated on the stack and gdb used the stack |
998 | pointer for the address of that struct. We must apply the | |
999 | stack offset on the address. */ | |
5d1a66bd | 1000 | write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION); |
82c230c2 SC |
1001 | } |
1002 | else if (nargs > 0) | |
1003 | { | |
1004 | type = VALUE_TYPE (args[0]); | |
1005 | len = TYPE_LENGTH (type); | |
1006 | ||
1007 | /* First argument is passed in D and X registers. */ | |
1008 | if (len <= 4) | |
1009 | { | |
1010 | LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len); | |
1011 | first_stack_argnum = 1; | |
1012 | write_register (HARD_D_REGNUM, v); | |
1013 | if (len > 2) | |
1014 | { | |
1015 | v >>= 16; | |
1016 | write_register (HARD_X_REGNUM, v); | |
1017 | } | |
1018 | } | |
1019 | } | |
1020 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) | |
1021 | { | |
1022 | type = VALUE_TYPE (args[argnum]); | |
22df305e | 1023 | stack_alloc += (TYPE_LENGTH (type) + 1) & -2; |
82c230c2 SC |
1024 | } |
1025 | sp -= stack_alloc; | |
1026 | ||
5d1a66bd | 1027 | stack_offset = STACK_CORRECTION; |
82c230c2 SC |
1028 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) |
1029 | { | |
1030 | type = VALUE_TYPE (args[argnum]); | |
1031 | len = TYPE_LENGTH (type); | |
1032 | ||
1033 | val = (char*) VALUE_CONTENTS (args[argnum]); | |
1034 | write_memory (sp + stack_offset, val, len); | |
1035 | stack_offset += len; | |
22df305e SC |
1036 | if (len & 1) |
1037 | { | |
1038 | static char zero = 0; | |
1039 | ||
1040 | write_memory (sp + stack_offset, &zero, 1); | |
1041 | stack_offset++; | |
1042 | } | |
82c230c2 SC |
1043 | } |
1044 | return sp; | |
78073dd8 AC |
1045 | } |
1046 | ||
1047 | ||
82c230c2 SC |
1048 | /* Return a location where we can set a breakpoint that will be hit |
1049 | when an inferior function call returns. */ | |
78073dd8 | 1050 | CORE_ADDR |
fba45db2 | 1051 | m68hc11_call_dummy_address (void) |
78073dd8 | 1052 | { |
22df305e | 1053 | return entry_point_address (); |
78073dd8 AC |
1054 | } |
1055 | ||
82c230c2 SC |
1056 | static struct type * |
1057 | m68hc11_register_virtual_type (int reg_nr) | |
1058 | { | |
5706502a SC |
1059 | switch (reg_nr) |
1060 | { | |
1061 | case HARD_PAGE_REGNUM: | |
1062 | case HARD_A_REGNUM: | |
1063 | case HARD_B_REGNUM: | |
1064 | case HARD_CCR_REGNUM: | |
1065 | return builtin_type_uint8; | |
1066 | ||
548bcbec SC |
1067 | case M68HC12_HARD_PC_REGNUM: |
1068 | return builtin_type_uint32; | |
1069 | ||
5706502a SC |
1070 | default: |
1071 | return builtin_type_uint16; | |
1072 | } | |
82c230c2 SC |
1073 | } |
1074 | ||
1075 | static void | |
1076 | m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1077 | { | |
184651e3 SC |
1078 | /* The struct address computed by gdb is on the stack. |
1079 | It uses the stack pointer so we must apply the stack | |
1080 | correction offset. */ | |
5d1a66bd | 1081 | write_register (HARD_D_REGNUM, addr + STACK_CORRECTION); |
82c230c2 SC |
1082 | } |
1083 | ||
1084 | static void | |
1085 | m68hc11_store_return_value (struct type *type, char *valbuf) | |
1086 | { | |
22df305e SC |
1087 | int len; |
1088 | ||
1089 | len = TYPE_LENGTH (type); | |
1090 | ||
1091 | /* First argument is passed in D and X registers. */ | |
1092 | if (len <= 4) | |
1093 | { | |
1094 | LONGEST v = extract_unsigned_integer (valbuf, len); | |
1095 | ||
1096 | write_register (HARD_D_REGNUM, v); | |
1097 | if (len > 2) | |
1098 | { | |
1099 | v >>= 16; | |
1100 | write_register (HARD_X_REGNUM, v); | |
1101 | } | |
1102 | } | |
1103 | else | |
1104 | error ("return of value > 4 is not supported."); | |
82c230c2 SC |
1105 | } |
1106 | ||
1107 | ||
1108 | /* Given a return value in `regbuf' with a type `type', | |
78073dd8 AC |
1109 | extract and copy its value into `valbuf'. */ |
1110 | ||
82c230c2 SC |
1111 | static void |
1112 | m68hc11_extract_return_value (struct type *type, | |
78073dd8 AC |
1113 | char *regbuf, |
1114 | char *valbuf) | |
1115 | { | |
82c230c2 SC |
1116 | int len = TYPE_LENGTH (type); |
1117 | ||
22df305e | 1118 | switch (len) |
82c230c2 | 1119 | { |
22df305e SC |
1120 | case 1: |
1121 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len); | |
1122 | break; | |
1123 | ||
1124 | case 2: | |
1125 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len); | |
1126 | break; | |
1127 | ||
1128 | case 3: | |
1129 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1); | |
1130 | memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2); | |
1131 | break; | |
1132 | ||
1133 | case 4: | |
1134 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2); | |
1135 | memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2); | |
1136 | break; | |
1137 | ||
1138 | default: | |
82c230c2 SC |
1139 | error ("bad size for return value"); |
1140 | } | |
1141 | } | |
1142 | ||
1143 | /* Should call_function allocate stack space for a struct return? */ | |
1144 | static int | |
1145 | m68hc11_use_struct_convention (int gcc_p, struct type *type) | |
1146 | { | |
22df305e SC |
1147 | return (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1148 | || TYPE_CODE (type) == TYPE_CODE_UNION | |
1149 | || TYPE_LENGTH (type) > 4); | |
82c230c2 SC |
1150 | } |
1151 | ||
1152 | static int | |
1153 | m68hc11_return_value_on_stack (struct type *type) | |
1154 | { | |
22df305e | 1155 | return TYPE_LENGTH (type) > 4; |
82c230c2 SC |
1156 | } |
1157 | ||
1158 | /* Extract from an array REGBUF containing the (raw) register state | |
1159 | the address in which a function should return its structure value, | |
1160 | as a CORE_ADDR (or an expression that can be used as one). */ | |
1161 | static CORE_ADDR | |
1162 | m68hc11_extract_struct_value_address (char *regbuf) | |
1163 | { | |
1164 | return extract_address (®buf[HARD_D_REGNUM * 2], | |
1165 | REGISTER_RAW_SIZE (HARD_D_REGNUM)); | |
1166 | } | |
1167 | ||
1168 | /* Function: push_return_address (pc) | |
1169 | Set up the return address for the inferior function call. | |
1170 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
1171 | ||
1172 | static CORE_ADDR | |
1173 | m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
1174 | { | |
1175 | char valbuf[2]; | |
1176 | ||
22df305e | 1177 | pc = CALL_DUMMY_ADDRESS (); |
82c230c2 SC |
1178 | sp -= 2; |
1179 | store_unsigned_integer (valbuf, 2, pc); | |
5d1a66bd | 1180 | write_memory (sp + STACK_CORRECTION, valbuf, 2); |
82c230c2 SC |
1181 | return sp; |
1182 | } | |
1183 | ||
7df11f59 SC |
1184 | /* Test whether the ELF symbol corresponds to a function using rtc or |
1185 | rti to return. */ | |
1186 | ||
1187 | static void | |
1188 | m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) | |
1189 | { | |
1190 | unsigned char flags; | |
1191 | ||
1192 | flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other; | |
1193 | if (flags & STO_M68HC12_FAR) | |
1194 | MSYMBOL_SET_RTC (msym); | |
1195 | if (flags & STO_M68HC12_INTERRUPT) | |
1196 | MSYMBOL_SET_RTI (msym); | |
1197 | } | |
1198 | ||
ea3881d9 SC |
1199 | static int |
1200 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) | |
1201 | { | |
1202 | if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11) | |
1203 | return print_insn_m68hc11 (memaddr, info); | |
1204 | else | |
1205 | return print_insn_m68hc12 (memaddr, info); | |
1206 | } | |
1207 | ||
82c230c2 SC |
1208 | static struct gdbarch * |
1209 | m68hc11_gdbarch_init (struct gdbarch_info info, | |
1210 | struct gdbarch_list *arches) | |
1211 | { | |
1212 | static LONGEST m68hc11_call_dummy_words[] = | |
1213 | {0}; | |
1214 | struct gdbarch *gdbarch; | |
1215 | struct gdbarch_tdep *tdep; | |
81967506 | 1216 | int elf_flags; |
82c230c2 SC |
1217 | |
1218 | soft_reg_initialized = 0; | |
81967506 SC |
1219 | |
1220 | /* Extract the elf_flags if available. */ | |
1221 | if (info.abfd != NULL | |
1222 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) | |
1223 | elf_flags = elf_elfheader (info.abfd)->e_flags; | |
1224 | else | |
1225 | elf_flags = 0; | |
1226 | ||
82c230c2 SC |
1227 | /* try to find a pre-existing architecture */ |
1228 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1229 | arches != NULL; | |
1230 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1231 | { | |
81967506 SC |
1232 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) |
1233 | continue; | |
1234 | ||
82c230c2 SC |
1235 | return arches->gdbarch; |
1236 | } | |
1237 | ||
1238 | /* Need a new architecture. Fill in a target specific vector. */ | |
1239 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1240 | gdbarch = gdbarch_alloc (&info, tdep); | |
81967506 | 1241 | tdep->elf_flags = elf_flags; |
ed99b3d0 | 1242 | |
a5afb99f AC |
1243 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1244 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1245 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1246 | ||
5d1a66bd SC |
1247 | switch (info.bfd_arch_info->arch) |
1248 | { | |
1249 | case bfd_arch_m68hc11: | |
1250 | tdep->stack_correction = 1; | |
7df11f59 | 1251 | tdep->use_page_register = 0; |
908f682f | 1252 | tdep->prologue = m6811_prologue; |
548bcbec SC |
1253 | set_gdbarch_addr_bit (gdbarch, 16); |
1254 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); | |
1255 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); | |
1256 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); | |
5d1a66bd | 1257 | break; |
82c230c2 | 1258 | |
5d1a66bd SC |
1259 | case bfd_arch_m68hc12: |
1260 | tdep->stack_correction = 0; | |
7df11f59 | 1261 | tdep->use_page_register = elf_flags & E_M68HC12_BANKS; |
908f682f | 1262 | tdep->prologue = m6812_prologue; |
548bcbec SC |
1263 | set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16); |
1264 | set_gdbarch_num_pseudo_regs (gdbarch, | |
1265 | elf_flags & E_M68HC12_BANKS | |
1266 | ? M68HC12_NUM_PSEUDO_REGS | |
1267 | : M68HC11_NUM_PSEUDO_REGS); | |
1268 | set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS | |
1269 | ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM); | |
1270 | set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS | |
1271 | ? M68HC12_NUM_REGS : M68HC11_NUM_REGS); | |
5d1a66bd SC |
1272 | break; |
1273 | ||
1274 | default: | |
1275 | break; | |
1276 | } | |
7d32ba20 SC |
1277 | |
1278 | /* Initially set everything according to the ABI. | |
1279 | Use 16-bit integers since it will be the case for most | |
1280 | programs. The size of these types should normally be set | |
1281 | according to the dwarf2 debug information. */ | |
82c230c2 | 1282 | set_gdbarch_short_bit (gdbarch, 16); |
81967506 | 1283 | set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16); |
82c230c2 | 1284 | set_gdbarch_float_bit (gdbarch, 32); |
81967506 SC |
1285 | set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32); |
1286 | set_gdbarch_long_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32); | |
82c230c2 SC |
1287 | set_gdbarch_long_bit (gdbarch, 32); |
1288 | set_gdbarch_ptr_bit (gdbarch, 16); | |
1289 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1290 | ||
1291 | /* Set register info. */ | |
1292 | set_gdbarch_fp0_regnum (gdbarch, -1); | |
1293 | set_gdbarch_max_register_raw_size (gdbarch, 2); | |
1294 | set_gdbarch_max_register_virtual_size (gdbarch, 2); | |
82c230c2 SC |
1295 | set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs); |
1296 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1297 | ||
1298 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); | |
1299 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
1300 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
82c230c2 SC |
1301 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); |
1302 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
1303 | ||
82c230c2 SC |
1304 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); |
1305 | set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM); | |
82c230c2 SC |
1306 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); |
1307 | set_gdbarch_register_size (gdbarch, 2); | |
1308 | set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2); | |
1309 | set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type); | |
46ce284d AC |
1310 | set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read); |
1311 | set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write); | |
82c230c2 | 1312 | |
82c230c2 | 1313 | set_gdbarch_call_dummy_length (gdbarch, 0); |
82c230c2 SC |
1314 | set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address); |
1315 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ | |
1316 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1317 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
82c230c2 SC |
1318 | set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words); |
1319 | set_gdbarch_sizeof_call_dummy_words (gdbarch, | |
1320 | sizeof (m68hc11_call_dummy_words)); | |
1321 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1322 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
bdcdd535 | 1323 | set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register); |
82c230c2 | 1324 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); |
26e9b323 | 1325 | set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value); |
82c230c2 SC |
1326 | set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments); |
1327 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
1328 | set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address); | |
1329 | set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack); | |
1330 | ||
1331 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
ebba8386 | 1332 | set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value); |
26e9b323 | 1333 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address); |
82c230c2 SC |
1334 | set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); |
1335 | ||
1336 | ||
1337 | set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain); | |
82c230c2 SC |
1338 | set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc); |
1339 | set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address); | |
1340 | set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address); | |
1341 | set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call); | |
1342 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1343 | ||
bdcdd535 | 1344 | set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register); |
82c230c2 SC |
1345 | |
1346 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
ebba8386 | 1347 | set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value); |
26e9b323 | 1348 | set_gdbarch_deprecated_extract_struct_value_address |
82c230c2 SC |
1349 | (gdbarch, m68hc11_extract_struct_value_address); |
1350 | set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention); | |
1351 | set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info); | |
1352 | set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame); | |
1353 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); | |
1354 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1355 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1356 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1357 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); | |
22df305e | 1358 | set_gdbarch_stack_align (gdbarch, m68hc11_stack_align); |
70ed8774 | 1359 | set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11); |
82c230c2 | 1360 | |
7df11f59 SC |
1361 | /* Minsymbol frobbing. */ |
1362 | set_gdbarch_elf_make_msymbol_special (gdbarch, | |
1363 | m68hc11_elf_make_msymbol_special); | |
1364 | ||
82c230c2 | 1365 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
82c230c2 SC |
1366 | |
1367 | return gdbarch; | |
78073dd8 AC |
1368 | } |
1369 | ||
1370 | void | |
fba45db2 | 1371 | _initialize_m68hc11_tdep (void) |
78073dd8 | 1372 | { |
82c230c2 | 1373 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
ea3881d9 | 1374 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
78073dd8 AC |
1375 | |
1376 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1377 | } | |
1378 |