Commit | Line | Data |
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78073dd8 AC |
1 | /* Target-dependent code for Motorola 68HC11 |
2 | Copyright (C) 1999, 2000 Free Software Foundation, Inc. | |
3 | Contributed by Stephane Carrez, stcarrez@worldnet.fr | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
78073dd8 | 21 | |
82c230c2 SC |
22 | #include "defs.h" |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | #include "arch-utils.h" | |
78073dd8 | 36 | |
82c230c2 SC |
37 | #include "target.h" |
38 | #include "opcode/m68hc11.h" | |
78073dd8 AC |
39 | |
40 | /* Register numbers of various important registers. | |
41 | Note that some of these values are "real" register numbers, | |
42 | and correspond to the general registers of the machine, | |
43 | and some are "phony" register numbers which are too large | |
44 | to be actual register numbers as far as the user is concerned | |
45 | but do serve to get the desired values when passed to read_register. */ | |
46 | ||
82c230c2 SC |
47 | #define HARD_X_REGNUM 0 |
48 | #define HARD_D_REGNUM 1 | |
49 | #define HARD_Y_REGNUM 2 | |
50 | #define HARD_SP_REGNUM 3 | |
51 | #define HARD_PC_REGNUM 4 | |
52 | ||
53 | #define HARD_A_REGNUM 5 | |
54 | #define HARD_B_REGNUM 6 | |
55 | #define HARD_CCR_REGNUM 7 | |
56 | #define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM) | |
57 | ||
58 | /* Z is replaced by X or Y by gcc during machine reorg. | |
59 | ??? There is no way to get it and even know whether | |
60 | it's in X or Y or in ZS. */ | |
61 | #define SOFT_Z_REGNUM 8 | |
62 | ||
63 | /* Soft registers. These registers are special. There are treated | |
64 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). | |
65 | They are physically located in memory. */ | |
66 | #define SOFT_FP_REGNUM 9 | |
67 | #define SOFT_TMP_REGNUM 10 | |
68 | #define SOFT_ZS_REGNUM 11 | |
69 | #define SOFT_XY_REGNUM 12 | |
70 | #define SOFT_D1_REGNUM 13 | |
71 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) | |
72 | #define M68HC11_MAX_SOFT_REGS 32 | |
73 | ||
74 | #define M68HC11_NUM_REGS (8) | |
75 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) | |
76 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) | |
77 | ||
78 | #define M68HC11_REG_SIZE (2) | |
79 | ||
80 | struct gdbarch_tdep | |
81 | { | |
82 | /* from the elf header */ | |
83 | int elf_flags; | |
84 | }; | |
85 | ||
86 | struct frame_extra_info | |
87 | { | |
88 | int frame_reg; | |
89 | CORE_ADDR return_pc; | |
90 | CORE_ADDR dummy; | |
91 | int frameless; | |
92 | int size; | |
93 | }; | |
78073dd8 | 94 | |
82c230c2 SC |
95 | /* Table of registers for 68HC11. This includes the hard registers |
96 | and the soft registers used by GCC. */ | |
97 | static char * | |
98 | m68hc11_register_names[] = | |
99 | { | |
100 | "x", "d", "y", "sp", "pc", "a", "b", | |
101 | "ccr", "z", "frame","tmp", "zs", "xy", | |
102 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", | |
103 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", | |
104 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", | |
105 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", | |
106 | "d29", "d30", "d31", "d32" | |
107 | }; | |
78073dd8 | 108 | |
82c230c2 SC |
109 | struct m68hc11_soft_reg |
110 | { | |
111 | const char *name; | |
112 | CORE_ADDR addr; | |
113 | }; | |
78073dd8 | 114 | |
82c230c2 | 115 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
78073dd8 | 116 | |
82c230c2 | 117 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
78073dd8 | 118 | |
82c230c2 SC |
119 | static int soft_min_addr; |
120 | static int soft_max_addr; | |
121 | static int soft_reg_initialized = 0; | |
78073dd8 | 122 | |
184651e3 SC |
123 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
124 | to the next push location. An offset of 1 must be applied to obtain | |
125 | the address where the last value is saved. For 68hc12, the stack | |
126 | pointer points to the last value pushed. No offset is necessary. */ | |
127 | static int stack_correction = 1; | |
128 | ||
82c230c2 SC |
129 | /* Look in the symbol table for the address of a pseudo register |
130 | in memory. If we don't find it, pretend the register is not used | |
131 | and not available. */ | |
132 | static void | |
133 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) | |
134 | { | |
135 | struct minimal_symbol *msymbol; | |
78073dd8 | 136 | |
82c230c2 SC |
137 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
138 | if (msymbol) | |
139 | { | |
140 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); | |
141 | reg->name = xstrdup (name); | |
142 | ||
143 | /* Keep track of the address range for soft registers. */ | |
144 | if (reg->addr < (CORE_ADDR) soft_min_addr) | |
145 | soft_min_addr = reg->addr; | |
146 | if (reg->addr > (CORE_ADDR) soft_max_addr) | |
147 | soft_max_addr = reg->addr; | |
148 | } | |
149 | else | |
150 | { | |
151 | reg->name = 0; | |
152 | reg->addr = 0; | |
153 | } | |
154 | } | |
78073dd8 | 155 | |
82c230c2 SC |
156 | /* Initialize the table of soft register addresses according |
157 | to the symbol table. */ | |
158 | static void | |
159 | m68hc11_initialize_register_info (void) | |
160 | { | |
161 | int i; | |
78073dd8 | 162 | |
82c230c2 SC |
163 | if (soft_reg_initialized) |
164 | return; | |
165 | ||
166 | soft_min_addr = INT_MAX; | |
167 | soft_max_addr = 0; | |
168 | for (i = 0; i < M68HC11_ALL_REGS; i++) | |
169 | { | |
170 | soft_regs[i].name = 0; | |
171 | } | |
172 | ||
173 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); | |
174 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); | |
175 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); | |
176 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; | |
177 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); | |
78073dd8 | 178 | |
82c230c2 SC |
179 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
180 | { | |
181 | char buf[10]; | |
78073dd8 | 182 | |
82c230c2 SC |
183 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
184 | m68hc11_get_register_info (&soft_regs[i], buf); | |
185 | } | |
78073dd8 | 186 | |
82c230c2 SC |
187 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
188 | { | |
189 | warning ("No frame soft register found in the symbol table.\n"); | |
190 | warning ("Stack backtrace will not work.\n"); | |
191 | } | |
192 | soft_reg_initialized = 1; | |
193 | } | |
78073dd8 | 194 | |
82c230c2 SC |
195 | /* Given an address in memory, return the soft register number if |
196 | that address corresponds to a soft register. Returns -1 if not. */ | |
197 | static int | |
198 | m68hc11_which_soft_register (CORE_ADDR addr) | |
199 | { | |
200 | int i; | |
201 | ||
202 | if (addr < soft_min_addr || addr > soft_max_addr) | |
203 | return -1; | |
204 | ||
205 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) | |
206 | { | |
207 | if (soft_regs[i].name && soft_regs[i].addr == addr) | |
208 | return i; | |
209 | } | |
210 | return -1; | |
211 | } | |
78073dd8 | 212 | |
82c230c2 SC |
213 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
214 | pseudo registers. They are located in memory. Translate the register | |
215 | fetch into a memory read. */ | |
216 | void | |
217 | m68hc11_fetch_pseudo_register (int regno) | |
218 | { | |
219 | char buf[MAX_REGISTER_RAW_SIZE]; | |
78073dd8 | 220 | |
82c230c2 SC |
221 | m68hc11_initialize_register_info (); |
222 | ||
223 | /* Fetch a soft register: translate into a memory read. */ | |
224 | if (soft_regs[regno].name) | |
225 | { | |
226 | target_read_memory (soft_regs[regno].addr, buf, 2); | |
227 | } | |
228 | else | |
229 | { | |
230 | memset (buf, 0, 2); | |
231 | } | |
232 | supply_register (regno, buf); | |
233 | } | |
78073dd8 | 234 | |
82c230c2 SC |
235 | /* Store a pseudo register. Translate the register store |
236 | into a memory write. */ | |
237 | static void | |
238 | m68hc11_store_pseudo_register (int regno) | |
239 | { | |
240 | m68hc11_initialize_register_info (); | |
78073dd8 | 241 | |
82c230c2 SC |
242 | /* Store a soft register: translate into a memory write. */ |
243 | if (soft_regs[regno].name) | |
244 | { | |
245 | char buf[MAX_REGISTER_RAW_SIZE]; | |
78073dd8 | 246 | |
82c230c2 SC |
247 | read_register_gen (regno, buf); |
248 | target_write_memory (soft_regs[regno].addr, buf, 2); | |
249 | } | |
250 | } | |
78073dd8 | 251 | |
82c230c2 SC |
252 | static char * |
253 | m68hc11_register_name (int reg_nr) | |
78073dd8 | 254 | { |
82c230c2 SC |
255 | if (reg_nr < 0) |
256 | return NULL; | |
257 | if (reg_nr >= M68HC11_ALL_REGS) | |
258 | return NULL; | |
259 | ||
260 | /* If we don't know the address of a soft register, pretend it | |
261 | does not exist. */ | |
262 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) | |
263 | return NULL; | |
264 | return m68hc11_register_names[reg_nr]; | |
265 | } | |
78073dd8 | 266 | |
82c230c2 SC |
267 | static unsigned char * |
268 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
78073dd8 | 269 | { |
82c230c2 SC |
270 | static unsigned char breakpoint[] = {0x0}; |
271 | ||
272 | *lenptr = sizeof (breakpoint); | |
273 | return breakpoint; | |
78073dd8 AC |
274 | } |
275 | ||
276 | /* Immediately after a function call, return the saved pc before the frame | |
82c230c2 | 277 | is setup. */ |
78073dd8 | 278 | |
82c230c2 | 279 | static CORE_ADDR |
78073dd8 AC |
280 | m68hc11_saved_pc_after_call (struct frame_info *frame) |
281 | { | |
82c230c2 SC |
282 | CORE_ADDR addr; |
283 | ||
184651e3 | 284 | addr = read_register (HARD_SP_REGNUM) + stack_correction; |
78073dd8 AC |
285 | addr &= 0x0ffff; |
286 | return read_memory_integer (addr, 2) & 0x0FFFF; | |
287 | } | |
288 | ||
82c230c2 SC |
289 | static CORE_ADDR |
290 | m68hc11_frame_saved_pc (struct frame_info *frame) | |
291 | { | |
292 | return frame->extra_info->return_pc; | |
293 | } | |
294 | ||
295 | static CORE_ADDR | |
296 | m68hc11_frame_args_address (struct frame_info *frame) | |
297 | { | |
298 | return frame->frame; | |
299 | } | |
300 | ||
301 | static CORE_ADDR | |
302 | m68hc11_frame_locals_address (struct frame_info *frame) | |
303 | { | |
304 | return frame->frame; | |
305 | } | |
306 | ||
78073dd8 AC |
307 | /* Discard from the stack the innermost frame, restoring all saved |
308 | registers. */ | |
309 | ||
82c230c2 | 310 | static void |
fba45db2 | 311 | m68hc11_pop_frame (void) |
78073dd8 | 312 | { |
82c230c2 SC |
313 | register struct frame_info *frame = get_current_frame (); |
314 | register CORE_ADDR fp, sp; | |
315 | register int regnum; | |
316 | ||
317 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) | |
318 | generic_pop_dummy_frame (); | |
319 | else | |
320 | { | |
321 | fp = FRAME_FP (frame); | |
322 | FRAME_INIT_SAVED_REGS (frame); | |
323 | ||
324 | /* Copy regs from where they were saved in the frame. */ | |
325 | for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++) | |
326 | if (frame->saved_regs[regnum]) | |
327 | write_register (regnum, | |
328 | read_memory_integer (frame->saved_regs[regnum], 2)); | |
329 | ||
330 | write_register (HARD_PC_REGNUM, frame->extra_info->return_pc); | |
331 | sp = fp + frame->extra_info->size; | |
332 | write_register (HARD_SP_REGNUM, sp); | |
333 | } | |
334 | flush_cached_frames (); | |
78073dd8 AC |
335 | } |
336 | ||
337 | /* Analyze the function prologue to find some information | |
338 | about the function: | |
339 | - the PC of the first line (for m68hc11_skip_prologue) | |
340 | - the offset of the previous frame saved address (from current frame) | |
341 | - the soft registers which are pushed. */ | |
342 | static void | |
82c230c2 SC |
343 | m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp, |
344 | CORE_ADDR *first_line, | |
345 | int *frame_offset, CORE_ADDR *pushed_regs) | |
78073dd8 | 346 | { |
82c230c2 | 347 | CORE_ADDR save_addr; |
78073dd8 AC |
348 | CORE_ADDR func_end; |
349 | unsigned char op0, op1, op2; | |
350 | int add_sp_mode; | |
82c230c2 | 351 | int sp_adjust = 0; |
78073dd8 AC |
352 | int size; |
353 | int found_frame_point; | |
82c230c2 | 354 | int saved_reg; |
78073dd8 | 355 | CORE_ADDR first_pc; |
78073dd8 AC |
356 | |
357 | first_pc = get_pc_function_start (pc); | |
358 | size = 0; | |
359 | ||
82c230c2 | 360 | m68hc11_initialize_register_info (); |
78073dd8 AC |
361 | if (first_pc == 0) |
362 | { | |
363 | *frame_offset = 0; | |
78073dd8 AC |
364 | *first_line = pc; |
365 | return; | |
366 | } | |
367 | ||
368 | #define OP_PAGE2 (0x18) | |
369 | #define OP_LDX (0xde) | |
370 | #define OP_LDY (0xde) | |
371 | #define OP_PSHX (0x3c) | |
372 | #define OP_PSHY (0x3c) | |
373 | #define OP_STS (0x9f) | |
374 | #define OP_TSX (0x30) | |
375 | #define OP_TSY (0x30) | |
376 | #define OP_XGDX (0x8f) | |
377 | #define OP_XGDY (0x8f) | |
378 | #define OP_ADDD (0xc3) | |
379 | #define OP_TXS (0x35) | |
380 | #define OP_TYS (0x35) | |
381 | ||
382 | /* The 68hc11 stack is as follows: | |
383 | ||
384 | ||
385 | | | | |
386 | +-----------+ | |
387 | | | | |
388 | | args | | |
389 | | | | |
390 | +-----------+ | |
391 | | PC-return | | |
392 | +-----------+ | |
393 | | Old frame | | |
394 | +-----------+ | |
395 | | | | |
396 | | Locals | | |
397 | | | | |
398 | +-----------+ <--- current frame | |
399 | | | | |
400 | ||
401 | With most processors (like 68K) the previous frame can be computed | |
402 | easily because it is always at a fixed offset (see link/unlink). | |
403 | That is, locals are accessed with negative offsets, arguments are | |
404 | accessed with positive ones. Since 68hc11 only supports offsets | |
405 | in the range [0..255], the frame is defined at the bottom of | |
406 | locals (see picture). | |
407 | ||
408 | The purpose of the analysis made here is to find out the size | |
409 | of locals in this function. An alternative to this is to use | |
410 | DWARF2 info. This would be better but I don't know how to | |
411 | access dwarf2 debug from this function. | |
412 | ||
413 | Walk from the function entry point to the point where we save | |
414 | the frame. While walking instructions, compute the size of bytes | |
415 | which are pushed. This gives us the index to access the previous | |
416 | frame. | |
417 | ||
418 | We limit the search to 128 bytes so that the algorithm is bounded | |
419 | in case of random and wrong code. We also stop and abort if | |
420 | we find an instruction which is not supposed to appear in the | |
421 | prologue (as generated by gcc 2.95, 2.96). | |
422 | */ | |
423 | pc = first_pc; | |
424 | func_end = pc + 128; | |
425 | add_sp_mode = 0; | |
426 | found_frame_point = 0; | |
427 | while (pc + 2 < func_end) | |
428 | { | |
429 | op0 = read_memory_unsigned_integer (pc, 1); | |
430 | op1 = read_memory_unsigned_integer (pc + 1, 1); | |
431 | op2 = read_memory_unsigned_integer (pc + 2, 1); | |
432 | ||
433 | /* ldx *frame */ | |
82c230c2 | 434 | if (op0 == OP_LDX && op1 == M68HC11_FP_ADDR) |
78073dd8 AC |
435 | { |
436 | pc += 2; | |
437 | } | |
438 | ||
439 | /* ldy *frame */ | |
82c230c2 SC |
440 | else if (op0 == OP_PAGE2 && op1 == OP_LDY |
441 | && op2 == M68HC11_FP_ADDR) | |
78073dd8 AC |
442 | { |
443 | pc += 3; | |
444 | } | |
445 | ||
446 | /* pshx */ | |
447 | else if (op0 == OP_PSHX) | |
448 | { | |
449 | pc += 1; | |
450 | size += 2; | |
451 | } | |
452 | ||
453 | /* pshy */ | |
454 | else if (op0 == OP_PAGE2 && op1 == OP_PSHX) | |
455 | { | |
456 | pc += 2; | |
457 | size += 2; | |
458 | } | |
459 | ||
460 | /* sts *frame */ | |
82c230c2 | 461 | else if (op0 == OP_STS && op1 == M68HC11_FP_ADDR) |
78073dd8 AC |
462 | { |
463 | found_frame_point = 1; | |
464 | pc += 2; | |
465 | break; | |
466 | } | |
467 | else if (op0 == OP_TSX && op1 == OP_XGDX) | |
468 | { | |
469 | add_sp_mode = 1; | |
470 | pc += 2; | |
471 | } | |
472 | else if (op0 == OP_PAGE2 && op1 == OP_TSY && op2 == OP_PAGE2) | |
473 | { | |
474 | op0 = read_memory_unsigned_integer (pc + 3, 1); | |
475 | if (op0 != OP_XGDY) | |
476 | break; | |
477 | ||
478 | add_sp_mode = 2; | |
479 | pc += 4; | |
480 | } | |
481 | else if (add_sp_mode && op0 == OP_ADDD) | |
482 | { | |
483 | sp_adjust = read_memory_unsigned_integer (pc + 1, 2); | |
484 | if (sp_adjust & 0x8000) | |
485 | sp_adjust |= 0xffff0000L; | |
486 | ||
487 | sp_adjust = -sp_adjust; | |
488 | add_sp_mode |= 4; | |
489 | pc += 3; | |
490 | } | |
491 | else if (add_sp_mode == (1 | 4) && op0 == OP_XGDX | |
492 | && op1 == OP_TXS) | |
493 | { | |
494 | size += sp_adjust; | |
495 | pc += 2; | |
496 | add_sp_mode = 0; | |
497 | } | |
498 | else if (add_sp_mode == (2 | 4) && op0 == OP_PAGE2 | |
499 | && op1 == OP_XGDY && op2 == OP_PAGE2) | |
500 | { | |
501 | op0 = read_memory_unsigned_integer (pc + 3, 1); | |
502 | if (op0 != OP_TYS) | |
503 | break; | |
504 | ||
505 | size += sp_adjust; | |
506 | pc += 4; | |
507 | add_sp_mode = 0; | |
508 | } | |
509 | else | |
510 | { | |
511 | break; | |
512 | } | |
513 | } | |
514 | ||
515 | if (found_frame_point == 0) | |
516 | { | |
517 | *frame_offset = 0; | |
518 | } | |
519 | else | |
520 | { | |
521 | *frame_offset = size; | |
522 | } | |
523 | ||
524 | /* Now, look forward to see how many registers are pushed on the stack. | |
525 | We look only for soft registers so there must be a first LDX *REG | |
526 | before a PSHX. */ | |
82c230c2 SC |
527 | saved_reg = -1; |
528 | save_addr = fp; | |
78073dd8 AC |
529 | while (pc + 2 < func_end) |
530 | { | |
531 | op0 = read_memory_unsigned_integer (pc, 1); | |
532 | op1 = read_memory_unsigned_integer (pc + 1, 1); | |
533 | op2 = read_memory_unsigned_integer (pc + 2, 1); | |
82c230c2 | 534 | if (op0 == OP_LDX) |
78073dd8 | 535 | { |
82c230c2 SC |
536 | saved_reg = m68hc11_which_soft_register (op1); |
537 | if (saved_reg < 0 || saved_reg == SOFT_FP_REGNUM) | |
538 | break; | |
539 | ||
78073dd8 AC |
540 | pc += 2; |
541 | } | |
82c230c2 | 542 | else if (op0 == OP_PAGE2 && op1 == OP_LDY) |
78073dd8 | 543 | { |
82c230c2 SC |
544 | saved_reg = m68hc11_which_soft_register (op2); |
545 | if (saved_reg < 0 || saved_reg == SOFT_FP_REGNUM) | |
546 | break; | |
547 | ||
78073dd8 AC |
548 | pc += 3; |
549 | } | |
550 | else if (op0 == OP_PSHX) | |
551 | { | |
552 | /* If there was no load, this is a push for a function call. */ | |
82c230c2 | 553 | if (saved_reg < 0 || saved_reg >= M68HC11_ALL_REGS) |
78073dd8 | 554 | break; |
82c230c2 SC |
555 | |
556 | /* Keep track of the address where that register is saved | |
557 | on the stack. */ | |
558 | save_addr -= 2; | |
559 | if (pushed_regs) | |
560 | pushed_regs[saved_reg] = save_addr; | |
561 | ||
78073dd8 | 562 | pc += 1; |
82c230c2 | 563 | saved_reg = -1; |
78073dd8 AC |
564 | } |
565 | else if (op0 == OP_PAGE2 && op1 == OP_PSHY) | |
566 | { | |
82c230c2 | 567 | if (saved_reg < 0 || saved_reg >= M68HC11_ALL_REGS) |
78073dd8 AC |
568 | break; |
569 | ||
82c230c2 SC |
570 | /* Keep track of the address where that register is saved |
571 | on the stack. */ | |
572 | save_addr -= 2; | |
573 | if (pushed_regs) | |
574 | pushed_regs[saved_reg] = save_addr; | |
575 | ||
78073dd8 | 576 | pc += 2; |
82c230c2 | 577 | saved_reg = -1; |
78073dd8 AC |
578 | } |
579 | else | |
580 | { | |
581 | break; | |
582 | } | |
583 | } | |
78073dd8 AC |
584 | *first_line = pc; |
585 | } | |
586 | ||
82c230c2 | 587 | static CORE_ADDR |
78073dd8 AC |
588 | m68hc11_skip_prologue (CORE_ADDR pc) |
589 | { | |
590 | CORE_ADDR func_addr, func_end; | |
591 | struct symtab_and_line sal; | |
592 | int frame_offset; | |
78073dd8 | 593 | |
82c230c2 SC |
594 | /* If we have line debugging information, then the end of the |
595 | prologue should be the first assembly instruction of the | |
78073dd8 AC |
596 | first source line. */ |
597 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
598 | { | |
599 | sal = find_pc_line (func_addr, 0); | |
600 | if (sal.end && sal.end < func_end) | |
601 | return sal.end; | |
602 | } | |
603 | ||
82c230c2 | 604 | m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0); |
78073dd8 AC |
605 | return pc; |
606 | } | |
607 | ||
608 | /* Given a GDB frame, determine the address of the calling function's frame. | |
609 | This will be used to create a new GDB frame struct, and then | |
610 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
611 | */ | |
612 | ||
82c230c2 | 613 | static CORE_ADDR |
78073dd8 AC |
614 | m68hc11_frame_chain (struct frame_info *frame) |
615 | { | |
82c230c2 | 616 | CORE_ADDR addr; |
78073dd8 | 617 | |
82c230c2 SC |
618 | if (frame->extra_info->return_pc == 0 |
619 | || inside_entry_file (frame->extra_info->return_pc)) | |
620 | return (CORE_ADDR) 0; | |
78073dd8 AC |
621 | |
622 | if (frame->frame == 0) | |
623 | { | |
624 | return (CORE_ADDR) 0; | |
625 | } | |
626 | ||
184651e3 | 627 | addr = frame->frame + frame->extra_info->size + stack_correction - 2; |
78073dd8 AC |
628 | addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF; |
629 | if (addr == 0) | |
630 | { | |
82c230c2 | 631 | return (CORE_ADDR) 0; |
78073dd8 AC |
632 | } |
633 | ||
634 | return addr; | |
635 | } | |
636 | ||
637 | /* Put here the code to store, into a struct frame_saved_regs, the | |
638 | addresses of the saved registers of frame described by FRAME_INFO. | |
639 | This includes special registers such as pc and fp saved in special | |
640 | ways in the stack frame. sp is even more special: the address we | |
641 | return for it IS the sp for the next frame. */ | |
82c230c2 SC |
642 | static void |
643 | m68hc11_frame_init_saved_regs (struct frame_info *fi) | |
78073dd8 AC |
644 | { |
645 | CORE_ADDR pc; | |
184651e3 SC |
646 | CORE_ADDR addr; |
647 | ||
82c230c2 SC |
648 | if (fi->saved_regs == NULL) |
649 | frame_saved_regs_zalloc (fi); | |
650 | else | |
651 | memset (fi->saved_regs, 0, sizeof (fi->saved_regs)); | |
652 | ||
78073dd8 | 653 | pc = fi->pc; |
82c230c2 SC |
654 | m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size, |
655 | fi->saved_regs); | |
656 | ||
184651e3 SC |
657 | addr = fi->frame + fi->extra_info->size + stack_correction; |
658 | fi->saved_regs[SOFT_FP_REGNUM] = addr - 2; | |
659 | fi->saved_regs[HARD_SP_REGNUM] = addr; | |
82c230c2 | 660 | fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM]; |
78073dd8 AC |
661 | } |
662 | ||
82c230c2 | 663 | static void |
78073dd8 AC |
664 | m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
665 | { | |
82c230c2 | 666 | CORE_ADDR addr; |
78073dd8 | 667 | |
82c230c2 SC |
668 | fi->extra_info = (struct frame_extra_info *) |
669 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
670 | ||
671 | if (fi->next) | |
672 | fi->pc = FRAME_SAVED_PC (fi->next); | |
673 | ||
674 | m68hc11_frame_init_saved_regs (fi); | |
78073dd8 AC |
675 | |
676 | if (fromleaf) | |
677 | { | |
82c230c2 | 678 | fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi); |
78073dd8 AC |
679 | } |
680 | else | |
681 | { | |
184651e3 | 682 | addr = fi->frame + fi->extra_info->size + stack_correction; |
82c230c2 SC |
683 | addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff; |
684 | fi->extra_info->return_pc = addr; | |
78073dd8 AC |
685 | #if 0 |
686 | printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n", | |
687 | fi->pc, | |
688 | fi->frame, fi->size, | |
689 | addr & 0x0ffff, | |
690 | fi->return_pc); | |
691 | #endif | |
692 | } | |
693 | } | |
694 | ||
695 | /* Same as 'info reg' but prints the registers in a different way. */ | |
696 | static void | |
697 | show_regs (char *args, int from_tty) | |
698 | { | |
82c230c2 | 699 | int ccr = read_register (HARD_CCR_REGNUM); |
78073dd8 | 700 | int i; |
82c230c2 SC |
701 | int nr; |
702 | ||
78073dd8 | 703 | printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n", |
82c230c2 SC |
704 | (int) read_register (HARD_PC_REGNUM), |
705 | (int) read_register (HARD_SP_REGNUM), | |
706 | (int) read_register (SOFT_FP_REGNUM), | |
78073dd8 AC |
707 | ccr, |
708 | ccr & M6811_S_BIT ? 'S' : '-', | |
709 | ccr & M6811_X_BIT ? 'X' : '-', | |
710 | ccr & M6811_H_BIT ? 'H' : '-', | |
711 | ccr & M6811_I_BIT ? 'I' : '-', | |
712 | ccr & M6811_N_BIT ? 'N' : '-', | |
713 | ccr & M6811_Z_BIT ? 'Z' : '-', | |
714 | ccr & M6811_V_BIT ? 'V' : '-', | |
715 | ccr & M6811_C_BIT ? 'C' : '-'); | |
716 | ||
717 | printf_filtered ("D=%04x IX=%04x IY=%04x\n", | |
82c230c2 SC |
718 | (int) read_register (HARD_D_REGNUM), |
719 | (int) read_register (HARD_X_REGNUM), | |
720 | (int) read_register (HARD_Y_REGNUM)); | |
721 | ||
722 | nr = 0; | |
723 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) | |
78073dd8 | 724 | { |
82c230c2 SC |
725 | /* Skip registers which are not defined in the symbol table. */ |
726 | if (soft_regs[i].name == 0) | |
727 | continue; | |
728 | ||
729 | printf_filtered ("D%d=%04x", | |
730 | i - SOFT_D1_REGNUM + 1, | |
731 | (int) read_register (i)); | |
732 | nr++; | |
733 | if ((nr % 8) == 7) | |
78073dd8 AC |
734 | printf_filtered ("\n"); |
735 | else | |
736 | printf_filtered (" "); | |
737 | } | |
82c230c2 SC |
738 | if (nr && (nr % 8) != 7) |
739 | printf_filtered ("\n"); | |
78073dd8 AC |
740 | } |
741 | ||
82c230c2 | 742 | static CORE_ADDR |
78073dd8 AC |
743 | m68hc11_push_arguments (int nargs, |
744 | value_ptr *args, | |
745 | CORE_ADDR sp, | |
746 | int struct_return, | |
747 | CORE_ADDR struct_addr) | |
748 | { | |
82c230c2 SC |
749 | int stack_alloc; |
750 | int argnum; | |
751 | int first_stack_argnum; | |
752 | int stack_offset; | |
753 | struct type *type; | |
754 | char *val; | |
755 | int len; | |
756 | ||
757 | stack_alloc = 0; | |
758 | first_stack_argnum = 0; | |
759 | if (struct_return) | |
760 | { | |
184651e3 SC |
761 | /* The struct is allocated on the stack and gdb used the stack |
762 | pointer for the address of that struct. We must apply the | |
763 | stack offset on the address. */ | |
764 | write_register (HARD_D_REGNUM, struct_addr + stack_correction); | |
82c230c2 SC |
765 | } |
766 | else if (nargs > 0) | |
767 | { | |
768 | type = VALUE_TYPE (args[0]); | |
769 | len = TYPE_LENGTH (type); | |
770 | ||
771 | /* First argument is passed in D and X registers. */ | |
772 | if (len <= 4) | |
773 | { | |
774 | LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len); | |
775 | first_stack_argnum = 1; | |
776 | write_register (HARD_D_REGNUM, v); | |
777 | if (len > 2) | |
778 | { | |
779 | v >>= 16; | |
780 | write_register (HARD_X_REGNUM, v); | |
781 | } | |
782 | } | |
783 | } | |
784 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) | |
785 | { | |
786 | type = VALUE_TYPE (args[argnum]); | |
787 | stack_alloc += (TYPE_LENGTH (type) + 1) & ~2; | |
788 | } | |
789 | sp -= stack_alloc; | |
790 | ||
184651e3 | 791 | stack_offset = stack_correction; |
82c230c2 SC |
792 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) |
793 | { | |
794 | type = VALUE_TYPE (args[argnum]); | |
795 | len = TYPE_LENGTH (type); | |
796 | ||
797 | val = (char*) VALUE_CONTENTS (args[argnum]); | |
798 | write_memory (sp + stack_offset, val, len); | |
799 | stack_offset += len; | |
800 | } | |
801 | return sp; | |
78073dd8 AC |
802 | } |
803 | ||
804 | ||
82c230c2 SC |
805 | /* Return a location where we can set a breakpoint that will be hit |
806 | when an inferior function call returns. */ | |
78073dd8 | 807 | CORE_ADDR |
fba45db2 | 808 | m68hc11_call_dummy_address (void) |
78073dd8 | 809 | { |
82c230c2 | 810 | return (CORE_ADDR) read_register (HARD_PC_REGNUM); |
78073dd8 AC |
811 | } |
812 | ||
82c230c2 SC |
813 | static struct type * |
814 | m68hc11_register_virtual_type (int reg_nr) | |
815 | { | |
816 | return builtin_type_uint16; | |
817 | } | |
818 | ||
819 | static void | |
820 | m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
821 | { | |
184651e3 SC |
822 | /* The struct address computed by gdb is on the stack. |
823 | It uses the stack pointer so we must apply the stack | |
824 | correction offset. */ | |
825 | write_register (HARD_D_REGNUM, addr + stack_correction); | |
82c230c2 SC |
826 | } |
827 | ||
828 | static void | |
829 | m68hc11_store_return_value (struct type *type, char *valbuf) | |
830 | { | |
831 | write_register_bytes (REGISTER_BYTE (HARD_D_REGNUM), | |
832 | valbuf, TYPE_LENGTH (type)); | |
833 | } | |
834 | ||
835 | ||
836 | /* Given a return value in `regbuf' with a type `type', | |
78073dd8 AC |
837 | extract and copy its value into `valbuf'. */ |
838 | ||
82c230c2 SC |
839 | static void |
840 | m68hc11_extract_return_value (struct type *type, | |
78073dd8 AC |
841 | char *regbuf, |
842 | char *valbuf) | |
843 | { | |
82c230c2 SC |
844 | int len = TYPE_LENGTH (type); |
845 | ||
846 | if (len <= 2) | |
847 | { | |
848 | memcpy (valbuf, ®buf[2], len); | |
849 | } | |
850 | else if (len <= 4) | |
851 | { | |
852 | memcpy (valbuf, regbuf, len); | |
853 | } | |
854 | else | |
855 | { | |
856 | error ("bad size for return value"); | |
857 | } | |
858 | } | |
859 | ||
860 | /* Should call_function allocate stack space for a struct return? */ | |
861 | static int | |
862 | m68hc11_use_struct_convention (int gcc_p, struct type *type) | |
863 | { | |
864 | return (TYPE_LENGTH (type) > 4); | |
865 | } | |
866 | ||
867 | static int | |
868 | m68hc11_return_value_on_stack (struct type *type) | |
869 | { | |
870 | return m68hc11_use_struct_convention (1, type); | |
871 | } | |
872 | ||
873 | /* Extract from an array REGBUF containing the (raw) register state | |
874 | the address in which a function should return its structure value, | |
875 | as a CORE_ADDR (or an expression that can be used as one). */ | |
876 | static CORE_ADDR | |
877 | m68hc11_extract_struct_value_address (char *regbuf) | |
878 | { | |
879 | return extract_address (®buf[HARD_D_REGNUM * 2], | |
880 | REGISTER_RAW_SIZE (HARD_D_REGNUM)); | |
881 | } | |
882 | ||
883 | /* Function: push_return_address (pc) | |
884 | Set up the return address for the inferior function call. | |
885 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
886 | ||
887 | static CORE_ADDR | |
888 | m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
889 | { | |
890 | char valbuf[2]; | |
891 | ||
892 | pc = read_register (HARD_PC_REGNUM); | |
893 | sp -= 2; | |
894 | store_unsigned_integer (valbuf, 2, pc); | |
184651e3 | 895 | write_memory (sp + stack_correction, valbuf, 2); |
82c230c2 SC |
896 | return sp; |
897 | } | |
898 | ||
899 | /* Index within `registers' of the first byte of the space for | |
900 | register N. */ | |
901 | static int | |
902 | m68hc11_register_byte (int reg_nr) | |
903 | { | |
904 | return (reg_nr * M68HC11_REG_SIZE); | |
905 | } | |
906 | ||
907 | static int | |
908 | m68hc11_register_raw_size (int reg_nr) | |
909 | { | |
910 | return M68HC11_REG_SIZE; | |
911 | } | |
912 | ||
913 | static struct gdbarch * | |
914 | m68hc11_gdbarch_init (struct gdbarch_info info, | |
915 | struct gdbarch_list *arches) | |
916 | { | |
917 | static LONGEST m68hc11_call_dummy_words[] = | |
918 | {0}; | |
919 | struct gdbarch *gdbarch; | |
920 | struct gdbarch_tdep *tdep; | |
921 | int elf_flags; | |
922 | ||
923 | /* Extract the elf_flags if available */ | |
924 | elf_flags = 0; | |
925 | ||
926 | soft_reg_initialized = 0; | |
927 | ||
928 | /* try to find a pre-existing architecture */ | |
929 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
930 | arches != NULL; | |
931 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
932 | { | |
933 | /* MIPS needs to be pedantic about which ABI the object is | |
934 | using. */ | |
935 | if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags) | |
936 | continue; | |
937 | return arches->gdbarch; | |
938 | } | |
939 | ||
940 | /* Need a new architecture. Fill in a target specific vector. */ | |
941 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
942 | gdbarch = gdbarch_alloc (&info, tdep); | |
943 | tdep->elf_flags = elf_flags; | |
944 | ||
945 | /* Initially set everything according to the ABI. */ | |
946 | set_gdbarch_short_bit (gdbarch, 16); | |
947 | set_gdbarch_int_bit (gdbarch, 32); | |
948 | set_gdbarch_float_bit (gdbarch, 32); | |
949 | set_gdbarch_double_bit (gdbarch, 64); | |
950 | set_gdbarch_long_double_bit (gdbarch, 64); | |
951 | set_gdbarch_long_bit (gdbarch, 32); | |
952 | set_gdbarch_ptr_bit (gdbarch, 16); | |
953 | set_gdbarch_long_long_bit (gdbarch, 64); | |
954 | ||
955 | /* Set register info. */ | |
956 | set_gdbarch_fp0_regnum (gdbarch, -1); | |
957 | set_gdbarch_max_register_raw_size (gdbarch, 2); | |
958 | set_gdbarch_max_register_virtual_size (gdbarch, 2); | |
959 | set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size); | |
960 | set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size); | |
961 | set_gdbarch_register_byte (gdbarch, m68hc11_register_byte); | |
962 | set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs); | |
963 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
964 | ||
965 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); | |
966 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
967 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
968 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); | |
969 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); | |
970 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
971 | ||
972 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); | |
973 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); | |
974 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); | |
975 | set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM); | |
976 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); | |
977 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); | |
978 | set_gdbarch_register_size (gdbarch, 2); | |
979 | set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2); | |
980 | set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type); | |
981 | set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register); | |
982 | set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register); | |
983 | ||
984 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
985 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
986 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
987 | set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address); | |
988 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ | |
989 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
990 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
991 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); | |
992 | set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words); | |
993 | set_gdbarch_sizeof_call_dummy_words (gdbarch, | |
994 | sizeof (m68hc11_call_dummy_words)); | |
995 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
996 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
997 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
998 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
999 | set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value); | |
1000 | set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments); | |
1001 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
1002 | set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address); | |
1003 | set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack); | |
1004 | ||
1005 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
1006 | set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value); | |
1007 | set_gdbarch_extract_struct_value_address (gdbarch, | |
1008 | m68hc11_extract_struct_value_address); | |
1009 | set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); | |
1010 | ||
1011 | ||
1012 | set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain); | |
1013 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); | |
1014 | set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc); | |
1015 | set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address); | |
1016 | set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address); | |
1017 | set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call); | |
1018 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1019 | ||
1020 | set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid); | |
1021 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1022 | ||
1023 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
1024 | set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value); | |
1025 | set_gdbarch_extract_struct_value_address | |
1026 | (gdbarch, m68hc11_extract_struct_value_address); | |
1027 | set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention); | |
1028 | set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info); | |
1029 | set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame); | |
1030 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); | |
1031 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1032 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1033 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1034 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); | |
1035 | ||
1036 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1037 | set_gdbarch_ieee_float (gdbarch, 1); | |
1038 | ||
1039 | return gdbarch; | |
78073dd8 AC |
1040 | } |
1041 | ||
1042 | void | |
fba45db2 | 1043 | _initialize_m68hc11_tdep (void) |
78073dd8 | 1044 | { |
82c230c2 SC |
1045 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
1046 | if (!tm_print_insn) /* Someone may have already set it */ | |
1047 | tm_print_insn = print_insn_m68hc11; | |
78073dd8 AC |
1048 | |
1049 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1050 | } | |
1051 |