Commit | Line | Data |
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908f682f | 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
51603483 | 2 | Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
ffe1f3ee | 3 | Contributed by Stephane Carrez, stcarrez@nerim.fr |
78073dd8 AC |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
78073dd8 | 21 | |
82c230c2 SC |
22 | #include "defs.h" |
23 | #include "frame.h" | |
82c230c2 SC |
24 | #include "symtab.h" |
25 | #include "gdbtypes.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "gdbcore.h" | |
28 | #include "gdb_string.h" | |
29 | #include "value.h" | |
30 | #include "inferior.h" | |
31 | #include "dis-asm.h" | |
32 | #include "symfile.h" | |
33 | #include "objfiles.h" | |
34 | #include "arch-utils.h" | |
4e052eda | 35 | #include "regcache.h" |
b631436b | 36 | #include "reggroups.h" |
78073dd8 | 37 | |
82c230c2 SC |
38 | #include "target.h" |
39 | #include "opcode/m68hc11.h" | |
81967506 SC |
40 | #include "elf/m68hc11.h" |
41 | #include "elf-bfd.h" | |
78073dd8 | 42 | |
7df11f59 SC |
43 | /* Macros for setting and testing a bit in a minimal symbol. |
44 | For 68HC11/68HC12 we have two flags that tell which return | |
45 | type the function is using. This is used for prologue and frame | |
46 | analysis to compute correct stack frame layout. | |
47 | ||
48 | The MSB of the minimal symbol's "info" field is used for this purpose. | |
49 | This field is already being used to store the symbol size, so the | |
50 | assumption is that the symbol size cannot exceed 2^30. | |
51 | ||
52 | MSYMBOL_SET_RTC Actually sets the "RTC" bit. | |
53 | MSYMBOL_SET_RTI Actually sets the "RTI" bit. | |
54 | MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol. | |
55 | MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. | |
56 | MSYMBOL_SIZE Returns the size of the minimal symbol, | |
57 | i.e. the "info" field with the "special" bit | |
58 | masked out. */ | |
59 | ||
60 | #define MSYMBOL_SET_RTC(msym) \ | |
61 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ | |
62 | | 0x80000000) | |
63 | ||
64 | #define MSYMBOL_SET_RTI(msym) \ | |
65 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ | |
66 | | 0x40000000) | |
67 | ||
68 | #define MSYMBOL_IS_RTC(msym) \ | |
69 | (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0) | |
70 | ||
71 | #define MSYMBOL_IS_RTI(msym) \ | |
72 | (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0) | |
73 | ||
74 | #define MSYMBOL_SIZE(msym) \ | |
75 | ((long) MSYMBOL_INFO (msym) & 0x3fffffff) | |
76 | ||
77 | enum insn_return_kind { | |
78 | RETURN_RTS, | |
79 | RETURN_RTC, | |
80 | RETURN_RTI | |
81 | }; | |
82 | ||
83 | ||
78073dd8 AC |
84 | /* Register numbers of various important registers. |
85 | Note that some of these values are "real" register numbers, | |
86 | and correspond to the general registers of the machine, | |
87 | and some are "phony" register numbers which are too large | |
88 | to be actual register numbers as far as the user is concerned | |
89 | but do serve to get the desired values when passed to read_register. */ | |
90 | ||
82c230c2 SC |
91 | #define HARD_X_REGNUM 0 |
92 | #define HARD_D_REGNUM 1 | |
93 | #define HARD_Y_REGNUM 2 | |
94 | #define HARD_SP_REGNUM 3 | |
95 | #define HARD_PC_REGNUM 4 | |
96 | ||
97 | #define HARD_A_REGNUM 5 | |
98 | #define HARD_B_REGNUM 6 | |
99 | #define HARD_CCR_REGNUM 7 | |
5706502a SC |
100 | |
101 | /* 68HC12 page number register. | |
102 | Note: to keep a compatibility with gcc register naming, we must | |
103 | not have to rename FP and other soft registers. The page register | |
104 | is a real hard register and must therefore be counted by NUM_REGS. | |
105 | For this it has the same number as Z register (which is not used). */ | |
106 | #define HARD_PAGE_REGNUM 8 | |
107 | #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM) | |
82c230c2 SC |
108 | |
109 | /* Z is replaced by X or Y by gcc during machine reorg. | |
110 | ??? There is no way to get it and even know whether | |
111 | it's in X or Y or in ZS. */ | |
112 | #define SOFT_Z_REGNUM 8 | |
113 | ||
114 | /* Soft registers. These registers are special. There are treated | |
115 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). | |
116 | They are physically located in memory. */ | |
117 | #define SOFT_FP_REGNUM 9 | |
118 | #define SOFT_TMP_REGNUM 10 | |
119 | #define SOFT_ZS_REGNUM 11 | |
120 | #define SOFT_XY_REGNUM 12 | |
f91a8b6b SC |
121 | #define SOFT_UNUSED_REGNUM 13 |
122 | #define SOFT_D1_REGNUM 14 | |
82c230c2 SC |
123 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) |
124 | #define M68HC11_MAX_SOFT_REGS 32 | |
125 | ||
126 | #define M68HC11_NUM_REGS (8) | |
127 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) | |
128 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) | |
129 | ||
130 | #define M68HC11_REG_SIZE (2) | |
131 | ||
548bcbec SC |
132 | #define M68HC12_NUM_REGS (9) |
133 | #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1) | |
134 | #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1) | |
135 | ||
908f682f | 136 | struct insn_sequence; |
82c230c2 SC |
137 | struct gdbarch_tdep |
138 | { | |
5d1a66bd SC |
139 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
140 | to the next push location. An offset of 1 must be applied to obtain | |
141 | the address where the last value is saved. For 68hc12, the stack | |
142 | pointer points to the last value pushed. No offset is necessary. */ | |
143 | int stack_correction; | |
908f682f SC |
144 | |
145 | /* Description of instructions in the prologue. */ | |
146 | struct insn_sequence *prologue; | |
81967506 | 147 | |
7df11f59 SC |
148 | /* True if the page memory bank register is available |
149 | and must be used. */ | |
150 | int use_page_register; | |
151 | ||
81967506 SC |
152 | /* ELF flags for ABI. */ |
153 | int elf_flags; | |
82c230c2 SC |
154 | }; |
155 | ||
5d1a66bd SC |
156 | #define M6811_TDEP gdbarch_tdep (current_gdbarch) |
157 | #define STACK_CORRECTION (M6811_TDEP->stack_correction) | |
7df11f59 | 158 | #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register) |
5d1a66bd | 159 | |
82c230c2 SC |
160 | struct frame_extra_info |
161 | { | |
82c230c2 | 162 | CORE_ADDR return_pc; |
82c230c2 SC |
163 | int frameless; |
164 | int size; | |
7df11f59 | 165 | enum insn_return_kind return_kind; |
82c230c2 | 166 | }; |
78073dd8 | 167 | |
82c230c2 SC |
168 | /* Table of registers for 68HC11. This includes the hard registers |
169 | and the soft registers used by GCC. */ | |
170 | static char * | |
171 | m68hc11_register_names[] = | |
172 | { | |
173 | "x", "d", "y", "sp", "pc", "a", "b", | |
5706502a | 174 | "ccr", "page", "frame","tmp", "zs", "xy", 0, |
82c230c2 SC |
175 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
176 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", | |
177 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", | |
178 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", | |
179 | "d29", "d30", "d31", "d32" | |
180 | }; | |
78073dd8 | 181 | |
82c230c2 SC |
182 | struct m68hc11_soft_reg |
183 | { | |
184 | const char *name; | |
185 | CORE_ADDR addr; | |
186 | }; | |
78073dd8 | 187 | |
82c230c2 | 188 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
78073dd8 | 189 | |
82c230c2 | 190 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
78073dd8 | 191 | |
82c230c2 SC |
192 | static int soft_min_addr; |
193 | static int soft_max_addr; | |
194 | static int soft_reg_initialized = 0; | |
78073dd8 | 195 | |
82c230c2 SC |
196 | /* Look in the symbol table for the address of a pseudo register |
197 | in memory. If we don't find it, pretend the register is not used | |
198 | and not available. */ | |
199 | static void | |
200 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) | |
201 | { | |
202 | struct minimal_symbol *msymbol; | |
78073dd8 | 203 | |
82c230c2 SC |
204 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
205 | if (msymbol) | |
206 | { | |
207 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); | |
208 | reg->name = xstrdup (name); | |
209 | ||
210 | /* Keep track of the address range for soft registers. */ | |
211 | if (reg->addr < (CORE_ADDR) soft_min_addr) | |
212 | soft_min_addr = reg->addr; | |
213 | if (reg->addr > (CORE_ADDR) soft_max_addr) | |
214 | soft_max_addr = reg->addr; | |
215 | } | |
216 | else | |
217 | { | |
218 | reg->name = 0; | |
219 | reg->addr = 0; | |
220 | } | |
221 | } | |
78073dd8 | 222 | |
82c230c2 SC |
223 | /* Initialize the table of soft register addresses according |
224 | to the symbol table. */ | |
225 | static void | |
226 | m68hc11_initialize_register_info (void) | |
227 | { | |
228 | int i; | |
78073dd8 | 229 | |
82c230c2 SC |
230 | if (soft_reg_initialized) |
231 | return; | |
232 | ||
233 | soft_min_addr = INT_MAX; | |
234 | soft_max_addr = 0; | |
235 | for (i = 0; i < M68HC11_ALL_REGS; i++) | |
236 | { | |
237 | soft_regs[i].name = 0; | |
238 | } | |
239 | ||
240 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); | |
241 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); | |
242 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); | |
243 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; | |
244 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); | |
78073dd8 | 245 | |
82c230c2 SC |
246 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
247 | { | |
248 | char buf[10]; | |
78073dd8 | 249 | |
82c230c2 SC |
250 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
251 | m68hc11_get_register_info (&soft_regs[i], buf); | |
252 | } | |
78073dd8 | 253 | |
82c230c2 SC |
254 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
255 | { | |
256 | warning ("No frame soft register found in the symbol table.\n"); | |
257 | warning ("Stack backtrace will not work.\n"); | |
258 | } | |
259 | soft_reg_initialized = 1; | |
260 | } | |
78073dd8 | 261 | |
82c230c2 SC |
262 | /* Given an address in memory, return the soft register number if |
263 | that address corresponds to a soft register. Returns -1 if not. */ | |
264 | static int | |
265 | m68hc11_which_soft_register (CORE_ADDR addr) | |
266 | { | |
267 | int i; | |
268 | ||
269 | if (addr < soft_min_addr || addr > soft_max_addr) | |
270 | return -1; | |
271 | ||
272 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) | |
273 | { | |
274 | if (soft_regs[i].name && soft_regs[i].addr == addr) | |
275 | return i; | |
276 | } | |
277 | return -1; | |
278 | } | |
78073dd8 | 279 | |
82c230c2 SC |
280 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
281 | pseudo registers. They are located in memory. Translate the register | |
282 | fetch into a memory read. */ | |
46ce284d AC |
283 | static void |
284 | m68hc11_pseudo_register_read (struct gdbarch *gdbarch, | |
285 | struct regcache *regcache, | |
286 | int regno, void *buf) | |
82c230c2 | 287 | { |
548bcbec SC |
288 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
289 | addressing mode. */ | |
290 | if (regno == M68HC12_HARD_PC_REGNUM) | |
291 | { | |
292 | const int regsize = TYPE_LENGTH (builtin_type_uint32); | |
293 | CORE_ADDR pc = read_register (HARD_PC_REGNUM); | |
294 | int page = read_register (HARD_PAGE_REGNUM); | |
295 | ||
296 | if (pc >= 0x8000 && pc < 0xc000) | |
297 | { | |
298 | pc -= 0x8000; | |
299 | pc += (page << 14); | |
300 | pc += 0x1000000; | |
301 | } | |
302 | store_unsigned_integer (buf, regsize, pc); | |
303 | return; | |
304 | } | |
305 | ||
82c230c2 SC |
306 | m68hc11_initialize_register_info (); |
307 | ||
308 | /* Fetch a soft register: translate into a memory read. */ | |
309 | if (soft_regs[regno].name) | |
310 | { | |
311 | target_read_memory (soft_regs[regno].addr, buf, 2); | |
312 | } | |
313 | else | |
314 | { | |
315 | memset (buf, 0, 2); | |
316 | } | |
82c230c2 | 317 | } |
78073dd8 | 318 | |
82c230c2 SC |
319 | /* Store a pseudo register. Translate the register store |
320 | into a memory write. */ | |
321 | static void | |
46ce284d AC |
322 | m68hc11_pseudo_register_write (struct gdbarch *gdbarch, |
323 | struct regcache *regcache, | |
324 | int regno, const void *buf) | |
82c230c2 | 325 | { |
548bcbec SC |
326 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
327 | addressing mode. */ | |
328 | if (regno == M68HC12_HARD_PC_REGNUM) | |
329 | { | |
330 | const int regsize = TYPE_LENGTH (builtin_type_uint32); | |
331 | char *tmp = alloca (regsize); | |
332 | CORE_ADDR pc; | |
333 | ||
334 | memcpy (tmp, buf, regsize); | |
335 | pc = extract_unsigned_integer (tmp, regsize); | |
336 | if (pc >= 0x1000000) | |
337 | { | |
338 | pc -= 0x1000000; | |
339 | write_register (HARD_PAGE_REGNUM, (pc >> 14) & 0x0ff); | |
340 | pc &= 0x03fff; | |
341 | write_register (HARD_PC_REGNUM, pc + 0x8000); | |
342 | } | |
343 | else | |
344 | write_register (HARD_PC_REGNUM, pc); | |
345 | return; | |
346 | } | |
347 | ||
82c230c2 | 348 | m68hc11_initialize_register_info (); |
78073dd8 | 349 | |
82c230c2 SC |
350 | /* Store a soft register: translate into a memory write. */ |
351 | if (soft_regs[regno].name) | |
352 | { | |
46ce284d AC |
353 | const int regsize = 2; |
354 | char *tmp = alloca (regsize); | |
355 | memcpy (tmp, buf, regsize); | |
356 | target_write_memory (soft_regs[regno].addr, tmp, regsize); | |
82c230c2 SC |
357 | } |
358 | } | |
78073dd8 | 359 | |
fa88f677 | 360 | static const char * |
82c230c2 | 361 | m68hc11_register_name (int reg_nr) |
78073dd8 | 362 | { |
548bcbec SC |
363 | if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER) |
364 | return "pc"; | |
365 | if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER) | |
366 | return "ppc"; | |
367 | ||
82c230c2 SC |
368 | if (reg_nr < 0) |
369 | return NULL; | |
370 | if (reg_nr >= M68HC11_ALL_REGS) | |
371 | return NULL; | |
372 | ||
373 | /* If we don't know the address of a soft register, pretend it | |
374 | does not exist. */ | |
375 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) | |
376 | return NULL; | |
377 | return m68hc11_register_names[reg_nr]; | |
378 | } | |
78073dd8 | 379 | |
f4f9705a | 380 | static const unsigned char * |
82c230c2 | 381 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
78073dd8 | 382 | { |
82c230c2 SC |
383 | static unsigned char breakpoint[] = {0x0}; |
384 | ||
385 | *lenptr = sizeof (breakpoint); | |
386 | return breakpoint; | |
78073dd8 AC |
387 | } |
388 | ||
389 | /* Immediately after a function call, return the saved pc before the frame | |
82c230c2 | 390 | is setup. */ |
78073dd8 | 391 | |
82c230c2 | 392 | static CORE_ADDR |
78073dd8 AC |
393 | m68hc11_saved_pc_after_call (struct frame_info *frame) |
394 | { | |
82c230c2 SC |
395 | CORE_ADDR addr; |
396 | ||
5d1a66bd | 397 | addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION; |
78073dd8 AC |
398 | addr &= 0x0ffff; |
399 | return read_memory_integer (addr, 2) & 0x0FFFF; | |
400 | } | |
401 | ||
82c230c2 SC |
402 | static CORE_ADDR |
403 | m68hc11_frame_saved_pc (struct frame_info *frame) | |
404 | { | |
da50a4b7 | 405 | return get_frame_extra_info (frame)->return_pc; |
82c230c2 SC |
406 | } |
407 | ||
408 | static CORE_ADDR | |
409 | m68hc11_frame_args_address (struct frame_info *frame) | |
410 | { | |
7df11f59 SC |
411 | CORE_ADDR addr; |
412 | ||
da50a4b7 AC |
413 | addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION + 2; |
414 | if (get_frame_extra_info (frame)->return_kind == RETURN_RTC) | |
7df11f59 | 415 | addr += 1; |
da50a4b7 | 416 | else if (get_frame_extra_info (frame)->return_kind == RETURN_RTI) |
7df11f59 SC |
417 | addr += 7; |
418 | ||
419 | return addr; | |
82c230c2 SC |
420 | } |
421 | ||
78073dd8 AC |
422 | /* Discard from the stack the innermost frame, restoring all saved |
423 | registers. */ | |
424 | ||
82c230c2 | 425 | static void |
fba45db2 | 426 | m68hc11_pop_frame (void) |
78073dd8 | 427 | { |
82c230c2 SC |
428 | register struct frame_info *frame = get_current_frame (); |
429 | register CORE_ADDR fp, sp; | |
430 | register int regnum; | |
431 | ||
1e2330ba AC |
432 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), |
433 | get_frame_base (frame), | |
434 | get_frame_base (frame))) | |
82c230c2 SC |
435 | generic_pop_dummy_frame (); |
436 | else | |
437 | { | |
c193f6ac | 438 | fp = get_frame_base (frame); |
f30ee0bc | 439 | DEPRECATED_FRAME_INIT_SAVED_REGS (frame); |
82c230c2 SC |
440 | |
441 | /* Copy regs from where they were saved in the frame. */ | |
442 | for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++) | |
b2fb4676 | 443 | if (get_frame_saved_regs (frame)[regnum]) |
82c230c2 | 444 | write_register (regnum, |
b2fb4676 | 445 | read_memory_integer (get_frame_saved_regs (frame)[regnum], 2)); |
82c230c2 | 446 | |
da50a4b7 AC |
447 | write_register (HARD_PC_REGNUM, get_frame_extra_info (frame)->return_pc); |
448 | sp = (fp + get_frame_extra_info (frame)->size + 2) & 0x0ffff; | |
82c230c2 SC |
449 | write_register (HARD_SP_REGNUM, sp); |
450 | } | |
451 | flush_cached_frames (); | |
78073dd8 AC |
452 | } |
453 | ||
908f682f SC |
454 | \f |
455 | /* 68HC11 & 68HC12 prologue analysis. | |
456 | ||
457 | */ | |
458 | #define MAX_CODES 12 | |
459 | ||
460 | /* 68HC11 opcodes. */ | |
461 | #undef M6811_OP_PAGE2 | |
b94a41a1 SC |
462 | #define M6811_OP_PAGE2 (0x18) |
463 | #define M6811_OP_LDX (0xde) | |
464 | #define M6811_OP_LDX_EXT (0xfe) | |
465 | #define M6811_OP_PSHX (0x3c) | |
466 | #define M6811_OP_STS (0x9f) | |
467 | #define M6811_OP_STS_EXT (0xbf) | |
468 | #define M6811_OP_TSX (0x30) | |
469 | #define M6811_OP_XGDX (0x8f) | |
470 | #define M6811_OP_ADDD (0xc3) | |
471 | #define M6811_OP_TXS (0x35) | |
472 | #define M6811_OP_DES (0x34) | |
908f682f SC |
473 | |
474 | /* 68HC12 opcodes. */ | |
b94a41a1 SC |
475 | #define M6812_OP_PAGE2 (0x18) |
476 | #define M6812_OP_MOVW (0x01) | |
477 | #define M6812_PB_PSHW (0xae) | |
478 | #define M6812_OP_STS (0x5f) | |
479 | #define M6812_OP_STS_EXT (0x7f) | |
480 | #define M6812_OP_LEAS (0x1b) | |
481 | #define M6812_OP_PSHX (0x34) | |
482 | #define M6812_OP_PSHY (0x35) | |
908f682f SC |
483 | |
484 | /* Operand extraction. */ | |
485 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ | |
486 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ | |
487 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ | |
488 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ | |
489 | ||
490 | /* Identification of the sequence. */ | |
491 | enum m6811_seq_type | |
492 | { | |
493 | P_LAST = 0, | |
494 | P_SAVE_REG, /* Save a register on the stack. */ | |
495 | P_SET_FRAME, /* Setup the frame pointer. */ | |
496 | P_LOCAL_1, /* Allocate 1 byte for locals. */ | |
497 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ | |
498 | P_LOCAL_N /* Allocate N bytes for locals. */ | |
499 | }; | |
500 | ||
501 | struct insn_sequence { | |
502 | enum m6811_seq_type type; | |
503 | unsigned length; | |
504 | unsigned short code[MAX_CODES]; | |
505 | }; | |
506 | ||
507 | /* Sequence of instructions in the 68HC11 function prologue. */ | |
508 | static struct insn_sequence m6811_prologue[] = { | |
509 | /* Sequences to save a soft-register. */ | |
510 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, | |
511 | M6811_OP_PSHX } }, | |
512 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, | |
513 | M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
b94a41a1 SC |
514 | { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW, |
515 | M6811_OP_PSHX } }, | |
516 | { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW, | |
517 | M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
908f682f SC |
518 | |
519 | /* Sequences to allocate local variables. */ | |
520 | { P_LOCAL_N, 7, { M6811_OP_TSX, | |
521 | M6811_OP_XGDX, | |
522 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
523 | M6811_OP_XGDX, | |
524 | M6811_OP_TXS } }, | |
525 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, | |
526 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
527 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
528 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
529 | M6811_OP_PAGE2, M6811_OP_TXS } }, | |
530 | { P_LOCAL_1, 1, { M6811_OP_DES } }, | |
531 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, | |
532 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
533 | ||
534 | /* Initialize the frame pointer. */ | |
535 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, | |
b94a41a1 | 536 | { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } }, |
908f682f SC |
537 | { P_LAST, 0, { 0 } } |
538 | }; | |
539 | ||
540 | ||
541 | /* Sequence of instructions in the 68HC12 function prologue. */ | |
542 | static struct insn_sequence m6812_prologue[] = { | |
543 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, | |
544 | OP_IMM_HIGH, OP_IMM_LOW } }, | |
b94a41a1 SC |
545 | { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } }, |
546 | { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } }, | |
908f682f | 547 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, |
ffe1f3ee SC |
548 | { P_LOCAL_2, 1, { M6812_OP_PSHX } }, |
549 | { P_LOCAL_2, 1, { M6812_OP_PSHY } }, | |
908f682f SC |
550 | { P_LAST, 0 } |
551 | }; | |
552 | ||
553 | ||
554 | /* Analyze the sequence of instructions starting at the given address. | |
555 | Returns a pointer to the sequence when it is recognized and | |
556 | the optional value (constant/address) associated with it. | |
557 | Advance the pc for the next sequence. */ | |
558 | static struct insn_sequence * | |
559 | m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc, | |
560 | CORE_ADDR *val) | |
561 | { | |
562 | unsigned char buffer[MAX_CODES]; | |
563 | unsigned bufsize; | |
564 | unsigned j; | |
565 | CORE_ADDR cur_val; | |
566 | short v = 0; | |
567 | ||
568 | bufsize = 0; | |
569 | for (; seq->type != P_LAST; seq++) | |
570 | { | |
571 | cur_val = 0; | |
572 | for (j = 0; j < seq->length; j++) | |
573 | { | |
574 | if (bufsize < j + 1) | |
575 | { | |
576 | buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize, | |
577 | 1); | |
578 | bufsize++; | |
579 | } | |
580 | /* Continue while we match the opcode. */ | |
581 | if (seq->code[j] == buffer[j]) | |
582 | continue; | |
583 | ||
584 | if ((seq->code[j] & 0xf00) == 0) | |
585 | break; | |
586 | ||
587 | /* Extract a sequence parameter (address or constant). */ | |
588 | switch (seq->code[j]) | |
589 | { | |
590 | case OP_DIRECT: | |
591 | cur_val = (CORE_ADDR) buffer[j]; | |
592 | break; | |
593 | ||
594 | case OP_IMM_HIGH: | |
595 | cur_val = cur_val & 0x0ff; | |
596 | cur_val |= (buffer[j] << 8); | |
597 | break; | |
598 | ||
599 | case OP_IMM_LOW: | |
600 | cur_val &= 0x0ff00; | |
601 | cur_val |= buffer[j]; | |
602 | break; | |
603 | ||
604 | case OP_PBYTE: | |
605 | if ((buffer[j] & 0xE0) == 0x80) | |
606 | { | |
607 | v = buffer[j] & 0x1f; | |
608 | if (v & 0x10) | |
609 | v |= 0xfff0; | |
610 | } | |
611 | else if ((buffer[j] & 0xfe) == 0xf0) | |
612 | { | |
613 | v = read_memory_unsigned_integer (*pc + j + 1, 1); | |
614 | if (buffer[j] & 1) | |
615 | v |= 0xff00; | |
b4fa4770 | 616 | *pc = *pc + 1; |
908f682f SC |
617 | } |
618 | else if (buffer[j] == 0xf2) | |
619 | { | |
620 | v = read_memory_unsigned_integer (*pc + j + 1, 2); | |
b4fa4770 | 621 | *pc = *pc + 2; |
908f682f SC |
622 | } |
623 | cur_val = v; | |
624 | break; | |
625 | } | |
626 | } | |
627 | ||
628 | /* We have a full match. */ | |
629 | if (j == seq->length) | |
630 | { | |
631 | *val = cur_val; | |
632 | *pc = *pc + j; | |
633 | return seq; | |
634 | } | |
635 | } | |
636 | return 0; | |
637 | } | |
638 | ||
7df11f59 SC |
639 | /* Return the instruction that the function at the PC is using. */ |
640 | static enum insn_return_kind | |
641 | m68hc11_get_return_insn (CORE_ADDR pc) | |
642 | { | |
643 | struct minimal_symbol *sym; | |
644 | ||
645 | /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT | |
646 | function is stored by elfread.c in the high bit of the info field. | |
647 | Use this to decide which instruction the function uses to return. */ | |
648 | sym = lookup_minimal_symbol_by_pc (pc); | |
649 | if (sym == 0) | |
650 | return RETURN_RTS; | |
651 | ||
652 | if (MSYMBOL_IS_RTC (sym)) | |
653 | return RETURN_RTC; | |
654 | else if (MSYMBOL_IS_RTI (sym)) | |
655 | return RETURN_RTI; | |
656 | else | |
657 | return RETURN_RTS; | |
658 | } | |
659 | ||
660 | ||
78073dd8 AC |
661 | /* Analyze the function prologue to find some information |
662 | about the function: | |
663 | - the PC of the first line (for m68hc11_skip_prologue) | |
664 | - the offset of the previous frame saved address (from current frame) | |
665 | - the soft registers which are pushed. */ | |
666 | static void | |
82c230c2 SC |
667 | m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp, |
668 | CORE_ADDR *first_line, | |
669 | int *frame_offset, CORE_ADDR *pushed_regs) | |
78073dd8 | 670 | { |
82c230c2 | 671 | CORE_ADDR save_addr; |
78073dd8 | 672 | CORE_ADDR func_end; |
78073dd8 AC |
673 | int size; |
674 | int found_frame_point; | |
82c230c2 | 675 | int saved_reg; |
78073dd8 | 676 | CORE_ADDR first_pc; |
908f682f SC |
677 | int done = 0; |
678 | struct insn_sequence *seq_table; | |
78073dd8 AC |
679 | |
680 | first_pc = get_pc_function_start (pc); | |
681 | size = 0; | |
682 | ||
82c230c2 | 683 | m68hc11_initialize_register_info (); |
78073dd8 AC |
684 | if (first_pc == 0) |
685 | { | |
686 | *frame_offset = 0; | |
78073dd8 AC |
687 | *first_line = pc; |
688 | return; | |
689 | } | |
690 | ||
908f682f SC |
691 | seq_table = gdbarch_tdep (current_gdbarch)->prologue; |
692 | ||
78073dd8 AC |
693 | /* The 68hc11 stack is as follows: |
694 | ||
695 | ||
696 | | | | |
697 | +-----------+ | |
698 | | | | |
699 | | args | | |
700 | | | | |
701 | +-----------+ | |
702 | | PC-return | | |
703 | +-----------+ | |
704 | | Old frame | | |
705 | +-----------+ | |
706 | | | | |
707 | | Locals | | |
708 | | | | |
709 | +-----------+ <--- current frame | |
710 | | | | |
711 | ||
712 | With most processors (like 68K) the previous frame can be computed | |
713 | easily because it is always at a fixed offset (see link/unlink). | |
714 | That is, locals are accessed with negative offsets, arguments are | |
715 | accessed with positive ones. Since 68hc11 only supports offsets | |
716 | in the range [0..255], the frame is defined at the bottom of | |
717 | locals (see picture). | |
718 | ||
719 | The purpose of the analysis made here is to find out the size | |
720 | of locals in this function. An alternative to this is to use | |
721 | DWARF2 info. This would be better but I don't know how to | |
722 | access dwarf2 debug from this function. | |
723 | ||
724 | Walk from the function entry point to the point where we save | |
725 | the frame. While walking instructions, compute the size of bytes | |
726 | which are pushed. This gives us the index to access the previous | |
727 | frame. | |
728 | ||
729 | We limit the search to 128 bytes so that the algorithm is bounded | |
730 | in case of random and wrong code. We also stop and abort if | |
731 | we find an instruction which is not supposed to appear in the | |
732 | prologue (as generated by gcc 2.95, 2.96). | |
733 | */ | |
734 | pc = first_pc; | |
735 | func_end = pc + 128; | |
78073dd8 | 736 | found_frame_point = 0; |
908f682f | 737 | *frame_offset = 0; |
b4fa4770 | 738 | save_addr = fp + STACK_CORRECTION; |
908f682f | 739 | while (!done && pc + 2 < func_end) |
78073dd8 | 740 | { |
908f682f SC |
741 | struct insn_sequence *seq; |
742 | CORE_ADDR val; | |
78073dd8 | 743 | |
908f682f SC |
744 | seq = m68hc11_analyze_instruction (seq_table, &pc, &val); |
745 | if (seq == 0) | |
746 | break; | |
78073dd8 | 747 | |
908f682f | 748 | if (seq->type == P_SAVE_REG) |
78073dd8 | 749 | { |
908f682f SC |
750 | if (found_frame_point) |
751 | { | |
752 | saved_reg = m68hc11_which_soft_register (val); | |
753 | if (saved_reg < 0) | |
754 | break; | |
78073dd8 | 755 | |
908f682f SC |
756 | save_addr -= 2; |
757 | if (pushed_regs) | |
758 | pushed_regs[saved_reg] = save_addr; | |
759 | } | |
760 | else | |
761 | { | |
762 | size += 2; | |
763 | } | |
78073dd8 | 764 | } |
908f682f | 765 | else if (seq->type == P_SET_FRAME) |
78073dd8 AC |
766 | { |
767 | found_frame_point = 1; | |
908f682f | 768 | *frame_offset = size; |
78073dd8 | 769 | } |
908f682f | 770 | else if (seq->type == P_LOCAL_1) |
78073dd8 | 771 | { |
6148eca7 SC |
772 | size += 1; |
773 | } | |
908f682f | 774 | else if (seq->type == P_LOCAL_2) |
78073dd8 | 775 | { |
908f682f | 776 | size += 2; |
78073dd8 | 777 | } |
908f682f | 778 | else if (seq->type == P_LOCAL_N) |
78073dd8 | 779 | { |
908f682f SC |
780 | /* Stack pointer is decremented for the allocation. */ |
781 | if (val & 0x8000) | |
782 | size -= (int) (val) | 0xffff0000; | |
783 | else | |
784 | size -= val; | |
78073dd8 AC |
785 | } |
786 | } | |
78073dd8 AC |
787 | *first_line = pc; |
788 | } | |
789 | ||
82c230c2 | 790 | static CORE_ADDR |
78073dd8 AC |
791 | m68hc11_skip_prologue (CORE_ADDR pc) |
792 | { | |
793 | CORE_ADDR func_addr, func_end; | |
794 | struct symtab_and_line sal; | |
795 | int frame_offset; | |
78073dd8 | 796 | |
82c230c2 SC |
797 | /* If we have line debugging information, then the end of the |
798 | prologue should be the first assembly instruction of the | |
78073dd8 AC |
799 | first source line. */ |
800 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
801 | { | |
802 | sal = find_pc_line (func_addr, 0); | |
803 | if (sal.end && sal.end < func_end) | |
804 | return sal.end; | |
805 | } | |
806 | ||
82c230c2 | 807 | m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0); |
78073dd8 AC |
808 | return pc; |
809 | } | |
810 | ||
a5afb99f AC |
811 | /* Given a GDB frame, determine the address of the calling function's |
812 | frame. This will be used to create a new GDB frame struct, and | |
e9582e71 AC |
813 | then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC |
814 | will be called for the new frame. */ | |
78073dd8 | 815 | |
82c230c2 | 816 | static CORE_ADDR |
78073dd8 AC |
817 | m68hc11_frame_chain (struct frame_info *frame) |
818 | { | |
82c230c2 | 819 | CORE_ADDR addr; |
78073dd8 | 820 | |
1e2330ba AC |
821 | if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), |
822 | get_frame_base (frame), | |
823 | get_frame_base (frame))) | |
824 | return get_frame_base (frame); /* dummy frame same as caller's frame */ | |
6148eca7 | 825 | |
da50a4b7 AC |
826 | if (get_frame_extra_info (frame)->return_pc == 0 |
827 | || inside_entry_file (get_frame_extra_info (frame)->return_pc)) | |
82c230c2 | 828 | return (CORE_ADDR) 0; |
78073dd8 | 829 | |
1e2330ba | 830 | if (get_frame_base (frame) == 0) |
78073dd8 AC |
831 | { |
832 | return (CORE_ADDR) 0; | |
833 | } | |
834 | ||
da50a4b7 | 835 | addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION - 2; |
78073dd8 | 836 | addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF; |
78073dd8 AC |
837 | return addr; |
838 | } | |
839 | ||
840 | /* Put here the code to store, into a struct frame_saved_regs, the | |
841 | addresses of the saved registers of frame described by FRAME_INFO. | |
842 | This includes special registers such as pc and fp saved in special | |
843 | ways in the stack frame. sp is even more special: the address we | |
844 | return for it IS the sp for the next frame. */ | |
82c230c2 SC |
845 | static void |
846 | m68hc11_frame_init_saved_regs (struct frame_info *fi) | |
78073dd8 AC |
847 | { |
848 | CORE_ADDR pc; | |
184651e3 | 849 | CORE_ADDR addr; |
7df11f59 | 850 | |
b2fb4676 | 851 | if (get_frame_saved_regs (fi) == NULL) |
82c230c2 SC |
852 | frame_saved_regs_zalloc (fi); |
853 | else | |
b2fb4676 | 854 | memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS); |
82c230c2 | 855 | |
50abf9e5 | 856 | pc = get_frame_pc (fi); |
da50a4b7 AC |
857 | get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (pc); |
858 | m68hc11_guess_from_prologue (pc, get_frame_base (fi), &pc, | |
859 | &get_frame_extra_info (fi)->size, | |
b2fb4676 | 860 | get_frame_saved_regs (fi)); |
82c230c2 | 861 | |
da50a4b7 | 862 | addr = get_frame_base (fi) + get_frame_extra_info (fi)->size + STACK_CORRECTION; |
908f682f | 863 | if (soft_regs[SOFT_FP_REGNUM].name) |
b2fb4676 | 864 | get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2; |
7df11f59 SC |
865 | |
866 | /* Take into account how the function was called/returns. */ | |
da50a4b7 | 867 | if (get_frame_extra_info (fi)->return_kind == RETURN_RTC) |
7df11f59 | 868 | { |
b2fb4676 | 869 | get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr; |
7df11f59 SC |
870 | addr++; |
871 | } | |
da50a4b7 | 872 | else if (get_frame_extra_info (fi)->return_kind == RETURN_RTI) |
7df11f59 | 873 | { |
b2fb4676 AC |
874 | get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr; |
875 | get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1; | |
876 | get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3; | |
877 | get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5; | |
7df11f59 SC |
878 | addr += 7; |
879 | } | |
b2fb4676 AC |
880 | get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr; |
881 | get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM]; | |
78073dd8 AC |
882 | } |
883 | ||
82c230c2 | 884 | static void |
78073dd8 AC |
885 | m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
886 | { | |
82c230c2 | 887 | CORE_ADDR addr; |
78073dd8 | 888 | |
a00a19e9 | 889 | frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info)); |
82c230c2 | 890 | |
11c02a10 | 891 | if (get_next_frame (fi)) |
8bedc050 | 892 | deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi))); |
82c230c2 SC |
893 | |
894 | m68hc11_frame_init_saved_regs (fi); | |
78073dd8 AC |
895 | |
896 | if (fromleaf) | |
897 | { | |
da50a4b7 AC |
898 | get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (get_frame_pc (fi)); |
899 | get_frame_extra_info (fi)->return_pc = m68hc11_saved_pc_after_call (fi); | |
78073dd8 AC |
900 | } |
901 | else | |
902 | { | |
b2fb4676 | 903 | addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM]; |
82c230c2 | 904 | addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff; |
7df11f59 SC |
905 | |
906 | /* Take into account the 68HC12 specific call (PC + page). */ | |
da50a4b7 | 907 | if (get_frame_extra_info (fi)->return_kind == RETURN_RTC |
7df11f59 SC |
908 | && addr >= 0x08000 && addr < 0x0c000 |
909 | && USE_PAGE_REGISTER) | |
910 | { | |
b2fb4676 | 911 | CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM]; |
7df11f59 SC |
912 | |
913 | unsigned page = read_memory_unsigned_integer (page_addr, 1); | |
914 | addr -= 0x08000; | |
915 | addr += ((page & 0x0ff) << 14); | |
916 | addr += 0x1000000; | |
917 | } | |
da50a4b7 | 918 | get_frame_extra_info (fi)->return_pc = addr; |
78073dd8 AC |
919 | } |
920 | } | |
921 | ||
922 | /* Same as 'info reg' but prints the registers in a different way. */ | |
923 | static void | |
924 | show_regs (char *args, int from_tty) | |
925 | { | |
82c230c2 | 926 | int ccr = read_register (HARD_CCR_REGNUM); |
78073dd8 | 927 | int i; |
82c230c2 SC |
928 | int nr; |
929 | ||
78073dd8 | 930 | printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n", |
82c230c2 SC |
931 | (int) read_register (HARD_PC_REGNUM), |
932 | (int) read_register (HARD_SP_REGNUM), | |
933 | (int) read_register (SOFT_FP_REGNUM), | |
78073dd8 AC |
934 | ccr, |
935 | ccr & M6811_S_BIT ? 'S' : '-', | |
936 | ccr & M6811_X_BIT ? 'X' : '-', | |
937 | ccr & M6811_H_BIT ? 'H' : '-', | |
938 | ccr & M6811_I_BIT ? 'I' : '-', | |
939 | ccr & M6811_N_BIT ? 'N' : '-', | |
940 | ccr & M6811_Z_BIT ? 'Z' : '-', | |
941 | ccr & M6811_V_BIT ? 'V' : '-', | |
942 | ccr & M6811_C_BIT ? 'C' : '-'); | |
943 | ||
7df11f59 | 944 | printf_filtered ("D=%04x IX=%04x IY=%04x", |
82c230c2 SC |
945 | (int) read_register (HARD_D_REGNUM), |
946 | (int) read_register (HARD_X_REGNUM), | |
947 | (int) read_register (HARD_Y_REGNUM)); | |
948 | ||
7df11f59 SC |
949 | if (USE_PAGE_REGISTER) |
950 | { | |
951 | printf_filtered (" Page=%02x", | |
952 | (int) read_register (HARD_PAGE_REGNUM)); | |
953 | } | |
954 | printf_filtered ("\n"); | |
955 | ||
82c230c2 SC |
956 | nr = 0; |
957 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) | |
78073dd8 | 958 | { |
82c230c2 SC |
959 | /* Skip registers which are not defined in the symbol table. */ |
960 | if (soft_regs[i].name == 0) | |
961 | continue; | |
962 | ||
963 | printf_filtered ("D%d=%04x", | |
964 | i - SOFT_D1_REGNUM + 1, | |
965 | (int) read_register (i)); | |
966 | nr++; | |
967 | if ((nr % 8) == 7) | |
78073dd8 AC |
968 | printf_filtered ("\n"); |
969 | else | |
970 | printf_filtered (" "); | |
971 | } | |
82c230c2 SC |
972 | if (nr && (nr % 8) != 7) |
973 | printf_filtered ("\n"); | |
78073dd8 AC |
974 | } |
975 | ||
22df305e SC |
976 | static CORE_ADDR |
977 | m68hc11_stack_align (CORE_ADDR addr) | |
978 | { | |
979 | return ((addr + 1) & -2); | |
980 | } | |
981 | ||
82c230c2 | 982 | static CORE_ADDR |
78073dd8 | 983 | m68hc11_push_arguments (int nargs, |
ea7c478f | 984 | struct value **args, |
78073dd8 AC |
985 | CORE_ADDR sp, |
986 | int struct_return, | |
987 | CORE_ADDR struct_addr) | |
988 | { | |
82c230c2 SC |
989 | int stack_alloc; |
990 | int argnum; | |
991 | int first_stack_argnum; | |
992 | int stack_offset; | |
993 | struct type *type; | |
994 | char *val; | |
995 | int len; | |
996 | ||
997 | stack_alloc = 0; | |
998 | first_stack_argnum = 0; | |
999 | if (struct_return) | |
1000 | { | |
184651e3 SC |
1001 | /* The struct is allocated on the stack and gdb used the stack |
1002 | pointer for the address of that struct. We must apply the | |
1003 | stack offset on the address. */ | |
5d1a66bd | 1004 | write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION); |
82c230c2 SC |
1005 | } |
1006 | else if (nargs > 0) | |
1007 | { | |
1008 | type = VALUE_TYPE (args[0]); | |
1009 | len = TYPE_LENGTH (type); | |
1010 | ||
1011 | /* First argument is passed in D and X registers. */ | |
1012 | if (len <= 4) | |
1013 | { | |
1014 | LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len); | |
1015 | first_stack_argnum = 1; | |
1016 | write_register (HARD_D_REGNUM, v); | |
1017 | if (len > 2) | |
1018 | { | |
1019 | v >>= 16; | |
1020 | write_register (HARD_X_REGNUM, v); | |
1021 | } | |
1022 | } | |
1023 | } | |
1024 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) | |
1025 | { | |
1026 | type = VALUE_TYPE (args[argnum]); | |
22df305e | 1027 | stack_alloc += (TYPE_LENGTH (type) + 1) & -2; |
82c230c2 SC |
1028 | } |
1029 | sp -= stack_alloc; | |
1030 | ||
5d1a66bd | 1031 | stack_offset = STACK_CORRECTION; |
82c230c2 SC |
1032 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) |
1033 | { | |
1034 | type = VALUE_TYPE (args[argnum]); | |
1035 | len = TYPE_LENGTH (type); | |
1036 | ||
1037 | val = (char*) VALUE_CONTENTS (args[argnum]); | |
1038 | write_memory (sp + stack_offset, val, len); | |
1039 | stack_offset += len; | |
22df305e SC |
1040 | if (len & 1) |
1041 | { | |
1042 | static char zero = 0; | |
1043 | ||
1044 | write_memory (sp + stack_offset, &zero, 1); | |
1045 | stack_offset++; | |
1046 | } | |
82c230c2 SC |
1047 | } |
1048 | return sp; | |
78073dd8 AC |
1049 | } |
1050 | ||
1051 | ||
82c230c2 SC |
1052 | /* Return a location where we can set a breakpoint that will be hit |
1053 | when an inferior function call returns. */ | |
a78f21af | 1054 | static CORE_ADDR |
fba45db2 | 1055 | m68hc11_call_dummy_address (void) |
78073dd8 | 1056 | { |
22df305e | 1057 | return entry_point_address (); |
78073dd8 AC |
1058 | } |
1059 | ||
82c230c2 SC |
1060 | static struct type * |
1061 | m68hc11_register_virtual_type (int reg_nr) | |
1062 | { | |
5706502a SC |
1063 | switch (reg_nr) |
1064 | { | |
1065 | case HARD_PAGE_REGNUM: | |
1066 | case HARD_A_REGNUM: | |
1067 | case HARD_B_REGNUM: | |
1068 | case HARD_CCR_REGNUM: | |
1069 | return builtin_type_uint8; | |
1070 | ||
548bcbec SC |
1071 | case M68HC12_HARD_PC_REGNUM: |
1072 | return builtin_type_uint32; | |
1073 | ||
5706502a SC |
1074 | default: |
1075 | return builtin_type_uint16; | |
1076 | } | |
82c230c2 SC |
1077 | } |
1078 | ||
1079 | static void | |
1080 | m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1081 | { | |
184651e3 SC |
1082 | /* The struct address computed by gdb is on the stack. |
1083 | It uses the stack pointer so we must apply the stack | |
1084 | correction offset. */ | |
5d1a66bd | 1085 | write_register (HARD_D_REGNUM, addr + STACK_CORRECTION); |
82c230c2 SC |
1086 | } |
1087 | ||
1088 | static void | |
1089 | m68hc11_store_return_value (struct type *type, char *valbuf) | |
1090 | { | |
22df305e SC |
1091 | int len; |
1092 | ||
1093 | len = TYPE_LENGTH (type); | |
1094 | ||
1095 | /* First argument is passed in D and X registers. */ | |
1096 | if (len <= 4) | |
1097 | { | |
1098 | LONGEST v = extract_unsigned_integer (valbuf, len); | |
1099 | ||
1100 | write_register (HARD_D_REGNUM, v); | |
1101 | if (len > 2) | |
1102 | { | |
1103 | v >>= 16; | |
1104 | write_register (HARD_X_REGNUM, v); | |
1105 | } | |
1106 | } | |
1107 | else | |
1108 | error ("return of value > 4 is not supported."); | |
82c230c2 SC |
1109 | } |
1110 | ||
1111 | ||
1112 | /* Given a return value in `regbuf' with a type `type', | |
78073dd8 AC |
1113 | extract and copy its value into `valbuf'. */ |
1114 | ||
82c230c2 SC |
1115 | static void |
1116 | m68hc11_extract_return_value (struct type *type, | |
78073dd8 AC |
1117 | char *regbuf, |
1118 | char *valbuf) | |
1119 | { | |
82c230c2 SC |
1120 | int len = TYPE_LENGTH (type); |
1121 | ||
22df305e | 1122 | switch (len) |
82c230c2 | 1123 | { |
22df305e SC |
1124 | case 1: |
1125 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len); | |
1126 | break; | |
1127 | ||
1128 | case 2: | |
1129 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len); | |
1130 | break; | |
1131 | ||
1132 | case 3: | |
1133 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1); | |
1134 | memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2); | |
1135 | break; | |
1136 | ||
1137 | case 4: | |
1138 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2); | |
1139 | memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2); | |
1140 | break; | |
1141 | ||
1142 | default: | |
82c230c2 SC |
1143 | error ("bad size for return value"); |
1144 | } | |
1145 | } | |
1146 | ||
1147 | /* Should call_function allocate stack space for a struct return? */ | |
1148 | static int | |
1149 | m68hc11_use_struct_convention (int gcc_p, struct type *type) | |
1150 | { | |
22df305e SC |
1151 | return (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1152 | || TYPE_CODE (type) == TYPE_CODE_UNION | |
1153 | || TYPE_LENGTH (type) > 4); | |
82c230c2 SC |
1154 | } |
1155 | ||
1156 | static int | |
1157 | m68hc11_return_value_on_stack (struct type *type) | |
1158 | { | |
22df305e | 1159 | return TYPE_LENGTH (type) > 4; |
82c230c2 SC |
1160 | } |
1161 | ||
1162 | /* Extract from an array REGBUF containing the (raw) register state | |
1163 | the address in which a function should return its structure value, | |
1164 | as a CORE_ADDR (or an expression that can be used as one). */ | |
1165 | static CORE_ADDR | |
1166 | m68hc11_extract_struct_value_address (char *regbuf) | |
1167 | { | |
7c0b4a20 AC |
1168 | return extract_unsigned_integer (®buf[HARD_D_REGNUM * 2], |
1169 | REGISTER_RAW_SIZE (HARD_D_REGNUM)); | |
82c230c2 SC |
1170 | } |
1171 | ||
1172 | /* Function: push_return_address (pc) | |
1173 | Set up the return address for the inferior function call. | |
1174 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
1175 | ||
1176 | static CORE_ADDR | |
1177 | m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
1178 | { | |
1179 | char valbuf[2]; | |
1180 | ||
22df305e | 1181 | pc = CALL_DUMMY_ADDRESS (); |
82c230c2 SC |
1182 | sp -= 2; |
1183 | store_unsigned_integer (valbuf, 2, pc); | |
5d1a66bd | 1184 | write_memory (sp + STACK_CORRECTION, valbuf, 2); |
82c230c2 SC |
1185 | return sp; |
1186 | } | |
1187 | ||
7df11f59 SC |
1188 | /* Test whether the ELF symbol corresponds to a function using rtc or |
1189 | rti to return. */ | |
1190 | ||
1191 | static void | |
1192 | m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) | |
1193 | { | |
1194 | unsigned char flags; | |
1195 | ||
1196 | flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other; | |
1197 | if (flags & STO_M68HC12_FAR) | |
1198 | MSYMBOL_SET_RTC (msym); | |
1199 | if (flags & STO_M68HC12_INTERRUPT) | |
1200 | MSYMBOL_SET_RTI (msym); | |
1201 | } | |
1202 | ||
ea3881d9 SC |
1203 | static int |
1204 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) | |
1205 | { | |
1206 | if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11) | |
1207 | return print_insn_m68hc11 (memaddr, info); | |
1208 | else | |
1209 | return print_insn_m68hc12 (memaddr, info); | |
1210 | } | |
1211 | ||
b631436b SC |
1212 | \f |
1213 | ||
1214 | /* 68HC11/68HC12 register groups. | |
1215 | Identify real hard registers and soft registers used by gcc. */ | |
1216 | ||
1217 | static struct reggroup *m68hc11_soft_reggroup; | |
1218 | static struct reggroup *m68hc11_hard_reggroup; | |
1219 | ||
1220 | static void | |
1221 | m68hc11_init_reggroups (void) | |
1222 | { | |
1223 | m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP); | |
1224 | m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP); | |
1225 | } | |
1226 | ||
1227 | static void | |
1228 | m68hc11_add_reggroups (struct gdbarch *gdbarch) | |
1229 | { | |
1230 | reggroup_add (gdbarch, m68hc11_hard_reggroup); | |
1231 | reggroup_add (gdbarch, m68hc11_soft_reggroup); | |
1232 | reggroup_add (gdbarch, general_reggroup); | |
1233 | reggroup_add (gdbarch, float_reggroup); | |
1234 | reggroup_add (gdbarch, all_reggroup); | |
1235 | reggroup_add (gdbarch, save_reggroup); | |
1236 | reggroup_add (gdbarch, restore_reggroup); | |
1237 | reggroup_add (gdbarch, vector_reggroup); | |
1238 | reggroup_add (gdbarch, system_reggroup); | |
1239 | } | |
1240 | ||
1241 | static int | |
1242 | m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
1243 | struct reggroup *group) | |
1244 | { | |
1245 | /* We must save the real hard register as well as gcc | |
1246 | soft registers including the frame pointer. */ | |
1247 | if (group == save_reggroup || group == restore_reggroup) | |
1248 | { | |
1249 | return (regnum <= gdbarch_num_regs (gdbarch) | |
1250 | || ((regnum == SOFT_FP_REGNUM | |
1251 | || regnum == SOFT_TMP_REGNUM | |
1252 | || regnum == SOFT_ZS_REGNUM | |
1253 | || regnum == SOFT_XY_REGNUM) | |
1254 | && m68hc11_register_name (regnum))); | |
1255 | } | |
1256 | ||
1257 | /* Group to identify gcc soft registers (d1..dN). */ | |
1258 | if (group == m68hc11_soft_reggroup) | |
1259 | { | |
1260 | return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum); | |
1261 | } | |
1262 | ||
1263 | if (group == m68hc11_hard_reggroup) | |
1264 | { | |
1265 | return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM | |
1266 | || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM | |
1267 | || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM; | |
1268 | } | |
1269 | return default_register_reggroup_p (gdbarch, regnum, group); | |
1270 | } | |
1271 | ||
82c230c2 SC |
1272 | static struct gdbarch * |
1273 | m68hc11_gdbarch_init (struct gdbarch_info info, | |
1274 | struct gdbarch_list *arches) | |
1275 | { | |
1276 | static LONGEST m68hc11_call_dummy_words[] = | |
1277 | {0}; | |
1278 | struct gdbarch *gdbarch; | |
1279 | struct gdbarch_tdep *tdep; | |
81967506 | 1280 | int elf_flags; |
82c230c2 SC |
1281 | |
1282 | soft_reg_initialized = 0; | |
81967506 SC |
1283 | |
1284 | /* Extract the elf_flags if available. */ | |
1285 | if (info.abfd != NULL | |
1286 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) | |
1287 | elf_flags = elf_elfheader (info.abfd)->e_flags; | |
1288 | else | |
1289 | elf_flags = 0; | |
1290 | ||
82c230c2 SC |
1291 | /* try to find a pre-existing architecture */ |
1292 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1293 | arches != NULL; | |
1294 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1295 | { | |
81967506 SC |
1296 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) |
1297 | continue; | |
1298 | ||
82c230c2 SC |
1299 | return arches->gdbarch; |
1300 | } | |
1301 | ||
1302 | /* Need a new architecture. Fill in a target specific vector. */ | |
1303 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1304 | gdbarch = gdbarch_alloc (&info, tdep); | |
81967506 | 1305 | tdep->elf_flags = elf_flags; |
ed99b3d0 | 1306 | |
a5afb99f AC |
1307 | /* NOTE: cagney/2002-12-06: This can be deleted when this arch is |
1308 | ready to unwind the PC first (see frame.c:get_prev_frame()). */ | |
1309 | set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default); | |
1310 | ||
5d1a66bd SC |
1311 | switch (info.bfd_arch_info->arch) |
1312 | { | |
1313 | case bfd_arch_m68hc11: | |
1314 | tdep->stack_correction = 1; | |
7df11f59 | 1315 | tdep->use_page_register = 0; |
908f682f | 1316 | tdep->prologue = m6811_prologue; |
548bcbec SC |
1317 | set_gdbarch_addr_bit (gdbarch, 16); |
1318 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); | |
1319 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); | |
1320 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); | |
5d1a66bd | 1321 | break; |
82c230c2 | 1322 | |
5d1a66bd SC |
1323 | case bfd_arch_m68hc12: |
1324 | tdep->stack_correction = 0; | |
7df11f59 | 1325 | tdep->use_page_register = elf_flags & E_M68HC12_BANKS; |
908f682f | 1326 | tdep->prologue = m6812_prologue; |
548bcbec SC |
1327 | set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16); |
1328 | set_gdbarch_num_pseudo_regs (gdbarch, | |
1329 | elf_flags & E_M68HC12_BANKS | |
1330 | ? M68HC12_NUM_PSEUDO_REGS | |
1331 | : M68HC11_NUM_PSEUDO_REGS); | |
1332 | set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS | |
1333 | ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM); | |
1334 | set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS | |
1335 | ? M68HC12_NUM_REGS : M68HC11_NUM_REGS); | |
5d1a66bd SC |
1336 | break; |
1337 | ||
1338 | default: | |
1339 | break; | |
1340 | } | |
7d32ba20 SC |
1341 | |
1342 | /* Initially set everything according to the ABI. | |
1343 | Use 16-bit integers since it will be the case for most | |
1344 | programs. The size of these types should normally be set | |
1345 | according to the dwarf2 debug information. */ | |
82c230c2 | 1346 | set_gdbarch_short_bit (gdbarch, 16); |
81967506 | 1347 | set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16); |
82c230c2 | 1348 | set_gdbarch_float_bit (gdbarch, 32); |
81967506 | 1349 | set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32); |
2417dd25 | 1350 | set_gdbarch_long_double_bit (gdbarch, 64); |
82c230c2 SC |
1351 | set_gdbarch_long_bit (gdbarch, 32); |
1352 | set_gdbarch_ptr_bit (gdbarch, 16); | |
1353 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1354 | ||
1355 | /* Set register info. */ | |
1356 | set_gdbarch_fp0_regnum (gdbarch, -1); | |
a0ed5532 AC |
1357 | set_gdbarch_deprecated_max_register_raw_size (gdbarch, 2); |
1358 | set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 2); | |
f30ee0bc | 1359 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs); |
82c230c2 SC |
1360 | set_gdbarch_frame_args_skip (gdbarch, 0); |
1361 | ||
82c230c2 | 1362 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); |
b46e02f6 | 1363 | set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp); |
82c230c2 | 1364 | |
82c230c2 | 1365 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); |
0ba6dca9 | 1366 | set_gdbarch_deprecated_fp_regnum (gdbarch, SOFT_FP_REGNUM); |
82c230c2 | 1367 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); |
b1e29e33 | 1368 | set_gdbarch_deprecated_register_size (gdbarch, 2); |
b8b527c5 | 1369 | set_gdbarch_deprecated_register_bytes (gdbarch, M68HC11_ALL_REGS * 2); |
9c04cab7 | 1370 | set_gdbarch_deprecated_register_virtual_type (gdbarch, m68hc11_register_virtual_type); |
46ce284d AC |
1371 | set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read); |
1372 | set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write); | |
82c230c2 | 1373 | |
82c230c2 | 1374 | set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address); |
b1e29e33 AC |
1375 | set_gdbarch_deprecated_call_dummy_words (gdbarch, m68hc11_call_dummy_words); |
1376 | set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (m68hc11_call_dummy_words)); | |
129c1cd6 | 1377 | set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register); |
26e9b323 | 1378 | set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value); |
b81774d8 | 1379 | set_gdbarch_deprecated_push_arguments (gdbarch, m68hc11_push_arguments); |
28f617b3 | 1380 | set_gdbarch_deprecated_push_return_address (gdbarch, m68hc11_push_return_address); |
82c230c2 SC |
1381 | set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack); |
1382 | ||
4183d812 | 1383 | set_gdbarch_deprecated_store_struct_return (gdbarch, m68hc11_store_struct_return); |
ebba8386 | 1384 | set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value); |
26e9b323 | 1385 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address); |
82c230c2 | 1386 | |
618ce49f | 1387 | set_gdbarch_deprecated_frame_chain (gdbarch, m68hc11_frame_chain); |
8bedc050 | 1388 | set_gdbarch_deprecated_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc); |
82c230c2 | 1389 | set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address); |
6913c89a | 1390 | set_gdbarch_deprecated_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call); |
82c230c2 | 1391 | |
129c1cd6 | 1392 | set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register); |
82c230c2 | 1393 | |
4183d812 | 1394 | set_gdbarch_deprecated_store_struct_return (gdbarch, m68hc11_store_struct_return); |
ebba8386 | 1395 | set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value); |
26e9b323 | 1396 | set_gdbarch_deprecated_extract_struct_value_address |
82c230c2 SC |
1397 | (gdbarch, m68hc11_extract_struct_value_address); |
1398 | set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention); | |
e9582e71 | 1399 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info); |
749b82f6 | 1400 | set_gdbarch_deprecated_pop_frame (gdbarch, m68hc11_pop_frame); |
82c230c2 SC |
1401 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); |
1402 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1403 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1404 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1405 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); | |
22df305e | 1406 | set_gdbarch_stack_align (gdbarch, m68hc11_stack_align); |
f933a9c5 | 1407 | set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch, 1); |
70ed8774 | 1408 | set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11); |
82c230c2 | 1409 | |
b631436b SC |
1410 | m68hc11_add_reggroups (gdbarch); |
1411 | set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p); | |
1412 | ||
7df11f59 SC |
1413 | /* Minsymbol frobbing. */ |
1414 | set_gdbarch_elf_make_msymbol_special (gdbarch, | |
1415 | m68hc11_elf_make_msymbol_special); | |
1416 | ||
82c230c2 | 1417 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
82c230c2 SC |
1418 | |
1419 | return gdbarch; | |
78073dd8 AC |
1420 | } |
1421 | ||
a78f21af AC |
1422 | extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */ |
1423 | ||
78073dd8 | 1424 | void |
fba45db2 | 1425 | _initialize_m68hc11_tdep (void) |
78073dd8 | 1426 | { |
82c230c2 | 1427 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
ea3881d9 | 1428 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
b631436b | 1429 | m68hc11_init_reggroups (); |
78073dd8 AC |
1430 | |
1431 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1432 | } | |
1433 |