Use gdbarch_tdep for 68hc11 specific data (stack_correction global)
[deliverable/binutils-gdb.git] / gdb / m68hc11-tdep.c
CommitLineData
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1/* Target-dependent code for Motorola 68HC11
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@worldnet.fr
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
78073dd8 21
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22#include "defs.h"
23#include "frame.h"
24#include "obstack.h"
25#include "symtab.h"
26#include "gdbtypes.h"
27#include "gdbcmd.h"
28#include "gdbcore.h"
29#include "gdb_string.h"
30#include "value.h"
31#include "inferior.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "arch-utils.h"
78073dd8 36
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37#include "target.h"
38#include "opcode/m68hc11.h"
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39
40/* Register numbers of various important registers.
41 Note that some of these values are "real" register numbers,
42 and correspond to the general registers of the machine,
43 and some are "phony" register numbers which are too large
44 to be actual register numbers as far as the user is concerned
45 but do serve to get the desired values when passed to read_register. */
46
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47#define HARD_X_REGNUM 0
48#define HARD_D_REGNUM 1
49#define HARD_Y_REGNUM 2
50#define HARD_SP_REGNUM 3
51#define HARD_PC_REGNUM 4
52
53#define HARD_A_REGNUM 5
54#define HARD_B_REGNUM 6
55#define HARD_CCR_REGNUM 7
56#define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM)
57
58/* Z is replaced by X or Y by gcc during machine reorg.
59 ??? There is no way to get it and even know whether
60 it's in X or Y or in ZS. */
61#define SOFT_Z_REGNUM 8
62
63/* Soft registers. These registers are special. There are treated
64 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
65 They are physically located in memory. */
66#define SOFT_FP_REGNUM 9
67#define SOFT_TMP_REGNUM 10
68#define SOFT_ZS_REGNUM 11
69#define SOFT_XY_REGNUM 12
70#define SOFT_D1_REGNUM 13
71#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
72#define M68HC11_MAX_SOFT_REGS 32
73
74#define M68HC11_NUM_REGS (8)
75#define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
76#define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
77
78#define M68HC11_REG_SIZE (2)
79
80struct gdbarch_tdep
81 {
82 /* from the elf header */
83 int elf_flags;
5d1a66bd
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84
85 /* Stack pointer correction value. For 68hc11, the stack pointer points
86 to the next push location. An offset of 1 must be applied to obtain
87 the address where the last value is saved. For 68hc12, the stack
88 pointer points to the last value pushed. No offset is necessary. */
89 int stack_correction;
82c230c2
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90 };
91
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92#define M6811_TDEP gdbarch_tdep (current_gdbarch)
93#define STACK_CORRECTION (M6811_TDEP->stack_correction)
94
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95struct frame_extra_info
96{
97 int frame_reg;
98 CORE_ADDR return_pc;
99 CORE_ADDR dummy;
100 int frameless;
101 int size;
102};
78073dd8 103
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104/* Table of registers for 68HC11. This includes the hard registers
105 and the soft registers used by GCC. */
106static char *
107m68hc11_register_names[] =
108{
109 "x", "d", "y", "sp", "pc", "a", "b",
110 "ccr", "z", "frame","tmp", "zs", "xy",
111 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
112 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
113 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
114 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
115 "d29", "d30", "d31", "d32"
116};
78073dd8 117
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118struct m68hc11_soft_reg
119{
120 const char *name;
121 CORE_ADDR addr;
122};
78073dd8 123
82c230c2 124static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
78073dd8 125
82c230c2 126#define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
78073dd8 127
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128static int soft_min_addr;
129static int soft_max_addr;
130static int soft_reg_initialized = 0;
78073dd8 131
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132/* Look in the symbol table for the address of a pseudo register
133 in memory. If we don't find it, pretend the register is not used
134 and not available. */
135static void
136m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
137{
138 struct minimal_symbol *msymbol;
78073dd8 139
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140 msymbol = lookup_minimal_symbol (name, NULL, NULL);
141 if (msymbol)
142 {
143 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
144 reg->name = xstrdup (name);
145
146 /* Keep track of the address range for soft registers. */
147 if (reg->addr < (CORE_ADDR) soft_min_addr)
148 soft_min_addr = reg->addr;
149 if (reg->addr > (CORE_ADDR) soft_max_addr)
150 soft_max_addr = reg->addr;
151 }
152 else
153 {
154 reg->name = 0;
155 reg->addr = 0;
156 }
157}
78073dd8 158
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159/* Initialize the table of soft register addresses according
160 to the symbol table. */
161 static void
162m68hc11_initialize_register_info (void)
163{
164 int i;
78073dd8 165
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166 if (soft_reg_initialized)
167 return;
168
169 soft_min_addr = INT_MAX;
170 soft_max_addr = 0;
171 for (i = 0; i < M68HC11_ALL_REGS; i++)
172 {
173 soft_regs[i].name = 0;
174 }
175
176 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
177 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
178 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
179 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
180 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
78073dd8 181
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182 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
183 {
184 char buf[10];
78073dd8 185
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186 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
187 m68hc11_get_register_info (&soft_regs[i], buf);
188 }
78073dd8 189
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190 if (soft_regs[SOFT_FP_REGNUM].name == 0)
191 {
192 warning ("No frame soft register found in the symbol table.\n");
193 warning ("Stack backtrace will not work.\n");
194 }
195 soft_reg_initialized = 1;
196}
78073dd8 197
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198/* Given an address in memory, return the soft register number if
199 that address corresponds to a soft register. Returns -1 if not. */
200static int
201m68hc11_which_soft_register (CORE_ADDR addr)
202{
203 int i;
204
205 if (addr < soft_min_addr || addr > soft_max_addr)
206 return -1;
207
208 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
209 {
210 if (soft_regs[i].name && soft_regs[i].addr == addr)
211 return i;
212 }
213 return -1;
214}
78073dd8 215
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216/* Fetch a pseudo register. The 68hc11 soft registers are treated like
217 pseudo registers. They are located in memory. Translate the register
218 fetch into a memory read. */
219void
220m68hc11_fetch_pseudo_register (int regno)
221{
222 char buf[MAX_REGISTER_RAW_SIZE];
78073dd8 223
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224 m68hc11_initialize_register_info ();
225
226 /* Fetch a soft register: translate into a memory read. */
227 if (soft_regs[regno].name)
228 {
229 target_read_memory (soft_regs[regno].addr, buf, 2);
230 }
231 else
232 {
233 memset (buf, 0, 2);
234 }
235 supply_register (regno, buf);
236}
78073dd8 237
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238/* Store a pseudo register. Translate the register store
239 into a memory write. */
240static void
241m68hc11_store_pseudo_register (int regno)
242{
243 m68hc11_initialize_register_info ();
78073dd8 244
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245 /* Store a soft register: translate into a memory write. */
246 if (soft_regs[regno].name)
247 {
248 char buf[MAX_REGISTER_RAW_SIZE];
78073dd8 249
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250 read_register_gen (regno, buf);
251 target_write_memory (soft_regs[regno].addr, buf, 2);
252 }
253}
78073dd8 254
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255static char *
256m68hc11_register_name (int reg_nr)
78073dd8 257{
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258 if (reg_nr < 0)
259 return NULL;
260 if (reg_nr >= M68HC11_ALL_REGS)
261 return NULL;
262
263 /* If we don't know the address of a soft register, pretend it
264 does not exist. */
265 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
266 return NULL;
267 return m68hc11_register_names[reg_nr];
268}
78073dd8 269
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270static unsigned char *
271m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
78073dd8 272{
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273 static unsigned char breakpoint[] = {0x0};
274
275 *lenptr = sizeof (breakpoint);
276 return breakpoint;
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277}
278
279/* Immediately after a function call, return the saved pc before the frame
82c230c2 280 is setup. */
78073dd8 281
82c230c2 282static CORE_ADDR
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283m68hc11_saved_pc_after_call (struct frame_info *frame)
284{
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285 CORE_ADDR addr;
286
5d1a66bd 287 addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
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288 addr &= 0x0ffff;
289 return read_memory_integer (addr, 2) & 0x0FFFF;
290}
291
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292static CORE_ADDR
293m68hc11_frame_saved_pc (struct frame_info *frame)
294{
295 return frame->extra_info->return_pc;
296}
297
298static CORE_ADDR
299m68hc11_frame_args_address (struct frame_info *frame)
300{
301 return frame->frame;
302}
303
304static CORE_ADDR
305m68hc11_frame_locals_address (struct frame_info *frame)
306{
307 return frame->frame;
308}
309
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310/* Discard from the stack the innermost frame, restoring all saved
311 registers. */
312
82c230c2 313static void
fba45db2 314m68hc11_pop_frame (void)
78073dd8 315{
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316 register struct frame_info *frame = get_current_frame ();
317 register CORE_ADDR fp, sp;
318 register int regnum;
319
320 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
321 generic_pop_dummy_frame ();
322 else
323 {
324 fp = FRAME_FP (frame);
325 FRAME_INIT_SAVED_REGS (frame);
326
327 /* Copy regs from where they were saved in the frame. */
328 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
329 if (frame->saved_regs[regnum])
330 write_register (regnum,
331 read_memory_integer (frame->saved_regs[regnum], 2));
332
333 write_register (HARD_PC_REGNUM, frame->extra_info->return_pc);
334 sp = fp + frame->extra_info->size;
335 write_register (HARD_SP_REGNUM, sp);
336 }
337 flush_cached_frames ();
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338}
339
340/* Analyze the function prologue to find some information
341 about the function:
342 - the PC of the first line (for m68hc11_skip_prologue)
343 - the offset of the previous frame saved address (from current frame)
344 - the soft registers which are pushed. */
345static void
82c230c2
SC
346m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
347 CORE_ADDR *first_line,
348 int *frame_offset, CORE_ADDR *pushed_regs)
78073dd8 349{
82c230c2 350 CORE_ADDR save_addr;
78073dd8
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351 CORE_ADDR func_end;
352 unsigned char op0, op1, op2;
353 int add_sp_mode;
82c230c2 354 int sp_adjust = 0;
78073dd8
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355 int size;
356 int found_frame_point;
82c230c2 357 int saved_reg;
78073dd8 358 CORE_ADDR first_pc;
78073dd8
AC
359
360 first_pc = get_pc_function_start (pc);
361 size = 0;
362
82c230c2 363 m68hc11_initialize_register_info ();
78073dd8
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364 if (first_pc == 0)
365 {
366 *frame_offset = 0;
78073dd8
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367 *first_line = pc;
368 return;
369 }
370
371#define OP_PAGE2 (0x18)
372#define OP_LDX (0xde)
373#define OP_LDY (0xde)
374#define OP_PSHX (0x3c)
375#define OP_PSHY (0x3c)
376#define OP_STS (0x9f)
377#define OP_TSX (0x30)
378#define OP_TSY (0x30)
379#define OP_XGDX (0x8f)
380#define OP_XGDY (0x8f)
381#define OP_ADDD (0xc3)
382#define OP_TXS (0x35)
383#define OP_TYS (0x35)
6148eca7 384#define OP_DES (0x34)
78073dd8
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385
386 /* The 68hc11 stack is as follows:
387
388
389 | |
390 +-----------+
391 | |
392 | args |
393 | |
394 +-----------+
395 | PC-return |
396 +-----------+
397 | Old frame |
398 +-----------+
399 | |
400 | Locals |
401 | |
402 +-----------+ <--- current frame
403 | |
404
405 With most processors (like 68K) the previous frame can be computed
406 easily because it is always at a fixed offset (see link/unlink).
407 That is, locals are accessed with negative offsets, arguments are
408 accessed with positive ones. Since 68hc11 only supports offsets
409 in the range [0..255], the frame is defined at the bottom of
410 locals (see picture).
411
412 The purpose of the analysis made here is to find out the size
413 of locals in this function. An alternative to this is to use
414 DWARF2 info. This would be better but I don't know how to
415 access dwarf2 debug from this function.
416
417 Walk from the function entry point to the point where we save
418 the frame. While walking instructions, compute the size of bytes
419 which are pushed. This gives us the index to access the previous
420 frame.
421
422 We limit the search to 128 bytes so that the algorithm is bounded
423 in case of random and wrong code. We also stop and abort if
424 we find an instruction which is not supposed to appear in the
425 prologue (as generated by gcc 2.95, 2.96).
426 */
427 pc = first_pc;
428 func_end = pc + 128;
429 add_sp_mode = 0;
430 found_frame_point = 0;
431 while (pc + 2 < func_end)
432 {
433 op0 = read_memory_unsigned_integer (pc, 1);
434 op1 = read_memory_unsigned_integer (pc + 1, 1);
435 op2 = read_memory_unsigned_integer (pc + 2, 1);
436
437 /* ldx *frame */
82c230c2 438 if (op0 == OP_LDX && op1 == M68HC11_FP_ADDR)
78073dd8
AC
439 {
440 pc += 2;
441 }
442
443 /* ldy *frame */
82c230c2
SC
444 else if (op0 == OP_PAGE2 && op1 == OP_LDY
445 && op2 == M68HC11_FP_ADDR)
78073dd8
AC
446 {
447 pc += 3;
448 }
449
450 /* pshx */
451 else if (op0 == OP_PSHX)
452 {
453 pc += 1;
454 size += 2;
455 }
456
457 /* pshy */
458 else if (op0 == OP_PAGE2 && op1 == OP_PSHX)
459 {
460 pc += 2;
461 size += 2;
462 }
463
464 /* sts *frame */
82c230c2 465 else if (op0 == OP_STS && op1 == M68HC11_FP_ADDR)
78073dd8
AC
466 {
467 found_frame_point = 1;
468 pc += 2;
469 break;
470 }
471 else if (op0 == OP_TSX && op1 == OP_XGDX)
472 {
473 add_sp_mode = 1;
474 pc += 2;
475 }
6148eca7
SC
476 /* des to allocate 1 byte on the stack */
477 else if (op0 == OP_DES)
478 {
479 pc += 1;
480 size += 1;
481 }
78073dd8
AC
482 else if (op0 == OP_PAGE2 && op1 == OP_TSY && op2 == OP_PAGE2)
483 {
484 op0 = read_memory_unsigned_integer (pc + 3, 1);
485 if (op0 != OP_XGDY)
486 break;
487
488 add_sp_mode = 2;
489 pc += 4;
490 }
491 else if (add_sp_mode && op0 == OP_ADDD)
492 {
493 sp_adjust = read_memory_unsigned_integer (pc + 1, 2);
494 if (sp_adjust & 0x8000)
495 sp_adjust |= 0xffff0000L;
496
497 sp_adjust = -sp_adjust;
498 add_sp_mode |= 4;
499 pc += 3;
500 }
501 else if (add_sp_mode == (1 | 4) && op0 == OP_XGDX
502 && op1 == OP_TXS)
503 {
504 size += sp_adjust;
505 pc += 2;
506 add_sp_mode = 0;
507 }
508 else if (add_sp_mode == (2 | 4) && op0 == OP_PAGE2
509 && op1 == OP_XGDY && op2 == OP_PAGE2)
510 {
511 op0 = read_memory_unsigned_integer (pc + 3, 1);
512 if (op0 != OP_TYS)
513 break;
514
515 size += sp_adjust;
516 pc += 4;
517 add_sp_mode = 0;
518 }
519 else
520 {
521 break;
522 }
523 }
524
525 if (found_frame_point == 0)
526 {
527 *frame_offset = 0;
528 }
529 else
530 {
531 *frame_offset = size;
532 }
533
534 /* Now, look forward to see how many registers are pushed on the stack.
535 We look only for soft registers so there must be a first LDX *REG
536 before a PSHX. */
82c230c2
SC
537 saved_reg = -1;
538 save_addr = fp;
78073dd8
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539 while (pc + 2 < func_end)
540 {
541 op0 = read_memory_unsigned_integer (pc, 1);
542 op1 = read_memory_unsigned_integer (pc + 1, 1);
543 op2 = read_memory_unsigned_integer (pc + 2, 1);
82c230c2 544 if (op0 == OP_LDX)
78073dd8 545 {
82c230c2
SC
546 saved_reg = m68hc11_which_soft_register (op1);
547 if (saved_reg < 0 || saved_reg == SOFT_FP_REGNUM)
548 break;
549
78073dd8
AC
550 pc += 2;
551 }
82c230c2 552 else if (op0 == OP_PAGE2 && op1 == OP_LDY)
78073dd8 553 {
82c230c2
SC
554 saved_reg = m68hc11_which_soft_register (op2);
555 if (saved_reg < 0 || saved_reg == SOFT_FP_REGNUM)
556 break;
557
78073dd8
AC
558 pc += 3;
559 }
560 else if (op0 == OP_PSHX)
561 {
562 /* If there was no load, this is a push for a function call. */
82c230c2 563 if (saved_reg < 0 || saved_reg >= M68HC11_ALL_REGS)
78073dd8 564 break;
82c230c2
SC
565
566 /* Keep track of the address where that register is saved
567 on the stack. */
568 save_addr -= 2;
569 if (pushed_regs)
570 pushed_regs[saved_reg] = save_addr;
571
78073dd8 572 pc += 1;
82c230c2 573 saved_reg = -1;
78073dd8
AC
574 }
575 else if (op0 == OP_PAGE2 && op1 == OP_PSHY)
576 {
82c230c2 577 if (saved_reg < 0 || saved_reg >= M68HC11_ALL_REGS)
78073dd8
AC
578 break;
579
82c230c2
SC
580 /* Keep track of the address where that register is saved
581 on the stack. */
582 save_addr -= 2;
583 if (pushed_regs)
584 pushed_regs[saved_reg] = save_addr;
585
78073dd8 586 pc += 2;
82c230c2 587 saved_reg = -1;
78073dd8
AC
588 }
589 else
590 {
591 break;
592 }
593 }
78073dd8
AC
594 *first_line = pc;
595}
596
82c230c2 597static CORE_ADDR
78073dd8
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598m68hc11_skip_prologue (CORE_ADDR pc)
599{
600 CORE_ADDR func_addr, func_end;
601 struct symtab_and_line sal;
602 int frame_offset;
78073dd8 603
82c230c2
SC
604 /* If we have line debugging information, then the end of the
605 prologue should be the first assembly instruction of the
78073dd8
AC
606 first source line. */
607 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
608 {
609 sal = find_pc_line (func_addr, 0);
610 if (sal.end && sal.end < func_end)
611 return sal.end;
612 }
613
82c230c2 614 m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
78073dd8
AC
615 return pc;
616}
617
618/* Given a GDB frame, determine the address of the calling function's frame.
619 This will be used to create a new GDB frame struct, and then
620 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
621*/
622
82c230c2 623static CORE_ADDR
78073dd8
AC
624m68hc11_frame_chain (struct frame_info *frame)
625{
82c230c2 626 CORE_ADDR addr;
78073dd8 627
6148eca7
SC
628 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
629 return frame->frame; /* dummy frame same as caller's frame */
630
82c230c2
SC
631 if (frame->extra_info->return_pc == 0
632 || inside_entry_file (frame->extra_info->return_pc))
633 return (CORE_ADDR) 0;
78073dd8
AC
634
635 if (frame->frame == 0)
636 {
637 return (CORE_ADDR) 0;
638 }
639
5d1a66bd 640 addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2;
78073dd8
AC
641 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
642 if (addr == 0)
643 {
82c230c2 644 return (CORE_ADDR) 0;
78073dd8
AC
645 }
646
647 return addr;
648}
649
650/* Put here the code to store, into a struct frame_saved_regs, the
651 addresses of the saved registers of frame described by FRAME_INFO.
652 This includes special registers such as pc and fp saved in special
653 ways in the stack frame. sp is even more special: the address we
654 return for it IS the sp for the next frame. */
82c230c2
SC
655static void
656m68hc11_frame_init_saved_regs (struct frame_info *fi)
78073dd8
AC
657{
658 CORE_ADDR pc;
184651e3
SC
659 CORE_ADDR addr;
660
82c230c2
SC
661 if (fi->saved_regs == NULL)
662 frame_saved_regs_zalloc (fi);
663 else
664 memset (fi->saved_regs, 0, sizeof (fi->saved_regs));
665
78073dd8 666 pc = fi->pc;
82c230c2
SC
667 m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size,
668 fi->saved_regs);
669
5d1a66bd 670 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
184651e3
SC
671 fi->saved_regs[SOFT_FP_REGNUM] = addr - 2;
672 fi->saved_regs[HARD_SP_REGNUM] = addr;
82c230c2 673 fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM];
78073dd8
AC
674}
675
82c230c2 676static void
78073dd8
AC
677m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
678{
82c230c2 679 CORE_ADDR addr;
78073dd8 680
82c230c2
SC
681 fi->extra_info = (struct frame_extra_info *)
682 frame_obstack_alloc (sizeof (struct frame_extra_info));
683
684 if (fi->next)
685 fi->pc = FRAME_SAVED_PC (fi->next);
686
687 m68hc11_frame_init_saved_regs (fi);
78073dd8
AC
688
689 if (fromleaf)
690 {
82c230c2 691 fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi);
78073dd8
AC
692 }
693 else
694 {
5d1a66bd 695 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
82c230c2
SC
696 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
697 fi->extra_info->return_pc = addr;
78073dd8
AC
698#if 0
699 printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n",
700 fi->pc,
701 fi->frame, fi->size,
702 addr & 0x0ffff,
703 fi->return_pc);
704#endif
705 }
706}
707
708/* Same as 'info reg' but prints the registers in a different way. */
709static void
710show_regs (char *args, int from_tty)
711{
82c230c2 712 int ccr = read_register (HARD_CCR_REGNUM);
78073dd8 713 int i;
82c230c2
SC
714 int nr;
715
78073dd8 716 printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
82c230c2
SC
717 (int) read_register (HARD_PC_REGNUM),
718 (int) read_register (HARD_SP_REGNUM),
719 (int) read_register (SOFT_FP_REGNUM),
78073dd8
AC
720 ccr,
721 ccr & M6811_S_BIT ? 'S' : '-',
722 ccr & M6811_X_BIT ? 'X' : '-',
723 ccr & M6811_H_BIT ? 'H' : '-',
724 ccr & M6811_I_BIT ? 'I' : '-',
725 ccr & M6811_N_BIT ? 'N' : '-',
726 ccr & M6811_Z_BIT ? 'Z' : '-',
727 ccr & M6811_V_BIT ? 'V' : '-',
728 ccr & M6811_C_BIT ? 'C' : '-');
729
730 printf_filtered ("D=%04x IX=%04x IY=%04x\n",
82c230c2
SC
731 (int) read_register (HARD_D_REGNUM),
732 (int) read_register (HARD_X_REGNUM),
733 (int) read_register (HARD_Y_REGNUM));
734
735 nr = 0;
736 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
78073dd8 737 {
82c230c2
SC
738 /* Skip registers which are not defined in the symbol table. */
739 if (soft_regs[i].name == 0)
740 continue;
741
742 printf_filtered ("D%d=%04x",
743 i - SOFT_D1_REGNUM + 1,
744 (int) read_register (i));
745 nr++;
746 if ((nr % 8) == 7)
78073dd8
AC
747 printf_filtered ("\n");
748 else
749 printf_filtered (" ");
750 }
82c230c2
SC
751 if (nr && (nr % 8) != 7)
752 printf_filtered ("\n");
78073dd8
AC
753}
754
22df305e
SC
755static CORE_ADDR
756m68hc11_stack_align (CORE_ADDR addr)
757{
758 return ((addr + 1) & -2);
759}
760
82c230c2 761static CORE_ADDR
78073dd8
AC
762m68hc11_push_arguments (int nargs,
763 value_ptr *args,
764 CORE_ADDR sp,
765 int struct_return,
766 CORE_ADDR struct_addr)
767{
82c230c2
SC
768 int stack_alloc;
769 int argnum;
770 int first_stack_argnum;
771 int stack_offset;
772 struct type *type;
773 char *val;
774 int len;
775
776 stack_alloc = 0;
777 first_stack_argnum = 0;
778 if (struct_return)
779 {
184651e3
SC
780 /* The struct is allocated on the stack and gdb used the stack
781 pointer for the address of that struct. We must apply the
782 stack offset on the address. */
5d1a66bd 783 write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
82c230c2
SC
784 }
785 else if (nargs > 0)
786 {
787 type = VALUE_TYPE (args[0]);
788 len = TYPE_LENGTH (type);
789
790 /* First argument is passed in D and X registers. */
791 if (len <= 4)
792 {
793 LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
794 first_stack_argnum = 1;
795 write_register (HARD_D_REGNUM, v);
796 if (len > 2)
797 {
798 v >>= 16;
799 write_register (HARD_X_REGNUM, v);
800 }
801 }
802 }
803 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
804 {
805 type = VALUE_TYPE (args[argnum]);
22df305e 806 stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
82c230c2
SC
807 }
808 sp -= stack_alloc;
809
5d1a66bd 810 stack_offset = STACK_CORRECTION;
82c230c2
SC
811 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
812 {
813 type = VALUE_TYPE (args[argnum]);
814 len = TYPE_LENGTH (type);
815
816 val = (char*) VALUE_CONTENTS (args[argnum]);
817 write_memory (sp + stack_offset, val, len);
818 stack_offset += len;
22df305e
SC
819 if (len & 1)
820 {
821 static char zero = 0;
822
823 write_memory (sp + stack_offset, &zero, 1);
824 stack_offset++;
825 }
82c230c2
SC
826 }
827 return sp;
78073dd8
AC
828}
829
830
82c230c2
SC
831/* Return a location where we can set a breakpoint that will be hit
832 when an inferior function call returns. */
78073dd8 833CORE_ADDR
fba45db2 834m68hc11_call_dummy_address (void)
78073dd8 835{
22df305e 836 return entry_point_address ();
78073dd8
AC
837}
838
82c230c2
SC
839static struct type *
840m68hc11_register_virtual_type (int reg_nr)
841{
842 return builtin_type_uint16;
843}
844
845static void
846m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
847{
184651e3
SC
848 /* The struct address computed by gdb is on the stack.
849 It uses the stack pointer so we must apply the stack
850 correction offset. */
5d1a66bd 851 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
82c230c2
SC
852}
853
854static void
855m68hc11_store_return_value (struct type *type, char *valbuf)
856{
22df305e
SC
857 int len;
858
859 len = TYPE_LENGTH (type);
860
861 /* First argument is passed in D and X registers. */
862 if (len <= 4)
863 {
864 LONGEST v = extract_unsigned_integer (valbuf, len);
865
866 write_register (HARD_D_REGNUM, v);
867 if (len > 2)
868 {
869 v >>= 16;
870 write_register (HARD_X_REGNUM, v);
871 }
872 }
873 else
874 error ("return of value > 4 is not supported.");
82c230c2
SC
875}
876
877
878/* Given a return value in `regbuf' with a type `type',
78073dd8
AC
879 extract and copy its value into `valbuf'. */
880
82c230c2
SC
881static void
882m68hc11_extract_return_value (struct type *type,
78073dd8
AC
883 char *regbuf,
884 char *valbuf)
885{
82c230c2
SC
886 int len = TYPE_LENGTH (type);
887
22df305e 888 switch (len)
82c230c2 889 {
22df305e
SC
890 case 1:
891 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2 + 1], len);
892 break;
893
894 case 2:
895 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2], len);
896 break;
897
898 case 3:
899 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2 + 1], 1);
900 memcpy (&valbuf[1], &regbuf[HARD_D_REGNUM * 2], 2);
901 break;
902
903 case 4:
904 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2], 2);
905 memcpy (&valbuf[2], &regbuf[HARD_D_REGNUM * 2], 2);
906 break;
907
908 default:
82c230c2
SC
909 error ("bad size for return value");
910 }
911}
912
913/* Should call_function allocate stack space for a struct return? */
914static int
915m68hc11_use_struct_convention (int gcc_p, struct type *type)
916{
22df305e
SC
917 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
918 || TYPE_CODE (type) == TYPE_CODE_UNION
919 || TYPE_LENGTH (type) > 4);
82c230c2
SC
920}
921
922static int
923m68hc11_return_value_on_stack (struct type *type)
924{
22df305e 925 return TYPE_LENGTH (type) > 4;
82c230c2
SC
926}
927
928/* Extract from an array REGBUF containing the (raw) register state
929 the address in which a function should return its structure value,
930 as a CORE_ADDR (or an expression that can be used as one). */
931static CORE_ADDR
932m68hc11_extract_struct_value_address (char *regbuf)
933{
934 return extract_address (&regbuf[HARD_D_REGNUM * 2],
935 REGISTER_RAW_SIZE (HARD_D_REGNUM));
936}
937
938/* Function: push_return_address (pc)
939 Set up the return address for the inferior function call.
940 Needed for targets where we don't actually execute a JSR/BSR instruction */
941
942static CORE_ADDR
943m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
944{
945 char valbuf[2];
946
22df305e 947 pc = CALL_DUMMY_ADDRESS ();
82c230c2
SC
948 sp -= 2;
949 store_unsigned_integer (valbuf, 2, pc);
5d1a66bd 950 write_memory (sp + STACK_CORRECTION, valbuf, 2);
82c230c2
SC
951 return sp;
952}
953
954/* Index within `registers' of the first byte of the space for
955 register N. */
956static int
957m68hc11_register_byte (int reg_nr)
958{
959 return (reg_nr * M68HC11_REG_SIZE);
960}
961
962static int
963m68hc11_register_raw_size (int reg_nr)
964{
965 return M68HC11_REG_SIZE;
966}
967
968static struct gdbarch *
969m68hc11_gdbarch_init (struct gdbarch_info info,
970 struct gdbarch_list *arches)
971{
972 static LONGEST m68hc11_call_dummy_words[] =
973 {0};
974 struct gdbarch *gdbarch;
975 struct gdbarch_tdep *tdep;
976 int elf_flags;
977
978 /* Extract the elf_flags if available */
979 elf_flags = 0;
980
981 soft_reg_initialized = 0;
982
983 /* try to find a pre-existing architecture */
984 for (arches = gdbarch_list_lookup_by_info (arches, &info);
985 arches != NULL;
986 arches = gdbarch_list_lookup_by_info (arches->next, &info))
987 {
988 /* MIPS needs to be pedantic about which ABI the object is
989 using. */
990 if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags)
991 continue;
992 return arches->gdbarch;
993 }
994
995 /* Need a new architecture. Fill in a target specific vector. */
996 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
997 gdbarch = gdbarch_alloc (&info, tdep);
998 tdep->elf_flags = elf_flags;
5d1a66bd
SC
999 switch (info.bfd_arch_info->arch)
1000 {
1001 case bfd_arch_m68hc11:
1002 tdep->stack_correction = 1;
1003 break;
82c230c2 1004
5d1a66bd
SC
1005 case bfd_arch_m68hc12:
1006 tdep->stack_correction = 0;
1007 break;
1008
1009 default:
1010 break;
1011 }
1012
82c230c2
SC
1013 /* Initially set everything according to the ABI. */
1014 set_gdbarch_short_bit (gdbarch, 16);
1015 set_gdbarch_int_bit (gdbarch, 32);
1016 set_gdbarch_float_bit (gdbarch, 32);
1017 set_gdbarch_double_bit (gdbarch, 64);
1018 set_gdbarch_long_double_bit (gdbarch, 64);
1019 set_gdbarch_long_bit (gdbarch, 32);
1020 set_gdbarch_ptr_bit (gdbarch, 16);
1021 set_gdbarch_long_long_bit (gdbarch, 64);
1022
1023 /* Set register info. */
1024 set_gdbarch_fp0_regnum (gdbarch, -1);
1025 set_gdbarch_max_register_raw_size (gdbarch, 2);
1026 set_gdbarch_max_register_virtual_size (gdbarch, 2);
1027 set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size);
1028 set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size);
1029 set_gdbarch_register_byte (gdbarch, m68hc11_register_byte);
1030 set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
1031 set_gdbarch_frame_args_skip (gdbarch, 0);
1032
1033 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1034 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1035 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1036 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
1037 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1038 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1039
1040 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1041 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1042 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1043 set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
1044 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1045 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1046 set_gdbarch_register_size (gdbarch, 2);
1047 set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
1048 set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
1049 set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register);
1050 set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register);
1051
1052 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1053 set_gdbarch_call_dummy_length (gdbarch, 0);
1054 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1055 set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address);
1056 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
1057 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1058 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1059 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1060 set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
1061 set_gdbarch_sizeof_call_dummy_words (gdbarch,
1062 sizeof (m68hc11_call_dummy_words));
1063 set_gdbarch_call_dummy_p (gdbarch, 1);
1064 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1065 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1066 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1067 set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
1068 set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
1069 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1070 set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
1071 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1072
1073 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1074 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1075 set_gdbarch_extract_struct_value_address (gdbarch,
1076 m68hc11_extract_struct_value_address);
1077 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
1078
1079
1080 set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain);
1081 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1082 set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
1083 set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address);
1084 set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address);
1085 set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
1086 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1087
1088 set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
1089 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1090
1091 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1092 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1093 set_gdbarch_extract_struct_value_address
1094 (gdbarch, m68hc11_extract_struct_value_address);
1095 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1096 set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
1097 set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame);
1098 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1099 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1100 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1101 set_gdbarch_function_start_offset (gdbarch, 0);
1102 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
22df305e 1103 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
82c230c2
SC
1104
1105 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1106 set_gdbarch_ieee_float (gdbarch, 1);
1107
1108 return gdbarch;
78073dd8
AC
1109}
1110
1111void
fba45db2 1112_initialize_m68hc11_tdep (void)
78073dd8 1113{
82c230c2
SC
1114 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1115 if (!tm_print_insn) /* Someone may have already set it */
1116 tm_print_insn = print_insn_m68hc11;
78073dd8
AC
1117
1118 add_com ("regs", class_vars, show_regs, "Print all registers");
1119}
1120
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