Commit | Line | Data |
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908f682f | 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
78073dd8 AC |
2 | Copyright (C) 1999, 2000 Free Software Foundation, Inc. |
3 | Contributed by Stephane Carrez, stcarrez@worldnet.fr | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
78073dd8 | 21 | |
82c230c2 SC |
22 | #include "defs.h" |
23 | #include "frame.h" | |
24 | #include "obstack.h" | |
25 | #include "symtab.h" | |
26 | #include "gdbtypes.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdb_string.h" | |
30 | #include "value.h" | |
31 | #include "inferior.h" | |
32 | #include "dis-asm.h" | |
33 | #include "symfile.h" | |
34 | #include "objfiles.h" | |
35 | #include "arch-utils.h" | |
78073dd8 | 36 | |
82c230c2 SC |
37 | #include "target.h" |
38 | #include "opcode/m68hc11.h" | |
78073dd8 AC |
39 | |
40 | /* Register numbers of various important registers. | |
41 | Note that some of these values are "real" register numbers, | |
42 | and correspond to the general registers of the machine, | |
43 | and some are "phony" register numbers which are too large | |
44 | to be actual register numbers as far as the user is concerned | |
45 | but do serve to get the desired values when passed to read_register. */ | |
46 | ||
82c230c2 SC |
47 | #define HARD_X_REGNUM 0 |
48 | #define HARD_D_REGNUM 1 | |
49 | #define HARD_Y_REGNUM 2 | |
50 | #define HARD_SP_REGNUM 3 | |
51 | #define HARD_PC_REGNUM 4 | |
52 | ||
53 | #define HARD_A_REGNUM 5 | |
54 | #define HARD_B_REGNUM 6 | |
55 | #define HARD_CCR_REGNUM 7 | |
56 | #define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM) | |
57 | ||
58 | /* Z is replaced by X or Y by gcc during machine reorg. | |
59 | ??? There is no way to get it and even know whether | |
60 | it's in X or Y or in ZS. */ | |
61 | #define SOFT_Z_REGNUM 8 | |
62 | ||
63 | /* Soft registers. These registers are special. There are treated | |
64 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). | |
65 | They are physically located in memory. */ | |
66 | #define SOFT_FP_REGNUM 9 | |
67 | #define SOFT_TMP_REGNUM 10 | |
68 | #define SOFT_ZS_REGNUM 11 | |
69 | #define SOFT_XY_REGNUM 12 | |
70 | #define SOFT_D1_REGNUM 13 | |
71 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) | |
72 | #define M68HC11_MAX_SOFT_REGS 32 | |
73 | ||
74 | #define M68HC11_NUM_REGS (8) | |
75 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) | |
76 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) | |
77 | ||
78 | #define M68HC11_REG_SIZE (2) | |
79 | ||
908f682f | 80 | struct insn_sequence; |
82c230c2 SC |
81 | struct gdbarch_tdep |
82 | { | |
83 | /* from the elf header */ | |
84 | int elf_flags; | |
5d1a66bd SC |
85 | |
86 | /* Stack pointer correction value. For 68hc11, the stack pointer points | |
87 | to the next push location. An offset of 1 must be applied to obtain | |
88 | the address where the last value is saved. For 68hc12, the stack | |
89 | pointer points to the last value pushed. No offset is necessary. */ | |
90 | int stack_correction; | |
908f682f SC |
91 | |
92 | /* Description of instructions in the prologue. */ | |
93 | struct insn_sequence *prologue; | |
82c230c2 SC |
94 | }; |
95 | ||
5d1a66bd SC |
96 | #define M6811_TDEP gdbarch_tdep (current_gdbarch) |
97 | #define STACK_CORRECTION (M6811_TDEP->stack_correction) | |
98 | ||
82c230c2 SC |
99 | struct frame_extra_info |
100 | { | |
101 | int frame_reg; | |
102 | CORE_ADDR return_pc; | |
103 | CORE_ADDR dummy; | |
104 | int frameless; | |
105 | int size; | |
106 | }; | |
78073dd8 | 107 | |
82c230c2 SC |
108 | /* Table of registers for 68HC11. This includes the hard registers |
109 | and the soft registers used by GCC. */ | |
110 | static char * | |
111 | m68hc11_register_names[] = | |
112 | { | |
113 | "x", "d", "y", "sp", "pc", "a", "b", | |
114 | "ccr", "z", "frame","tmp", "zs", "xy", | |
115 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", | |
116 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", | |
117 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", | |
118 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", | |
119 | "d29", "d30", "d31", "d32" | |
120 | }; | |
78073dd8 | 121 | |
82c230c2 SC |
122 | struct m68hc11_soft_reg |
123 | { | |
124 | const char *name; | |
125 | CORE_ADDR addr; | |
126 | }; | |
78073dd8 | 127 | |
82c230c2 | 128 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
78073dd8 | 129 | |
82c230c2 | 130 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
78073dd8 | 131 | |
82c230c2 SC |
132 | static int soft_min_addr; |
133 | static int soft_max_addr; | |
134 | static int soft_reg_initialized = 0; | |
78073dd8 | 135 | |
82c230c2 SC |
136 | /* Look in the symbol table for the address of a pseudo register |
137 | in memory. If we don't find it, pretend the register is not used | |
138 | and not available. */ | |
139 | static void | |
140 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) | |
141 | { | |
142 | struct minimal_symbol *msymbol; | |
78073dd8 | 143 | |
82c230c2 SC |
144 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
145 | if (msymbol) | |
146 | { | |
147 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); | |
148 | reg->name = xstrdup (name); | |
149 | ||
150 | /* Keep track of the address range for soft registers. */ | |
151 | if (reg->addr < (CORE_ADDR) soft_min_addr) | |
152 | soft_min_addr = reg->addr; | |
153 | if (reg->addr > (CORE_ADDR) soft_max_addr) | |
154 | soft_max_addr = reg->addr; | |
155 | } | |
156 | else | |
157 | { | |
158 | reg->name = 0; | |
159 | reg->addr = 0; | |
160 | } | |
161 | } | |
78073dd8 | 162 | |
82c230c2 SC |
163 | /* Initialize the table of soft register addresses according |
164 | to the symbol table. */ | |
165 | static void | |
166 | m68hc11_initialize_register_info (void) | |
167 | { | |
168 | int i; | |
78073dd8 | 169 | |
82c230c2 SC |
170 | if (soft_reg_initialized) |
171 | return; | |
172 | ||
173 | soft_min_addr = INT_MAX; | |
174 | soft_max_addr = 0; | |
175 | for (i = 0; i < M68HC11_ALL_REGS; i++) | |
176 | { | |
177 | soft_regs[i].name = 0; | |
178 | } | |
179 | ||
180 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); | |
181 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); | |
182 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); | |
183 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; | |
184 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); | |
78073dd8 | 185 | |
82c230c2 SC |
186 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
187 | { | |
188 | char buf[10]; | |
78073dd8 | 189 | |
82c230c2 SC |
190 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
191 | m68hc11_get_register_info (&soft_regs[i], buf); | |
192 | } | |
78073dd8 | 193 | |
82c230c2 SC |
194 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
195 | { | |
196 | warning ("No frame soft register found in the symbol table.\n"); | |
197 | warning ("Stack backtrace will not work.\n"); | |
198 | } | |
199 | soft_reg_initialized = 1; | |
200 | } | |
78073dd8 | 201 | |
82c230c2 SC |
202 | /* Given an address in memory, return the soft register number if |
203 | that address corresponds to a soft register. Returns -1 if not. */ | |
204 | static int | |
205 | m68hc11_which_soft_register (CORE_ADDR addr) | |
206 | { | |
207 | int i; | |
208 | ||
209 | if (addr < soft_min_addr || addr > soft_max_addr) | |
210 | return -1; | |
211 | ||
212 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) | |
213 | { | |
214 | if (soft_regs[i].name && soft_regs[i].addr == addr) | |
215 | return i; | |
216 | } | |
217 | return -1; | |
218 | } | |
78073dd8 | 219 | |
82c230c2 SC |
220 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
221 | pseudo registers. They are located in memory. Translate the register | |
222 | fetch into a memory read. */ | |
223 | void | |
224 | m68hc11_fetch_pseudo_register (int regno) | |
225 | { | |
226 | char buf[MAX_REGISTER_RAW_SIZE]; | |
78073dd8 | 227 | |
82c230c2 SC |
228 | m68hc11_initialize_register_info (); |
229 | ||
230 | /* Fetch a soft register: translate into a memory read. */ | |
231 | if (soft_regs[regno].name) | |
232 | { | |
233 | target_read_memory (soft_regs[regno].addr, buf, 2); | |
234 | } | |
235 | else | |
236 | { | |
237 | memset (buf, 0, 2); | |
238 | } | |
239 | supply_register (regno, buf); | |
240 | } | |
78073dd8 | 241 | |
82c230c2 SC |
242 | /* Store a pseudo register. Translate the register store |
243 | into a memory write. */ | |
244 | static void | |
245 | m68hc11_store_pseudo_register (int regno) | |
246 | { | |
247 | m68hc11_initialize_register_info (); | |
78073dd8 | 248 | |
82c230c2 SC |
249 | /* Store a soft register: translate into a memory write. */ |
250 | if (soft_regs[regno].name) | |
251 | { | |
252 | char buf[MAX_REGISTER_RAW_SIZE]; | |
78073dd8 | 253 | |
82c230c2 SC |
254 | read_register_gen (regno, buf); |
255 | target_write_memory (soft_regs[regno].addr, buf, 2); | |
256 | } | |
257 | } | |
78073dd8 | 258 | |
82c230c2 SC |
259 | static char * |
260 | m68hc11_register_name (int reg_nr) | |
78073dd8 | 261 | { |
82c230c2 SC |
262 | if (reg_nr < 0) |
263 | return NULL; | |
264 | if (reg_nr >= M68HC11_ALL_REGS) | |
265 | return NULL; | |
266 | ||
267 | /* If we don't know the address of a soft register, pretend it | |
268 | does not exist. */ | |
269 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) | |
270 | return NULL; | |
271 | return m68hc11_register_names[reg_nr]; | |
272 | } | |
78073dd8 | 273 | |
82c230c2 SC |
274 | static unsigned char * |
275 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
78073dd8 | 276 | { |
82c230c2 SC |
277 | static unsigned char breakpoint[] = {0x0}; |
278 | ||
279 | *lenptr = sizeof (breakpoint); | |
280 | return breakpoint; | |
78073dd8 AC |
281 | } |
282 | ||
283 | /* Immediately after a function call, return the saved pc before the frame | |
82c230c2 | 284 | is setup. */ |
78073dd8 | 285 | |
82c230c2 | 286 | static CORE_ADDR |
78073dd8 AC |
287 | m68hc11_saved_pc_after_call (struct frame_info *frame) |
288 | { | |
82c230c2 SC |
289 | CORE_ADDR addr; |
290 | ||
5d1a66bd | 291 | addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION; |
78073dd8 AC |
292 | addr &= 0x0ffff; |
293 | return read_memory_integer (addr, 2) & 0x0FFFF; | |
294 | } | |
295 | ||
82c230c2 SC |
296 | static CORE_ADDR |
297 | m68hc11_frame_saved_pc (struct frame_info *frame) | |
298 | { | |
299 | return frame->extra_info->return_pc; | |
300 | } | |
301 | ||
302 | static CORE_ADDR | |
303 | m68hc11_frame_args_address (struct frame_info *frame) | |
304 | { | |
908f682f | 305 | return frame->frame + frame->extra_info->size + STACK_CORRECTION + 2; |
82c230c2 SC |
306 | } |
307 | ||
308 | static CORE_ADDR | |
309 | m68hc11_frame_locals_address (struct frame_info *frame) | |
310 | { | |
311 | return frame->frame; | |
312 | } | |
313 | ||
78073dd8 AC |
314 | /* Discard from the stack the innermost frame, restoring all saved |
315 | registers. */ | |
316 | ||
82c230c2 | 317 | static void |
fba45db2 | 318 | m68hc11_pop_frame (void) |
78073dd8 | 319 | { |
82c230c2 SC |
320 | register struct frame_info *frame = get_current_frame (); |
321 | register CORE_ADDR fp, sp; | |
322 | register int regnum; | |
323 | ||
324 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) | |
325 | generic_pop_dummy_frame (); | |
326 | else | |
327 | { | |
328 | fp = FRAME_FP (frame); | |
329 | FRAME_INIT_SAVED_REGS (frame); | |
330 | ||
331 | /* Copy regs from where they were saved in the frame. */ | |
332 | for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++) | |
333 | if (frame->saved_regs[regnum]) | |
334 | write_register (regnum, | |
335 | read_memory_integer (frame->saved_regs[regnum], 2)); | |
336 | ||
337 | write_register (HARD_PC_REGNUM, frame->extra_info->return_pc); | |
338 | sp = fp + frame->extra_info->size; | |
339 | write_register (HARD_SP_REGNUM, sp); | |
340 | } | |
341 | flush_cached_frames (); | |
78073dd8 AC |
342 | } |
343 | ||
908f682f SC |
344 | \f |
345 | /* 68HC11 & 68HC12 prologue analysis. | |
346 | ||
347 | */ | |
348 | #define MAX_CODES 12 | |
349 | ||
350 | /* 68HC11 opcodes. */ | |
351 | #undef M6811_OP_PAGE2 | |
352 | #define M6811_OP_PAGE2 (0x18) | |
353 | #define M6811_OP_LDX (0xde) | |
354 | #define M6811_OP_PSHX (0x3c) | |
355 | #define M6811_OP_STS (0x9f) | |
356 | #define M6811_OP_TSX (0x30) | |
357 | #define M6811_OP_XGDX (0x8f) | |
358 | #define M6811_OP_ADDD (0xc3) | |
359 | #define M6811_OP_TXS (0x35) | |
360 | #define M6811_OP_DES (0x34) | |
361 | ||
362 | /* 68HC12 opcodes. */ | |
363 | #define M6812_OP_PAGE2 (0x18) | |
364 | #define M6812_OP_MOVW (0x01) | |
365 | #define M6812_PB_PSHW (0xae) | |
366 | #define M6812_OP_STS (0x7f) | |
367 | #define M6812_OP_LEAS (0x1b) | |
368 | ||
369 | /* Operand extraction. */ | |
370 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ | |
371 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ | |
372 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ | |
373 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ | |
374 | ||
375 | /* Identification of the sequence. */ | |
376 | enum m6811_seq_type | |
377 | { | |
378 | P_LAST = 0, | |
379 | P_SAVE_REG, /* Save a register on the stack. */ | |
380 | P_SET_FRAME, /* Setup the frame pointer. */ | |
381 | P_LOCAL_1, /* Allocate 1 byte for locals. */ | |
382 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ | |
383 | P_LOCAL_N /* Allocate N bytes for locals. */ | |
384 | }; | |
385 | ||
386 | struct insn_sequence { | |
387 | enum m6811_seq_type type; | |
388 | unsigned length; | |
389 | unsigned short code[MAX_CODES]; | |
390 | }; | |
391 | ||
392 | /* Sequence of instructions in the 68HC11 function prologue. */ | |
393 | static struct insn_sequence m6811_prologue[] = { | |
394 | /* Sequences to save a soft-register. */ | |
395 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, | |
396 | M6811_OP_PSHX } }, | |
397 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, | |
398 | M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
399 | ||
400 | /* Sequences to allocate local variables. */ | |
401 | { P_LOCAL_N, 7, { M6811_OP_TSX, | |
402 | M6811_OP_XGDX, | |
403 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
404 | M6811_OP_XGDX, | |
405 | M6811_OP_TXS } }, | |
406 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, | |
407 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
408 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
409 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
410 | M6811_OP_PAGE2, M6811_OP_TXS } }, | |
411 | { P_LOCAL_1, 1, { M6811_OP_DES } }, | |
412 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, | |
413 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
414 | ||
415 | /* Initialize the frame pointer. */ | |
416 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, | |
417 | { P_LAST, 0, { 0 } } | |
418 | }; | |
419 | ||
420 | ||
421 | /* Sequence of instructions in the 68HC12 function prologue. */ | |
422 | static struct insn_sequence m6812_prologue[] = { | |
423 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, | |
424 | OP_IMM_HIGH, OP_IMM_LOW } }, | |
425 | { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } }, | |
426 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, | |
427 | { P_LAST, 0 } | |
428 | }; | |
429 | ||
430 | ||
431 | /* Analyze the sequence of instructions starting at the given address. | |
432 | Returns a pointer to the sequence when it is recognized and | |
433 | the optional value (constant/address) associated with it. | |
434 | Advance the pc for the next sequence. */ | |
435 | static struct insn_sequence * | |
436 | m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc, | |
437 | CORE_ADDR *val) | |
438 | { | |
439 | unsigned char buffer[MAX_CODES]; | |
440 | unsigned bufsize; | |
441 | unsigned j; | |
442 | CORE_ADDR cur_val; | |
443 | short v = 0; | |
444 | ||
445 | bufsize = 0; | |
446 | for (; seq->type != P_LAST; seq++) | |
447 | { | |
448 | cur_val = 0; | |
449 | for (j = 0; j < seq->length; j++) | |
450 | { | |
451 | if (bufsize < j + 1) | |
452 | { | |
453 | buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize, | |
454 | 1); | |
455 | bufsize++; | |
456 | } | |
457 | /* Continue while we match the opcode. */ | |
458 | if (seq->code[j] == buffer[j]) | |
459 | continue; | |
460 | ||
461 | if ((seq->code[j] & 0xf00) == 0) | |
462 | break; | |
463 | ||
464 | /* Extract a sequence parameter (address or constant). */ | |
465 | switch (seq->code[j]) | |
466 | { | |
467 | case OP_DIRECT: | |
468 | cur_val = (CORE_ADDR) buffer[j]; | |
469 | break; | |
470 | ||
471 | case OP_IMM_HIGH: | |
472 | cur_val = cur_val & 0x0ff; | |
473 | cur_val |= (buffer[j] << 8); | |
474 | break; | |
475 | ||
476 | case OP_IMM_LOW: | |
477 | cur_val &= 0x0ff00; | |
478 | cur_val |= buffer[j]; | |
479 | break; | |
480 | ||
481 | case OP_PBYTE: | |
482 | if ((buffer[j] & 0xE0) == 0x80) | |
483 | { | |
484 | v = buffer[j] & 0x1f; | |
485 | if (v & 0x10) | |
486 | v |= 0xfff0; | |
487 | } | |
488 | else if ((buffer[j] & 0xfe) == 0xf0) | |
489 | { | |
490 | v = read_memory_unsigned_integer (*pc + j + 1, 1); | |
491 | if (buffer[j] & 1) | |
492 | v |= 0xff00; | |
493 | } | |
494 | else if (buffer[j] == 0xf2) | |
495 | { | |
496 | v = read_memory_unsigned_integer (*pc + j + 1, 2); | |
497 | } | |
498 | cur_val = v; | |
499 | break; | |
500 | } | |
501 | } | |
502 | ||
503 | /* We have a full match. */ | |
504 | if (j == seq->length) | |
505 | { | |
506 | *val = cur_val; | |
507 | *pc = *pc + j; | |
508 | return seq; | |
509 | } | |
510 | } | |
511 | return 0; | |
512 | } | |
513 | ||
78073dd8 AC |
514 | /* Analyze the function prologue to find some information |
515 | about the function: | |
516 | - the PC of the first line (for m68hc11_skip_prologue) | |
517 | - the offset of the previous frame saved address (from current frame) | |
518 | - the soft registers which are pushed. */ | |
519 | static void | |
82c230c2 SC |
520 | m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp, |
521 | CORE_ADDR *first_line, | |
522 | int *frame_offset, CORE_ADDR *pushed_regs) | |
78073dd8 | 523 | { |
82c230c2 | 524 | CORE_ADDR save_addr; |
78073dd8 | 525 | CORE_ADDR func_end; |
78073dd8 AC |
526 | int size; |
527 | int found_frame_point; | |
82c230c2 | 528 | int saved_reg; |
78073dd8 | 529 | CORE_ADDR first_pc; |
908f682f SC |
530 | int done = 0; |
531 | struct insn_sequence *seq_table; | |
78073dd8 AC |
532 | |
533 | first_pc = get_pc_function_start (pc); | |
534 | size = 0; | |
535 | ||
82c230c2 | 536 | m68hc11_initialize_register_info (); |
78073dd8 AC |
537 | if (first_pc == 0) |
538 | { | |
539 | *frame_offset = 0; | |
78073dd8 AC |
540 | *first_line = pc; |
541 | return; | |
542 | } | |
543 | ||
908f682f SC |
544 | seq_table = gdbarch_tdep (current_gdbarch)->prologue; |
545 | ||
78073dd8 AC |
546 | /* The 68hc11 stack is as follows: |
547 | ||
548 | ||
549 | | | | |
550 | +-----------+ | |
551 | | | | |
552 | | args | | |
553 | | | | |
554 | +-----------+ | |
555 | | PC-return | | |
556 | +-----------+ | |
557 | | Old frame | | |
558 | +-----------+ | |
559 | | | | |
560 | | Locals | | |
561 | | | | |
562 | +-----------+ <--- current frame | |
563 | | | | |
564 | ||
565 | With most processors (like 68K) the previous frame can be computed | |
566 | easily because it is always at a fixed offset (see link/unlink). | |
567 | That is, locals are accessed with negative offsets, arguments are | |
568 | accessed with positive ones. Since 68hc11 only supports offsets | |
569 | in the range [0..255], the frame is defined at the bottom of | |
570 | locals (see picture). | |
571 | ||
572 | The purpose of the analysis made here is to find out the size | |
573 | of locals in this function. An alternative to this is to use | |
574 | DWARF2 info. This would be better but I don't know how to | |
575 | access dwarf2 debug from this function. | |
576 | ||
577 | Walk from the function entry point to the point where we save | |
578 | the frame. While walking instructions, compute the size of bytes | |
579 | which are pushed. This gives us the index to access the previous | |
580 | frame. | |
581 | ||
582 | We limit the search to 128 bytes so that the algorithm is bounded | |
583 | in case of random and wrong code. We also stop and abort if | |
584 | we find an instruction which is not supposed to appear in the | |
585 | prologue (as generated by gcc 2.95, 2.96). | |
586 | */ | |
587 | pc = first_pc; | |
588 | func_end = pc + 128; | |
78073dd8 | 589 | found_frame_point = 0; |
908f682f SC |
590 | *frame_offset = 0; |
591 | save_addr = fp; | |
592 | while (!done && pc + 2 < func_end) | |
78073dd8 | 593 | { |
908f682f SC |
594 | struct insn_sequence *seq; |
595 | CORE_ADDR val; | |
78073dd8 | 596 | |
908f682f SC |
597 | seq = m68hc11_analyze_instruction (seq_table, &pc, &val); |
598 | if (seq == 0) | |
599 | break; | |
78073dd8 | 600 | |
908f682f | 601 | if (seq->type == P_SAVE_REG) |
78073dd8 | 602 | { |
908f682f SC |
603 | if (found_frame_point) |
604 | { | |
605 | saved_reg = m68hc11_which_soft_register (val); | |
606 | if (saved_reg < 0) | |
607 | break; | |
78073dd8 | 608 | |
908f682f SC |
609 | save_addr -= 2; |
610 | if (pushed_regs) | |
611 | pushed_regs[saved_reg] = save_addr; | |
612 | } | |
613 | else | |
614 | { | |
615 | size += 2; | |
616 | } | |
78073dd8 | 617 | } |
908f682f | 618 | else if (seq->type == P_SET_FRAME) |
78073dd8 AC |
619 | { |
620 | found_frame_point = 1; | |
908f682f | 621 | *frame_offset = size; |
78073dd8 | 622 | } |
908f682f | 623 | else if (seq->type == P_LOCAL_1) |
78073dd8 | 624 | { |
6148eca7 SC |
625 | size += 1; |
626 | } | |
908f682f | 627 | else if (seq->type == P_LOCAL_2) |
78073dd8 | 628 | { |
908f682f | 629 | size += 2; |
78073dd8 | 630 | } |
908f682f | 631 | else if (seq->type == P_LOCAL_N) |
78073dd8 | 632 | { |
908f682f SC |
633 | /* Stack pointer is decremented for the allocation. */ |
634 | if (val & 0x8000) | |
635 | size -= (int) (val) | 0xffff0000; | |
636 | else | |
637 | size -= val; | |
78073dd8 AC |
638 | } |
639 | } | |
78073dd8 AC |
640 | *first_line = pc; |
641 | } | |
642 | ||
82c230c2 | 643 | static CORE_ADDR |
78073dd8 AC |
644 | m68hc11_skip_prologue (CORE_ADDR pc) |
645 | { | |
646 | CORE_ADDR func_addr, func_end; | |
647 | struct symtab_and_line sal; | |
648 | int frame_offset; | |
78073dd8 | 649 | |
82c230c2 SC |
650 | /* If we have line debugging information, then the end of the |
651 | prologue should be the first assembly instruction of the | |
78073dd8 AC |
652 | first source line. */ |
653 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
654 | { | |
655 | sal = find_pc_line (func_addr, 0); | |
656 | if (sal.end && sal.end < func_end) | |
657 | return sal.end; | |
658 | } | |
659 | ||
82c230c2 | 660 | m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0); |
78073dd8 AC |
661 | return pc; |
662 | } | |
663 | ||
664 | /* Given a GDB frame, determine the address of the calling function's frame. | |
665 | This will be used to create a new GDB frame struct, and then | |
666 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
667 | */ | |
668 | ||
82c230c2 | 669 | static CORE_ADDR |
78073dd8 AC |
670 | m68hc11_frame_chain (struct frame_info *frame) |
671 | { | |
82c230c2 | 672 | CORE_ADDR addr; |
78073dd8 | 673 | |
6148eca7 SC |
674 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
675 | return frame->frame; /* dummy frame same as caller's frame */ | |
676 | ||
82c230c2 SC |
677 | if (frame->extra_info->return_pc == 0 |
678 | || inside_entry_file (frame->extra_info->return_pc)) | |
679 | return (CORE_ADDR) 0; | |
78073dd8 AC |
680 | |
681 | if (frame->frame == 0) | |
682 | { | |
683 | return (CORE_ADDR) 0; | |
684 | } | |
685 | ||
5d1a66bd | 686 | addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2; |
78073dd8 AC |
687 | addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF; |
688 | if (addr == 0) | |
689 | { | |
82c230c2 | 690 | return (CORE_ADDR) 0; |
78073dd8 AC |
691 | } |
692 | ||
693 | return addr; | |
694 | } | |
695 | ||
696 | /* Put here the code to store, into a struct frame_saved_regs, the | |
697 | addresses of the saved registers of frame described by FRAME_INFO. | |
698 | This includes special registers such as pc and fp saved in special | |
699 | ways in the stack frame. sp is even more special: the address we | |
700 | return for it IS the sp for the next frame. */ | |
82c230c2 SC |
701 | static void |
702 | m68hc11_frame_init_saved_regs (struct frame_info *fi) | |
78073dd8 AC |
703 | { |
704 | CORE_ADDR pc; | |
184651e3 SC |
705 | CORE_ADDR addr; |
706 | ||
82c230c2 SC |
707 | if (fi->saved_regs == NULL) |
708 | frame_saved_regs_zalloc (fi); | |
709 | else | |
710 | memset (fi->saved_regs, 0, sizeof (fi->saved_regs)); | |
711 | ||
78073dd8 | 712 | pc = fi->pc; |
82c230c2 SC |
713 | m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size, |
714 | fi->saved_regs); | |
715 | ||
5d1a66bd | 716 | addr = fi->frame + fi->extra_info->size + STACK_CORRECTION; |
908f682f SC |
717 | if (soft_regs[SOFT_FP_REGNUM].name) |
718 | fi->saved_regs[SOFT_FP_REGNUM] = addr - 2; | |
184651e3 | 719 | fi->saved_regs[HARD_SP_REGNUM] = addr; |
82c230c2 | 720 | fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM]; |
78073dd8 AC |
721 | } |
722 | ||
82c230c2 | 723 | static void |
78073dd8 AC |
724 | m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
725 | { | |
82c230c2 | 726 | CORE_ADDR addr; |
78073dd8 | 727 | |
82c230c2 SC |
728 | fi->extra_info = (struct frame_extra_info *) |
729 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
730 | ||
731 | if (fi->next) | |
732 | fi->pc = FRAME_SAVED_PC (fi->next); | |
733 | ||
734 | m68hc11_frame_init_saved_regs (fi); | |
78073dd8 AC |
735 | |
736 | if (fromleaf) | |
737 | { | |
82c230c2 | 738 | fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi); |
78073dd8 AC |
739 | } |
740 | else | |
741 | { | |
5d1a66bd | 742 | addr = fi->frame + fi->extra_info->size + STACK_CORRECTION; |
82c230c2 SC |
743 | addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff; |
744 | fi->extra_info->return_pc = addr; | |
78073dd8 AC |
745 | #if 0 |
746 | printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n", | |
747 | fi->pc, | |
748 | fi->frame, fi->size, | |
749 | addr & 0x0ffff, | |
750 | fi->return_pc); | |
751 | #endif | |
752 | } | |
753 | } | |
754 | ||
755 | /* Same as 'info reg' but prints the registers in a different way. */ | |
756 | static void | |
757 | show_regs (char *args, int from_tty) | |
758 | { | |
82c230c2 | 759 | int ccr = read_register (HARD_CCR_REGNUM); |
78073dd8 | 760 | int i; |
82c230c2 SC |
761 | int nr; |
762 | ||
78073dd8 | 763 | printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n", |
82c230c2 SC |
764 | (int) read_register (HARD_PC_REGNUM), |
765 | (int) read_register (HARD_SP_REGNUM), | |
766 | (int) read_register (SOFT_FP_REGNUM), | |
78073dd8 AC |
767 | ccr, |
768 | ccr & M6811_S_BIT ? 'S' : '-', | |
769 | ccr & M6811_X_BIT ? 'X' : '-', | |
770 | ccr & M6811_H_BIT ? 'H' : '-', | |
771 | ccr & M6811_I_BIT ? 'I' : '-', | |
772 | ccr & M6811_N_BIT ? 'N' : '-', | |
773 | ccr & M6811_Z_BIT ? 'Z' : '-', | |
774 | ccr & M6811_V_BIT ? 'V' : '-', | |
775 | ccr & M6811_C_BIT ? 'C' : '-'); | |
776 | ||
777 | printf_filtered ("D=%04x IX=%04x IY=%04x\n", | |
82c230c2 SC |
778 | (int) read_register (HARD_D_REGNUM), |
779 | (int) read_register (HARD_X_REGNUM), | |
780 | (int) read_register (HARD_Y_REGNUM)); | |
781 | ||
782 | nr = 0; | |
783 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) | |
78073dd8 | 784 | { |
82c230c2 SC |
785 | /* Skip registers which are not defined in the symbol table. */ |
786 | if (soft_regs[i].name == 0) | |
787 | continue; | |
788 | ||
789 | printf_filtered ("D%d=%04x", | |
790 | i - SOFT_D1_REGNUM + 1, | |
791 | (int) read_register (i)); | |
792 | nr++; | |
793 | if ((nr % 8) == 7) | |
78073dd8 AC |
794 | printf_filtered ("\n"); |
795 | else | |
796 | printf_filtered (" "); | |
797 | } | |
82c230c2 SC |
798 | if (nr && (nr % 8) != 7) |
799 | printf_filtered ("\n"); | |
78073dd8 AC |
800 | } |
801 | ||
22df305e SC |
802 | static CORE_ADDR |
803 | m68hc11_stack_align (CORE_ADDR addr) | |
804 | { | |
805 | return ((addr + 1) & -2); | |
806 | } | |
807 | ||
82c230c2 | 808 | static CORE_ADDR |
78073dd8 AC |
809 | m68hc11_push_arguments (int nargs, |
810 | value_ptr *args, | |
811 | CORE_ADDR sp, | |
812 | int struct_return, | |
813 | CORE_ADDR struct_addr) | |
814 | { | |
82c230c2 SC |
815 | int stack_alloc; |
816 | int argnum; | |
817 | int first_stack_argnum; | |
818 | int stack_offset; | |
819 | struct type *type; | |
820 | char *val; | |
821 | int len; | |
822 | ||
823 | stack_alloc = 0; | |
824 | first_stack_argnum = 0; | |
825 | if (struct_return) | |
826 | { | |
184651e3 SC |
827 | /* The struct is allocated on the stack and gdb used the stack |
828 | pointer for the address of that struct. We must apply the | |
829 | stack offset on the address. */ | |
5d1a66bd | 830 | write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION); |
82c230c2 SC |
831 | } |
832 | else if (nargs > 0) | |
833 | { | |
834 | type = VALUE_TYPE (args[0]); | |
835 | len = TYPE_LENGTH (type); | |
836 | ||
837 | /* First argument is passed in D and X registers. */ | |
838 | if (len <= 4) | |
839 | { | |
840 | LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len); | |
841 | first_stack_argnum = 1; | |
842 | write_register (HARD_D_REGNUM, v); | |
843 | if (len > 2) | |
844 | { | |
845 | v >>= 16; | |
846 | write_register (HARD_X_REGNUM, v); | |
847 | } | |
848 | } | |
849 | } | |
850 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) | |
851 | { | |
852 | type = VALUE_TYPE (args[argnum]); | |
22df305e | 853 | stack_alloc += (TYPE_LENGTH (type) + 1) & -2; |
82c230c2 SC |
854 | } |
855 | sp -= stack_alloc; | |
856 | ||
5d1a66bd | 857 | stack_offset = STACK_CORRECTION; |
82c230c2 SC |
858 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) |
859 | { | |
860 | type = VALUE_TYPE (args[argnum]); | |
861 | len = TYPE_LENGTH (type); | |
862 | ||
863 | val = (char*) VALUE_CONTENTS (args[argnum]); | |
864 | write_memory (sp + stack_offset, val, len); | |
865 | stack_offset += len; | |
22df305e SC |
866 | if (len & 1) |
867 | { | |
868 | static char zero = 0; | |
869 | ||
870 | write_memory (sp + stack_offset, &zero, 1); | |
871 | stack_offset++; | |
872 | } | |
82c230c2 SC |
873 | } |
874 | return sp; | |
78073dd8 AC |
875 | } |
876 | ||
877 | ||
82c230c2 SC |
878 | /* Return a location where we can set a breakpoint that will be hit |
879 | when an inferior function call returns. */ | |
78073dd8 | 880 | CORE_ADDR |
fba45db2 | 881 | m68hc11_call_dummy_address (void) |
78073dd8 | 882 | { |
22df305e | 883 | return entry_point_address (); |
78073dd8 AC |
884 | } |
885 | ||
82c230c2 SC |
886 | static struct type * |
887 | m68hc11_register_virtual_type (int reg_nr) | |
888 | { | |
889 | return builtin_type_uint16; | |
890 | } | |
891 | ||
892 | static void | |
893 | m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
894 | { | |
184651e3 SC |
895 | /* The struct address computed by gdb is on the stack. |
896 | It uses the stack pointer so we must apply the stack | |
897 | correction offset. */ | |
5d1a66bd | 898 | write_register (HARD_D_REGNUM, addr + STACK_CORRECTION); |
82c230c2 SC |
899 | } |
900 | ||
901 | static void | |
902 | m68hc11_store_return_value (struct type *type, char *valbuf) | |
903 | { | |
22df305e SC |
904 | int len; |
905 | ||
906 | len = TYPE_LENGTH (type); | |
907 | ||
908 | /* First argument is passed in D and X registers. */ | |
909 | if (len <= 4) | |
910 | { | |
911 | LONGEST v = extract_unsigned_integer (valbuf, len); | |
912 | ||
913 | write_register (HARD_D_REGNUM, v); | |
914 | if (len > 2) | |
915 | { | |
916 | v >>= 16; | |
917 | write_register (HARD_X_REGNUM, v); | |
918 | } | |
919 | } | |
920 | else | |
921 | error ("return of value > 4 is not supported."); | |
82c230c2 SC |
922 | } |
923 | ||
924 | ||
925 | /* Given a return value in `regbuf' with a type `type', | |
78073dd8 AC |
926 | extract and copy its value into `valbuf'. */ |
927 | ||
82c230c2 SC |
928 | static void |
929 | m68hc11_extract_return_value (struct type *type, | |
78073dd8 AC |
930 | char *regbuf, |
931 | char *valbuf) | |
932 | { | |
82c230c2 SC |
933 | int len = TYPE_LENGTH (type); |
934 | ||
22df305e | 935 | switch (len) |
82c230c2 | 936 | { |
22df305e SC |
937 | case 1: |
938 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len); | |
939 | break; | |
940 | ||
941 | case 2: | |
942 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len); | |
943 | break; | |
944 | ||
945 | case 3: | |
946 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1); | |
947 | memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2); | |
948 | break; | |
949 | ||
950 | case 4: | |
951 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2); | |
952 | memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2); | |
953 | break; | |
954 | ||
955 | default: | |
82c230c2 SC |
956 | error ("bad size for return value"); |
957 | } | |
958 | } | |
959 | ||
960 | /* Should call_function allocate stack space for a struct return? */ | |
961 | static int | |
962 | m68hc11_use_struct_convention (int gcc_p, struct type *type) | |
963 | { | |
22df305e SC |
964 | return (TYPE_CODE (type) == TYPE_CODE_STRUCT |
965 | || TYPE_CODE (type) == TYPE_CODE_UNION | |
966 | || TYPE_LENGTH (type) > 4); | |
82c230c2 SC |
967 | } |
968 | ||
969 | static int | |
970 | m68hc11_return_value_on_stack (struct type *type) | |
971 | { | |
22df305e | 972 | return TYPE_LENGTH (type) > 4; |
82c230c2 SC |
973 | } |
974 | ||
975 | /* Extract from an array REGBUF containing the (raw) register state | |
976 | the address in which a function should return its structure value, | |
977 | as a CORE_ADDR (or an expression that can be used as one). */ | |
978 | static CORE_ADDR | |
979 | m68hc11_extract_struct_value_address (char *regbuf) | |
980 | { | |
981 | return extract_address (®buf[HARD_D_REGNUM * 2], | |
982 | REGISTER_RAW_SIZE (HARD_D_REGNUM)); | |
983 | } | |
984 | ||
985 | /* Function: push_return_address (pc) | |
986 | Set up the return address for the inferior function call. | |
987 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
988 | ||
989 | static CORE_ADDR | |
990 | m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
991 | { | |
992 | char valbuf[2]; | |
993 | ||
22df305e | 994 | pc = CALL_DUMMY_ADDRESS (); |
82c230c2 SC |
995 | sp -= 2; |
996 | store_unsigned_integer (valbuf, 2, pc); | |
5d1a66bd | 997 | write_memory (sp + STACK_CORRECTION, valbuf, 2); |
82c230c2 SC |
998 | return sp; |
999 | } | |
1000 | ||
1001 | /* Index within `registers' of the first byte of the space for | |
1002 | register N. */ | |
1003 | static int | |
1004 | m68hc11_register_byte (int reg_nr) | |
1005 | { | |
1006 | return (reg_nr * M68HC11_REG_SIZE); | |
1007 | } | |
1008 | ||
1009 | static int | |
1010 | m68hc11_register_raw_size (int reg_nr) | |
1011 | { | |
1012 | return M68HC11_REG_SIZE; | |
1013 | } | |
1014 | ||
ea3881d9 SC |
1015 | static int |
1016 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) | |
1017 | { | |
1018 | if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11) | |
1019 | return print_insn_m68hc11 (memaddr, info); | |
1020 | else | |
1021 | return print_insn_m68hc12 (memaddr, info); | |
1022 | } | |
1023 | ||
82c230c2 SC |
1024 | static struct gdbarch * |
1025 | m68hc11_gdbarch_init (struct gdbarch_info info, | |
1026 | struct gdbarch_list *arches) | |
1027 | { | |
1028 | static LONGEST m68hc11_call_dummy_words[] = | |
1029 | {0}; | |
1030 | struct gdbarch *gdbarch; | |
1031 | struct gdbarch_tdep *tdep; | |
1032 | int elf_flags; | |
1033 | ||
1034 | /* Extract the elf_flags if available */ | |
1035 | elf_flags = 0; | |
1036 | ||
1037 | soft_reg_initialized = 0; | |
1038 | ||
1039 | /* try to find a pre-existing architecture */ | |
1040 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1041 | arches != NULL; | |
1042 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1043 | { | |
1044 | /* MIPS needs to be pedantic about which ABI the object is | |
1045 | using. */ | |
1046 | if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags) | |
1047 | continue; | |
1048 | return arches->gdbarch; | |
1049 | } | |
1050 | ||
1051 | /* Need a new architecture. Fill in a target specific vector. */ | |
1052 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1053 | gdbarch = gdbarch_alloc (&info, tdep); | |
1054 | tdep->elf_flags = elf_flags; | |
5d1a66bd SC |
1055 | switch (info.bfd_arch_info->arch) |
1056 | { | |
1057 | case bfd_arch_m68hc11: | |
1058 | tdep->stack_correction = 1; | |
908f682f | 1059 | tdep->prologue = m6811_prologue; |
5d1a66bd | 1060 | break; |
82c230c2 | 1061 | |
5d1a66bd SC |
1062 | case bfd_arch_m68hc12: |
1063 | tdep->stack_correction = 0; | |
908f682f | 1064 | tdep->prologue = m6812_prologue; |
5d1a66bd SC |
1065 | break; |
1066 | ||
1067 | default: | |
1068 | break; | |
1069 | } | |
1070 | ||
82c230c2 SC |
1071 | /* Initially set everything according to the ABI. */ |
1072 | set_gdbarch_short_bit (gdbarch, 16); | |
1073 | set_gdbarch_int_bit (gdbarch, 32); | |
1074 | set_gdbarch_float_bit (gdbarch, 32); | |
1075 | set_gdbarch_double_bit (gdbarch, 64); | |
1076 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1077 | set_gdbarch_long_bit (gdbarch, 32); | |
1078 | set_gdbarch_ptr_bit (gdbarch, 16); | |
1079 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1080 | ||
1081 | /* Set register info. */ | |
1082 | set_gdbarch_fp0_regnum (gdbarch, -1); | |
1083 | set_gdbarch_max_register_raw_size (gdbarch, 2); | |
1084 | set_gdbarch_max_register_virtual_size (gdbarch, 2); | |
1085 | set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size); | |
1086 | set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size); | |
1087 | set_gdbarch_register_byte (gdbarch, m68hc11_register_byte); | |
1088 | set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs); | |
1089 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1090 | ||
1091 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); | |
1092 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
1093 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
1094 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); | |
1095 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); | |
1096 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
1097 | ||
1098 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); | |
1099 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); | |
1100 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); | |
1101 | set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM); | |
1102 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); | |
1103 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); | |
1104 | set_gdbarch_register_size (gdbarch, 2); | |
1105 | set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2); | |
1106 | set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type); | |
1107 | set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register); | |
1108 | set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register); | |
1109 | ||
1110 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
1111 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
1112 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
1113 | set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address); | |
1114 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ | |
1115 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1116 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
1117 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); | |
1118 | set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words); | |
1119 | set_gdbarch_sizeof_call_dummy_words (gdbarch, | |
1120 | sizeof (m68hc11_call_dummy_words)); | |
1121 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1122 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
1123 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1124 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
1125 | set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value); | |
1126 | set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments); | |
1127 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
1128 | set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address); | |
1129 | set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack); | |
1130 | ||
1131 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
1132 | set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value); | |
1133 | set_gdbarch_extract_struct_value_address (gdbarch, | |
1134 | m68hc11_extract_struct_value_address); | |
1135 | set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); | |
1136 | ||
1137 | ||
1138 | set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain); | |
1139 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); | |
1140 | set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc); | |
1141 | set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address); | |
1142 | set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address); | |
1143 | set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call); | |
1144 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1145 | ||
1146 | set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid); | |
1147 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1148 | ||
1149 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
1150 | set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value); | |
1151 | set_gdbarch_extract_struct_value_address | |
1152 | (gdbarch, m68hc11_extract_struct_value_address); | |
1153 | set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention); | |
1154 | set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info); | |
1155 | set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame); | |
1156 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); | |
1157 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1158 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1159 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1160 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); | |
22df305e | 1161 | set_gdbarch_stack_align (gdbarch, m68hc11_stack_align); |
82c230c2 SC |
1162 | |
1163 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
1164 | set_gdbarch_ieee_float (gdbarch, 1); | |
1165 | ||
1166 | return gdbarch; | |
78073dd8 AC |
1167 | } |
1168 | ||
1169 | void | |
fba45db2 | 1170 | _initialize_m68hc11_tdep (void) |
78073dd8 | 1171 | { |
82c230c2 | 1172 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
ea3881d9 | 1173 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
82c230c2 | 1174 | if (!tm_print_insn) /* Someone may have already set it */ |
ea3881d9 | 1175 | tm_print_insn = gdb_print_insn_m68hc11; |
78073dd8 AC |
1176 | |
1177 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1178 | } | |
1179 |