* emulparams/elf32bmip.sh (TEXT_DYNAMIC): Always set.
[deliverable/binutils-gdb.git] / gdb / m68k-tdep.c
CommitLineData
748894bf 1/* Target-dependent code for the Motorola 68000 series.
c6f0559b
AC
2
3 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000,
4 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
3f244638 24#include "dwarf2-frame.h"
c906108c 25#include "frame.h"
8de307e0
AS
26#include "frame-base.h"
27#include "frame-unwind.h"
f595cb19 28#include "floatformat.h"
c906108c
SS
29#include "symtab.h"
30#include "gdbcore.h"
31#include "value.h"
32#include "gdb_string.h"
8de307e0 33#include "gdb_assert.h"
7a292a7a 34#include "inferior.h"
4e052eda 35#include "regcache.h"
5d3ed2e3 36#include "arch-utils.h"
55809acb 37#include "osabi.h"
a89aa300 38#include "dis-asm.h"
32eeb91a
AS
39
40#include "m68k-tdep.h"
c906108c 41\f
c5aa993b 42
89c3b6d3
PDM
43#define P_LINKL_FP 0x480e
44#define P_LINKW_FP 0x4e56
45#define P_PEA_FP 0x4856
8de307e0
AS
46#define P_MOVEAL_SP_FP 0x2c4f
47#define P_ADDAW_SP 0xdefc
48#define P_ADDAL_SP 0xdffc
49#define P_SUBQW_SP 0x514f
50#define P_SUBQL_SP 0x518f
51#define P_LEA_SP_SP 0x4fef
52#define P_LEA_PC_A5 0x4bfb0170
53#define P_FMOVEMX_SP 0xf227
54#define P_MOVEL_SP 0x2f00
55#define P_MOVEML_SP 0x48e7
89c3b6d3 56
103a1597 57
103a1597
GS
58#define REGISTER_BYTES_FP (16*4 + 8 + 8*12 + 3*4)
59#define REGISTER_BYTES_NOFP (16*4 + 8)
60
103a1597 61/* Offset from SP to first arg on stack at first instruction of a function */
103a1597
GS
62#define SP_ARG0 (1 * 4)
63
103a1597
GS
64#if !defined (BPT_VECTOR)
65#define BPT_VECTOR 0xf
66#endif
67
eb2e12d7 68static const unsigned char *
103a1597
GS
69m68k_local_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
70{
71 static unsigned char break_insn[] = {0x4e, (0x40 | BPT_VECTOR)};
72 *lenptr = sizeof (break_insn);
73 return break_insn;
74}
75
76
942dc0e9 77static int
5ae5f592 78m68k_register_bytes_ok (long numbytes)
942dc0e9
GS
79{
80 return ((numbytes == REGISTER_BYTES_FP)
81 || (numbytes == REGISTER_BYTES_NOFP));
82}
83
d85fe7f7
AS
84/* Return the GDB type object for the "standard" data type of data in
85 register N. This should be int for D0-D7, SR, FPCONTROL and
86 FPSTATUS, long double for FP0-FP7, and void pointer for all others
87 (A0-A7, PC, FPIADDR). Note, for registers which contain
88 addresses return pointer to void, not pointer to char, because we
89 don't want to attempt to print the string after printing the
90 address. */
5d3ed2e3
GS
91
92static struct type *
8de307e0 93m68k_register_type (struct gdbarch *gdbarch, int regnum)
5d3ed2e3 94{
03dac896
AS
95 if (regnum >= FP0_REGNUM && regnum <= FP0_REGNUM + 7)
96 return builtin_type_m68881_ext;
97
32eeb91a 98 if (regnum == M68K_FPI_REGNUM || regnum == PC_REGNUM)
03dac896
AS
99 return builtin_type_void_func_ptr;
100
32eeb91a
AS
101 if (regnum == M68K_FPC_REGNUM || regnum == M68K_FPS_REGNUM
102 || regnum == PS_REGNUM)
03dac896
AS
103 return builtin_type_int32;
104
32eeb91a 105 if (regnum >= M68K_A0_REGNUM && regnum <= M68K_A0_REGNUM + 7)
03dac896
AS
106 return builtin_type_void_data_ptr;
107
108 return builtin_type_int32;
5d3ed2e3
GS
109}
110
111/* Function: m68k_register_name
112 Returns the name of the standard m68k register regnum. */
113
114static const char *
115m68k_register_name (int regnum)
116{
117 static char *register_names[] = {
118 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
119 "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
120 "ps", "pc",
121 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7",
122 "fpcontrol", "fpstatus", "fpiaddr", "fpcode", "fpflags"
123 };
124
125 if (regnum < 0 ||
126 regnum >= sizeof (register_names) / sizeof (register_names[0]))
127 internal_error (__FILE__, __LINE__,
128 "m68k_register_name: illegal register number %d", regnum);
129 else
130 return register_names[regnum];
131}
e47577ab
MK
132\f
133/* Return nonzero if a value of type TYPE stored in register REGNUM
134 needs any special handling. */
135
136static int
137m68k_convert_register_p (int regnum, struct type *type)
138{
139 return (regnum >= M68K_FP0_REGNUM && regnum <= M68K_FP0_REGNUM + 7);
140}
141
142/* Read a value of type TYPE from register REGNUM in frame FRAME, and
143 return its contents in TO. */
144
145static void
146m68k_register_to_value (struct frame_info *frame, int regnum,
147 struct type *type, void *to)
148{
149 char from[M68K_MAX_REGISTER_SIZE];
150
151 /* We only support floating-point values. */
152 if (TYPE_CODE (type) != TYPE_CODE_FLT)
153 {
154 warning ("Cannot convert floating-point register value "
155 "to non-floating-point type.");
156 return;
157 }
158
159 /* Convert to TYPE. This should be a no-op if TYPE is equivalent to
160 the extended floating-point format used by the FPU. */
161 get_frame_register (frame, regnum, from);
162 convert_typed_floating (from, builtin_type_m68881_ext, to, type);
163}
164
165/* Write the contents FROM of a value of type TYPE into register
166 REGNUM in frame FRAME. */
167
168static void
169m68k_value_to_register (struct frame_info *frame, int regnum,
170 struct type *type, const void *from)
171{
172 char to[M68K_MAX_REGISTER_SIZE];
173
174 /* We only support floating-point values. */
175 if (TYPE_CODE (type) != TYPE_CODE_FLT)
176 {
177 warning ("Cannot convert non-floating-point type "
178 "to floating-point register value.");
179 return;
180 }
181
182 /* Convert from TYPE. This should be a no-op if TYPE is equivalent
183 to the extended floating-point format used by the FPU. */
184 convert_typed_floating (from, type, to, builtin_type_m68881_ext);
185 put_frame_register (frame, regnum, to);
186}
187
8de307e0 188\f
f595cb19
MK
189/* There is a fair number of calling conventions that are in somewhat
190 wide use. The 68000/08/10 don't support an FPU, not even as a
191 coprocessor. All function return values are stored in %d0/%d1.
192 Structures are returned in a static buffer, a pointer to which is
193 returned in %d0. This means that functions returning a structure
194 are not re-entrant. To avoid this problem some systems use a
195 convention where the caller passes a pointer to a buffer in %a1
196 where the return values is to be stored. This convention is the
197 default, and is implemented in the function m68k_return_value.
198
199 The 68020/030/040/060 do support an FPU, either as a coprocessor
200 (68881/2) or built-in (68040/68060). That's why System V release 4
201 (SVR4) instroduces a new calling convention specified by the SVR4
202 psABI. Integer values are returned in %d0/%d1, pointer return
203 values in %a0 and floating values in %fp0. When calling functions
204 returning a structure the caller should pass a pointer to a buffer
205 for the return value in %a0. This convention is implemented in the
206 function m68k_svr4_return_value, and by appropriately setting the
207 struct_value_regnum member of `struct gdbarch_tdep'.
208
209 GNU/Linux returns values in the same way as SVR4 does, but uses %a1
210 for passing the structure return value buffer.
211
212 GCC can also generate code where small structures are returned in
213 %d0/%d1 instead of in memory by using -freg-struct-return. This is
214 the default on NetBSD a.out, OpenBSD and GNU/Linux and several
215 embedded systems. This convention is implemented by setting the
216 struct_return member of `struct gdbarch_tdep' to reg_struct_return. */
217
218/* Read a function return value of TYPE from REGCACHE, and copy that
8de307e0 219 into VALBUF. */
942dc0e9
GS
220
221static void
8de307e0
AS
222m68k_extract_return_value (struct type *type, struct regcache *regcache,
223 void *valbuf)
942dc0e9 224{
8de307e0
AS
225 int len = TYPE_LENGTH (type);
226 char buf[M68K_MAX_REGISTER_SIZE];
942dc0e9 227
8de307e0
AS
228 if (len <= 4)
229 {
230 regcache_raw_read (regcache, M68K_D0_REGNUM, buf);
231 memcpy (valbuf, buf + (4 - len), len);
232 }
233 else if (len <= 8)
234 {
235 regcache_raw_read (regcache, M68K_D0_REGNUM, buf);
236 memcpy (valbuf, buf + (8 - len), len - 4);
237 regcache_raw_read (regcache, M68K_D1_REGNUM,
238 (char *) valbuf + (len - 4));
239 }
240 else
241 internal_error (__FILE__, __LINE__,
242 "Cannot extract return value of %d bytes long.", len);
942dc0e9
GS
243}
244
942dc0e9 245static void
f595cb19
MK
246m68k_svr4_extract_return_value (struct type *type, struct regcache *regcache,
247 void *valbuf)
942dc0e9 248{
8de307e0 249 int len = TYPE_LENGTH (type);
f595cb19 250 char buf[M68K_MAX_REGISTER_SIZE];
942dc0e9 251
f595cb19 252 if (TYPE_CODE (type) == TYPE_CODE_FLT)
8de307e0 253 {
f595cb19
MK
254 regcache_raw_read (regcache, M68K_FP0_REGNUM, buf);
255 convert_typed_floating (buf, builtin_type_m68881_ext, valbuf, type);
8de307e0 256 }
f595cb19
MK
257 else if (TYPE_CODE (type) == TYPE_CODE_PTR && len == 4)
258 regcache_raw_read (regcache, M68K_A0_REGNUM, valbuf);
259 else
260 m68k_extract_return_value (type, regcache, valbuf);
261}
262
263/* Write a function return value of TYPE from VALBUF into REGCACHE. */
264
265static void
266m68k_store_return_value (struct type *type, struct regcache *regcache,
267 const void *valbuf)
268{
269 int len = TYPE_LENGTH (type);
942dc0e9 270
8de307e0
AS
271 if (len <= 4)
272 regcache_raw_write_part (regcache, M68K_D0_REGNUM, 4 - len, len, valbuf);
273 else if (len <= 8)
274 {
f595cb19 275 regcache_raw_write_part (regcache, M68K_D0_REGNUM, 8 - len,
8de307e0 276 len - 4, valbuf);
f595cb19 277 regcache_raw_write (regcache, M68K_D1_REGNUM,
8de307e0
AS
278 (char *) valbuf + (len - 4));
279 }
280 else
281 internal_error (__FILE__, __LINE__,
282 "Cannot store return value of %d bytes long.", len);
283}
942dc0e9 284
f595cb19
MK
285static void
286m68k_svr4_store_return_value (struct type *type, struct regcache *regcache,
287 const void *valbuf)
942dc0e9 288{
f595cb19 289 int len = TYPE_LENGTH (type);
8de307e0 290
f595cb19
MK
291 if (TYPE_CODE (type) == TYPE_CODE_FLT)
292 {
293 char buf[M68K_MAX_REGISTER_SIZE];
294 convert_typed_floating (valbuf, type, buf, builtin_type_m68881_ext);
295 regcache_raw_write (regcache, M68K_FP0_REGNUM, buf);
296 }
297 else if (TYPE_CODE (type) == TYPE_CODE_PTR && len == 4)
298 {
299 regcache_raw_write (regcache, M68K_A0_REGNUM, valbuf);
300 regcache_raw_write (regcache, M68K_D0_REGNUM, valbuf);
301 }
302 else
303 m68k_store_return_value (type, regcache, valbuf);
942dc0e9
GS
304}
305
f595cb19
MK
306/* Return non-zero if TYPE, which is assumed to be a structure or
307 union type, should be returned in registers for architecture
308 GDBARCH. */
309
c481dac7 310static int
f595cb19 311m68k_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
c481dac7 312{
f595cb19
MK
313 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
314 enum type_code code = TYPE_CODE (type);
315 int len = TYPE_LENGTH (type);
c481dac7 316
f595cb19
MK
317 gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION);
318
319 if (tdep->struct_return == pcc_struct_return)
320 return 0;
321
322 return (len == 1 || len == 2 || len == 4 || len == 8);
c481dac7
AS
323}
324
f595cb19
MK
325/* Determine, for architecture GDBARCH, how a return value of TYPE
326 should be returned. If it is supposed to be returned in registers,
327 and READBUF is non-zero, read the appropriate value from REGCACHE,
328 and copy it into READBUF. If WRITEBUF is non-zero, write the value
329 from WRITEBUF into REGCACHE. */
330
331static enum return_value_convention
332m68k_return_value (struct gdbarch *gdbarch, struct type *type,
333 struct regcache *regcache, void *readbuf,
334 const void *writebuf)
335{
336 enum type_code code = TYPE_CODE (type);
337
338 if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
339 && !m68k_reg_struct_return_p (gdbarch, type))
340 return RETURN_VALUE_STRUCT_CONVENTION;
341
342 /* GCC returns a `long double' in memory. */
343 if (code == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12)
344 return RETURN_VALUE_STRUCT_CONVENTION;
345
346 if (readbuf)
347 m68k_extract_return_value (type, regcache, readbuf);
348 if (writebuf)
349 m68k_store_return_value (type, regcache, writebuf);
350
351 return RETURN_VALUE_REGISTER_CONVENTION;
352}
353
354static enum return_value_convention
355m68k_svr4_return_value (struct gdbarch *gdbarch, struct type *type,
356 struct regcache *regcache, void *readbuf,
357 const void *writebuf)
358{
359 enum type_code code = TYPE_CODE (type);
360
361 if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
362 && !m68k_reg_struct_return_p (gdbarch, type))
51da707a
MK
363 {
364 /* The System V ABI says that:
365
366 "A function returning a structure or union also sets %a0 to
367 the value it finds in %a0. Thus when the caller receives
368 control again, the address of the returned object resides in
369 register %a0."
370
371 So the ABI guarantees that we can always find the return
372 value just after the function has returned. */
373
374 if (readbuf)
375 {
376 ULONGEST addr;
377
378 regcache_raw_read_unsigned (regcache, M68K_A0_REGNUM, &addr);
379 read_memory (addr, readbuf, TYPE_LENGTH (type));
380 }
381
382 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
383 }
f595cb19
MK
384
385 /* This special case is for structures consisting of a single
386 `float' or `double' member. These structures are returned in
387 %fp0. For these structures, we call ourselves recursively,
388 changing TYPE into the type of the first member of the structure.
389 Since that should work for all structures that have only one
390 member, we don't bother to check the member's type here. */
391 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
392 {
393 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
394 return m68k_svr4_return_value (gdbarch, type, regcache,
395 readbuf, writebuf);
396 }
397
398 if (readbuf)
399 m68k_svr4_extract_return_value (type, regcache, readbuf);
400 if (writebuf)
401 m68k_svr4_store_return_value (type, regcache, writebuf);
402
403 return RETURN_VALUE_REGISTER_CONVENTION;
404}
405\f
392a587b 406
8de307e0 407static CORE_ADDR
7d9b040b 408m68k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8de307e0
AS
409 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
410 struct value **args, CORE_ADDR sp, int struct_return,
411 CORE_ADDR struct_addr)
7f8e7424 412{
f595cb19 413 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8de307e0
AS
414 char buf[4];
415 int i;
416
417 /* Push arguments in reverse order. */
418 for (i = nargs - 1; i >= 0; i--)
419 {
c481dac7
AS
420 struct type *value_type = VALUE_ENCLOSING_TYPE (args[i]);
421 int len = TYPE_LENGTH (value_type);
8de307e0 422 int container_len = (len + 3) & ~3;
c481dac7
AS
423 int offset;
424
425 /* Non-scalars bigger than 4 bytes are left aligned, others are
426 right aligned. */
427 if ((TYPE_CODE (value_type) == TYPE_CODE_STRUCT
428 || TYPE_CODE (value_type) == TYPE_CODE_UNION
429 || TYPE_CODE (value_type) == TYPE_CODE_ARRAY)
430 && len > 4)
431 offset = 0;
432 else
433 offset = container_len - len;
8de307e0
AS
434 sp -= container_len;
435 write_memory (sp + offset, VALUE_CONTENTS_ALL (args[i]), len);
436 }
437
c481dac7 438 /* Store struct value address. */
8de307e0
AS
439 if (struct_return)
440 {
8de307e0 441 store_unsigned_integer (buf, 4, struct_addr);
f595cb19 442 regcache_cooked_write (regcache, tdep->struct_value_regnum, buf);
8de307e0
AS
443 }
444
445 /* Store return address. */
446 sp -= 4;
447 store_unsigned_integer (buf, 4, bp_addr);
448 write_memory (sp, buf, 4);
449
450 /* Finally, update the stack pointer... */
451 store_unsigned_integer (buf, 4, sp);
452 regcache_cooked_write (regcache, M68K_SP_REGNUM, buf);
453
454 /* ...and fake a frame pointer. */
455 regcache_cooked_write (regcache, M68K_FP_REGNUM, buf);
456
457 /* DWARF2/GCC uses the stack address *before* the function call as a
458 frame's CFA. */
459 return sp + 8;
7f8e7424 460}
8de307e0
AS
461\f
462struct m68k_frame_cache
463{
464 /* Base address. */
465 CORE_ADDR base;
466 CORE_ADDR sp_offset;
467 CORE_ADDR pc;
7f8e7424 468
8de307e0
AS
469 /* Saved registers. */
470 CORE_ADDR saved_regs[M68K_NUM_REGS];
471 CORE_ADDR saved_sp;
7f8e7424 472
8de307e0
AS
473 /* Stack space reserved for local variables. */
474 long locals;
475};
c906108c 476
8de307e0
AS
477/* Allocate and initialize a frame cache. */
478
479static struct m68k_frame_cache *
480m68k_alloc_frame_cache (void)
c906108c 481{
8de307e0
AS
482 struct m68k_frame_cache *cache;
483 int i;
c906108c 484
8de307e0 485 cache = FRAME_OBSTACK_ZALLOC (struct m68k_frame_cache);
c906108c 486
8de307e0
AS
487 /* Base address. */
488 cache->base = 0;
489 cache->sp_offset = -4;
490 cache->pc = 0;
c906108c 491
8de307e0
AS
492 /* Saved registers. We initialize these to -1 since zero is a valid
493 offset (that's where %fp is supposed to be stored). */
494 for (i = 0; i < M68K_NUM_REGS; i++)
495 cache->saved_regs[i] = -1;
496
497 /* Frameless until proven otherwise. */
498 cache->locals = -1;
499
500 return cache;
c906108c
SS
501}
502
8de307e0
AS
503/* Check whether PC points at a code that sets up a new stack frame.
504 If so, it updates CACHE and returns the address of the first
505 instruction after the sequence that sets removes the "hidden"
506 argument from the stack or CURRENT_PC, whichever is smaller.
507 Otherwise, return PC. */
c906108c 508
8de307e0
AS
509static CORE_ADDR
510m68k_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
511 struct m68k_frame_cache *cache)
c906108c 512{
8de307e0
AS
513 int op;
514
515 if (pc >= current_pc)
516 return current_pc;
c906108c 517
8de307e0
AS
518 op = read_memory_unsigned_integer (pc, 2);
519
520 if (op == P_LINKW_FP || op == P_LINKL_FP || op == P_PEA_FP)
c906108c 521 {
8de307e0
AS
522 cache->saved_regs[M68K_FP_REGNUM] = 0;
523 cache->sp_offset += 4;
524 if (op == P_LINKW_FP)
525 {
526 /* link.w %fp, #-N */
527 /* link.w %fp, #0; adda.l #-N, %sp */
528 cache->locals = -read_memory_integer (pc + 2, 2);
529
530 if (pc + 4 < current_pc && cache->locals == 0)
531 {
532 op = read_memory_unsigned_integer (pc + 4, 2);
533 if (op == P_ADDAL_SP)
534 {
535 cache->locals = read_memory_integer (pc + 6, 4);
536 return pc + 10;
537 }
538 }
539
540 return pc + 4;
541 }
542 else if (op == P_LINKL_FP)
c906108c 543 {
8de307e0
AS
544 /* link.l %fp, #-N */
545 cache->locals = -read_memory_integer (pc + 2, 4);
546 return pc + 6;
547 }
548 else
549 {
550 /* pea (%fp); movea.l %sp, %fp */
551 cache->locals = 0;
552
553 if (pc + 2 < current_pc)
554 {
555 op = read_memory_unsigned_integer (pc + 2, 2);
556
557 if (op == P_MOVEAL_SP_FP)
558 {
559 /* move.l %sp, %fp */
560 return pc + 4;
561 }
562 }
563
564 return pc + 2;
c906108c
SS
565 }
566 }
8de307e0 567 else if ((op & 0170777) == P_SUBQW_SP || (op & 0170777) == P_SUBQL_SP)
c906108c 568 {
8de307e0
AS
569 /* subq.[wl] #N,%sp */
570 /* subq.[wl] #8,%sp; subq.[wl] #N,%sp */
571 cache->locals = (op & 07000) == 0 ? 8 : (op & 07000) >> 9;
572 if (pc + 2 < current_pc)
c906108c 573 {
8de307e0
AS
574 op = read_memory_unsigned_integer (pc + 2, 2);
575 if ((op & 0170777) == P_SUBQW_SP || (op & 0170777) == P_SUBQL_SP)
576 {
577 cache->locals += (op & 07000) == 0 ? 8 : (op & 07000) >> 9;
578 return pc + 4;
579 }
c906108c 580 }
8de307e0
AS
581 return pc + 2;
582 }
583 else if (op == P_ADDAW_SP || op == P_LEA_SP_SP)
584 {
585 /* adda.w #-N,%sp */
586 /* lea (-N,%sp),%sp */
587 cache->locals = -read_memory_integer (pc + 2, 2);
588 return pc + 4;
c906108c 589 }
8de307e0 590 else if (op == P_ADDAL_SP)
c906108c 591 {
8de307e0
AS
592 /* adda.l #-N,%sp */
593 cache->locals = -read_memory_integer (pc + 2, 4);
594 return pc + 6;
c906108c 595 }
8de307e0
AS
596
597 return pc;
c906108c 598}
c5aa993b 599
8de307e0
AS
600/* Check whether PC points at code that saves registers on the stack.
601 If so, it updates CACHE and returns the address of the first
602 instruction after the register saves or CURRENT_PC, whichever is
603 smaller. Otherwise, return PC. */
c906108c 604
8de307e0
AS
605static CORE_ADDR
606m68k_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
607 struct m68k_frame_cache *cache)
608{
609 if (cache->locals >= 0)
610 {
611 CORE_ADDR offset;
612 int op;
613 int i, mask, regno;
c906108c 614
8de307e0
AS
615 offset = -4 - cache->locals;
616 while (pc < current_pc)
617 {
618 op = read_memory_unsigned_integer (pc, 2);
619 if (op == P_FMOVEMX_SP)
620 {
621 /* fmovem.x REGS,-(%sp) */
622 op = read_memory_unsigned_integer (pc + 2, 2);
623 if ((op & 0xff00) == 0xe000)
624 {
625 mask = op & 0xff;
626 for (i = 0; i < 16; i++, mask >>= 1)
627 {
628 if (mask & 1)
629 {
630 cache->saved_regs[i + M68K_FP0_REGNUM] = offset;
631 offset -= 12;
632 }
633 }
634 pc += 4;
635 }
636 else
637 break;
638 }
639 else if ((op & 0170677) == P_MOVEL_SP)
640 {
641 /* move.l %R,-(%sp) */
642 regno = ((op & 07000) >> 9) | ((op & 0100) >> 3);
643 cache->saved_regs[regno] = offset;
644 offset -= 4;
645 pc += 2;
646 }
647 else if (op == P_MOVEML_SP)
648 {
649 /* movem.l REGS,-(%sp) */
650 mask = read_memory_unsigned_integer (pc + 2, 2);
651 for (i = 0; i < 16; i++, mask >>= 1)
652 {
653 if (mask & 1)
654 {
655 cache->saved_regs[15 - i] = offset;
656 offset -= 4;
657 }
658 }
659 pc += 4;
660 }
661 else
662 break;
663 }
664 }
665
666 return pc;
667}
c906108c 668
c906108c 669
8de307e0
AS
670/* Do a full analysis of the prologue at PC and update CACHE
671 accordingly. Bail out early if CURRENT_PC is reached. Return the
672 address where the analysis stopped.
c906108c 673
8de307e0 674 We handle all cases that can be generated by gcc.
c906108c 675
8de307e0 676 For allocating a stack frame:
c906108c 677
8de307e0
AS
678 link.w %a6,#-N
679 link.l %a6,#-N
680 pea (%fp); move.l %sp,%fp
681 link.w %a6,#0; add.l #-N,%sp
682 subq.l #N,%sp
683 subq.w #N,%sp
684 subq.w #8,%sp; subq.w #N-8,%sp
685 add.w #-N,%sp
686 lea (-N,%sp),%sp
687 add.l #-N,%sp
c906108c 688
8de307e0 689 For saving registers:
c906108c 690
8de307e0
AS
691 fmovem.x REGS,-(%sp)
692 move.l R1,-(%sp)
693 move.l R1,-(%sp); move.l R2,-(%sp)
694 movem.l REGS,-(%sp)
c906108c 695
8de307e0 696 For setting up the PIC register:
c906108c 697
8de307e0 698 lea (%pc,N),%a5
c906108c 699
8de307e0 700 */
c906108c 701
eb2e12d7 702static CORE_ADDR
8de307e0
AS
703m68k_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
704 struct m68k_frame_cache *cache)
c906108c 705{
8de307e0 706 unsigned int op;
c906108c 707
8de307e0
AS
708 pc = m68k_analyze_frame_setup (pc, current_pc, cache);
709 pc = m68k_analyze_register_saves (pc, current_pc, cache);
710 if (pc >= current_pc)
711 return current_pc;
c906108c 712
8de307e0
AS
713 /* Check for GOT setup. */
714 op = read_memory_unsigned_integer (pc, 4);
715 if (op == P_LEA_PC_A5)
c906108c 716 {
8de307e0
AS
717 /* lea (%pc,N),%a5 */
718 return pc + 6;
c906108c 719 }
8de307e0
AS
720
721 return pc;
c906108c
SS
722}
723
8de307e0 724/* Return PC of first real instruction. */
7f8e7424 725
8de307e0
AS
726static CORE_ADDR
727m68k_skip_prologue (CORE_ADDR start_pc)
c906108c 728{
8de307e0
AS
729 struct m68k_frame_cache cache;
730 CORE_ADDR pc;
731 int op;
c906108c 732
8de307e0
AS
733 cache.locals = -1;
734 pc = m68k_analyze_prologue (start_pc, (CORE_ADDR) -1, &cache);
735 if (cache.locals < 0)
736 return start_pc;
737 return pc;
738}
c906108c 739
8de307e0
AS
740static CORE_ADDR
741m68k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
742{
743 char buf[8];
7f8e7424 744
8de307e0
AS
745 frame_unwind_register (next_frame, PC_REGNUM, buf);
746 return extract_typed_address (buf, builtin_type_void_func_ptr);
747}
748\f
749/* Normal frames. */
7f8e7424 750
8de307e0
AS
751static struct m68k_frame_cache *
752m68k_frame_cache (struct frame_info *next_frame, void **this_cache)
753{
754 struct m68k_frame_cache *cache;
755 char buf[4];
756 int i;
757
758 if (*this_cache)
759 return *this_cache;
760
761 cache = m68k_alloc_frame_cache ();
762 *this_cache = cache;
763
764 /* In principle, for normal frames, %fp holds the frame pointer,
765 which holds the base address for the current stack frame.
766 However, for functions that don't need it, the frame pointer is
767 optional. For these "frameless" functions the frame pointer is
768 actually the frame pointer of the calling frame. Signal
769 trampolines are just a special case of a "frameless" function.
770 They (usually) share their frame pointer with the frame that was
771 in progress when the signal occurred. */
772
773 frame_unwind_register (next_frame, M68K_FP_REGNUM, buf);
774 cache->base = extract_unsigned_integer (buf, 4);
775 if (cache->base == 0)
776 return cache;
777
778 /* For normal frames, %pc is stored at 4(%fp). */
779 cache->saved_regs[M68K_PC_REGNUM] = 4;
780
781 cache->pc = frame_func_unwind (next_frame);
782 if (cache->pc != 0)
783 m68k_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
784
785 if (cache->locals < 0)
786 {
787 /* We didn't find a valid frame, which means that CACHE->base
788 currently holds the frame pointer for our calling frame. If
789 we're at the start of a function, or somewhere half-way its
790 prologue, the function's frame probably hasn't been fully
791 setup yet. Try to reconstruct the base address for the stack
792 frame by looking at the stack pointer. For truly "frameless"
793 functions this might work too. */
794
795 frame_unwind_register (next_frame, M68K_SP_REGNUM, buf);
796 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
797 }
7f8e7424 798
8de307e0
AS
799 /* Now that we have the base address for the stack frame we can
800 calculate the value of %sp in the calling frame. */
801 cache->saved_sp = cache->base + 8;
7f8e7424 802
8de307e0
AS
803 /* Adjust all the saved registers such that they contain addresses
804 instead of offsets. */
805 for (i = 0; i < M68K_NUM_REGS; i++)
806 if (cache->saved_regs[i] != -1)
807 cache->saved_regs[i] += cache->base;
c906108c 808
8de307e0
AS
809 return cache;
810}
c906108c 811
8de307e0
AS
812static void
813m68k_frame_this_id (struct frame_info *next_frame, void **this_cache,
814 struct frame_id *this_id)
815{
816 struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
c906108c 817
8de307e0
AS
818 /* This marks the outermost frame. */
819 if (cache->base == 0)
820 return;
c5aa993b 821
8de307e0
AS
822 /* See the end of m68k_push_dummy_call. */
823 *this_id = frame_id_build (cache->base + 8, cache->pc);
824}
c5aa993b 825
8de307e0
AS
826static void
827m68k_frame_prev_register (struct frame_info *next_frame, void **this_cache,
828 int regnum, int *optimizedp,
829 enum lval_type *lvalp, CORE_ADDR *addrp,
830 int *realnump, void *valuep)
831{
832 struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
833
834 gdb_assert (regnum >= 0);
835
836 if (regnum == M68K_SP_REGNUM && cache->saved_sp)
c5aa993b 837 {
8de307e0
AS
838 *optimizedp = 0;
839 *lvalp = not_lval;
840 *addrp = 0;
841 *realnump = -1;
842 if (valuep)
c906108c 843 {
8de307e0
AS
844 /* Store the value. */
845 store_unsigned_integer (valuep, 4, cache->saved_sp);
89c3b6d3 846 }
8de307e0
AS
847 return;
848 }
849
850 if (regnum < M68K_NUM_REGS && cache->saved_regs[regnum] != -1)
851 {
852 *optimizedp = 0;
853 *lvalp = lval_memory;
854 *addrp = cache->saved_regs[regnum];
855 *realnump = -1;
856 if (valuep)
89c3b6d3 857 {
8de307e0
AS
858 /* Read the value in from memory. */
859 read_memory (*addrp, valuep,
860 register_size (current_gdbarch, regnum));
89c3b6d3 861 }
8de307e0 862 return;
c906108c 863 }
8de307e0 864
00b25ff3
AC
865 *optimizedp = 0;
866 *lvalp = lval_register;
867 *addrp = 0;
868 *realnump = regnum;
869 if (valuep)
870 frame_unwind_register (next_frame, (*realnump), valuep);
8de307e0
AS
871}
872
873static const struct frame_unwind m68k_frame_unwind =
874{
875 NORMAL_FRAME,
876 m68k_frame_this_id,
877 m68k_frame_prev_register
878};
879
880static const struct frame_unwind *
336d1bba 881m68k_frame_sniffer (struct frame_info *next_frame)
8de307e0
AS
882{
883 return &m68k_frame_unwind;
884}
885\f
8de307e0
AS
886static CORE_ADDR
887m68k_frame_base_address (struct frame_info *next_frame, void **this_cache)
888{
889 struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
890
891 return cache->base;
892}
893
894static const struct frame_base m68k_frame_base =
895{
896 &m68k_frame_unwind,
897 m68k_frame_base_address,
898 m68k_frame_base_address,
899 m68k_frame_base_address
900};
901
902static struct frame_id
903m68k_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
904{
905 char buf[4];
906 CORE_ADDR fp;
c906108c 907
8de307e0
AS
908 frame_unwind_register (next_frame, M68K_FP_REGNUM, buf);
909 fp = extract_unsigned_integer (buf, 4);
c906108c 910
8de307e0
AS
911 /* See the end of m68k_push_dummy_call. */
912 return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
913}
914\f
c5aa993b 915#ifdef USE_PROC_FS /* Target dependent support for /proc */
c906108c
SS
916
917#include <sys/procfs.h>
918
c60c0f5f
MS
919/* Prototypes for supply_gregset etc. */
920#include "gregset.h"
921
c906108c 922/* The /proc interface divides the target machine's register set up into
c5aa993b
JM
923 two different sets, the general register set (gregset) and the floating
924 point register set (fpregset). For each set, there is an ioctl to get
925 the current register set and another ioctl to set the current values.
c906108c 926
c5aa993b
JM
927 The actual structure passed through the ioctl interface is, of course,
928 naturally machine dependent, and is different for each set of registers.
929 For the m68k for example, the general register set is typically defined
930 by:
c906108c 931
c5aa993b 932 typedef int gregset_t[18];
c906108c 933
c5aa993b
JM
934 #define R_D0 0
935 ...
936 #define R_PS 17
c906108c 937
c5aa993b 938 and the floating point set by:
c906108c 939
c5aa993b
JM
940 typedef struct fpregset {
941 int f_pcr;
942 int f_psr;
943 int f_fpiaddr;
944 int f_fpregs[8][3]; (8 regs, 96 bits each)
945 } fpregset_t;
c906108c 946
c5aa993b
JM
947 These routines provide the packing and unpacking of gregset_t and
948 fpregset_t formatted data.
c906108c
SS
949
950 */
951
952/* Atari SVR4 has R_SR but not R_PS */
953
954#if !defined (R_PS) && defined (R_SR)
955#define R_PS R_SR
956#endif
957
958/* Given a pointer to a general register set in /proc format (gregset_t *),
c5aa993b
JM
959 unpack the register contents and supply them as gdb's idea of the current
960 register values. */
c906108c
SS
961
962void
fba45db2 963supply_gregset (gregset_t *gregsetp)
c906108c 964{
52f0bd74
AC
965 int regi;
966 greg_t *regp = (greg_t *) gregsetp;
c906108c 967
c5aa993b 968 for (regi = 0; regi < R_PC; regi++)
c906108c 969 {
23a6d369 970 regcache_raw_supply (current_regcache, regi, (char *) (regp + regi));
c906108c 971 }
23a6d369
AC
972 regcache_raw_supply (current_regcache, PS_REGNUM, (char *) (regp + R_PS));
973 regcache_raw_supply (current_regcache, PC_REGNUM, (char *) (regp + R_PC));
c906108c
SS
974}
975
976void
fba45db2 977fill_gregset (gregset_t *gregsetp, int regno)
c906108c 978{
52f0bd74
AC
979 int regi;
980 greg_t *regp = (greg_t *) gregsetp;
c906108c 981
c5aa993b 982 for (regi = 0; regi < R_PC; regi++)
c906108c 983 {
8de307e0 984 if (regno == -1 || regno == regi)
822c9732 985 regcache_raw_collect (current_regcache, regi, regp + regi);
c906108c 986 }
8de307e0 987 if (regno == -1 || regno == PS_REGNUM)
822c9732 988 regcache_raw_collect (current_regcache, PS_REGNUM, regp + R_PS);
8de307e0 989 if (regno == -1 || regno == PC_REGNUM)
822c9732 990 regcache_raw_collect (current_regcache, PC_REGNUM, regp + R_PC);
c906108c
SS
991}
992
993#if defined (FP0_REGNUM)
994
995/* Given a pointer to a floating point register set in /proc format
c5aa993b
JM
996 (fpregset_t *), unpack the register contents and supply them as gdb's
997 idea of the current floating point register values. */
c906108c 998
c5aa993b 999void
fba45db2 1000supply_fpregset (fpregset_t *fpregsetp)
c906108c 1001{
52f0bd74 1002 int regi;
c906108c 1003 char *from;
c5aa993b 1004
32eeb91a 1005 for (regi = FP0_REGNUM; regi < M68K_FPC_REGNUM; regi++)
c906108c 1006 {
c5aa993b 1007 from = (char *) &(fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
23a6d369 1008 regcache_raw_supply (current_regcache, regi, from);
c906108c 1009 }
23a6d369
AC
1010 regcache_raw_supply (current_regcache, M68K_FPC_REGNUM,
1011 (char *) &(fpregsetp->f_pcr));
1012 regcache_raw_supply (current_regcache, M68K_FPS_REGNUM,
1013 (char *) &(fpregsetp->f_psr));
1014 regcache_raw_supply (current_regcache, M68K_FPI_REGNUM,
1015 (char *) &(fpregsetp->f_fpiaddr));
c906108c
SS
1016}
1017
1018/* Given a pointer to a floating point register set in /proc format
c5aa993b
JM
1019 (fpregset_t *), update the register specified by REGNO from gdb's idea
1020 of the current floating point register set. If REGNO is -1, update
1021 them all. */
c906108c
SS
1022
1023void
fba45db2 1024fill_fpregset (fpregset_t *fpregsetp, int regno)
c906108c
SS
1025{
1026 int regi;
c906108c 1027
32eeb91a 1028 for (regi = FP0_REGNUM; regi < M68K_FPC_REGNUM; regi++)
c906108c 1029 {
8de307e0 1030 if (regno == -1 || regno == regi)
822c9732
AC
1031 regcache_raw_collect (current_regcache, regi,
1032 &fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
c906108c 1033 }
8de307e0 1034 if (regno == -1 || regno == M68K_FPC_REGNUM)
822c9732
AC
1035 regcache_raw_collect (current_regcache, M68K_FPC_REGNUM,
1036 &fpregsetp->f_pcr);
8de307e0 1037 if (regno == -1 || regno == M68K_FPS_REGNUM)
822c9732
AC
1038 regcache_raw_collect (current_regcache, M68K_FPS_REGNUM,
1039 &fpregsetp->f_psr);
8de307e0 1040 if (regno == -1 || regno == M68K_FPI_REGNUM)
822c9732
AC
1041 regcache_raw_collect (current_regcache, M68K_FPI_REGNUM,
1042 &fpregsetp->f_fpiaddr);
c906108c
SS
1043}
1044
c5aa993b 1045#endif /* defined (FP0_REGNUM) */
c906108c 1046
c5aa993b 1047#endif /* USE_PROC_FS */
c906108c 1048
c906108c
SS
1049/* Figure out where the longjmp will land. Slurp the args out of the stack.
1050 We expect the first arg to be a pointer to the jmp_buf structure from which
1051 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
1052 This routine returns true on success. */
1053
c34d127c 1054static int
f4281f55 1055m68k_get_longjmp_target (CORE_ADDR *pc)
c906108c 1056{
35fc8285 1057 char *buf;
c906108c 1058 CORE_ADDR sp, jb_addr;
eb2e12d7
AS
1059 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1060
1061 if (tdep->jb_pc < 0)
1062 {
1063 internal_error (__FILE__, __LINE__,
1064 "m68k_get_longjmp_target: not implemented");
1065 return 0;
1066 }
c906108c 1067
35fc8285 1068 buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
c5aa993b 1069 sp = read_register (SP_REGNUM);
c906108c 1070
b5d78d39
GS
1071 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
1072 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
c906108c
SS
1073 return 0;
1074
7c0b4a20 1075 jb_addr = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c 1076
eb2e12d7 1077 if (target_read_memory (jb_addr + tdep->jb_pc * tdep->jb_elt_size, buf,
c906108c
SS
1078 TARGET_PTR_BIT / TARGET_CHAR_BIT))
1079 return 0;
1080
7c0b4a20 1081 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c
SS
1082 return 1;
1083}
f595cb19
MK
1084\f
1085
1086/* System V Release 4 (SVR4). */
1087
1088void
1089m68k_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1090{
1091 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1092
1093 /* SVR4 uses a different calling convention. */
1094 set_gdbarch_return_value (gdbarch, m68k_svr4_return_value);
1095
1096 /* SVR4 uses %a0 instead of %a1. */
1097 tdep->struct_value_regnum = M68K_A0_REGNUM;
1098}
1099\f
c906108c 1100
152d9db6
GS
1101/* Function: m68k_gdbarch_init
1102 Initializer function for the m68k gdbarch vector.
1103 Called by gdbarch. Sets up the gdbarch vector(s) for this target. */
1104
1105static struct gdbarch *
1106m68k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1107{
1108 struct gdbarch_tdep *tdep = NULL;
1109 struct gdbarch *gdbarch;
1110
1111 /* find a candidate among the list of pre-declared architectures. */
1112 arches = gdbarch_list_lookup_by_info (arches, &info);
1113 if (arches != NULL)
1114 return (arches->gdbarch);
1115
eb2e12d7
AS
1116 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1117 gdbarch = gdbarch_alloc (&info, tdep);
152d9db6 1118
5d3ed2e3
GS
1119 set_gdbarch_long_double_format (gdbarch, &floatformat_m68881_ext);
1120 set_gdbarch_long_double_bit (gdbarch, 96);
1121
5d3ed2e3 1122 set_gdbarch_skip_prologue (gdbarch, m68k_skip_prologue);
103a1597 1123 set_gdbarch_breakpoint_from_pc (gdbarch, m68k_local_breakpoint_from_pc);
5d3ed2e3
GS
1124
1125 /* Stack grows down. */
1126 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
6300c360
GS
1127
1128 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
942dc0e9
GS
1129 set_gdbarch_decr_pc_after_break (gdbarch, 2);
1130
6300c360 1131 set_gdbarch_frame_args_skip (gdbarch, 8);
942dc0e9 1132
8de307e0 1133 set_gdbarch_register_type (gdbarch, m68k_register_type);
5d3ed2e3 1134 set_gdbarch_register_name (gdbarch, m68k_register_name);
942dc0e9
GS
1135 set_gdbarch_num_regs (gdbarch, 29);
1136 set_gdbarch_register_bytes_ok (gdbarch, m68k_register_bytes_ok);
32eeb91a 1137 set_gdbarch_sp_regnum (gdbarch, M68K_SP_REGNUM);
32eeb91a
AS
1138 set_gdbarch_pc_regnum (gdbarch, M68K_PC_REGNUM);
1139 set_gdbarch_ps_regnum (gdbarch, M68K_PS_REGNUM);
1140 set_gdbarch_fp0_regnum (gdbarch, M68K_FP0_REGNUM);
e47577ab
MK
1141 set_gdbarch_convert_register_p (gdbarch, m68k_convert_register_p);
1142 set_gdbarch_register_to_value (gdbarch, m68k_register_to_value);
1143 set_gdbarch_value_to_register (gdbarch, m68k_value_to_register);
a2c6a6d5 1144
8de307e0 1145 set_gdbarch_push_dummy_call (gdbarch, m68k_push_dummy_call);
f595cb19 1146 set_gdbarch_return_value (gdbarch, m68k_return_value);
6c0e89ed 1147
650fcc91
AS
1148 /* Disassembler. */
1149 set_gdbarch_print_insn (gdbarch, print_insn_m68k);
1150
eb2e12d7
AS
1151#if defined JB_PC && defined JB_ELEMENT_SIZE
1152 tdep->jb_pc = JB_PC;
1153 tdep->jb_elt_size = JB_ELEMENT_SIZE;
1154#else
1155 tdep->jb_pc = -1;
1156#endif
f595cb19 1157 tdep->struct_value_regnum = M68K_A1_REGNUM;
66894781 1158 tdep->struct_return = reg_struct_return;
8de307e0
AS
1159
1160 /* Frame unwinder. */
1161 set_gdbarch_unwind_dummy_id (gdbarch, m68k_unwind_dummy_id);
1162 set_gdbarch_unwind_pc (gdbarch, m68k_unwind_pc);
3f244638
AS
1163
1164 /* Hook in the DWARF CFI frame unwinder. */
1165 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1166
8de307e0 1167 frame_base_set_default (gdbarch, &m68k_frame_base);
eb2e12d7 1168
55809acb
AS
1169 /* Hook in ABI-specific overrides, if they have been registered. */
1170 gdbarch_init_osabi (info, gdbarch);
1171
eb2e12d7
AS
1172 /* Now we have tuned the configuration, set a few final things,
1173 based on what the OS ABI has told us. */
1174
1175 if (tdep->jb_pc >= 0)
1176 set_gdbarch_get_longjmp_target (gdbarch, m68k_get_longjmp_target);
1177
336d1bba 1178 frame_unwind_append_sniffer (gdbarch, m68k_frame_sniffer);
8de307e0 1179
152d9db6
GS
1180 return gdbarch;
1181}
1182
1183
1184static void
1185m68k_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1186{
eb2e12d7 1187 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
152d9db6 1188
eb2e12d7
AS
1189 if (tdep == NULL)
1190 return;
152d9db6 1191}
2acceee2 1192
a78f21af
AC
1193extern initialize_file_ftype _initialize_m68k_tdep; /* -Wmissing-prototypes */
1194
c906108c 1195void
fba45db2 1196_initialize_m68k_tdep (void)
c906108c 1197{
152d9db6 1198 gdbarch_register (bfd_arch_m68k, m68k_gdbarch_init, m68k_dump_tdep);
c906108c 1199}
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