* elfxx-ia64.c (elfNN_ia64_dynamic_symbol_p): Properly return false
[deliverable/binutils-gdb.git] / gdb / m68k-tdep.c
CommitLineData
c906108c 1/* Target dependent code for the Motorola 68000 series.
51603483
DJ
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, 2001,
3 2002, 2003
a1de33a8 4 Free Software Foundation, Inc.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "frame.h"
8de307e0
AS
25#include "frame-base.h"
26#include "frame-unwind.h"
c906108c
SS
27#include "symtab.h"
28#include "gdbcore.h"
29#include "value.h"
30#include "gdb_string.h"
8de307e0 31#include "gdb_assert.h"
7a292a7a 32#include "inferior.h"
4e052eda 33#include "regcache.h"
5d3ed2e3 34#include "arch-utils.h"
55809acb 35#include "osabi.h"
32eeb91a
AS
36
37#include "m68k-tdep.h"
c906108c 38\f
c5aa993b 39
89c3b6d3
PDM
40#define P_LINKL_FP 0x480e
41#define P_LINKW_FP 0x4e56
42#define P_PEA_FP 0x4856
8de307e0
AS
43#define P_MOVEAL_SP_FP 0x2c4f
44#define P_ADDAW_SP 0xdefc
45#define P_ADDAL_SP 0xdffc
46#define P_SUBQW_SP 0x514f
47#define P_SUBQL_SP 0x518f
48#define P_LEA_SP_SP 0x4fef
49#define P_LEA_PC_A5 0x4bfb0170
50#define P_FMOVEMX_SP 0xf227
51#define P_MOVEL_SP 0x2f00
52#define P_MOVEML_SP 0x48e7
89c3b6d3 53
103a1597 54
103a1597
GS
55#define REGISTER_BYTES_FP (16*4 + 8 + 8*12 + 3*4)
56#define REGISTER_BYTES_NOFP (16*4 + 8)
57
103a1597 58/* Offset from SP to first arg on stack at first instruction of a function */
103a1597
GS
59#define SP_ARG0 (1 * 4)
60
103a1597
GS
61#if !defined (BPT_VECTOR)
62#define BPT_VECTOR 0xf
63#endif
64
65#if !defined (REMOTE_BPT_VECTOR)
66#define REMOTE_BPT_VECTOR 1
67#endif
68
69
103a1597
GS
70/* gdbarch_breakpoint_from_pc is set to m68k_local_breakpoint_from_pc
71 so m68k_remote_breakpoint_from_pc is currently not used. */
72
eb2e12d7 73static const unsigned char *
103a1597
GS
74m68k_remote_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
75{
76 static unsigned char break_insn[] = {0x4e, (0x40 | REMOTE_BPT_VECTOR)};
77 *lenptr = sizeof (break_insn);
78 return break_insn;
79}
80
eb2e12d7 81static const unsigned char *
103a1597
GS
82m68k_local_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
83{
84 static unsigned char break_insn[] = {0x4e, (0x40 | BPT_VECTOR)};
85 *lenptr = sizeof (break_insn);
86 return break_insn;
87}
88
89
942dc0e9 90static int
5ae5f592 91m68k_register_bytes_ok (long numbytes)
942dc0e9
GS
92{
93 return ((numbytes == REGISTER_BYTES_FP)
94 || (numbytes == REGISTER_BYTES_NOFP));
95}
96
d85fe7f7
AS
97/* Return the GDB type object for the "standard" data type of data in
98 register N. This should be int for D0-D7, SR, FPCONTROL and
99 FPSTATUS, long double for FP0-FP7, and void pointer for all others
100 (A0-A7, PC, FPIADDR). Note, for registers which contain
101 addresses return pointer to void, not pointer to char, because we
102 don't want to attempt to print the string after printing the
103 address. */
5d3ed2e3
GS
104
105static struct type *
8de307e0 106m68k_register_type (struct gdbarch *gdbarch, int regnum)
5d3ed2e3 107{
03dac896
AS
108 if (regnum >= FP0_REGNUM && regnum <= FP0_REGNUM + 7)
109 return builtin_type_m68881_ext;
110
32eeb91a 111 if (regnum == M68K_FPI_REGNUM || regnum == PC_REGNUM)
03dac896
AS
112 return builtin_type_void_func_ptr;
113
32eeb91a
AS
114 if (regnum == M68K_FPC_REGNUM || regnum == M68K_FPS_REGNUM
115 || regnum == PS_REGNUM)
03dac896
AS
116 return builtin_type_int32;
117
32eeb91a 118 if (regnum >= M68K_A0_REGNUM && regnum <= M68K_A0_REGNUM + 7)
03dac896
AS
119 return builtin_type_void_data_ptr;
120
121 return builtin_type_int32;
5d3ed2e3
GS
122}
123
124/* Function: m68k_register_name
125 Returns the name of the standard m68k register regnum. */
126
127static const char *
128m68k_register_name (int regnum)
129{
130 static char *register_names[] = {
131 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
132 "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
133 "ps", "pc",
134 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7",
135 "fpcontrol", "fpstatus", "fpiaddr", "fpcode", "fpflags"
136 };
137
138 if (regnum < 0 ||
139 regnum >= sizeof (register_names) / sizeof (register_names[0]))
140 internal_error (__FILE__, __LINE__,
141 "m68k_register_name: illegal register number %d", regnum);
142 else
143 return register_names[regnum];
144}
145
5d3ed2e3
GS
146/* Index within `registers' of the first byte of the space for
147 register regnum. */
148
149static int
150m68k_register_byte (int regnum)
151{
32eeb91a
AS
152 if (regnum >= M68K_FPC_REGNUM)
153 return (((regnum - M68K_FPC_REGNUM) * 4) + 168);
5d3ed2e3
GS
154 else if (regnum >= FP0_REGNUM)
155 return (((regnum - FP0_REGNUM) * 12) + 72);
156 else
157 return (regnum * 4);
158}
8de307e0
AS
159\f
160/* Extract from an array REGBUF containing the (raw) register state, a
161 function return value of TYPE, and copy that, in virtual format,
162 into VALBUF. */
942dc0e9
GS
163
164static void
8de307e0
AS
165m68k_extract_return_value (struct type *type, struct regcache *regcache,
166 void *valbuf)
942dc0e9 167{
8de307e0
AS
168 int len = TYPE_LENGTH (type);
169 char buf[M68K_MAX_REGISTER_SIZE];
942dc0e9 170
8de307e0
AS
171 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
172 && TYPE_NFIELDS (type) == 1)
173 {
174 m68k_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf);
175 return;
176 }
942dc0e9 177
8de307e0
AS
178 if (len <= 4)
179 {
180 regcache_raw_read (regcache, M68K_D0_REGNUM, buf);
181 memcpy (valbuf, buf + (4 - len), len);
182 }
183 else if (len <= 8)
184 {
185 regcache_raw_read (regcache, M68K_D0_REGNUM, buf);
186 memcpy (valbuf, buf + (8 - len), len - 4);
187 regcache_raw_read (regcache, M68K_D1_REGNUM,
188 (char *) valbuf + (len - 4));
189 }
190 else
191 internal_error (__FILE__, __LINE__,
192 "Cannot extract return value of %d bytes long.", len);
942dc0e9
GS
193}
194
8de307e0
AS
195/* Write into the appropriate registers a function return value stored
196 in VALBUF of type TYPE, given in virtual format. */
942dc0e9
GS
197
198static void
8de307e0
AS
199m68k_store_return_value (struct type *type, struct regcache *regcache,
200 const void *valbuf)
942dc0e9 201{
8de307e0 202 int len = TYPE_LENGTH (type);
942dc0e9 203
8de307e0
AS
204 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
205 && TYPE_NFIELDS (type) == 1)
206 {
207 m68k_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf);
208 return;
209 }
942dc0e9 210
8de307e0
AS
211 if (len <= 4)
212 regcache_raw_write_part (regcache, M68K_D0_REGNUM, 4 - len, len, valbuf);
213 else if (len <= 8)
214 {
215 regcache_raw_write_part (regcache, M68K_D1_REGNUM, 8 - len,
216 len - 4, valbuf);
217 regcache_raw_write (regcache, M68K_D0_REGNUM,
218 (char *) valbuf + (len - 4));
219 }
220 else
221 internal_error (__FILE__, __LINE__,
222 "Cannot store return value of %d bytes long.", len);
223}
942dc0e9 224
8de307e0
AS
225/* Extract from REGCACHE, which contains the (raw) register state, the
226 address in which a function should return its structure value, as a
227 CORE_ADDR. */
942dc0e9
GS
228
229static CORE_ADDR
8de307e0 230m68k_extract_struct_value_address (struct regcache *regcache)
942dc0e9 231{
8de307e0
AS
232 char buf[4];
233
234 regcache_cooked_read (regcache, M68K_D0_REGNUM, buf);
235 return extract_unsigned_integer (buf, 4);
942dc0e9
GS
236}
237
c481dac7
AS
238static int
239m68k_use_struct_convention (int gcc_p, struct type *type)
240{
241 enum struct_return struct_return;
242
243 struct_return = gdbarch_tdep (current_gdbarch)->struct_return;
244 return generic_use_struct_convention (struct_return == reg_struct_return,
245 type);
246}
247
942dc0e9
GS
248/* A function that tells us whether the function invocation represented
249 by fi does not have a frame on the stack associated with it. If it
250 does not, FRAMELESS is set to 1, else 0. */
251
252static int
253m68k_frameless_function_invocation (struct frame_info *fi)
254{
32eeb91a 255 if (get_frame_type (fi) == SIGTRAMP_FRAME)
942dc0e9
GS
256 return 0;
257 else
258 return frameless_look_for_prologue (fi);
259}
260
89c3b6d3 261int
fba45db2 262delta68_in_sigtramp (CORE_ADDR pc, char *name)
89c3b6d3 263{
1bd54964
AC
264 if (name != NULL)
265 return strcmp (name, "_sigcode") == 0;
266 else
267 return 0;
89c3b6d3
PDM
268}
269
270CORE_ADDR
fba45db2 271delta68_frame_args_address (struct frame_info *frame_info)
89c3b6d3
PDM
272{
273 /* we assume here that the only frameless functions are the system calls
274 or other functions who do not put anything on the stack. */
32eeb91a 275 if (get_frame_type (frame_info) == SIGTRAMP_FRAME)
1e2330ba 276 return get_frame_base (frame_info) + 12;
89c3b6d3
PDM
277 else if (frameless_look_for_prologue (frame_info))
278 {
b5d78d39 279 /* Check for an interrupted system call */
11c02a10
AC
280 if (get_next_frame (frame_info) && (get_frame_type (get_next_frame (frame_info)) == SIGTRAMP_FRAME))
281 return get_frame_base (get_next_frame (frame_info)) + 16;
b5d78d39 282 else
1e2330ba 283 return get_frame_base (frame_info) + 4;
89c3b6d3
PDM
284 }
285 else
1e2330ba 286 return get_frame_base (frame_info);
89c3b6d3
PDM
287}
288
289CORE_ADDR
fba45db2 290delta68_frame_saved_pc (struct frame_info *frame_info)
89c3b6d3 291{
b5fc49aa
AS
292 return read_memory_unsigned_integer (delta68_frame_args_address (frame_info)
293 + 4, 4);
89c3b6d3
PDM
294}
295
392a587b 296int
fba45db2 297delta68_frame_num_args (struct frame_info *fi)
392a587b
JM
298{
299 int val;
8bedc050 300 CORE_ADDR pc = DEPRECATED_FRAME_SAVED_PC (fi);
b5fc49aa 301 int insn = read_memory_unsigned_integer (pc, 2);
392a587b 302 val = 0;
c5aa993b 303 if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
392a587b 304 val = read_memory_integer (pc + 2, 2);
c5aa993b
JM
305 else if ((insn & 0170777) == 0050217 /* addql #N, sp */
306 || (insn & 0170777) == 0050117) /* addqw */
392a587b
JM
307 {
308 val = (insn >> 9) & 7;
309 if (val == 0)
310 val = 8;
311 }
c5aa993b 312 else if (insn == 0157774) /* addal #WW, sp */
392a587b
JM
313 val = read_memory_integer (pc + 2, 4);
314 val >>= 2;
315 return val;
316}
317
8de307e0
AS
318static CORE_ADDR
319m68k_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
320 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
321 struct value **args, CORE_ADDR sp, int struct_return,
322 CORE_ADDR struct_addr)
7f8e7424 323{
8de307e0
AS
324 char buf[4];
325 int i;
326
327 /* Push arguments in reverse order. */
328 for (i = nargs - 1; i >= 0; i--)
329 {
c481dac7
AS
330 struct type *value_type = VALUE_ENCLOSING_TYPE (args[i]);
331 int len = TYPE_LENGTH (value_type);
8de307e0 332 int container_len = (len + 3) & ~3;
c481dac7
AS
333 int offset;
334
335 /* Non-scalars bigger than 4 bytes are left aligned, others are
336 right aligned. */
337 if ((TYPE_CODE (value_type) == TYPE_CODE_STRUCT
338 || TYPE_CODE (value_type) == TYPE_CODE_UNION
339 || TYPE_CODE (value_type) == TYPE_CODE_ARRAY)
340 && len > 4)
341 offset = 0;
342 else
343 offset = container_len - len;
8de307e0
AS
344 sp -= container_len;
345 write_memory (sp + offset, VALUE_CONTENTS_ALL (args[i]), len);
346 }
347
c481dac7 348 /* Store struct value address. */
8de307e0
AS
349 if (struct_return)
350 {
8de307e0 351 store_unsigned_integer (buf, 4, struct_addr);
c481dac7 352 regcache_cooked_write (regcache, M68K_A1_REGNUM, buf);
8de307e0
AS
353 }
354
355 /* Store return address. */
356 sp -= 4;
357 store_unsigned_integer (buf, 4, bp_addr);
358 write_memory (sp, buf, 4);
359
360 /* Finally, update the stack pointer... */
361 store_unsigned_integer (buf, 4, sp);
362 regcache_cooked_write (regcache, M68K_SP_REGNUM, buf);
363
364 /* ...and fake a frame pointer. */
365 regcache_cooked_write (regcache, M68K_FP_REGNUM, buf);
366
367 /* DWARF2/GCC uses the stack address *before* the function call as a
368 frame's CFA. */
369 return sp + 8;
7f8e7424 370}
8de307e0
AS
371\f
372struct m68k_frame_cache
373{
374 /* Base address. */
375 CORE_ADDR base;
376 CORE_ADDR sp_offset;
377 CORE_ADDR pc;
7f8e7424 378
8de307e0
AS
379 /* Saved registers. */
380 CORE_ADDR saved_regs[M68K_NUM_REGS];
381 CORE_ADDR saved_sp;
7f8e7424 382
8de307e0
AS
383 /* Stack space reserved for local variables. */
384 long locals;
385};
c906108c 386
8de307e0
AS
387/* Allocate and initialize a frame cache. */
388
389static struct m68k_frame_cache *
390m68k_alloc_frame_cache (void)
c906108c 391{
8de307e0
AS
392 struct m68k_frame_cache *cache;
393 int i;
c906108c 394
8de307e0 395 cache = FRAME_OBSTACK_ZALLOC (struct m68k_frame_cache);
c906108c 396
8de307e0
AS
397 /* Base address. */
398 cache->base = 0;
399 cache->sp_offset = -4;
400 cache->pc = 0;
c906108c 401
8de307e0
AS
402 /* Saved registers. We initialize these to -1 since zero is a valid
403 offset (that's where %fp is supposed to be stored). */
404 for (i = 0; i < M68K_NUM_REGS; i++)
405 cache->saved_regs[i] = -1;
406
407 /* Frameless until proven otherwise. */
408 cache->locals = -1;
409
410 return cache;
c906108c
SS
411}
412
8de307e0
AS
413/* Check whether PC points at a code that sets up a new stack frame.
414 If so, it updates CACHE and returns the address of the first
415 instruction after the sequence that sets removes the "hidden"
416 argument from the stack or CURRENT_PC, whichever is smaller.
417 Otherwise, return PC. */
c906108c 418
8de307e0
AS
419static CORE_ADDR
420m68k_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
421 struct m68k_frame_cache *cache)
c906108c 422{
8de307e0
AS
423 int op;
424
425 if (pc >= current_pc)
426 return current_pc;
c906108c 427
8de307e0
AS
428 op = read_memory_unsigned_integer (pc, 2);
429
430 if (op == P_LINKW_FP || op == P_LINKL_FP || op == P_PEA_FP)
c906108c 431 {
8de307e0
AS
432 cache->saved_regs[M68K_FP_REGNUM] = 0;
433 cache->sp_offset += 4;
434 if (op == P_LINKW_FP)
435 {
436 /* link.w %fp, #-N */
437 /* link.w %fp, #0; adda.l #-N, %sp */
438 cache->locals = -read_memory_integer (pc + 2, 2);
439
440 if (pc + 4 < current_pc && cache->locals == 0)
441 {
442 op = read_memory_unsigned_integer (pc + 4, 2);
443 if (op == P_ADDAL_SP)
444 {
445 cache->locals = read_memory_integer (pc + 6, 4);
446 return pc + 10;
447 }
448 }
449
450 return pc + 4;
451 }
452 else if (op == P_LINKL_FP)
c906108c 453 {
8de307e0
AS
454 /* link.l %fp, #-N */
455 cache->locals = -read_memory_integer (pc + 2, 4);
456 return pc + 6;
457 }
458 else
459 {
460 /* pea (%fp); movea.l %sp, %fp */
461 cache->locals = 0;
462
463 if (pc + 2 < current_pc)
464 {
465 op = read_memory_unsigned_integer (pc + 2, 2);
466
467 if (op == P_MOVEAL_SP_FP)
468 {
469 /* move.l %sp, %fp */
470 return pc + 4;
471 }
472 }
473
474 return pc + 2;
c906108c
SS
475 }
476 }
8de307e0 477 else if ((op & 0170777) == P_SUBQW_SP || (op & 0170777) == P_SUBQL_SP)
c906108c 478 {
8de307e0
AS
479 /* subq.[wl] #N,%sp */
480 /* subq.[wl] #8,%sp; subq.[wl] #N,%sp */
481 cache->locals = (op & 07000) == 0 ? 8 : (op & 07000) >> 9;
482 if (pc + 2 < current_pc)
c906108c 483 {
8de307e0
AS
484 op = read_memory_unsigned_integer (pc + 2, 2);
485 if ((op & 0170777) == P_SUBQW_SP || (op & 0170777) == P_SUBQL_SP)
486 {
487 cache->locals += (op & 07000) == 0 ? 8 : (op & 07000) >> 9;
488 return pc + 4;
489 }
c906108c 490 }
8de307e0
AS
491 return pc + 2;
492 }
493 else if (op == P_ADDAW_SP || op == P_LEA_SP_SP)
494 {
495 /* adda.w #-N,%sp */
496 /* lea (-N,%sp),%sp */
497 cache->locals = -read_memory_integer (pc + 2, 2);
498 return pc + 4;
c906108c 499 }
8de307e0 500 else if (op == P_ADDAL_SP)
c906108c 501 {
8de307e0
AS
502 /* adda.l #-N,%sp */
503 cache->locals = -read_memory_integer (pc + 2, 4);
504 return pc + 6;
c906108c 505 }
8de307e0
AS
506
507 return pc;
c906108c 508}
c5aa993b 509
8de307e0
AS
510/* Check whether PC points at code that saves registers on the stack.
511 If so, it updates CACHE and returns the address of the first
512 instruction after the register saves or CURRENT_PC, whichever is
513 smaller. Otherwise, return PC. */
c906108c 514
8de307e0
AS
515static CORE_ADDR
516m68k_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
517 struct m68k_frame_cache *cache)
518{
519 if (cache->locals >= 0)
520 {
521 CORE_ADDR offset;
522 int op;
523 int i, mask, regno;
c906108c 524
8de307e0
AS
525 offset = -4 - cache->locals;
526 while (pc < current_pc)
527 {
528 op = read_memory_unsigned_integer (pc, 2);
529 if (op == P_FMOVEMX_SP)
530 {
531 /* fmovem.x REGS,-(%sp) */
532 op = read_memory_unsigned_integer (pc + 2, 2);
533 if ((op & 0xff00) == 0xe000)
534 {
535 mask = op & 0xff;
536 for (i = 0; i < 16; i++, mask >>= 1)
537 {
538 if (mask & 1)
539 {
540 cache->saved_regs[i + M68K_FP0_REGNUM] = offset;
541 offset -= 12;
542 }
543 }
544 pc += 4;
545 }
546 else
547 break;
548 }
549 else if ((op & 0170677) == P_MOVEL_SP)
550 {
551 /* move.l %R,-(%sp) */
552 regno = ((op & 07000) >> 9) | ((op & 0100) >> 3);
553 cache->saved_regs[regno] = offset;
554 offset -= 4;
555 pc += 2;
556 }
557 else if (op == P_MOVEML_SP)
558 {
559 /* movem.l REGS,-(%sp) */
560 mask = read_memory_unsigned_integer (pc + 2, 2);
561 for (i = 0; i < 16; i++, mask >>= 1)
562 {
563 if (mask & 1)
564 {
565 cache->saved_regs[15 - i] = offset;
566 offset -= 4;
567 }
568 }
569 pc += 4;
570 }
571 else
572 break;
573 }
574 }
575
576 return pc;
577}
c906108c 578
c906108c 579
8de307e0
AS
580/* Do a full analysis of the prologue at PC and update CACHE
581 accordingly. Bail out early if CURRENT_PC is reached. Return the
582 address where the analysis stopped.
c906108c 583
8de307e0 584 We handle all cases that can be generated by gcc.
c906108c 585
8de307e0 586 For allocating a stack frame:
c906108c 587
8de307e0
AS
588 link.w %a6,#-N
589 link.l %a6,#-N
590 pea (%fp); move.l %sp,%fp
591 link.w %a6,#0; add.l #-N,%sp
592 subq.l #N,%sp
593 subq.w #N,%sp
594 subq.w #8,%sp; subq.w #N-8,%sp
595 add.w #-N,%sp
596 lea (-N,%sp),%sp
597 add.l #-N,%sp
c906108c 598
8de307e0 599 For saving registers:
c906108c 600
8de307e0
AS
601 fmovem.x REGS,-(%sp)
602 move.l R1,-(%sp)
603 move.l R1,-(%sp); move.l R2,-(%sp)
604 movem.l REGS,-(%sp)
c906108c 605
8de307e0 606 For setting up the PIC register:
c906108c 607
8de307e0 608 lea (%pc,N),%a5
c906108c 609
8de307e0 610 */
c906108c 611
eb2e12d7 612static CORE_ADDR
8de307e0
AS
613m68k_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
614 struct m68k_frame_cache *cache)
c906108c 615{
8de307e0 616 unsigned int op;
c906108c 617
8de307e0
AS
618 pc = m68k_analyze_frame_setup (pc, current_pc, cache);
619 pc = m68k_analyze_register_saves (pc, current_pc, cache);
620 if (pc >= current_pc)
621 return current_pc;
c906108c 622
8de307e0
AS
623 /* Check for GOT setup. */
624 op = read_memory_unsigned_integer (pc, 4);
625 if (op == P_LEA_PC_A5)
c906108c 626 {
8de307e0
AS
627 /* lea (%pc,N),%a5 */
628 return pc + 6;
c906108c 629 }
8de307e0
AS
630
631 return pc;
c906108c
SS
632}
633
8de307e0 634/* Return PC of first real instruction. */
7f8e7424 635
8de307e0
AS
636static CORE_ADDR
637m68k_skip_prologue (CORE_ADDR start_pc)
c906108c 638{
8de307e0
AS
639 struct m68k_frame_cache cache;
640 CORE_ADDR pc;
641 int op;
c906108c 642
8de307e0
AS
643 cache.locals = -1;
644 pc = m68k_analyze_prologue (start_pc, (CORE_ADDR) -1, &cache);
645 if (cache.locals < 0)
646 return start_pc;
647 return pc;
648}
c906108c 649
8de307e0
AS
650static CORE_ADDR
651m68k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
652{
653 char buf[8];
7f8e7424 654
8de307e0
AS
655 frame_unwind_register (next_frame, PC_REGNUM, buf);
656 return extract_typed_address (buf, builtin_type_void_func_ptr);
657}
658\f
659/* Normal frames. */
7f8e7424 660
8de307e0
AS
661static struct m68k_frame_cache *
662m68k_frame_cache (struct frame_info *next_frame, void **this_cache)
663{
664 struct m68k_frame_cache *cache;
665 char buf[4];
666 int i;
667
668 if (*this_cache)
669 return *this_cache;
670
671 cache = m68k_alloc_frame_cache ();
672 *this_cache = cache;
673
674 /* In principle, for normal frames, %fp holds the frame pointer,
675 which holds the base address for the current stack frame.
676 However, for functions that don't need it, the frame pointer is
677 optional. For these "frameless" functions the frame pointer is
678 actually the frame pointer of the calling frame. Signal
679 trampolines are just a special case of a "frameless" function.
680 They (usually) share their frame pointer with the frame that was
681 in progress when the signal occurred. */
682
683 frame_unwind_register (next_frame, M68K_FP_REGNUM, buf);
684 cache->base = extract_unsigned_integer (buf, 4);
685 if (cache->base == 0)
686 return cache;
687
688 /* For normal frames, %pc is stored at 4(%fp). */
689 cache->saved_regs[M68K_PC_REGNUM] = 4;
690
691 cache->pc = frame_func_unwind (next_frame);
692 if (cache->pc != 0)
693 m68k_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
694
695 if (cache->locals < 0)
696 {
697 /* We didn't find a valid frame, which means that CACHE->base
698 currently holds the frame pointer for our calling frame. If
699 we're at the start of a function, or somewhere half-way its
700 prologue, the function's frame probably hasn't been fully
701 setup yet. Try to reconstruct the base address for the stack
702 frame by looking at the stack pointer. For truly "frameless"
703 functions this might work too. */
704
705 frame_unwind_register (next_frame, M68K_SP_REGNUM, buf);
706 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
707 }
7f8e7424 708
8de307e0
AS
709 /* Now that we have the base address for the stack frame we can
710 calculate the value of %sp in the calling frame. */
711 cache->saved_sp = cache->base + 8;
7f8e7424 712
8de307e0
AS
713 /* Adjust all the saved registers such that they contain addresses
714 instead of offsets. */
715 for (i = 0; i < M68K_NUM_REGS; i++)
716 if (cache->saved_regs[i] != -1)
717 cache->saved_regs[i] += cache->base;
c906108c 718
8de307e0
AS
719 return cache;
720}
c906108c 721
8de307e0
AS
722static void
723m68k_frame_this_id (struct frame_info *next_frame, void **this_cache,
724 struct frame_id *this_id)
725{
726 struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
c906108c 727
8de307e0
AS
728 /* This marks the outermost frame. */
729 if (cache->base == 0)
730 return;
c5aa993b 731
8de307e0
AS
732 /* See the end of m68k_push_dummy_call. */
733 *this_id = frame_id_build (cache->base + 8, cache->pc);
734}
c5aa993b 735
8de307e0
AS
736static void
737m68k_frame_prev_register (struct frame_info *next_frame, void **this_cache,
738 int regnum, int *optimizedp,
739 enum lval_type *lvalp, CORE_ADDR *addrp,
740 int *realnump, void *valuep)
741{
742 struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
743
744 gdb_assert (regnum >= 0);
745
746 if (regnum == M68K_SP_REGNUM && cache->saved_sp)
c5aa993b 747 {
8de307e0
AS
748 *optimizedp = 0;
749 *lvalp = not_lval;
750 *addrp = 0;
751 *realnump = -1;
752 if (valuep)
c906108c 753 {
8de307e0
AS
754 /* Store the value. */
755 store_unsigned_integer (valuep, 4, cache->saved_sp);
89c3b6d3 756 }
8de307e0
AS
757 return;
758 }
759
760 if (regnum < M68K_NUM_REGS && cache->saved_regs[regnum] != -1)
761 {
762 *optimizedp = 0;
763 *lvalp = lval_memory;
764 *addrp = cache->saved_regs[regnum];
765 *realnump = -1;
766 if (valuep)
89c3b6d3 767 {
8de307e0
AS
768 /* Read the value in from memory. */
769 read_memory (*addrp, valuep,
770 register_size (current_gdbarch, regnum));
89c3b6d3 771 }
8de307e0 772 return;
c906108c 773 }
8de307e0
AS
774
775 frame_register_unwind (next_frame, regnum,
776 optimizedp, lvalp, addrp, realnump, valuep);
777}
778
779static const struct frame_unwind m68k_frame_unwind =
780{
781 NORMAL_FRAME,
782 m68k_frame_this_id,
783 m68k_frame_prev_register
784};
785
786static const struct frame_unwind *
787m68k_frame_p (CORE_ADDR pc)
788{
789 return &m68k_frame_unwind;
790}
791\f
792/* Signal trampolines. */
793
794static struct m68k_frame_cache *
795m68k_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
796{
797 struct m68k_frame_cache *cache;
798 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
799 struct m68k_sigtramp_info info;
800 char buf[4];
801 int i;
802
803 if (*this_cache)
804 return *this_cache;
805
806 cache = m68k_alloc_frame_cache ();
807
808 frame_unwind_register (next_frame, M68K_SP_REGNUM, buf);
809 cache->base = extract_unsigned_integer (buf, 4) - 4;
810
811 info = tdep->get_sigtramp_info (next_frame);
812
813 for (i = 0; i < M68K_NUM_REGS; i++)
814 if (info.sc_reg_offset[i] != -1)
815 cache->saved_regs[i] = info.sigcontext_addr + info.sc_reg_offset[i];
816
817 *this_cache = cache;
818 return cache;
819}
820
821static void
822m68k_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache,
823 struct frame_id *this_id)
824{
825 struct m68k_frame_cache *cache =
826 m68k_sigtramp_frame_cache (next_frame, this_cache);
827
828 /* See the end of m68k_push_dummy_call. */
829 *this_id = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame));
830}
831
832static void
833m68k_sigtramp_frame_prev_register (struct frame_info *next_frame,
834 void **this_cache,
835 int regnum, int *optimizedp,
836 enum lval_type *lvalp, CORE_ADDR *addrp,
837 int *realnump, void *valuep)
838{
839 /* Make sure we've initialized the cache. */
840 m68k_sigtramp_frame_cache (next_frame, this_cache);
841
842 m68k_frame_prev_register (next_frame, this_cache, regnum,
843 optimizedp, lvalp, addrp, realnump, valuep);
844}
845
846static const struct frame_unwind m68k_sigtramp_frame_unwind =
847{
848 SIGTRAMP_FRAME,
849 m68k_sigtramp_frame_this_id,
850 m68k_sigtramp_frame_prev_register
851};
852
853static const struct frame_unwind *
854m68k_sigtramp_frame_p (CORE_ADDR pc)
855{
856 char *name;
857
858 /* We shouldn't even bother to try if the OSABI didn't register
859 a get_sigtramp_info handler. */
860 if (!gdbarch_tdep (current_gdbarch)->get_sigtramp_info)
861 return NULL;
862
863 find_pc_partial_function (pc, &name, NULL, NULL);
864 if (PC_IN_SIGTRAMP (pc, name))
865 return &m68k_sigtramp_frame_unwind;
866
867 return NULL;
c906108c 868}
8de307e0
AS
869\f
870static CORE_ADDR
871m68k_frame_base_address (struct frame_info *next_frame, void **this_cache)
872{
873 struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
874
875 return cache->base;
876}
877
878static const struct frame_base m68k_frame_base =
879{
880 &m68k_frame_unwind,
881 m68k_frame_base_address,
882 m68k_frame_base_address,
883 m68k_frame_base_address
884};
885
886static struct frame_id
887m68k_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
888{
889 char buf[4];
890 CORE_ADDR fp;
c906108c 891
8de307e0
AS
892 frame_unwind_register (next_frame, M68K_FP_REGNUM, buf);
893 fp = extract_unsigned_integer (buf, 4);
c906108c 894
8de307e0
AS
895 /* See the end of m68k_push_dummy_call. */
896 return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
897}
898\f
c5aa993b 899#ifdef USE_PROC_FS /* Target dependent support for /proc */
c906108c
SS
900
901#include <sys/procfs.h>
902
c60c0f5f
MS
903/* Prototypes for supply_gregset etc. */
904#include "gregset.h"
905
c906108c 906/* The /proc interface divides the target machine's register set up into
c5aa993b
JM
907 two different sets, the general register set (gregset) and the floating
908 point register set (fpregset). For each set, there is an ioctl to get
909 the current register set and another ioctl to set the current values.
c906108c 910
c5aa993b
JM
911 The actual structure passed through the ioctl interface is, of course,
912 naturally machine dependent, and is different for each set of registers.
913 For the m68k for example, the general register set is typically defined
914 by:
c906108c 915
c5aa993b 916 typedef int gregset_t[18];
c906108c 917
c5aa993b
JM
918 #define R_D0 0
919 ...
920 #define R_PS 17
c906108c 921
c5aa993b 922 and the floating point set by:
c906108c 923
c5aa993b
JM
924 typedef struct fpregset {
925 int f_pcr;
926 int f_psr;
927 int f_fpiaddr;
928 int f_fpregs[8][3]; (8 regs, 96 bits each)
929 } fpregset_t;
c906108c 930
c5aa993b
JM
931 These routines provide the packing and unpacking of gregset_t and
932 fpregset_t formatted data.
c906108c
SS
933
934 */
935
936/* Atari SVR4 has R_SR but not R_PS */
937
938#if !defined (R_PS) && defined (R_SR)
939#define R_PS R_SR
940#endif
941
942/* Given a pointer to a general register set in /proc format (gregset_t *),
c5aa993b
JM
943 unpack the register contents and supply them as gdb's idea of the current
944 register values. */
c906108c
SS
945
946void
fba45db2 947supply_gregset (gregset_t *gregsetp)
c906108c
SS
948{
949 register int regi;
950 register greg_t *regp = (greg_t *) gregsetp;
951
c5aa993b 952 for (regi = 0; regi < R_PC; regi++)
c906108c
SS
953 {
954 supply_register (regi, (char *) (regp + regi));
955 }
956 supply_register (PS_REGNUM, (char *) (regp + R_PS));
957 supply_register (PC_REGNUM, (char *) (regp + R_PC));
958}
959
960void
fba45db2 961fill_gregset (gregset_t *gregsetp, int regno)
c906108c
SS
962{
963 register int regi;
964 register greg_t *regp = (greg_t *) gregsetp;
c906108c 965
c5aa993b 966 for (regi = 0; regi < R_PC; regi++)
c906108c 967 {
8de307e0
AS
968 if (regno == -1 || regno == regi)
969 regcache_collect (regi, regp + regi);
c906108c 970 }
8de307e0
AS
971 if (regno == -1 || regno == PS_REGNUM)
972 regcache_collect (PS_REGNUM, regp + R_PS);
973 if (regno == -1 || regno == PC_REGNUM)
974 regcache_collect (PC_REGNUM, regp + R_PC);
c906108c
SS
975}
976
977#if defined (FP0_REGNUM)
978
979/* Given a pointer to a floating point register set in /proc format
c5aa993b
JM
980 (fpregset_t *), unpack the register contents and supply them as gdb's
981 idea of the current floating point register values. */
c906108c 982
c5aa993b 983void
fba45db2 984supply_fpregset (fpregset_t *fpregsetp)
c906108c
SS
985{
986 register int regi;
987 char *from;
c5aa993b 988
32eeb91a 989 for (regi = FP0_REGNUM; regi < M68K_FPC_REGNUM; regi++)
c906108c 990 {
c5aa993b 991 from = (char *) &(fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
c906108c
SS
992 supply_register (regi, from);
993 }
32eeb91a
AS
994 supply_register (M68K_FPC_REGNUM, (char *) &(fpregsetp->f_pcr));
995 supply_register (M68K_FPS_REGNUM, (char *) &(fpregsetp->f_psr));
996 supply_register (M68K_FPI_REGNUM, (char *) &(fpregsetp->f_fpiaddr));
c906108c
SS
997}
998
999/* Given a pointer to a floating point register set in /proc format
c5aa993b
JM
1000 (fpregset_t *), update the register specified by REGNO from gdb's idea
1001 of the current floating point register set. If REGNO is -1, update
1002 them all. */
c906108c
SS
1003
1004void
fba45db2 1005fill_fpregset (fpregset_t *fpregsetp, int regno)
c906108c
SS
1006{
1007 int regi;
c906108c 1008
32eeb91a 1009 for (regi = FP0_REGNUM; regi < M68K_FPC_REGNUM; regi++)
c906108c 1010 {
8de307e0
AS
1011 if (regno == -1 || regno == regi)
1012 regcache_collect (regi, &fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
c906108c 1013 }
8de307e0
AS
1014 if (regno == -1 || regno == M68K_FPC_REGNUM)
1015 regcache_collect (M68K_FPC_REGNUM, &fpregsetp->f_pcr);
1016 if (regno == -1 || regno == M68K_FPS_REGNUM)
1017 regcache_collect (M68K_FPS_REGNUM, &fpregsetp->f_psr);
1018 if (regno == -1 || regno == M68K_FPI_REGNUM)
1019 regcache_collect (M68K_FPI_REGNUM, &fpregsetp->f_fpiaddr);
c906108c
SS
1020}
1021
c5aa993b 1022#endif /* defined (FP0_REGNUM) */
c906108c 1023
c5aa993b 1024#endif /* USE_PROC_FS */
c906108c 1025
c906108c
SS
1026/* Figure out where the longjmp will land. Slurp the args out of the stack.
1027 We expect the first arg to be a pointer to the jmp_buf structure from which
1028 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
1029 This routine returns true on success. */
1030
1031int
f4281f55 1032m68k_get_longjmp_target (CORE_ADDR *pc)
c906108c 1033{
35fc8285 1034 char *buf;
c906108c 1035 CORE_ADDR sp, jb_addr;
eb2e12d7
AS
1036 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1037
1038 if (tdep->jb_pc < 0)
1039 {
1040 internal_error (__FILE__, __LINE__,
1041 "m68k_get_longjmp_target: not implemented");
1042 return 0;
1043 }
c906108c 1044
35fc8285 1045 buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
c5aa993b 1046 sp = read_register (SP_REGNUM);
c906108c 1047
b5d78d39
GS
1048 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
1049 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
c906108c
SS
1050 return 0;
1051
7c0b4a20 1052 jb_addr = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c 1053
eb2e12d7 1054 if (target_read_memory (jb_addr + tdep->jb_pc * tdep->jb_elt_size, buf,
c906108c
SS
1055 TARGET_PTR_BIT / TARGET_CHAR_BIT))
1056 return 0;
1057
7c0b4a20 1058 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c
SS
1059 return 1;
1060}
c906108c 1061
8de307e0 1062#ifdef SYSCALL_TRAP
c906108c
SS
1063/* Immediately after a function call, return the saved pc before the frame
1064 is setup. For sun3's, we check for the common case of being inside of a
1065 system call, and if so, we know that Sun pushes the call # on the stack
1066 prior to doing the trap. */
1067
eb2e12d7 1068static CORE_ADDR
fba45db2 1069m68k_saved_pc_after_call (struct frame_info *frame)
c906108c 1070{
c906108c
SS
1071 int op;
1072
b5fc49aa 1073 op = read_memory_unsigned_integer (frame->pc - SYSCALL_TRAP_OFFSET, 2);
c906108c
SS
1074
1075 if (op == SYSCALL_TRAP)
b5fc49aa 1076 return read_memory_unsigned_integer (read_register (SP_REGNUM) + 4, 4);
c906108c 1077 else
b5fc49aa 1078 return read_memory_unsigned_integer (read_register (SP_REGNUM), 4);
c906108c 1079}
8de307e0 1080#endif /* SYSCALL_TRAP */
c906108c 1081
152d9db6
GS
1082/* Function: m68k_gdbarch_init
1083 Initializer function for the m68k gdbarch vector.
1084 Called by gdbarch. Sets up the gdbarch vector(s) for this target. */
1085
1086static struct gdbarch *
1087m68k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1088{
1089 struct gdbarch_tdep *tdep = NULL;
1090 struct gdbarch *gdbarch;
1091
1092 /* find a candidate among the list of pre-declared architectures. */
1093 arches = gdbarch_list_lookup_by_info (arches, &info);
1094 if (arches != NULL)
1095 return (arches->gdbarch);
1096
eb2e12d7
AS
1097 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1098 gdbarch = gdbarch_alloc (&info, tdep);
152d9db6 1099
5d3ed2e3
GS
1100 set_gdbarch_long_double_format (gdbarch, &floatformat_m68881_ext);
1101 set_gdbarch_long_double_bit (gdbarch, 96);
1102
1103 set_gdbarch_function_start_offset (gdbarch, 0);
1104
1105 set_gdbarch_skip_prologue (gdbarch, m68k_skip_prologue);
8de307e0 1106#ifdef SYSCALL_TRAP
6913c89a 1107 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, m68k_saved_pc_after_call);
8de307e0 1108#endif
103a1597 1109 set_gdbarch_breakpoint_from_pc (gdbarch, m68k_local_breakpoint_from_pc);
5d3ed2e3
GS
1110
1111 /* Stack grows down. */
1112 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
78bf922a 1113 set_gdbarch_parm_boundary (gdbarch, 32);
6300c360
GS
1114
1115 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
942dc0e9
GS
1116 set_gdbarch_decr_pc_after_break (gdbarch, 2);
1117
8de307e0
AS
1118 set_gdbarch_extract_return_value (gdbarch, m68k_extract_return_value);
1119 set_gdbarch_store_return_value (gdbarch, m68k_store_return_value);
1120 set_gdbarch_extract_struct_value_address (gdbarch,
1121 m68k_extract_struct_value_address);
c481dac7 1122 set_gdbarch_use_struct_convention (gdbarch, m68k_use_struct_convention);
942dc0e9 1123
942dc0e9
GS
1124 set_gdbarch_frameless_function_invocation (gdbarch,
1125 m68k_frameless_function_invocation);
6300c360 1126 set_gdbarch_frame_args_skip (gdbarch, 8);
942dc0e9 1127
8de307e0 1128 set_gdbarch_register_type (gdbarch, m68k_register_type);
5d3ed2e3 1129 set_gdbarch_register_name (gdbarch, m68k_register_name);
942dc0e9
GS
1130 set_gdbarch_num_regs (gdbarch, 29);
1131 set_gdbarch_register_bytes_ok (gdbarch, m68k_register_bytes_ok);
32eeb91a 1132 set_gdbarch_sp_regnum (gdbarch, M68K_SP_REGNUM);
32eeb91a
AS
1133 set_gdbarch_pc_regnum (gdbarch, M68K_PC_REGNUM);
1134 set_gdbarch_ps_regnum (gdbarch, M68K_PS_REGNUM);
1135 set_gdbarch_fp0_regnum (gdbarch, M68K_FP0_REGNUM);
a2c6a6d5 1136
8de307e0 1137 set_gdbarch_push_dummy_call (gdbarch, m68k_push_dummy_call);
6c0e89ed 1138
650fcc91
AS
1139 /* Disassembler. */
1140 set_gdbarch_print_insn (gdbarch, print_insn_m68k);
1141
eb2e12d7
AS
1142#if defined JB_PC && defined JB_ELEMENT_SIZE
1143 tdep->jb_pc = JB_PC;
1144 tdep->jb_elt_size = JB_ELEMENT_SIZE;
1145#else
1146 tdep->jb_pc = -1;
1147#endif
8de307e0 1148 tdep->get_sigtramp_info = NULL;
c481dac7 1149 tdep->struct_return = pcc_struct_return;
8de307e0
AS
1150
1151 /* Frame unwinder. */
1152 set_gdbarch_unwind_dummy_id (gdbarch, m68k_unwind_dummy_id);
1153 set_gdbarch_unwind_pc (gdbarch, m68k_unwind_pc);
1154 frame_base_set_default (gdbarch, &m68k_frame_base);
eb2e12d7 1155
55809acb
AS
1156 /* Hook in ABI-specific overrides, if they have been registered. */
1157 gdbarch_init_osabi (info, gdbarch);
1158
eb2e12d7
AS
1159 /* Now we have tuned the configuration, set a few final things,
1160 based on what the OS ABI has told us. */
1161
1162 if (tdep->jb_pc >= 0)
1163 set_gdbarch_get_longjmp_target (gdbarch, m68k_get_longjmp_target);
1164
8de307e0
AS
1165 frame_unwind_append_predicate (gdbarch, m68k_sigtramp_frame_p);
1166 frame_unwind_append_predicate (gdbarch, m68k_frame_p);
1167
152d9db6
GS
1168 return gdbarch;
1169}
1170
1171
1172static void
1173m68k_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1174{
eb2e12d7 1175 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
152d9db6 1176
eb2e12d7
AS
1177 if (tdep == NULL)
1178 return;
152d9db6 1179}
2acceee2 1180
a78f21af
AC
1181extern initialize_file_ftype _initialize_m68k_tdep; /* -Wmissing-prototypes */
1182
c906108c 1183void
fba45db2 1184_initialize_m68k_tdep (void)
c906108c 1185{
152d9db6 1186 gdbarch_register (bfd_arch_m68k, m68k_gdbarch_init, m68k_dump_tdep);
c906108c 1187}
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