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bf2ca189 MK |
1 | /* Target-dependent code for the Motorola 88000 series. |
2 | ||
618f726f | 3 | Copyright (C) 2004-2016 Free Software Foundation, Inc. |
bf2ca189 MK |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
bf2ca189 MK |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
bf2ca189 MK |
19 | |
20 | #include "defs.h" | |
21 | #include "arch-utils.h" | |
22 | #include "dis-asm.h" | |
23 | #include "frame.h" | |
24 | #include "frame-base.h" | |
25 | #include "frame-unwind.h" | |
26 | #include "gdbcore.h" | |
27 | #include "gdbtypes.h" | |
28 | #include "regcache.h" | |
29 | #include "regset.h" | |
30 | #include "symtab.h" | |
31 | #include "trad-frame.h" | |
32 | #include "value.h" | |
325fac50 | 33 | #include <algorithm> |
bf2ca189 | 34 | |
bf2ca189 MK |
35 | #include "m88k-tdep.h" |
36 | ||
37 | /* Fetch the instruction at PC. */ | |
38 | ||
39 | static unsigned long | |
e17a4113 | 40 | m88k_fetch_instruction (CORE_ADDR pc, enum bfd_endian byte_order) |
bf2ca189 | 41 | { |
e17a4113 | 42 | return read_memory_unsigned_integer (pc, 4, byte_order); |
bf2ca189 MK |
43 | } |
44 | ||
45 | /* Register information. */ | |
46 | ||
47 | /* Return the name of register REGNUM. */ | |
48 | ||
49 | static const char * | |
d93859e2 | 50 | m88k_register_name (struct gdbarch *gdbarch, int regnum) |
bf2ca189 MK |
51 | { |
52 | static char *register_names[] = | |
53 | { | |
54 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
55 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
56 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
57 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
58 | "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip" | |
59 | }; | |
60 | ||
61 | if (regnum >= 0 && regnum < ARRAY_SIZE (register_names)) | |
62 | return register_names[regnum]; | |
63 | ||
64 | return NULL; | |
65 | } | |
66 | ||
67 | /* Return the GDB type object for the "standard" data type of data in | |
025bb325 | 68 | register REGNUM. */ |
bf2ca189 MK |
69 | |
70 | static struct type * | |
71 | m88k_register_type (struct gdbarch *gdbarch, int regnum) | |
72 | { | |
73 | /* SXIP, SNIP, SFIP and R1 contain code addresses. */ | |
74 | if ((regnum >= M88K_SXIP_REGNUM && regnum <= M88K_SFIP_REGNUM) | |
75 | || regnum == M88K_R1_REGNUM) | |
0dfff4cb | 76 | return builtin_type (gdbarch)->builtin_func_ptr; |
bf2ca189 MK |
77 | |
78 | /* R30 and R31 typically contains data addresses. */ | |
79 | if (regnum == M88K_R30_REGNUM || regnum == M88K_R31_REGNUM) | |
0dfff4cb | 80 | return builtin_type (gdbarch)->builtin_data_ptr; |
bf2ca189 | 81 | |
df4df182 | 82 | return builtin_type (gdbarch)->builtin_int32; |
bf2ca189 MK |
83 | } |
84 | \f | |
85 | ||
86 | static CORE_ADDR | |
24568a2c | 87 | m88k_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
bf2ca189 MK |
88 | { |
89 | /* All instructures are 4-byte aligned. The lower 2 bits of SXIP, | |
90 | SNIP and SFIP are used for special purposes: bit 0 is the | |
91 | exception bit and bit 1 is the valid bit. */ | |
92 | return addr & ~0x3; | |
93 | } | |
94 | ||
95 | /* Use the program counter to determine the contents and size of a | |
96 | breakpoint instruction. Return a pointer to a string of bytes that | |
97 | encode a breakpoint instruction, store the length of the string in | |
98 | *LEN and optionally adjust *PC to point to the correct memory | |
99 | location for inserting the breakpoint. */ | |
100 | ||
8dccaca3 | 101 | static const gdb_byte * |
67d57894 | 102 | m88k_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) |
bf2ca189 MK |
103 | { |
104 | /* tb 0,r0,511 */ | |
8dccaca3 | 105 | static gdb_byte break_insn[] = { 0xf0, 0x00, 0xd1, 0xff }; |
bf2ca189 MK |
106 | |
107 | *len = sizeof (break_insn); | |
108 | return break_insn; | |
109 | } | |
110 | ||
111 | static CORE_ADDR | |
112 | m88k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
113 | { | |
114 | CORE_ADDR pc; | |
115 | ||
116 | pc = frame_unwind_register_unsigned (next_frame, M88K_SXIP_REGNUM); | |
24568a2c | 117 | return m88k_addr_bits_remove (gdbarch, pc); |
bf2ca189 MK |
118 | } |
119 | ||
120 | static void | |
61a1198a | 121 | m88k_write_pc (struct regcache *regcache, CORE_ADDR pc) |
bf2ca189 MK |
122 | { |
123 | /* According to the MC88100 RISC Microprocessor User's Manual, | |
124 | section 6.4.3.1.2: | |
125 | ||
126 | "... can be made to return to a particular instruction by placing | |
127 | a valid instruction address in the SNIP and the next sequential | |
128 | instruction address in the SFIP (with V bits set and E bits | |
129 | clear). The rte resumes execution at the instruction pointed to | |
130 | by the SNIP, then the SFIP." | |
131 | ||
132 | The E bit is the least significant bit (bit 0). The V (valid) | |
133 | bit is bit 1. This is why we logical or 2 into the values we are | |
134 | writing below. It turns out that SXIP plays no role when | |
135 | returning from an exception so nothing special has to be done | |
136 | with it. We could even (presumably) give it a totally bogus | |
137 | value. */ | |
138 | ||
61a1198a UW |
139 | regcache_cooked_write_unsigned (regcache, M88K_SXIP_REGNUM, pc); |
140 | regcache_cooked_write_unsigned (regcache, M88K_SNIP_REGNUM, pc | 2); | |
141 | regcache_cooked_write_unsigned (regcache, M88K_SFIP_REGNUM, (pc + 4) | 2); | |
bf2ca189 MK |
142 | } |
143 | \f | |
144 | ||
145 | /* The functions on this page are intended to be used to classify | |
146 | function arguments. */ | |
147 | ||
148 | /* Check whether TYPE is "Integral or Pointer". */ | |
149 | ||
150 | static int | |
151 | m88k_integral_or_pointer_p (const struct type *type) | |
152 | { | |
153 | switch (TYPE_CODE (type)) | |
154 | { | |
155 | case TYPE_CODE_INT: | |
156 | case TYPE_CODE_BOOL: | |
157 | case TYPE_CODE_CHAR: | |
158 | case TYPE_CODE_ENUM: | |
159 | case TYPE_CODE_RANGE: | |
160 | { | |
161 | /* We have byte, half-word, word and extended-word/doubleword | |
162 | integral types. */ | |
163 | int len = TYPE_LENGTH (type); | |
164 | return (len == 1 || len == 2 || len == 4 || len == 8); | |
165 | } | |
166 | return 1; | |
167 | case TYPE_CODE_PTR: | |
168 | case TYPE_CODE_REF: | |
169 | { | |
170 | /* Allow only 32-bit pointers. */ | |
171 | return (TYPE_LENGTH (type) == 4); | |
172 | } | |
173 | return 1; | |
174 | default: | |
175 | break; | |
176 | } | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
181 | /* Check whether TYPE is "Floating". */ | |
182 | ||
183 | static int | |
184 | m88k_floating_p (const struct type *type) | |
185 | { | |
186 | switch (TYPE_CODE (type)) | |
187 | { | |
188 | case TYPE_CODE_FLT: | |
189 | { | |
190 | int len = TYPE_LENGTH (type); | |
191 | return (len == 4 || len == 8); | |
192 | } | |
193 | default: | |
194 | break; | |
195 | } | |
196 | ||
197 | return 0; | |
198 | } | |
199 | ||
200 | /* Check whether TYPE is "Structure or Union". */ | |
201 | ||
202 | static int | |
203 | m88k_structure_or_union_p (const struct type *type) | |
204 | { | |
205 | switch (TYPE_CODE (type)) | |
206 | { | |
207 | case TYPE_CODE_STRUCT: | |
208 | case TYPE_CODE_UNION: | |
209 | return 1; | |
210 | default: | |
211 | break; | |
212 | } | |
213 | ||
214 | return 0; | |
215 | } | |
216 | ||
217 | /* Check whether TYPE has 8-byte alignment. */ | |
218 | ||
219 | static int | |
220 | m88k_8_byte_align_p (struct type *type) | |
221 | { | |
222 | if (m88k_structure_or_union_p (type)) | |
223 | { | |
224 | int i; | |
225 | ||
226 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
227 | { | |
228 | struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); | |
229 | ||
230 | if (m88k_8_byte_align_p (subtype)) | |
231 | return 1; | |
232 | } | |
233 | } | |
234 | ||
235 | if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) | |
236 | return (TYPE_LENGTH (type) == 8); | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
241 | /* Check whether TYPE can be passed in a register. */ | |
242 | ||
243 | static int | |
244 | m88k_in_register_p (struct type *type) | |
245 | { | |
246 | if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) | |
247 | return 1; | |
248 | ||
249 | if (m88k_structure_or_union_p (type) && TYPE_LENGTH (type) == 4) | |
250 | return 1; | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
255 | static CORE_ADDR | |
256 | m88k_store_arguments (struct regcache *regcache, int nargs, | |
257 | struct value **args, CORE_ADDR sp) | |
258 | { | |
df4df182 | 259 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
bf2ca189 MK |
260 | int num_register_words = 0; |
261 | int num_stack_words = 0; | |
262 | int i; | |
263 | ||
264 | for (i = 0; i < nargs; i++) | |
265 | { | |
4991999e | 266 | struct type *type = value_type (args[i]); |
bf2ca189 MK |
267 | int len = TYPE_LENGTH (type); |
268 | ||
269 | if (m88k_integral_or_pointer_p (type) && len < 4) | |
270 | { | |
df4df182 UW |
271 | args[i] = value_cast (builtin_type (gdbarch)->builtin_int32, |
272 | args[i]); | |
4991999e | 273 | type = value_type (args[i]); |
bf2ca189 MK |
274 | len = TYPE_LENGTH (type); |
275 | } | |
276 | ||
277 | if (m88k_in_register_p (type)) | |
278 | { | |
279 | int num_words = 0; | |
280 | ||
281 | if (num_register_words % 2 == 1 && m88k_8_byte_align_p (type)) | |
282 | num_words++; | |
283 | ||
284 | num_words += ((len + 3) / 4); | |
285 | if (num_register_words + num_words <= 8) | |
286 | { | |
287 | num_register_words += num_words; | |
288 | continue; | |
289 | } | |
290 | ||
291 | /* We've run out of available registers. Pass the argument | |
292 | on the stack. */ | |
293 | } | |
294 | ||
295 | if (num_stack_words % 2 == 1 && m88k_8_byte_align_p (type)) | |
296 | num_stack_words++; | |
297 | ||
298 | num_stack_words += ((len + 3) / 4); | |
299 | } | |
300 | ||
301 | /* Allocate stack space. */ | |
302 | sp = align_down (sp - 32 - num_stack_words * 4, 16); | |
303 | num_stack_words = num_register_words = 0; | |
304 | ||
305 | for (i = 0; i < nargs; i++) | |
306 | { | |
0fd88904 | 307 | const bfd_byte *valbuf = value_contents (args[i]); |
4991999e | 308 | struct type *type = value_type (args[i]); |
bf2ca189 MK |
309 | int len = TYPE_LENGTH (type); |
310 | int stack_word = num_stack_words; | |
311 | ||
312 | if (m88k_in_register_p (type)) | |
313 | { | |
314 | int register_word = num_register_words; | |
315 | ||
316 | if (register_word % 2 == 1 && m88k_8_byte_align_p (type)) | |
317 | register_word++; | |
318 | ||
319 | gdb_assert (len == 4 || len == 8); | |
320 | ||
321 | if (register_word + len / 8 < 8) | |
322 | { | |
323 | int regnum = M88K_R2_REGNUM + register_word; | |
324 | ||
325 | regcache_raw_write (regcache, regnum, valbuf); | |
326 | if (len > 4) | |
327 | regcache_raw_write (regcache, regnum + 1, valbuf + 4); | |
328 | ||
329 | num_register_words = (register_word + len / 4); | |
330 | continue; | |
331 | } | |
332 | } | |
333 | ||
334 | if (stack_word % 2 == -1 && m88k_8_byte_align_p (type)) | |
335 | stack_word++; | |
336 | ||
337 | write_memory (sp + stack_word * 4, valbuf, len); | |
338 | num_stack_words = (stack_word + (len + 3) / 4); | |
339 | } | |
340 | ||
341 | return sp; | |
342 | } | |
343 | ||
344 | static CORE_ADDR | |
7d9b040b | 345 | m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
bf2ca189 MK |
346 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, |
347 | struct value **args, CORE_ADDR sp, int struct_return, | |
348 | CORE_ADDR struct_addr) | |
349 | { | |
350 | /* Set up the function arguments. */ | |
351 | sp = m88k_store_arguments (regcache, nargs, args, sp); | |
352 | gdb_assert (sp % 16 == 0); | |
353 | ||
354 | /* Store return value address. */ | |
355 | if (struct_return) | |
356 | regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr); | |
357 | ||
358 | /* Store the stack pointer and return address in the appropriate | |
359 | registers. */ | |
360 | regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp); | |
361 | regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr); | |
362 | ||
363 | /* Return the stack pointer. */ | |
364 | return sp; | |
365 | } | |
366 | ||
367 | static struct frame_id | |
ed0c3906 | 368 | m88k_dummy_id (struct gdbarch *arch, struct frame_info *this_frame) |
bf2ca189 MK |
369 | { |
370 | CORE_ADDR sp; | |
371 | ||
ed0c3906 UW |
372 | sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM); |
373 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
bf2ca189 MK |
374 | } |
375 | \f | |
376 | ||
377 | /* Determine, for architecture GDBARCH, how a return value of TYPE | |
378 | should be returned. If it is supposed to be returned in registers, | |
379 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
380 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
381 | from WRITEBUF into REGCACHE. */ | |
382 | ||
383 | static enum return_value_convention | |
6a3a010b | 384 | m88k_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
385 | struct type *type, struct regcache *regcache, |
386 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
bf2ca189 MK |
387 | { |
388 | int len = TYPE_LENGTH (type); | |
8dccaca3 | 389 | gdb_byte buf[8]; |
bf2ca189 MK |
390 | |
391 | if (!m88k_integral_or_pointer_p (type) && !m88k_floating_p (type)) | |
392 | return RETURN_VALUE_STRUCT_CONVENTION; | |
393 | ||
394 | if (readbuf) | |
395 | { | |
396 | /* Read the contents of R2 and (if necessary) R3. */ | |
397 | regcache_cooked_read (regcache, M88K_R2_REGNUM, buf); | |
398 | if (len > 4) | |
399 | { | |
400 | regcache_cooked_read (regcache, M88K_R3_REGNUM, buf + 4); | |
401 | gdb_assert (len == 8); | |
402 | memcpy (readbuf, buf, len); | |
403 | } | |
404 | else | |
405 | { | |
406 | /* Just stripping off any unused bytes should preserve the | |
407 | signed-ness just fine. */ | |
408 | memcpy (readbuf, buf + 4 - len, len); | |
409 | } | |
410 | } | |
411 | ||
412 | if (writebuf) | |
413 | { | |
414 | /* Read the contents to R2 and (if necessary) R3. */ | |
415 | if (len > 4) | |
416 | { | |
417 | gdb_assert (len == 8); | |
418 | memcpy (buf, writebuf, 8); | |
419 | regcache_cooked_write (regcache, M88K_R3_REGNUM, buf + 4); | |
420 | } | |
421 | else | |
422 | { | |
423 | /* ??? Do we need to do any sign-extension here? */ | |
424 | memcpy (buf + 4 - len, writebuf, len); | |
425 | } | |
426 | regcache_cooked_write (regcache, M88K_R2_REGNUM, buf); | |
427 | } | |
428 | ||
429 | return RETURN_VALUE_REGISTER_CONVENTION; | |
430 | } | |
431 | \f | |
432 | /* Default frame unwinder. */ | |
433 | ||
434 | struct m88k_frame_cache | |
435 | { | |
436 | /* Base address. */ | |
437 | CORE_ADDR base; | |
438 | CORE_ADDR pc; | |
439 | ||
440 | int sp_offset; | |
441 | int fp_offset; | |
442 | ||
443 | /* Table of saved registers. */ | |
444 | struct trad_frame_saved_reg *saved_regs; | |
445 | }; | |
446 | ||
447 | /* Prologue analysis. */ | |
448 | ||
449 | /* Macros for extracting fields from instructions. */ | |
450 | ||
451 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) | |
452 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) | |
453 | #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
454 | #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) | |
455 | #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) | |
456 | #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
457 | ||
458 | /* Possible actions to be taken by the prologue analyzer for the | |
459 | instructions it encounters. */ | |
460 | ||
461 | enum m88k_prologue_insn_action | |
462 | { | |
463 | M88K_PIA_SKIP, /* Ignore. */ | |
464 | M88K_PIA_NOTE_ST, /* Note register store. */ | |
465 | M88K_PIA_NOTE_STD, /* Note register pair store. */ | |
466 | M88K_PIA_NOTE_SP_ADJUSTMENT, /* Note stack pointer adjustment. */ | |
467 | M88K_PIA_NOTE_FP_ASSIGNMENT, /* Note frame pointer assignment. */ | |
468 | M88K_PIA_NOTE_BRANCH, /* Note branch. */ | |
469 | M88K_PIA_NOTE_PROLOGUE_END /* Note end of prologue. */ | |
470 | }; | |
471 | ||
472 | /* Table of instructions that may comprise a function prologue. */ | |
473 | ||
474 | struct m88k_prologue_insn | |
475 | { | |
476 | unsigned long insn; | |
477 | unsigned long mask; | |
478 | enum m88k_prologue_insn_action action; | |
479 | }; | |
480 | ||
481 | struct m88k_prologue_insn m88k_prologue_insn_table[] = | |
482 | { | |
483 | /* Various register move instructions. */ | |
484 | { 0x58000000, 0xf800ffff, M88K_PIA_SKIP }, /* or/or.u with immed of 0 */ | |
485 | { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP }, /* or rd,r0,rs */ | |
486 | { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP }, /* or rd,rs,r0 */ | |
487 | ||
488 | /* Various other instructions. */ | |
489 | { 0x58000000, 0xf8000000, M88K_PIA_SKIP }, /* or/or.u */ | |
490 | ||
491 | /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */ | |
492 | { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT }, | |
493 | ||
494 | /* Frame pointer assignment: "addu r30,r31,n". */ | |
495 | { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT }, | |
496 | ||
497 | /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */ | |
498 | { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST }, /* st rx,sp,n */ | |
499 | { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD }, /* st.d rs,sp,n */ | |
500 | ||
501 | /* Instructions needed for setting up r25 for pic code. */ | |
502 | { 0x5f200000, 0xffff0000, M88K_PIA_SKIP }, /* or.u r25,r0,offset_high */ | |
503 | { 0xcc000002, 0xffffffff, M88K_PIA_SKIP }, /* bsr.n Lab */ | |
504 | { 0x5b390000, 0xffff0000, M88K_PIA_SKIP }, /* or r25,r25,offset_low */ | |
505 | { 0xf7396001, 0xffffffff, M88K_PIA_SKIP }, /* Lab: addu r25,r25,r1 */ | |
506 | ||
507 | /* Various branch or jump instructions which have a delay slot -- | |
508 | these do not form part of the prologue, but the instruction in | |
509 | the delay slot might be a store instruction which should be | |
510 | noted. */ | |
511 | { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH }, | |
512 | /* br.n, bsr.n, bb0.n, or bb1.n */ | |
513 | { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH }, /* bcnd.n */ | |
514 | { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH }, /* jmp.n or jsr.n */ | |
515 | ||
516 | /* Catch all. Ends prologue analysis. */ | |
517 | { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END } | |
518 | }; | |
519 | ||
520 | /* Do a full analysis of the function prologue at PC and update CACHE | |
521 | accordingly. Bail out early if LIMIT is reached. Return the | |
522 | address where the analysis stopped. If LIMIT points beyond the | |
523 | function prologue, the return address should be the end of the | |
524 | prologue. */ | |
525 | ||
526 | static CORE_ADDR | |
e17a4113 UW |
527 | m88k_analyze_prologue (struct gdbarch *gdbarch, |
528 | CORE_ADDR pc, CORE_ADDR limit, | |
bf2ca189 MK |
529 | struct m88k_frame_cache *cache) |
530 | { | |
e17a4113 | 531 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
bf2ca189 MK |
532 | CORE_ADDR end = limit; |
533 | ||
534 | /* Provide a dummy cache if necessary. */ | |
535 | if (cache == NULL) | |
536 | { | |
8d749320 | 537 | cache = XALLOCA (struct m88k_frame_cache); |
f5cdf498 SM |
538 | cache->saved_regs = |
539 | XALLOCAVEC (struct trad_frame_saved_reg, M88K_R31_REGNUM + 1); | |
bf2ca189 MK |
540 | |
541 | /* We only initialize the members we care about. */ | |
542 | cache->saved_regs[M88K_R1_REGNUM].addr = -1; | |
543 | cache->fp_offset = -1; | |
544 | } | |
545 | ||
546 | while (pc < limit) | |
547 | { | |
548 | struct m88k_prologue_insn *pi = m88k_prologue_insn_table; | |
e17a4113 | 549 | unsigned long insn = m88k_fetch_instruction (pc, byte_order); |
bf2ca189 MK |
550 | |
551 | while ((insn & pi->mask) != pi->insn) | |
552 | pi++; | |
553 | ||
554 | switch (pi->action) | |
555 | { | |
556 | case M88K_PIA_SKIP: | |
557 | /* If we have a frame pointer, and R1 has been saved, | |
558 | consider this instruction as not being part of the | |
559 | prologue. */ | |
560 | if (cache->fp_offset != -1 | |
561 | && cache->saved_regs[M88K_R1_REGNUM].addr != -1) | |
325fac50 | 562 | return std::min (pc, end); |
bf2ca189 MK |
563 | break; |
564 | ||
565 | case M88K_PIA_NOTE_ST: | |
566 | case M88K_PIA_NOTE_STD: | |
567 | /* If no frame has been allocated, the stores aren't part of | |
568 | the prologue. */ | |
569 | if (cache->sp_offset == 0) | |
325fac50 | 570 | return std::min (pc, end); |
bf2ca189 MK |
571 | |
572 | /* Record location of saved registers. */ | |
573 | { | |
574 | int regnum = ST_SRC (insn) + M88K_R0_REGNUM; | |
575 | ULONGEST offset = ST_OFFSET (insn); | |
576 | ||
577 | cache->saved_regs[regnum].addr = offset; | |
578 | if (pi->action == M88K_PIA_NOTE_STD && regnum < M88K_R31_REGNUM) | |
579 | cache->saved_regs[regnum + 1].addr = offset + 4; | |
580 | } | |
581 | break; | |
582 | ||
583 | case M88K_PIA_NOTE_SP_ADJUSTMENT: | |
584 | /* A second stack pointer adjustment isn't part of the | |
585 | prologue. */ | |
586 | if (cache->sp_offset != 0) | |
325fac50 | 587 | return std::min (pc, end); |
bf2ca189 MK |
588 | |
589 | /* Store stack pointer adjustment. */ | |
590 | cache->sp_offset = -SUBU_OFFSET (insn); | |
591 | break; | |
592 | ||
593 | case M88K_PIA_NOTE_FP_ASSIGNMENT: | |
594 | /* A second frame pointer assignment isn't part of the | |
595 | prologue. */ | |
596 | if (cache->fp_offset != -1) | |
325fac50 | 597 | return std::min (pc, end); |
bf2ca189 MK |
598 | |
599 | /* Record frame pointer assignment. */ | |
600 | cache->fp_offset = ADDU_OFFSET (insn); | |
601 | break; | |
602 | ||
603 | case M88K_PIA_NOTE_BRANCH: | |
604 | /* The branch instruction isn't part of the prologue, but | |
605 | the instruction in the delay slot might be. Limit the | |
606 | prologue analysis to the delay slot and record the branch | |
607 | instruction as the end of the prologue. */ | |
325fac50 | 608 | limit = std::min (limit, pc + 2 * M88K_INSN_SIZE); |
bf2ca189 MK |
609 | end = pc; |
610 | break; | |
611 | ||
612 | case M88K_PIA_NOTE_PROLOGUE_END: | |
325fac50 | 613 | return std::min (pc, end); |
bf2ca189 MK |
614 | } |
615 | ||
616 | pc += M88K_INSN_SIZE; | |
617 | } | |
618 | ||
619 | return end; | |
620 | } | |
621 | ||
622 | /* An upper limit to the size of the prologue. */ | |
623 | const int m88k_max_prologue_size = 128 * M88K_INSN_SIZE; | |
624 | ||
625 | /* Return the address of first real instruction of the function | |
626 | starting at PC. */ | |
627 | ||
628 | static CORE_ADDR | |
6093d2eb | 629 | m88k_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
bf2ca189 MK |
630 | { |
631 | struct symtab_and_line sal; | |
632 | CORE_ADDR func_start, func_end; | |
633 | ||
634 | /* This is the preferred method, find the end of the prologue by | |
635 | using the debugging information. */ | |
636 | if (find_pc_partial_function (pc, NULL, &func_start, &func_end)) | |
637 | { | |
638 | sal = find_pc_line (func_start, 0); | |
639 | ||
640 | if (sal.end < func_end && pc <= sal.end) | |
641 | return sal.end; | |
642 | } | |
643 | ||
e17a4113 UW |
644 | return m88k_analyze_prologue (gdbarch, pc, pc + m88k_max_prologue_size, |
645 | NULL); | |
bf2ca189 MK |
646 | } |
647 | ||
63807e1d | 648 | static struct m88k_frame_cache * |
ed0c3906 | 649 | m88k_frame_cache (struct frame_info *this_frame, void **this_cache) |
bf2ca189 | 650 | { |
e17a4113 | 651 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
bf2ca189 MK |
652 | struct m88k_frame_cache *cache; |
653 | CORE_ADDR frame_sp; | |
654 | ||
655 | if (*this_cache) | |
9a3c8263 | 656 | return (struct m88k_frame_cache *) *this_cache; |
bf2ca189 MK |
657 | |
658 | cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache); | |
ed0c3906 | 659 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
bf2ca189 MK |
660 | cache->fp_offset = -1; |
661 | ||
ed0c3906 | 662 | cache->pc = get_frame_func (this_frame); |
bf2ca189 | 663 | if (cache->pc != 0) |
e17a4113 UW |
664 | m88k_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame), |
665 | cache); | |
bf2ca189 MK |
666 | |
667 | /* Calculate the stack pointer used in the prologue. */ | |
668 | if (cache->fp_offset != -1) | |
669 | { | |
670 | CORE_ADDR fp; | |
671 | ||
ed0c3906 | 672 | fp = get_frame_register_unsigned (this_frame, M88K_R30_REGNUM); |
bf2ca189 MK |
673 | frame_sp = fp - cache->fp_offset; |
674 | } | |
675 | else | |
676 | { | |
677 | /* If we know where the return address is saved, we can take a | |
678 | solid guess at what the frame pointer should be. */ | |
679 | if (cache->saved_regs[M88K_R1_REGNUM].addr != -1) | |
680 | cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4; | |
ed0c3906 | 681 | frame_sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM); |
bf2ca189 MK |
682 | } |
683 | ||
684 | /* Now that we know the stack pointer, adjust the location of the | |
685 | saved registers. */ | |
686 | { | |
687 | int regnum; | |
688 | ||
689 | for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++) | |
690 | if (cache->saved_regs[regnum].addr != -1) | |
691 | cache->saved_regs[regnum].addr += frame_sp; | |
692 | } | |
693 | ||
694 | /* Calculate the frame's base. */ | |
695 | cache->base = frame_sp - cache->sp_offset; | |
696 | trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base); | |
697 | ||
698 | /* Identify SXIP with the return address in R1. */ | |
699 | cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM]; | |
700 | ||
701 | *this_cache = cache; | |
702 | return cache; | |
703 | } | |
704 | ||
705 | static void | |
ed0c3906 | 706 | m88k_frame_this_id (struct frame_info *this_frame, void **this_cache, |
bf2ca189 MK |
707 | struct frame_id *this_id) |
708 | { | |
ed0c3906 | 709 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
710 | |
711 | /* This marks the outermost frame. */ | |
712 | if (cache->base == 0) | |
713 | return; | |
714 | ||
715 | (*this_id) = frame_id_build (cache->base, cache->pc); | |
716 | } | |
717 | ||
ed0c3906 UW |
718 | static struct value * |
719 | m88k_frame_prev_register (struct frame_info *this_frame, | |
720 | void **this_cache, int regnum) | |
bf2ca189 | 721 | { |
ed0c3906 | 722 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
723 | |
724 | if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM) | |
725 | { | |
ed0c3906 UW |
726 | struct value *value; |
727 | CORE_ADDR pc; | |
bf2ca189 | 728 | |
ed0c3906 UW |
729 | value = trad_frame_get_prev_register (this_frame, cache->saved_regs, |
730 | M88K_SXIP_REGNUM); | |
731 | pc = value_as_long (value); | |
732 | release_value (value); | |
733 | value_free (value); | |
bf2ca189 | 734 | |
ed0c3906 UW |
735 | if (regnum == M88K_SFIP_REGNUM) |
736 | pc += 4; | |
bf2ca189 | 737 | |
ed0c3906 | 738 | return frame_unwind_got_constant (this_frame, regnum, pc + 4); |
bf2ca189 MK |
739 | } |
740 | ||
ed0c3906 | 741 | return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum); |
bf2ca189 MK |
742 | } |
743 | ||
744 | static const struct frame_unwind m88k_frame_unwind = | |
745 | { | |
746 | NORMAL_FRAME, | |
8fbca658 | 747 | default_frame_unwind_stop_reason, |
bf2ca189 | 748 | m88k_frame_this_id, |
ed0c3906 UW |
749 | m88k_frame_prev_register, |
750 | NULL, | |
751 | default_frame_sniffer | |
bf2ca189 | 752 | }; |
bf2ca189 MK |
753 | \f |
754 | ||
755 | static CORE_ADDR | |
ed0c3906 | 756 | m88k_frame_base_address (struct frame_info *this_frame, void **this_cache) |
bf2ca189 | 757 | { |
ed0c3906 | 758 | struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache); |
bf2ca189 MK |
759 | |
760 | if (cache->fp_offset != -1) | |
761 | return cache->base + cache->sp_offset + cache->fp_offset; | |
762 | ||
763 | return 0; | |
764 | } | |
765 | ||
766 | static const struct frame_base m88k_frame_base = | |
767 | { | |
768 | &m88k_frame_unwind, | |
769 | m88k_frame_base_address, | |
770 | m88k_frame_base_address, | |
771 | m88k_frame_base_address | |
772 | }; | |
773 | \f | |
774 | ||
775 | /* Core file support. */ | |
776 | ||
777 | /* Supply register REGNUM from the buffer specified by GREGS and LEN | |
778 | in the general-purpose register set REGSET to register cache | |
779 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
780 | ||
781 | static void | |
782 | m88k_supply_gregset (const struct regset *regset, | |
783 | struct regcache *regcache, | |
784 | int regnum, const void *gregs, size_t len) | |
785 | { | |
9a3c8263 | 786 | const gdb_byte *regs = (const gdb_byte *) gregs; |
bf2ca189 MK |
787 | int i; |
788 | ||
789 | for (i = 0; i < M88K_NUM_REGS; i++) | |
790 | { | |
791 | if (regnum == i || regnum == -1) | |
792 | regcache_raw_supply (regcache, i, regs + i * 4); | |
793 | } | |
794 | } | |
795 | ||
796 | /* Motorola 88000 register set. */ | |
797 | ||
3ca7dae4 | 798 | static const struct regset m88k_gregset = |
bf2ca189 MK |
799 | { |
800 | NULL, | |
801 | m88k_supply_gregset | |
802 | }; | |
803 | ||
b61ddd6e | 804 | /* Iterate over supported core file register note sections. */ |
bf2ca189 | 805 | |
b61ddd6e AA |
806 | static void |
807 | m88k_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
808 | iterate_over_regset_sections_cb *cb, | |
809 | void *cb_data, | |
810 | const struct regcache *regcache) | |
bf2ca189 | 811 | { |
b61ddd6e | 812 | cb (".reg", M88K_NUM_REGS * 4, &m88k_gregset, NULL, cb_data); |
bf2ca189 MK |
813 | } |
814 | \f | |
815 | ||
816 | static struct gdbarch * | |
817 | m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
818 | { | |
819 | struct gdbarch *gdbarch; | |
820 | ||
821 | /* If there is already a candidate, use it. */ | |
822 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
823 | if (arches != NULL) | |
824 | return arches->gdbarch; | |
825 | ||
826 | /* Allocate space for the new architecture. */ | |
827 | gdbarch = gdbarch_alloc (&info, NULL); | |
828 | ||
829 | /* There is no real `long double'. */ | |
830 | set_gdbarch_long_double_bit (gdbarch, 64); | |
8da61cc4 | 831 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); |
bf2ca189 MK |
832 | |
833 | set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS); | |
834 | set_gdbarch_register_name (gdbarch, m88k_register_name); | |
835 | set_gdbarch_register_type (gdbarch, m88k_register_type); | |
836 | ||
837 | /* Register numbers of various important registers. */ | |
838 | set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM); | |
839 | set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM); | |
840 | ||
841 | /* Core file support. */ | |
b61ddd6e AA |
842 | set_gdbarch_iterate_over_regset_sections |
843 | (gdbarch, m88k_iterate_over_regset_sections); | |
bf2ca189 MK |
844 | |
845 | set_gdbarch_print_insn (gdbarch, print_insn_m88k); | |
846 | ||
847 | set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue); | |
848 | ||
849 | /* Stack grows downward. */ | |
850 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
851 | ||
852 | /* Call dummy code. */ | |
853 | set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call); | |
ed0c3906 | 854 | set_gdbarch_dummy_id (gdbarch, m88k_dummy_id); |
bf2ca189 | 855 | |
025bb325 | 856 | /* Return value info. */ |
bf2ca189 MK |
857 | set_gdbarch_return_value (gdbarch, m88k_return_value); |
858 | ||
859 | set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove); | |
860 | set_gdbarch_breakpoint_from_pc (gdbarch, m88k_breakpoint_from_pc); | |
861 | set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc); | |
862 | set_gdbarch_write_pc (gdbarch, m88k_write_pc); | |
863 | ||
864 | frame_base_set_default (gdbarch, &m88k_frame_base); | |
ed0c3906 | 865 | frame_unwind_append_unwinder (gdbarch, &m88k_frame_unwind); |
bf2ca189 MK |
866 | |
867 | return gdbarch; | |
868 | } | |
869 | \f | |
870 | ||
871 | /* Provide a prototype to silence -Wmissing-prototypes. */ | |
872 | void _initialize_m88k_tdep (void); | |
873 | ||
874 | void | |
875 | _initialize_m88k_tdep (void) | |
876 | { | |
877 | gdbarch_register (bfd_arch_m88k, m88k_gdbarch_init, NULL); | |
878 | } |