readline, inc-read: fix node structure so this makeinfo's cleanly.
[deliverable/binutils-gdb.git] / gdb / m88k-tdep.c
CommitLineData
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1/* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
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3
4This file is part of GDB.
5
99a7de40 6This program is free software; you can redistribute it and/or modify
8aa13b87 7it under the terms of the GNU General Public License as published by
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8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
8aa13b87 10
99a7de40 11This program is distributed in the hope that it will be useful,
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12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
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17along with this program; if not, write to the Free Software
18Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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19
20#include <stdio.h>
21#include "defs.h"
22#include "param.h"
23#include "frame.h"
24#include "inferior.h"
25#include "value.h"
26
27#ifdef USG
28#include <sys/types.h>
29#endif
30
31#include <sys/param.h>
32#include <sys/dir.h>
33#include <signal.h>
34#include "gdbcore.h"
35#include <sys/user.h>
36#ifndef USER /* added to support BCS ptrace_user */
37
38#define USER ptrace_user
39#endif
40#include <sys/ioctl.h>
41#include <fcntl.h>
42
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43#include <sys/file.h>
44#include <sys/stat.h>
45
46#include "symtab.h"
47#include "setjmp.h"
48#include "value.h"
49
ea3c0839 50void frame_find_saved_regs ();
8aa13b87 51
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52
53/* Given a GDB frame, determine the address of the calling function's frame.
54 This will be used to create a new GDB frame struct, and then
55 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
56
57 For us, the frame address is its stack pointer value, so we look up
58 the function prologue to determine the caller's sp value, and return it. */
59
60FRAME_ADDR
61frame_chain (thisframe)
62 FRAME thisframe;
8aa13b87 63{
8aa13b87 64
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65 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
66 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
67 the ADDRESS, of SP_REGNUM. It also depends on the cache of
68 frame_find_saved_regs results. */
69 if (thisframe->fsr->regs[SP_REGNUM])
70 return thisframe->fsr->regs[SP_REGNUM];
71 else
72 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
73}
8aa13b87 74
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75int
76frameless_function_invocation (frame)
77 FRAME frame;
8aa13b87 78{
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79
80 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
81 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
82 the ADDRESS, of SP_REGNUM. It also depends on the cache of
83 frame_find_saved_regs results. */
84 if (frame->fsr->regs[SP_REGNUM])
85 return 0; /* Frameful -- return addr saved somewhere */
8aa13b87 86 else
ea3c0839 87 return 1; /* Frameless -- no saved return address */
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88}
89
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90int
91frame_chain_valid (chain, thisframe)
92 CORE_ADDR chain;
93 struct frame_info *thisframe;
8aa13b87 94{
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95 return (chain != 0
96 && outside_startup_file (FRAME_SAVED_PC (thisframe)));
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97}
98
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99CORE_ADDR
100frame_chain_combine (chain, thisframe)
101 CORE_ADDR chain;
102{
103 return chain;
104}
8aa13b87 105
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106void
107init_extra_frame_info (fromleaf, fi)
108 int fromleaf;
109 struct frame_info *fi;
110{
111 fi->fsr = 0; /* Not yet allocated */
112 fi->args_pointer = 0; /* Unknown */
113 fi->locals_pointer = 0; /* Unknown */
114}
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115
116void
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117init_frame_pc (fromleaf, prev)
118 int fromleaf;
119 struct frame_info *prev;
8aa13b87 120{
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121 /* FIXME, for now it's the default from blockframe.c. If it stays that
122 way, remove it entirely from here. */
123 prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) :
124 prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
125
126}
127\f
128/* Examine an m88k function prologue, recording the addresses at which
129 registers are saved explicitly by the prologue code, and returning
130 the address of the first instruction after the prologue (but not
131 after the instruction at address LIMIT, as explained below).
132
133 LIMIT places an upper bound on addresses of the instructions to be
134 examined. If the prologue code scan reaches LIMIT, the scan is
135 aborted and LIMIT is returned. This is used, when examining the
136 prologue for the current frame, to keep examine_prologue () from
137 claiming that a given register has been saved when in fact the
138 instruction that saves it has not yet been executed. LIMIT is used
139 at other times to stop the scan when we hit code after the true
140 function prologue (e.g. for the first source line) which might
141 otherwise be mistaken for function prologue.
142
143 The format of the function prologue matched by this routine is
144 derived from examination of the source to gcc 1.95, particularly
145 the routine output_prologue () in config/out-m88k.c.
146
147 subu r31,r31,n # stack pointer update
148
149 (st rn,r31,offset)? # save incoming regs
150 (st.d rn,r31,offset)?
151
152 (addu r30,r31,n)? # frame pointer update
153
154 (pic sequence)? # PIC code prologue
155*/
156
157/* Macros for extracting fields from instructions. */
158
159#define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
160#define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
161
162/* Prologue code that handles position-independent-code setup. */
163
164struct pic_prologue_code {
165 unsigned long insn, mask;
166};
167
168static struct pic_prologue_code pic_prologue_code [] = {
169/* FIXME -- until this is translated to hex, we won't match it... */
170 0xffffffff, 0,
171 /* or r10,r1,0 (if not saved) */
172 /* bsr.n LabN */
173 /* or.u r25,r0,const */
174 /*LabN: or r25,r25,const2 */
175 /* addu r25,r25,1 */
176 /* or r1,r10,0 (if not saved) */
177};
178
179/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
180 is not the address of a valid instruction, the address of the next
181 instruction beyond ADDR otherwise. *PWORD1 receives the first word
182 of the instruction. PWORD2 is ignored -- a remnant of the original
183 i960 version. */
184
185#define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
186 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
187
188/* Read the m88k instruction at 'memaddr' and return the address of
189 the next instruction after that, or 0 if 'memaddr' is not the
190 address of a valid instruction. The instruction
191 is stored at 'pword1'. */
8aa13b87 192
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193CORE_ADDR
194next_insn (memaddr, pword1)
195 unsigned long *pword1;
196 CORE_ADDR memaddr;
8aa13b87 197{
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198 unsigned long buf[1];
199
200 read_memory (memaddr, buf, sizeof (buf));
201 *pword1 = buf[0];
202 SWAP_TARGET_AND_HOST (pword1, sizeof (long));
203
204 return memaddr + 4;
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205}
206
ea3c0839 207/* Read a register from frames called by us (or from the hardware regs). */
8aa13b87 208
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209int
210read_next_frame_reg(fi, regno)
211 FRAME fi;
212 int regno;
8aa13b87 213{
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214 for (; fi; fi = fi->next) {
215 if (regno == SP_REGNUM) return fi->frame;
216 else if (fi->fsr->regs[regno])
217 return read_memory_integer(fi->fsr->regs[regno], 4);
218 }
219 return read_register(regno);
8aa13b87 220}
8aa13b87 221
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222/* Examine the prologue of a function. `ip' points to the first instruction.
223 `limit' is the limit of the prologue (e.g. the addr of the first
224 linenumber, or perhaps the program counter if we're stepping through).
225 `frame_sp' is the stack pointer value in use in this frame.
226 `fsr' is a pointer to a frame_saved_regs structure into which we put
227 info about the registers saved by this frame.
228 `fi' is a struct frame_info pointer; we fill in various fields in it
229 to reflect the offsets of the arg pointer and the locals pointer. */
230
231static CORE_ADDR
232examine_prologue (ip, limit, frame_sp, fsr, fi)
233 register CORE_ADDR ip;
234 register CORE_ADDR limit;
235 FRAME_ADDR frame_sp;
236 struct frame_saved_regs *fsr;
237 struct frame_info *fi;
238{
239 register CORE_ADDR next_ip;
240 register int src;
241 register struct pic_prologue_code *pcode;
242 unsigned int insn1, insn2;
243 int size, offset;
244 char must_adjust[32]; /* If set, must adjust offsets in fsr */
245 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
246 int fp_offset = -1; /* -1 means not set */
247 CORE_ADDR frame_fp;
248
249 bzero (must_adjust, sizeof (must_adjust));
250 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
251
252 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
253
254#define SUBU_SP_INSN 0x67ff0000
255#define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
256#define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
257 if (next_ip &&
258 ((insn1 & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
259 {
260 sp_offset = -SUBU_OFFSET (insn1);
261 ip = next_ip;
262 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
263 }
264
265 /* The function must start with a stack-pointer adjustment, or
266 we don't know WHAT'S going on... */
267 if (sp_offset == -1)
268 return ip;
269
270 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
271 This may cause us to mistake the copying of a register
272 parameter to the frame for the saving of a callee-saved
273 register, but that can't be helped, since with the
274 "-fcall-saved" flag, any register can be made callee-saved.
275 This probably doesn't matter, since the ``saved'' caller's values of
276 non-callee-saved registers are not relevant anyway. */
277
278#define STD_STACK_INSN 0x201f0000
279#define STD_STACK_MASK 0xfc1f0000
280#define ST_STACK_INSN 0x241f0000
281#define ST_STACK_MASK 0xfc1f0000
282#define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
283#define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
284
285 while (next_ip)
286 {
287 if ((insn1 & ST_STACK_MASK) == ST_STACK_INSN)
288 size = 1;
289 else if ((insn1 & STD_STACK_MASK) == STD_STACK_INSN)
290 size = 2;
291 else
292 break;
293
294 src = ST_SRC (insn1);
295 offset = ST_OFFSET (insn1);
296 while (size--)
297 {
298 must_adjust[src] = 1;
299 fsr->regs[src++] = offset; /* Will be adjusted later */
300 offset += 4;
301 }
302 ip = next_ip;
303 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
304 }
305
306 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
307
308#define ADDU_FP_INSN 0x63df0000
309#define ADDU_FP_MASK 0xffff0000
310#define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
311 if (next_ip &&
312 ((insn1 & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
313 {
314 fp_offset = ADDU_OFFSET (insn1);
315 ip = next_ip;
316 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
317 }
318
319 /* Accept the PIC prologue code if present. */
320
321 pcode = pic_prologue_code;
322 size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
323 /* If return addr is saved, we don't use first or last insn of PICstuff. */
324 if (fsr->regs[SRP_REGNUM]) {
325 pcode++;
326 size-=2;
327 }
328
329 while (size-- && next_ip && (pcode->insn == (pcode->mask & insn1)))
330 {
331 pcode++;
332 ip = next_ip;
333 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
334 }
335
336 /* We're done with the prologue. If we don't care about the stack
337 frame itself, just return. (Note that fsr->regs has been trashed,
338 but the one caller who calls with fi==0 passes a dummy there.) */
339
340 if (fi == 0)
341 return ip;
342
343 /* OK, now we have:
344 sp_offset original negative displacement of SP
345 fp_offset positive displacement between new SP and new FP, or -1
346 fsr->regs[0..31] offset from original SP where reg is stored
347 must_adjust[0..31] set if corresp. offset was set
348
349 The current SP (frame_sp) might not be the original new SP as set
350 by the function prologue, if alloca has been called. This can
351 only occur if fp_offset is set, though (the compiler allocates an
352 FP when it sees alloca). In that case, we have the FP,
353 and can calculate the original new SP from the FP.
354
355 Then, we figure out where the arguments and locals are, and
356 relocate the offsets in fsr->regs to absolute addresses. */
357
358 if (fp_offset != -1) {
359 /* We have a frame pointer, so get it, and base our calc's on it. */
360 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, FP_REGNUM);
361 frame_sp = frame_fp - fp_offset;
362 } else {
363 /* We have no frame pointer, therefore frame_sp is still the same value
364 as set by prologue. But where is the frame itself? */
365 if (must_adjust[SRP_REGNUM]) {
366 /* Function header saved SRP (r1), the return address. Frame starts
367 4 bytes down from where it was saved. */
368 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
369 fi->locals_pointer = frame_fp;
370 } else {
371 /* Function header didn't save SRP (r1), so we are in a leaf fn or
372 are otherwise confused. */
373 frame_fp = -1;
374 }
375 }
376
377 /* The locals are relative to the FP (whether it exists as an allocated
378 register, or just as an assumed offset from the SP) */
379 fi->locals_pointer = frame_fp;
380
381 /* The arguments are just above the SP as it was before we adjusted it
382 on entry. */
383 fi->args_pointer = frame_sp - sp_offset;
384
385 /* Now that we know the SP value used by the prologue, we know where
386 it saved all the registers. */
387 for (src = 0; src < 32; src++)
388 if (must_adjust[src])
389 fsr->regs[src] += frame_sp;
390
391 /* The saved value of the SP is always known. */
392 /* (we hope...) */
393 if (fsr->regs[SP_REGNUM] != 0
394 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
395 fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
396 fsr->regs[SP_REGNUM],
397 frame_sp - sp_offset, sp_offset);
398
399 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
8aa13b87 400
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401 return (ip);
402}
8aa13b87 403
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404/* Given an ip value corresponding to the start of a function,
405 return the ip of the first instruction after the function
406 prologue. */
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407
408CORE_ADDR
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409skip_prologue (ip)
410 CORE_ADDR (ip);
8aa13b87 411{
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412 struct frame_saved_regs saved_regs_dummy;
413 struct symtab_and_line sal;
414 CORE_ADDR limit;
8aa13b87 415
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416 sal = find_pc_line (ip, 0);
417 limit = (sal.end) ? sal.end : 0xffffffff;
418
419 return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
420 (struct frame_info *)0 ));
421}
422
423/* Put here the code to store, into a struct frame_saved_regs,
424 the addresses of the saved registers of frame described by FRAME_INFO.
425 This includes special registers such as pc and fp saved in special
426 ways in the stack frame. sp is even more special:
427 the address we return for it IS the sp for the next frame.
428
429 We cache the result of doing this in the frame_cache_obstack, since
430 it is fairly expensive. */
431
432void
433frame_find_saved_regs (fi, fsr)
434 struct frame_info *fi;
435 struct frame_saved_regs *fsr;
436{
437 register CORE_ADDR next_addr;
438 register CORE_ADDR *saved_regs;
439 register int regnum;
440 register struct frame_saved_regs *cache_fsr;
441 extern struct obstack frame_cache_obstack;
442 CORE_ADDR ip;
443 struct symtab_and_line sal;
444 CORE_ADDR limit;
445
446 if (!fi->fsr)
8aa13b87 447 {
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448 cache_fsr = (struct frame_saved_regs *)
449 obstack_alloc (&frame_cache_obstack,
450 sizeof (struct frame_saved_regs));
451 bzero (cache_fsr, sizeof (struct frame_saved_regs));
452 fi->fsr = cache_fsr;
453
454 /* Find the start and end of the function prologue. If the PC
455 is in the function prologue, we only consider the part that
456 has executed already. */
457
458 ip = get_pc_function_start (fi->pc);
459 sal = find_pc_line (ip, 0);
460 limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
461
462 /* This will fill in fields in *fi as well as in cache_fsr. */
463 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
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464 }
465
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466 if (fsr)
467 *fsr = *fi->fsr;
468}
469
470/* Return the address of the locals block for the frame
471 described by FI. Returns 0 if the address is unknown.
472 NOTE! Frame locals are referred to by negative offsets from the
473 argument pointer, so this is the same as frame_args_address(). */
474
475CORE_ADDR
476frame_locals_address (fi)
477 struct frame_info *fi;
478{
479 register FRAME frame;
480 struct frame_saved_regs fsr;
481 CORE_ADDR ap;
482
483 if (fi->args_pointer) /* Cached value is likely there. */
484 return fi->args_pointer;
485
486 /* Nope, generate it. */
487
488 get_frame_saved_regs (fi, &fsr);
489
490 return fi->args_pointer;
491}
492
493/* Return the address of the argument block for the frame
494 described by FI. Returns 0 if the address is unknown. */
495
496CORE_ADDR
497frame_args_address (fi)
498 struct frame_info *fi;
499{
500 register FRAME frame;
501 struct frame_saved_regs fsr;
502 CORE_ADDR ap;
503
504 if (fi->args_pointer) /* Cached value is likely there. */
505 return fi->args_pointer;
506
507 /* Nope, generate it. */
508
509 get_frame_saved_regs (fi, &fsr);
510
511 return fi->args_pointer;
512}
513
514/* Return the saved PC from this frame.
515
516 If the frame has a memory copy of SRP_REGNUM, use that. If not,
517 just use the register SRP_REGNUM itself. */
518
519CORE_ADDR
520frame_saved_pc (frame)
521 FRAME frame;
522{
523 return read_next_frame_reg(frame, SRP_REGNUM);
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524}
525
ea3c0839 526
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527#if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
528you lose
529#else /* Host and target byte order the same. */
530#define SINGLE_EXP_BITS 8
531#define DOUBLE_EXP_BITS 11
532int
533IEEE_isNAN(fp, len)
534 int *fp, len;
535 /* fp points to a single precision OR double precision
536 * floating point value; len is the number of bytes, either 4 or 8.
537 * Returns 1 iff fp points to a valid IEEE floating point number.
538 * Returns 0 if fp points to a denormalized number or a NaN
539 */
540{
541 int exponent;
542 if (len == 4)
543 {
544 exponent = *fp;
545 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
546 return ((exponent == -1) || (! exponent && *fp));
547 }
548 else if (len == 8)
549 {
550 exponent = *(fp+1);
551 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
552 return ((exponent == -1) || (! exponent && *fp * *(fp+1)));
553 }
554 else return 1;
555}
556#endif /* Host and target byte order the same. */
557
ef98d5ac
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558static int
559pushed_size (prev_words, v)
560 int prev_words;
561 struct value *v;
562{
563 switch (TYPE_CODE (VALUE_TYPE (v)))
564 {
565 case TYPE_CODE_VOID: /* Void type (values zero length) */
566
567 return 0; /* That was easy! */
568
569 case TYPE_CODE_PTR: /* Pointer type */
570 case TYPE_CODE_ENUM: /* Enumeration type */
571 case TYPE_CODE_INT: /* Integer type */
572 case TYPE_CODE_REF: /* C++ Reference types */
573 case TYPE_CODE_ARRAY: /* Array type, lower bound zero */
574
575 return 1;
576
577 case TYPE_CODE_FLT: /* Floating type */
578
579 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
580 return 1;
581 else
582 /* Assume that it must be a double. */
583 if (prev_words & 1) /* at an odd-word boundary */
584 return 3; /* round to 8-byte boundary */
585 else
586 return 2;
587
588 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
589 case TYPE_CODE_UNION: /* C union or Pascal variant part */
590
591 return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
592
593 case TYPE_CODE_FUNC: /* Function type */
594 case TYPE_CODE_SET: /* Pascal sets */
595 case TYPE_CODE_RANGE: /* Range (integers within bounds) */
596 case TYPE_CODE_PASCAL_ARRAY: /* Array with explicit type of index */
597 case TYPE_CODE_MEMBER: /* Member type */
598 case TYPE_CODE_METHOD: /* Method type */
599 /* Don't know how to pass these yet. */
600
601 case TYPE_CODE_UNDEF: /* Not used; catches errors */
602 default:
603 abort ();
604 }
605}
606
607static void
608store_parm_word (address, val)
609 CORE_ADDR address;
610 int val;
611{
612 write_memory (address, &val, 4);
613}
614
615static int
616store_parm (prev_words, left_parm_addr, v)
617 unsigned int prev_words;
618 CORE_ADDR left_parm_addr;
619 struct value *v;
620{
621 CORE_ADDR start = left_parm_addr + (prev_words * 4);
622 int *val_addr = (int *)VALUE_CONTENTS(v);
623
624 switch (TYPE_CODE (VALUE_TYPE (v)))
625 {
626 case TYPE_CODE_VOID: /* Void type (values zero length) */
627
628 return 0;
629
630 case TYPE_CODE_PTR: /* Pointer type */
631 case TYPE_CODE_ENUM: /* Enumeration type */
632 case TYPE_CODE_INT: /* Integer type */
633 case TYPE_CODE_ARRAY: /* Array type, lower bound zero */
634 case TYPE_CODE_REF: /* C++ Reference types */
635
636 store_parm_word (start, *val_addr);
637 return 1;
638
639 case TYPE_CODE_FLT: /* Floating type */
640
641 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
642 {
643 store_parm_word (start, *val_addr);
644 return 1;
645 }
646 else
647 {
648 store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
649 store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
650 return 2 + (prev_words & 1);
651 }
652
653 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
654 case TYPE_CODE_UNION: /* C union or Pascal variant part */
655
656 {
657 unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
658 unsigned int word;
659
660 for (word = 0; word < words; word++)
661 store_parm_word (start + (word * 4), val_addr[word]);
662 return words;
663 }
664
665 default:
666 abort ();
667 }
668}
8aa13b87 669
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670 /* This routine sets up all of the parameter values needed to make a pseudo
671 call. The name "push_parameters" is a misnomer on some archs,
672 because (on the m88k) most parameters generally end up being passed in
673 registers rather than on the stack. In this routine however, we do
674 end up storing *all* parameter values onto the stack (even if we will
675 realize later that some of these stores were unnecessary). */
676
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677#define FIRST_PARM_REGNUM 2
678
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679void
680push_parameters (return_type, struct_conv, nargs, args)
681 struct type *return_type;
682 int struct_conv;
683 int nargs;
684 value *args;
ea3c0839 685{
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686 int parm_num;
687 unsigned int p_words = 0;
688 CORE_ADDR left_parm_addr;
689
690 /* Start out by creating a space for the return value (if need be). We
691 only need to do this if the return value is a struct or union. If we
692 do make a space for a struct or union return value, then we must also
693 arrange for the base address of that space to go into r12, which is the
694 standard place to pass the address of the return value area to the
695 callee. Note that only structs and unions are returned in this fashion.
696 Ints, enums, pointers, and floats are returned into r2. Doubles are
697 returned into the register pair {r2,r3}. Note also that the space
698 reserved for a struct or union return value only has to be word aligned
699 (not double-word) but it is double-word aligned here anyway (just in
700 case that becomes important someday). */
701
702 switch (TYPE_CODE (return_type))
703 {
704 case TYPE_CODE_STRUCT:
705 case TYPE_CODE_UNION:
706 {
707 int return_bytes = ((TYPE_LENGTH (return_type) + 7) / 8) * 8;
708 CORE_ADDR rv_addr;
709
710 rv_addr = read_register (SP_REGNUM) - return_bytes;
711
712 write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
713 write_register (SRA_REGNUM, rv_addr);/* set return value register */
714 }
715 }
716
717 /* Here we make a pre-pass on the whole parameter list to figure out exactly
718 how many words worth of stuff we are going to pass. */
719
720 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
721 p_words += pushed_size (p_words, value_arg_coerce (args[parm_num]));
722
723 /* Now, check to see if we have to round up the number of parameter words
724 to get up to the next 8-bytes boundary. This may be necessary because
725 of the software convention to always keep the stack aligned on an 8-byte
726 boundary. */
727
728 if (p_words & 1)
729 p_words++; /* round to 8-byte boundary */
730
731 /* Now figure out the absolute address of the leftmost parameter, and update
732 the stack pointer to point at that address. */
733
734 left_parm_addr = read_register (SP_REGNUM) - (p_words * 4);
735 write_register (SP_REGNUM, left_parm_addr);
736
737 /* Now we can go through all of the parameters (in left-to-right order)
738 and write them to their parameter stack slots. Note that we are not
739 really "pushing" the parameter values. The stack space for these values
740 was already allocated above. Now we are just filling it up. */
741
742 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
743 p_words +=
744 store_parm (p_words, left_parm_addr, value_arg_coerce (args[parm_num]));
745
746 /* Now that we are all done storing the parameter values into the stack, we
747 must go back and load up the parameter registers with the values from the
748 corresponding stack slots. Note that in the two cases of (a) gaps in the
749 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
750 slots correcponding to structs or unions, the work we do here in loading
751 some parameter registers may be unnecessary, but who cares? */
752
753 for (p_words = 0; p_words < 8; p_words++)
754 {
755 write_register (FIRST_PARM_REGNUM + p_words,
756 read_memory_integer (left_parm_addr + (p_words * 4), 4));
757 }
758}
759
760void
761pop_frame ()
762{
763 error ("Feature not implemented for the m88k yet.");
764 return;
765}
766
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767void
768collect_returned_value (rval, value_type, struct_return, nargs, args)
769 value *rval;
770 struct type *value_type;
771 int struct_return;
772 int nargs;
773 value *args;
774{
775 char retbuf[REGISTER_BYTES];
776
777 bcopy (registers, retbuf, REGISTER_BYTES);
778 *rval = value_being_returned (value_type, retbuf, struct_return);
779 return;
780}
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781
782#if 0
783/* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
784 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
785 is not a good place for it). Return the address at which the instruction
786 got stuffed, or zero if we were unable to stuff it anywhere. */
787
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788CORE_ADDR
789push_breakpoint ()
790{
791 static char breakpoint_insn[] = BREAKPOINT;
792 extern CORE_ADDR text_end; /* of inferior */
793 static char readback_buffer[] = BREAKPOINT;
794 int i;
8aa13b87 795
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796 /* With a little bit of luck, we can just stash the breakpoint instruction
797 in the word just beyond the end of normal text space. For systems on
798 which the hardware will not allow us to execute out of the stack segment,
799 we have to hope that we *are* at least allowed to effectively extend the
800 text segment by one word. If the actual end of user's the text segment
801 happens to fall right at a page boundary this trick may fail. Note that
802 we check for this by reading after writing, and comparing in order to
803 be sure that the write worked. */
8aa13b87 804
ea3c0839 805 write_memory (text_end, &breakpoint_insn, 4);
8aa13b87 806
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807 /* Fill the readback buffer with some garbage which is certain to be
808 unequal to the breakpoint insn. That way we can tell if the
809 following read doesn't actually succeed. */
8aa13b87 810
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811 for (i = 0; i < sizeof (readback_buffer); i++)
812 readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
813
814 /* Now check that the breakpoint insn was successfully installed. */
8aa13b87 815
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816 read_memory (text_end, readback_buffer, sizeof (readback_buffer));
817 for (i = 0; i < sizeof (readback_buffer); i++)
818 if (readback_buffer[i] != breakpoint_insn[i])
819 return 0; /* Failed to install! */
820
821 return text_end;
8aa13b87 822}
ea3c0839 823#endif
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