2003-07-22 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
CommitLineData
96baa820 1/* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
51603483 2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
96baa820
JM
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "defs.h"
21#include "frame.h"
22#include "symtab.h"
23#include "value.h"
24#include "gdbcmd.h"
4e052eda 25#include "regcache.h"
58841d58
AC
26#include "symfile.h"
27#include "gdbcore.h"
28#include "inferior.h"
4e0d9804 29#include "arch-utils.h"
9bbe19fb 30#include "gdb_string.h"
92bf2b80 31#include "disasm.h"
96baa820 32
a78f21af
AC
33static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc,
34 int skip_prologue);
96baa820
JM
35static int get_insn (CORE_ADDR pc);
36
96baa820
JM
37#ifdef MCORE_DEBUG
38int mcore_debug = 0;
39#endif
40
96baa820 41
4cfe2084
GS
42/* All registers are 4 bytes long. */
43#define MCORE_REG_SIZE 4
44#define MCORE_NUM_REGS 65
96baa820 45
efdc1108
GS
46/* Some useful register numbers. */
47#define PR_REGNUM 15
48#define FIRST_ARGREG 2
49#define LAST_ARGREG 7
50#define RETVAL_REGNUM 2
51
4cfe2084 52
96baa820
JM
53/* Additional info that we use for managing frames */
54struct frame_extra_info
55 {
56 /* A generic status word */
57 int status;
58
59 /* Size of this frame */
60 int framesize;
61
62 /* The register that is acting as a frame pointer, if
63 it is being used. This is undefined if status
64 does not contain the flag MY_FRAME_IN_FP. */
65 int fp_regnum;
66 };
67
68/* frame_extra_info status flags */
69
70/* The base of the current frame is actually in the stack pointer.
71 This happens when there is no frame pointer (MCore ABI does not
72 require a frame pointer) or when we're stopped in the prologue or
73 epilogue itself. In these cases, mcore_analyze_prologue will need
74 to update fi->frame before returning or analyzing the register
75 save instructions. */
76#define MY_FRAME_IN_SP 0x1
77
78/* The base of the current frame is in a frame pointer register.
79 This register is noted in frame_extra_info->fp_regnum.
80
8e1a459b 81 Note that the existence of an FP might also indicate that the
96baa820
JM
82 function has called alloca. */
83#define MY_FRAME_IN_FP 0x2
84
85/* This flag is set to indicate that this frame is the top-most
86 frame. This tells frame chain not to bother trying to unwind
87 beyond this frame. */
88#define NO_MORE_FRAMES 0x4
89
90/* Instruction macros used for analyzing the prologue */
91#define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
92#define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
93#define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
94#define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
95#define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
96#define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
97#define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
98#define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
99#define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
100#define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
101#define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
102#define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
103#define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
104#define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
105#define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
106#define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
107#define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
108#define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
109#define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
110#define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
111
112#define IS_R1_ADJUSTER(x) \
113 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
114 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
115 || IS_IXH1(x) || IS_IXW1(x))
116\f
117
118#ifdef MCORE_DEBUG
119static void
120mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
121{
122 if (mcore_debug)
123 {
124 printf_filtered ("MCORE: %s %08x %08x ",
125 commnt, (unsigned int) pc, (unsigned int) insn);
92bf2b80 126 gdb_print_insn (pc, gdb_stdout);
96baa820
JM
127 printf_filtered ("\n");
128 }
129}
130#define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
131#else /* !MCORE_DEBUG */
132#define mcore_dump_insn(a,b,c) {}
133#define mcore_insn_debug(args) {}
134#endif
135
4cfe2084
GS
136
137static struct type *
138mcore_register_virtual_type (int regnum)
139{
140 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
141 internal_error (__FILE__, __LINE__,
142 "mcore_register_virtual_type: illegal register number %d",
143 regnum);
144 else
145 return builtin_type_int;
146}
147
148static int
149mcore_register_byte (int regnum)
150{
151 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
152 internal_error (__FILE__, __LINE__,
153 "mcore_register_byte: illegal register number %d",
154 regnum);
155 else
156 return (regnum * MCORE_REG_SIZE);
157}
158
159static int
160mcore_register_size (int regnum)
161{
162
163 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
164 internal_error (__FILE__, __LINE__,
165 "mcore_register_size: illegal register number %d",
166 regnum);
167 else
168 return MCORE_REG_SIZE;
169}
170
171/* The registers of the Motorola MCore processors */
172
173static const char *
174mcore_register_name (int regnum)
175{
176
177 static char *register_names[] = {
178 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
180 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
181 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
182 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
183 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
184 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
185 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
186 "pc"
187 };
188
189 if (regnum < 0 ||
190 regnum >= sizeof (register_names) / sizeof (register_names[0]))
191 internal_error (__FILE__, __LINE__,
192 "mcore_register_name: illegal register number %d",
193 regnum);
194 else
195 return register_names[regnum];
196}
197
96baa820
JM
198/* Given the address at which to insert a breakpoint (BP_ADDR),
199 what will that breakpoint be?
200
201 For MCore, we have a breakpoint instruction. Since all MCore
202 instructions are 16 bits, this is all we need, regardless of
203 address. bpkt = 0x0000 */
204
e14e6e9c 205static const unsigned char *
96baa820
JM
206mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
207{
208 static char breakpoint[] =
209 {0x00, 0x00};
210 *bp_size = 2;
211 return breakpoint;
212}
213
4e0d9804
GS
214static CORE_ADDR
215mcore_saved_pc_after_call (struct frame_info *frame)
216{
217 return read_register (PR_REGNUM);
218}
219
220/* This is currently handled by init_extra_frame_info. */
221static void
222mcore_frame_init_saved_regs (struct frame_info *frame)
223{
224
225}
226
227/* This is currently handled by mcore_push_arguments */
228static void
229mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
230{
231
232}
233
efdc1108
GS
234static int
235mcore_reg_struct_has_addr (int gcc_p, struct type *type)
236{
237 return 0;
238}
239
240
96baa820
JM
241/* Helper function for several routines below. This funtion simply
242 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
243 we can analyze with mcore_analyze_prologue. */
244
245static struct frame_info *
246analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
247{
248 static struct frame_info *dummy = NULL;
249
250 if (dummy == NULL)
251 {
a00a19e9 252 struct frame_extra_info *extra_info;
7b5849cc 253 CORE_ADDR *saved_regs;
f6c609c4 254 dummy = deprecated_frame_xmalloc ();
7b5849cc
AC
255 saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
256 deprecated_set_frame_saved_regs_hack (dummy, saved_regs);
a00a19e9
AC
257 extra_info = XMALLOC (struct frame_extra_info);
258 deprecated_set_frame_extra_info_hack (dummy, extra_info);
96baa820
JM
259 }
260
483d36b2
AC
261 deprecated_set_frame_next_hack (dummy, NULL);
262 deprecated_set_frame_prev_hack (dummy, NULL);
50abf9e5 263 deprecated_update_frame_pc_hack (dummy, pc);
8ccd593b 264 deprecated_update_frame_base_hack (dummy, frame);
da50a4b7
AC
265 get_frame_extra_info (dummy)->status = 0;
266 get_frame_extra_info (dummy)->framesize = 0;
b2fb4676 267 memset (get_frame_saved_regs (dummy), '\000', SIZEOF_FRAME_SAVED_REGS);
96baa820
JM
268 mcore_analyze_prologue (dummy, 0, 0);
269 return dummy;
270}
271
0fb34c3a 272/* Function prologues on the Motorola MCore processors consist of:
96baa820
JM
273
274 - adjustments to the stack pointer (r1 used as scratch register)
275 - store word/multiples that use r0 as the base address
276 - making a copy of r0 into another register (a "frame" pointer)
277
278 Note that the MCore really doesn't have a real frame pointer.
279 Instead, the compiler may copy the SP into a register (usually
280 r8) to act as an arg pointer. For our target-dependent purposes,
281 the frame info's "frame" member will be the beginning of the
282 frame. The SP could, in fact, point below this.
283
284 The prologue ends when an instruction fails to meet either of
285 the first two criteria or when an FP is made. We make a special
286 exception for gcc. When compiling unoptimized code, gcc will
287 setup stack slots. We need to make sure that we skip the filling
288 of these stack slots as much as possible. This is only done
289 when SKIP_PROLOGUE is set, so that it does not mess up
290 backtraces. */
291
292/* Analyze the prologue of frame FI to determine where registers are saved,
293 the end of the prologue, etc. Return the address of the first line
294 of "real" code (i.e., the end of the prologue). */
295
296static CORE_ADDR
297mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
298{
299 CORE_ADDR func_addr, func_end, addr, stop;
300 CORE_ADDR stack_size;
301 int insn, rn;
93d56215
AC
302 int status;
303 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
304 int flags;
96baa820
JM
305 int framesize;
306 int register_offsets[NUM_REGS];
307 char *name;
308
309 /* If provided, use the PC in the frame to look up the
310 start of this function. */
50abf9e5 311 pc = (fi == NULL ? pc : get_frame_pc (fi));
96baa820
JM
312
313 /* Find the start of this function. */
314 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
315
316 /* If the start of this function could not be found or if the debbuger
317 is stopped at the first instruction of the prologue, do nothing. */
318 if (status == 0)
319 return pc;
320
321 /* If the debugger is entry function, give up. */
322 if (func_addr == entry_point_address ())
323 {
324 if (fi != NULL)
da50a4b7 325 get_frame_extra_info (fi)->status |= NO_MORE_FRAMES;
96baa820
JM
326 return pc;
327 }
328
329 /* At the start of a function, our frame is in the stack pointer. */
330 flags = MY_FRAME_IN_SP;
331
332 /* Start decoding the prologue. We start by checking two special cases:
333
334 1. We're about to return
335 2. We're at the first insn of the prologue.
336
337 If we're about to return, our frame has already been deallocated.
338 If we are stopped at the first instruction of a prologue,
339 then our frame has not yet been set up. */
340
341 /* Get the first insn from memory (all MCore instructions are 16 bits) */
342 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
343 insn = get_insn (pc);
344 mcore_dump_insn ("got 1: ", pc, insn);
345
346 /* Check for return. */
347 if (fi != NULL && IS_RTS (insn))
348 {
349 mcore_insn_debug (("MCORE: got jmp r15"));
11c02a10 350 if (get_next_frame (fi) == NULL)
8ccd593b 351 deprecated_update_frame_base_hack (fi, read_sp ());
50abf9e5 352 return get_frame_pc (fi);
96baa820
JM
353 }
354
355 /* Check for first insn of prologue */
50abf9e5 356 if (fi != NULL && get_frame_pc (fi) == func_addr)
96baa820 357 {
11c02a10 358 if (get_next_frame (fi) == NULL)
8ccd593b 359 deprecated_update_frame_base_hack (fi, read_sp ());
50abf9e5 360 return get_frame_pc (fi);
96baa820
JM
361 }
362
363 /* Figure out where to stop scanning */
50abf9e5 364 stop = (fi ? get_frame_pc (fi) : func_end);
96baa820
JM
365
366 /* Don't walk off the end of the function */
367 stop = (stop > func_end ? func_end : stop);
368
369 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
370 (NOT the frame pointer), for the various saved registers or -1
371 if the register is not saved. */
372 for (rn = 0; rn < NUM_REGS; rn++)
373 register_offsets[rn] = -1;
374
375 /* Analyze the prologue. Things we determine from analyzing the
376 prologue include:
377 * the size of the frame
378 * where saved registers are located (and which are saved)
379 * FP used? */
380 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
381 (unsigned int) func_addr, (unsigned int) stop));
382
383 framesize = 0;
384 for (addr = func_addr; addr < stop; addr += 2)
385 {
386 /* Get next insn */
387 insn = get_insn (addr);
388 mcore_dump_insn ("got 2: ", addr, insn);
389
390 if (IS_SUBI0 (insn))
391 {
392 int offset = 1 + ((insn >> 4) & 0x1f);
8e1a459b 393 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
96baa820
JM
394 framesize += offset;
395 continue;
396 }
397 else if (IS_STM (insn))
398 {
399 /* Spill register(s) */
400 int offset;
401 int start_register;
402
403 /* BIG WARNING! The MCore ABI does not restrict functions
404 to taking only one stack allocation. Therefore, when
405 we save a register, we record the offset of where it was
406 saved relative to the current framesize. This will
407 then give an offset from the SP upon entry to our
408 function. Remember, framesize is NOT constant until
409 we're done scanning the prologue. */
410 start_register = (insn & 0xf);
411 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
412
413 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
414 {
415 register_offsets[rn] = framesize - offset;
416 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
417 register_offsets[rn], offset));
418 }
419 mcore_insn_debug (("MCORE: continuing\n"));
420 continue;
421 }
422 else if (IS_STWx0 (insn))
423 {
424 /* Spill register: see note for IS_STM above. */
425 int imm;
426
427 rn = (insn >> 8) & 0xf;
428 imm = (insn >> 4) & 0xf;
429 register_offsets[rn] = framesize - (imm << 2);
430 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
431 mcore_insn_debug (("MCORE: continuing\n"));
432 continue;
433 }
434 else if (IS_MOVx0 (insn))
435 {
436 /* We have a frame pointer, so this prologue is over. Note
437 the register which is acting as the frame pointer. */
438 flags |= MY_FRAME_IN_FP;
439 flags &= ~MY_FRAME_IN_SP;
440 fp_regnum = insn & 0xf;
441 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
442
443 /* If we found an FP, we're at the end of the prologue. */
444 mcore_insn_debug (("MCORE: end of prologue\n"));
445 if (skip_prologue)
446 continue;
447
448 /* If we're decoding prologue, stop here. */
449 addr += 2;
450 break;
451 }
452 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
453 {
454 /* Special case. Skip over stack slot allocs, too. */
455 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
456 continue;
457 }
458 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
459 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
460 {
461 int adjust = 0;
462 int offset = 0;
463 int insn2;
464
465 mcore_insn_debug (("MCORE: looking at large frame\n"));
466 if (IS_LRW1 (insn))
467 {
468 adjust =
469 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
470 }
471 else if (IS_MOVI1 (insn))
472 adjust = (insn >> 4) & 0x7f;
473 else if (IS_BGENI1 (insn))
474 adjust = 1 << ((insn >> 4) & 0x1f);
475 else /* IS_BMASKI (insn) */
476 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
477
478 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
479
480 /* May have zero or more insns which modify r1 */
481 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
482 offset = 2;
483 insn2 = get_insn (addr + offset);
484 while (IS_R1_ADJUSTER (insn2))
485 {
486 int imm;
487
488 imm = (insn2 >> 4) & 0x1f;
489 mcore_dump_insn ("got 3: ", addr + offset, insn);
490 if (IS_ADDI1 (insn2))
491 {
492 adjust += (imm + 1);
493 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
494 }
495 else if (IS_SUBI1 (insn2))
496 {
497 adjust -= (imm + 1);
498 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
499 }
500 else if (IS_RSUBI1 (insn2))
501 {
502 adjust = imm - adjust;
503 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
504 }
505 else if (IS_NOT1 (insn2))
506 {
507 adjust = ~adjust;
508 mcore_insn_debug (("MCORE: not r1\n"));
509 }
510 else if (IS_ROTLI1 (insn2))
511 {
512 adjust <<= imm;
513 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
514 }
515 else if (IS_BSETI1 (insn2))
516 {
517 adjust |= (1 << imm);
518 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
519 }
520 else if (IS_BCLRI1 (insn2))
521 {
522 adjust &= ~(1 << imm);
523 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
524 }
525 else if (IS_IXH1 (insn2))
526 {
527 adjust *= 3;
528 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
529 }
530 else if (IS_IXW1 (insn2))
531 {
532 adjust *= 5;
533 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
534 }
535
536 offset += 2;
537 insn2 = get_insn (addr + offset);
538 };
539
540 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
541
542 /* If the next insn adjusts the stack pointer, we keep everything;
543 if not, we scrap it and we've found the end of the prologue. */
544 if (IS_SUB01 (insn2))
545 {
546 addr += offset;
547 framesize += adjust;
548 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
549 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
550 mcore_insn_debug (("MCORE: continuing\n"));
551 continue;
552 }
553
554 /* None of these instructions are prologue, so don't touch
555 anything. */
556 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
557 break;
558 }
559
560 /* This is not a prologue insn, so stop here. */
561 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
562 break;
563 }
564
565 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
566 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
567
568 /* Save everything we have learned about this frame into FI. */
569 if (fi != NULL)
570 {
da50a4b7
AC
571 get_frame_extra_info (fi)->framesize = framesize;
572 get_frame_extra_info (fi)->fp_regnum = fp_regnum;
573 get_frame_extra_info (fi)->status = flags;
96baa820
JM
574
575 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
576 it is really an arg ptr. We adjust fi->frame to be a "real"
577 frame pointer. */
11c02a10 578 if (get_next_frame (fi) == NULL)
96baa820 579 {
da50a4b7 580 if (get_frame_extra_info (fi)->status & MY_FRAME_IN_SP)
8ccd593b 581 deprecated_update_frame_base_hack (fi, read_sp () + framesize);
96baa820 582 else
8ccd593b 583 deprecated_update_frame_base_hack (fi, read_register (fp_regnum) + framesize);
96baa820
JM
584 }
585
586 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
587 are computed relative to the top of the frame. */
588 for (rn = 0; rn < NUM_REGS; rn++)
589 {
590 if (register_offsets[rn] >= 0)
591 {
1e2330ba 592 get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - register_offsets[rn];
96baa820
JM
593 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
594 mcore_register_names[rn], fi->saved_regs[rn],
595 read_memory_integer (fi->saved_regs[rn], 4)));
596 }
597 }
598 }
599
600 /* Return addr of first non-prologue insn. */
601 return addr;
602}
603
a5afb99f
AC
604/* Given a GDB frame, determine the address of the calling function's
605 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
606 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
607 will be called for the new frame. */
96baa820 608
e14e6e9c 609static CORE_ADDR
96baa820
JM
610mcore_frame_chain (struct frame_info * fi)
611{
612 struct frame_info *dummy;
613 CORE_ADDR callers_addr;
614
615 /* Analyze the prologue of this function. */
da50a4b7 616 if (get_frame_extra_info (fi)->status == 0)
96baa820
JM
617 mcore_analyze_prologue (fi, 0, 0);
618
619 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
da50a4b7 620 if (get_frame_extra_info (fi)->status & NO_MORE_FRAMES)
96baa820
JM
621 return 0;
622
623 /* Now that we've analyzed our prologue, we can start to ask
624 for information about our caller. The easiest way to do
625 this is to analyze our caller's prologue.
626
627 If our caller has a frame pointer, then we need to find
628 the value of that register upon entry to our frame.
629 This value is either in fi->saved_regs[rn] if it's saved,
630 or it's still in a register.
631
632 If our caller does not have a frame pointer, then his frame base
633 is <our base> + -<caller's frame size>. */
8bedc050 634 dummy = analyze_dummy_frame (DEPRECATED_FRAME_SAVED_PC (fi), get_frame_base (fi));
96baa820 635
da50a4b7 636 if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_FP)
96baa820 637 {
da50a4b7 638 int fp = get_frame_extra_info (dummy)->fp_regnum;
96baa820
JM
639
640 /* Our caller has a frame pointer. */
b2fb4676 641 if (get_frame_saved_regs (fi)[fp] != 0)
96baa820
JM
642 {
643 /* The "FP" was saved on the stack. Don't forget to adjust
644 the "FP" with the framesize to get a real FP. */
b1e29e33
AC
645 callers_addr = read_memory_integer (get_frame_saved_regs (fi)[fp],
646 DEPRECATED_REGISTER_SIZE)
da50a4b7 647 + get_frame_extra_info (dummy)->framesize;
96baa820
JM
648 }
649 else
650 {
651 /* It's still in the register. Don't forget to adjust
652 the "FP" with the framesize to get a real FP. */
da50a4b7 653 callers_addr = read_register (fp) + get_frame_extra_info (dummy)->framesize;
96baa820
JM
654 }
655 }
656 else
657 {
658 /* Our caller does not have a frame pointer. */
da50a4b7 659 callers_addr = get_frame_base (fi) + get_frame_extra_info (dummy)->framesize;
96baa820
JM
660 }
661
662 return callers_addr;
663}
664
665/* Skip the prologue of the function at PC. */
666
e14e6e9c 667static CORE_ADDR
96baa820
JM
668mcore_skip_prologue (CORE_ADDR pc)
669{
670 CORE_ADDR func_addr, func_end;
671 struct symtab_and_line sal;
672
673 /* If we have line debugging information, then the end of the
7e73cedf 674 prologue should be the first assembly instruction of the first
96baa820
JM
675 source line */
676 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
677 {
678 sal = find_pc_line (func_addr, 0);
679 if (sal.end && sal.end < func_end)
680 return sal.end;
681 }
682
683 return mcore_analyze_prologue (NULL, pc, 1);
684}
685
686/* Return the address at which function arguments are offset. */
e14e6e9c 687static CORE_ADDR
96baa820
JM
688mcore_frame_args_address (struct frame_info * fi)
689{
da50a4b7 690 return get_frame_base (fi) - get_frame_extra_info (fi)->framesize;
96baa820
JM
691}
692
e14e6e9c 693static CORE_ADDR
96baa820
JM
694mcore_frame_locals_address (struct frame_info * fi)
695{
da50a4b7 696 return get_frame_base (fi) - get_frame_extra_info (fi)->framesize;
96baa820
JM
697}
698
699/* Return the frame pointer in use at address PC. */
700
a78f21af 701static void
e0441cf0 702mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset)
96baa820
JM
703{
704 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
da50a4b7 705 if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_SP)
96baa820
JM
706 {
707 *reg = SP_REGNUM;
708 *offset = 0;
709 }
710 else
711 {
da50a4b7 712 *reg = get_frame_extra_info (dummy)->fp_regnum;
96baa820
JM
713 *offset = 0;
714 }
715}
716
717/* Find the value of register REGNUM in frame FI. */
718
e14e6e9c 719static CORE_ADDR
96baa820
JM
720mcore_find_callers_reg (struct frame_info *fi, int regnum)
721{
11c02a10 722 for (; fi != NULL; fi = get_next_frame (fi))
96baa820 723 {
1e2330ba
AC
724 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
725 get_frame_base (fi)))
726 return deprecated_read_register_dummy (get_frame_pc (fi),
727 get_frame_base (fi), regnum);
b2fb4676
AC
728 else if (get_frame_saved_regs (fi)[regnum] != 0)
729 return read_memory_integer (get_frame_saved_regs (fi)[regnum],
b1e29e33 730 DEPRECATED_REGISTER_SIZE);
96baa820
JM
731 }
732
733 return read_register (regnum);
734}
735
736/* Find the saved pc in frame FI. */
737
e14e6e9c 738static CORE_ADDR
96baa820
JM
739mcore_frame_saved_pc (struct frame_info * fi)
740{
741
1e2330ba
AC
742 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
743 get_frame_base (fi)))
744 return deprecated_read_register_dummy (get_frame_pc (fi),
745 get_frame_base (fi), PC_REGNUM);
96baa820
JM
746 else
747 return mcore_find_callers_reg (fi, PR_REGNUM);
748}
749\f
750/* INFERIOR FUNCTION CALLS */
751
752/* This routine gets called when either the user uses the "return"
753 command, or the call dummy breakpoint gets hit. */
754
a78f21af 755static void
5ae5f592 756mcore_pop_frame (void)
96baa820
JM
757{
758 int rn;
4e0d9804 759 struct frame_info *fi = get_current_frame ();
96baa820 760
1e2330ba
AC
761 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
762 get_frame_base (fi)))
96baa820
JM
763 generic_pop_dummy_frame ();
764 else
765 {
766 /* Write out the PC we saved. */
8bedc050 767 write_register (PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (fi));
96baa820
JM
768
769 /* Restore any saved registers. */
770 for (rn = 0; rn < NUM_REGS; rn++)
771 {
b2fb4676 772 if (get_frame_saved_regs (fi)[rn] != 0)
96baa820
JM
773 {
774 ULONGEST value;
775
b2fb4676 776 value = read_memory_unsigned_integer (get_frame_saved_regs (fi)[rn],
b1e29e33 777 DEPRECATED_REGISTER_SIZE);
96baa820
JM
778 write_register (rn, value);
779 }
780 }
781
782 /* Actually cut back the stack. */
c193f6ac 783 write_register (SP_REGNUM, get_frame_base (fi));
96baa820
JM
784 }
785
786 /* Finally, throw away any cached frame information. */
787 flush_cached_frames ();
788}
789
790/* Setup arguments and PR for a call to the target. First six arguments
791 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
792
b1e29e33
AC
793 - Types with lengths greater than DEPRECATED_REGISTER_SIZE may not
794 be split between registers and the stack, and they must start in an
795 even-numbered register. Subsequent args will go onto the stack.
96baa820
JM
796
797 * Structs may be split between registers and stack, left-aligned.
798
799 * If the function returns a struct which will not fit into registers (it's
800 more than eight bytes), we must allocate for that, too. Gdb will tell
801 us where this buffer is (STRUCT_ADDR), and we simply place it into
802 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
803 bytes) as hidden first arguments. */
804
e14e6e9c 805static CORE_ADDR
ea7c478f 806mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
4e0d9804 807 int struct_return, CORE_ADDR struct_addr)
96baa820
JM
808{
809 int argreg;
810 int argnum;
811 struct stack_arg
812 {
813 int len;
814 char *val;
815 }
816 *stack_args;
817 int nstack_args = 0;
818
819 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
820
821 argreg = FIRST_ARGREG;
822
823 /* Align the stack. This is mostly a nop, but not always. It will be needed
824 if we call a function which has argument overflow. */
825 sp &= ~3;
826
827 /* If this function returns a struct which does not fit in the
828 return registers, we must pass a buffer to the function
829 which it can use to save the return value. */
830 if (struct_return)
831 write_register (argreg++, struct_addr);
832
833 /* FIXME: what about unions? */
834 for (argnum = 0; argnum < nargs; argnum++)
835 {
836 char *val = (char *) VALUE_CONTENTS (args[argnum]);
837 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
838 struct type *type = VALUE_TYPE (args[argnum]);
839 int olen;
840
841 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
842 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
843 /* Arguments larger than a register must start in an even
844 numbered register. */
845 olen = len;
846
b1e29e33 847 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > DEPRECATED_REGISTER_SIZE && argreg % 2)
96baa820 848 {
b1e29e33 849 mcore_insn_debug (("MCORE PUSH: %d > DEPRECATED_REGISTER_SIZE: and %s is not even\n",
96baa820
JM
850 len, mcore_register_names[argreg]));
851 argreg++;
852 }
853
b1e29e33 854 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * DEPRECATED_REGISTER_SIZE)
96baa820
JM
855 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
856 {
857 /* Something that will fit entirely into registers (or a struct
858 which may be split between registers and stack). */
859 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
860
b1e29e33 861 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < DEPRECATED_REGISTER_SIZE)
96baa820
JM
862 {
863 /* Small structs must be right aligned within the register,
864 the most significant bits are undefined. */
865 write_register (argreg, extract_unsigned_integer (val, len));
866 argreg++;
867 len = 0;
868 }
869
870 while (len > 0 && argreg <= LAST_ARGREG)
871 {
b1e29e33 872 write_register (argreg, extract_unsigned_integer (val, DEPRECATED_REGISTER_SIZE));
96baa820 873 argreg++;
b1e29e33
AC
874 val += DEPRECATED_REGISTER_SIZE;
875 len -= DEPRECATED_REGISTER_SIZE;
96baa820
JM
876 }
877
878 /* Any remainder for the stack is noted below... */
879 }
880 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
b1e29e33 881 && len > DEPRECATED_REGISTER_SIZE)
96baa820
JM
882 {
883 /* All subsequent args go onto the stack. */
884 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
885 argnum = LAST_ARGREG + 1;
886 }
887
888 if (len > 0)
889 {
890 /* Note that this must be saved onto the stack */
891 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
892 stack_args[nstack_args].val = val;
893 stack_args[nstack_args].len = len;
894 nstack_args++;
895 }
896
897 }
898
899 /* We're done with registers and stack allocation. Now do the actual
900 stack pushes. */
901 while (nstack_args--)
902 {
903 sp -= stack_args[nstack_args].len;
904 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
905 }
906
907 /* Return adjusted stack pointer. */
908 return sp;
909}
910
911/* Store the return address for the call dummy. For MCore, we've
912 opted to use generic call dummies, so we simply store the
913 CALL_DUMMY_ADDRESS into the PR register (r15). */
914
e14e6e9c 915static CORE_ADDR
96baa820
JM
916mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
917{
918 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
919 return sp;
920}
921
922/* Setting/getting return values from functions.
923
924 The Motorola MCore processors use r2/r3 to return anything
925 not larger than 32 bits. Everything else goes into a caller-
926 supplied buffer, which is passed in via a hidden first
927 argument.
928
929 For gdb, this leaves us two routes, based on what
930 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
931 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
932 EXTRACT_STRUCT_VALUE_ADDRESS.
933
934 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
935 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
936
937/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
938 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
939 and TYPE is the type (which is known to be struct, union or array). */
940
e14e6e9c 941static int
96baa820
JM
942mcore_use_struct_convention (int gcc_p, struct type *type)
943{
944 return (TYPE_LENGTH (type) > 8);
945}
946
947/* Where is the return value saved? For MCore, a pointer to
948 this buffer was passed as a hidden first argument, so
949 just return that address. */
950
e14e6e9c 951static CORE_ADDR
96baa820
JM
952mcore_extract_struct_value_address (char *regbuf)
953{
7c0b4a20 954 return extract_unsigned_integer (regbuf + REGISTER_BYTE (FIRST_ARGREG), DEPRECATED_REGISTER_SIZE);
96baa820
JM
955}
956
957/* Given a function which returns a value of type TYPE, extract the
958 the function's return value and place the result into VALBUF.
959 REGBUF is the register contents of the target. */
960
e14e6e9c 961static void
96baa820
JM
962mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
963{
964 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
965 /* Only getting the first byte! if len = 1, we need the last byte of
966 the register, not the first. */
967 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
968 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
969}
970
971/* Store the return value in VALBUF (of type TYPE) where the caller
972 expects to see it.
973
974 Values less than 32 bits are stored in r2, right justified and
975 sign or zero extended.
976
977 Values between 32 and 64 bits are stored in r2 (most
978 significant word) and r3 (least significant word, left justified).
979 Note that this includes structures of less than eight bytes, too. */
980
e14e6e9c 981static void
96baa820
JM
982mcore_store_return_value (struct type *type, char *valbuf)
983{
984 int value_size;
985 int return_size;
986 int offset;
987 char *zeros;
988
989 value_size = TYPE_LENGTH (type);
990
991 /* Return value fits into registers. */
b1e29e33 992 return_size = (value_size + DEPRECATED_REGISTER_SIZE - 1) & ~(DEPRECATED_REGISTER_SIZE - 1);
96baa820
JM
993 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
994 zeros = alloca (return_size);
995 memset (zeros, 0, return_size);
996
73937e03
AC
997 deprecated_write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros,
998 return_size);
999 deprecated_write_register_bytes (offset, valbuf, value_size);
96baa820
JM
1000}
1001
1002/* Initialize our target-dependent "stuff" for this newly created frame.
1003
1004 This includes allocating space for saved registers and analyzing
1005 the prologue of this frame. */
1006
e14e6e9c 1007static void
4e0d9804 1008mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi)
96baa820 1009{
11c02a10 1010 if (fi && get_next_frame (fi))
8bedc050 1011 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
96baa820
JM
1012
1013 frame_saved_regs_zalloc (fi);
1014
a00a19e9 1015 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
da50a4b7
AC
1016 get_frame_extra_info (fi)->status = 0;
1017 get_frame_extra_info (fi)->framesize = 0;
96baa820 1018
1e2330ba
AC
1019 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
1020 get_frame_base (fi)))
96baa820 1021 {
04714b91
AC
1022 /* We need to setup fi->frame here because call_function_by_hand
1023 gets it wrong by assuming it's always FP. */
1e2330ba 1024 deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM));
96baa820
JM
1025 }
1026 else
1027 mcore_analyze_prologue (fi, 0, 0);
1028}
1029
1030/* Get an insturction from memory. */
1031
1032static int
1033get_insn (CORE_ADDR pc)
1034{
1035 char buf[4];
1036 int status = read_memory_nobpt (pc, buf, 2);
1037 if (status != 0)
1038 return 0;
1039
1040 return extract_unsigned_integer (buf, 2);
1041}
1042
4cfe2084
GS
1043static struct gdbarch *
1044mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1045{
1046 static LONGEST call_dummy_words[7] = { };
1047 struct gdbarch_tdep *tdep = NULL;
1048 struct gdbarch *gdbarch;
1049
1050 /* find a candidate among the list of pre-declared architectures. */
1051 arches = gdbarch_list_lookup_by_info (arches, &info);
1052 if (arches != NULL)
1053 return (arches->gdbarch);
1054
1055 gdbarch = gdbarch_alloc (&info, 0);
1056
a5afb99f
AC
1057 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1058 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1059 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1060
4e0d9804
GS
1061 /* Registers: */
1062
4cfe2084 1063 /* All registers are 32 bits */
b1e29e33 1064 set_gdbarch_deprecated_register_size (gdbarch, MCORE_REG_SIZE);
a0ed5532
AC
1065 set_gdbarch_deprecated_max_register_raw_size (gdbarch, MCORE_REG_SIZE);
1066 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, MCORE_REG_SIZE);
4cfe2084 1067 set_gdbarch_register_name (gdbarch, mcore_register_name);
9c04cab7
AC
1068 set_gdbarch_deprecated_register_virtual_type (gdbarch, mcore_register_virtual_type);
1069 set_gdbarch_deprecated_register_virtual_size (gdbarch, mcore_register_size);
1070 set_gdbarch_deprecated_register_raw_size (gdbarch, mcore_register_size);
1071 set_gdbarch_deprecated_register_byte (gdbarch, mcore_register_byte);
b8b527c5 1072 set_gdbarch_deprecated_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS);
4e0d9804
GS
1073 set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS);
1074 set_gdbarch_pc_regnum (gdbarch, 64);
1075 set_gdbarch_sp_regnum (gdbarch, 0);
0ba6dca9 1076 set_gdbarch_deprecated_fp_regnum (gdbarch, 0);
4e0d9804
GS
1077
1078 /* Call Dummies: */
4cfe2084 1079
b1e29e33
AC
1080 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_words);
1081 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
a59fe496 1082 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
6913c89a 1083 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call);
4e0d9804
GS
1084 set_gdbarch_function_start_offset (gdbarch, 0);
1085 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1086 set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc);
28f617b3 1087 set_gdbarch_deprecated_push_return_address (gdbarch, mcore_push_return_address);
b81774d8 1088 set_gdbarch_deprecated_push_arguments (gdbarch, mcore_push_arguments);
4e0d9804
GS
1089
1090 /* Frames: */
1091
e9582e71 1092 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info);
618ce49f 1093 set_gdbarch_deprecated_frame_chain (gdbarch, mcore_frame_chain);
f30ee0bc 1094 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs);
8bedc050 1095 set_gdbarch_deprecated_frame_saved_pc (gdbarch, mcore_frame_saved_pc);
ebba8386 1096 set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value);
4e0d9804
GS
1097 set_gdbarch_deprecated_extract_return_value (gdbarch,
1098 mcore_extract_return_value);
4183d812 1099 set_gdbarch_deprecated_store_struct_return (gdbarch, mcore_store_struct_return);
4e0d9804
GS
1100 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
1101 mcore_extract_struct_value_address);
1102 set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue);
1103 set_gdbarch_frame_args_skip (gdbarch, 0);
42efa47a
AC
1104 set_gdbarch_deprecated_frame_args_address (gdbarch, mcore_frame_args_address);
1105 set_gdbarch_deprecated_frame_locals_address (gdbarch, mcore_frame_locals_address);
749b82f6 1106 set_gdbarch_deprecated_pop_frame (gdbarch, mcore_pop_frame);
efdc1108 1107 set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer);
4e0d9804
GS
1108
1109 /* Misc.: */
1110
1111 /* Stack grows down. */
1112 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
efdc1108
GS
1113 set_gdbarch_use_struct_convention (gdbarch, mcore_use_struct_convention);
1114 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1115 /* MCore will never pass a sturcture by reference. It will always be split
1116 between registers and stack. */
1117 set_gdbarch_reg_struct_has_addr (gdbarch, mcore_reg_struct_has_addr);
4cfe2084 1118
6c0e89ed 1119 /* Should be using push_dummy_call. */
b46e02f6 1120 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
6c0e89ed 1121
4cfe2084
GS
1122 return gdbarch;
1123}
1124
1125static void
1126mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1127{
1128
1129}
1130
a78f21af
AC
1131extern initialize_file_ftype _initialize_mcore_tdep; /* -Wmissing-prototypes */
1132
96baa820 1133void
fba45db2 1134_initialize_mcore_tdep (void)
96baa820
JM
1135{
1136 extern int print_insn_mcore (bfd_vma, disassemble_info *);
4cfe2084 1137 gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep);
d7a27068 1138 deprecated_tm_print_insn = print_insn_mcore;
96baa820
JM
1139
1140#ifdef MCORE_DEBUG
1141 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
1142 var_boolean, (char *) &mcore_debug,
1143 "Set mcore debugging.\n", &setlist),
1144 &showlist);
1145#endif
1146}
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