2001-09-05 Elena Zannoni <ezannoni@redhat.com>
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
CommitLineData
96baa820 1/* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
b6ba6518 2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
96baa820
JM
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "defs.h"
21#include "frame.h"
22#include "symtab.h"
23#include "value.h"
24#include "gdbcmd.h"
4e052eda 25#include "regcache.h"
58841d58
AC
26#include "symfile.h"
27#include "gdbcore.h"
28#include "inferior.h"
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29
30/* Functions declared and used only in this file */
31
32static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
33
34static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
35
36static int get_insn (CORE_ADDR pc);
37
38/* Functions exported from this file */
39
40int mcore_use_struct_convention (int gcc_p, struct type *type);
41
42void _initialize_mcore (void);
43
44void mcore_init_extra_frame_info (struct frame_info *fi);
45
46CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
47
48CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
49
50CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
51
52CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
53
54void mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset);
55
56CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
57
ea7c478f 58CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp,
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59 unsigned char struct_return, CORE_ADDR struct_addr);
60
61void mcore_pop_frame (struct frame_info *fi);
62
63CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
64
65CORE_ADDR mcore_frame_chain (struct frame_info *fi);
66
67unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
68
69int mcore_use_struct_convention (int gcc_p, struct type *type);
70
71void mcore_store_return_value (struct type *type, char *valbuf);
72
73CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
74
75void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
76
77#ifdef MCORE_DEBUG
78int mcore_debug = 0;
79#endif
80
81/* The registers of the Motorola MCore processors */
82/* *INDENT-OFF* */
83char *mcore_register_names[] =
84{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
85 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
86 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
87 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
88 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
89 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
90 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
91 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
92 "pc" };
93/* *INDENT-ON* */
94
95
96
97/* Additional info that we use for managing frames */
98struct frame_extra_info
99 {
100 /* A generic status word */
101 int status;
102
103 /* Size of this frame */
104 int framesize;
105
106 /* The register that is acting as a frame pointer, if
107 it is being used. This is undefined if status
108 does not contain the flag MY_FRAME_IN_FP. */
109 int fp_regnum;
110 };
111
112/* frame_extra_info status flags */
113
114/* The base of the current frame is actually in the stack pointer.
115 This happens when there is no frame pointer (MCore ABI does not
116 require a frame pointer) or when we're stopped in the prologue or
117 epilogue itself. In these cases, mcore_analyze_prologue will need
118 to update fi->frame before returning or analyzing the register
119 save instructions. */
120#define MY_FRAME_IN_SP 0x1
121
122/* The base of the current frame is in a frame pointer register.
123 This register is noted in frame_extra_info->fp_regnum.
124
8e1a459b 125 Note that the existence of an FP might also indicate that the
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JM
126 function has called alloca. */
127#define MY_FRAME_IN_FP 0x2
128
129/* This flag is set to indicate that this frame is the top-most
130 frame. This tells frame chain not to bother trying to unwind
131 beyond this frame. */
132#define NO_MORE_FRAMES 0x4
133
134/* Instruction macros used for analyzing the prologue */
135#define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
136#define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
137#define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
138#define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
139#define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
140#define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
141#define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
142#define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
143#define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
144#define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
145#define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
146#define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
147#define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
148#define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
149#define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
150#define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
151#define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
152#define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
153#define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
154#define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
155
156#define IS_R1_ADJUSTER(x) \
157 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
158 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
159 || IS_IXH1(x) || IS_IXW1(x))
160\f
161
162#ifdef MCORE_DEBUG
163static void
164mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
165{
166 if (mcore_debug)
167 {
168 printf_filtered ("MCORE: %s %08x %08x ",
169 commnt, (unsigned int) pc, (unsigned int) insn);
2bf0cb65 170 TARGET_PRINT_INSN (pc, &tm_print_insn_info);
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171 printf_filtered ("\n");
172 }
173}
174#define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
175#else /* !MCORE_DEBUG */
176#define mcore_dump_insn(a,b,c) {}
177#define mcore_insn_debug(args) {}
178#endif
179
180/* Given the address at which to insert a breakpoint (BP_ADDR),
181 what will that breakpoint be?
182
183 For MCore, we have a breakpoint instruction. Since all MCore
184 instructions are 16 bits, this is all we need, regardless of
185 address. bpkt = 0x0000 */
186
187unsigned char *
188mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
189{
190 static char breakpoint[] =
191 {0x00, 0x00};
192 *bp_size = 2;
193 return breakpoint;
194}
195
196/* Helper function for several routines below. This funtion simply
197 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
198 we can analyze with mcore_analyze_prologue. */
199
200static struct frame_info *
201analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
202{
203 static struct frame_info *dummy = NULL;
204
205 if (dummy == NULL)
206 {
207 dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info));
208 dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
209 dummy->extra_info =
210 (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info));
211 }
212
213 dummy->next = NULL;
214 dummy->prev = NULL;
215 dummy->pc = pc;
216 dummy->frame = frame;
217 dummy->extra_info->status = 0;
218 dummy->extra_info->framesize = 0;
219 memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS);
220 mcore_analyze_prologue (dummy, 0, 0);
221 return dummy;
222}
223
0fb34c3a 224/* Function prologues on the Motorola MCore processors consist of:
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225
226 - adjustments to the stack pointer (r1 used as scratch register)
227 - store word/multiples that use r0 as the base address
228 - making a copy of r0 into another register (a "frame" pointer)
229
230 Note that the MCore really doesn't have a real frame pointer.
231 Instead, the compiler may copy the SP into a register (usually
232 r8) to act as an arg pointer. For our target-dependent purposes,
233 the frame info's "frame" member will be the beginning of the
234 frame. The SP could, in fact, point below this.
235
236 The prologue ends when an instruction fails to meet either of
237 the first two criteria or when an FP is made. We make a special
238 exception for gcc. When compiling unoptimized code, gcc will
239 setup stack slots. We need to make sure that we skip the filling
240 of these stack slots as much as possible. This is only done
241 when SKIP_PROLOGUE is set, so that it does not mess up
242 backtraces. */
243
244/* Analyze the prologue of frame FI to determine where registers are saved,
245 the end of the prologue, etc. Return the address of the first line
246 of "real" code (i.e., the end of the prologue). */
247
248static CORE_ADDR
249mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
250{
251 CORE_ADDR func_addr, func_end, addr, stop;
252 CORE_ADDR stack_size;
253 int insn, rn;
93d56215
AC
254 int status;
255 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
256 int flags;
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257 int framesize;
258 int register_offsets[NUM_REGS];
259 char *name;
260
261 /* If provided, use the PC in the frame to look up the
262 start of this function. */
263 pc = (fi == NULL ? pc : fi->pc);
264
265 /* Find the start of this function. */
266 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
267
268 /* If the start of this function could not be found or if the debbuger
269 is stopped at the first instruction of the prologue, do nothing. */
270 if (status == 0)
271 return pc;
272
273 /* If the debugger is entry function, give up. */
274 if (func_addr == entry_point_address ())
275 {
276 if (fi != NULL)
277 fi->extra_info->status |= NO_MORE_FRAMES;
278 return pc;
279 }
280
281 /* At the start of a function, our frame is in the stack pointer. */
282 flags = MY_FRAME_IN_SP;
283
284 /* Start decoding the prologue. We start by checking two special cases:
285
286 1. We're about to return
287 2. We're at the first insn of the prologue.
288
289 If we're about to return, our frame has already been deallocated.
290 If we are stopped at the first instruction of a prologue,
291 then our frame has not yet been set up. */
292
293 /* Get the first insn from memory (all MCore instructions are 16 bits) */
294 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
295 insn = get_insn (pc);
296 mcore_dump_insn ("got 1: ", pc, insn);
297
298 /* Check for return. */
299 if (fi != NULL && IS_RTS (insn))
300 {
301 mcore_insn_debug (("MCORE: got jmp r15"));
302 if (fi->next == NULL)
303 fi->frame = read_sp ();
304 return fi->pc;
305 }
306
307 /* Check for first insn of prologue */
308 if (fi != NULL && fi->pc == func_addr)
309 {
310 if (fi->next == NULL)
311 fi->frame = read_sp ();
312 return fi->pc;
313 }
314
315 /* Figure out where to stop scanning */
316 stop = (fi ? fi->pc : func_end);
317
318 /* Don't walk off the end of the function */
319 stop = (stop > func_end ? func_end : stop);
320
321 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
322 (NOT the frame pointer), for the various saved registers or -1
323 if the register is not saved. */
324 for (rn = 0; rn < NUM_REGS; rn++)
325 register_offsets[rn] = -1;
326
327 /* Analyze the prologue. Things we determine from analyzing the
328 prologue include:
329 * the size of the frame
330 * where saved registers are located (and which are saved)
331 * FP used? */
332 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
333 (unsigned int) func_addr, (unsigned int) stop));
334
335 framesize = 0;
336 for (addr = func_addr; addr < stop; addr += 2)
337 {
338 /* Get next insn */
339 insn = get_insn (addr);
340 mcore_dump_insn ("got 2: ", addr, insn);
341
342 if (IS_SUBI0 (insn))
343 {
344 int offset = 1 + ((insn >> 4) & 0x1f);
8e1a459b 345 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
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JM
346 framesize += offset;
347 continue;
348 }
349 else if (IS_STM (insn))
350 {
351 /* Spill register(s) */
352 int offset;
353 int start_register;
354
355 /* BIG WARNING! The MCore ABI does not restrict functions
356 to taking only one stack allocation. Therefore, when
357 we save a register, we record the offset of where it was
358 saved relative to the current framesize. This will
359 then give an offset from the SP upon entry to our
360 function. Remember, framesize is NOT constant until
361 we're done scanning the prologue. */
362 start_register = (insn & 0xf);
363 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
364
365 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
366 {
367 register_offsets[rn] = framesize - offset;
368 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
369 register_offsets[rn], offset));
370 }
371 mcore_insn_debug (("MCORE: continuing\n"));
372 continue;
373 }
374 else if (IS_STWx0 (insn))
375 {
376 /* Spill register: see note for IS_STM above. */
377 int imm;
378
379 rn = (insn >> 8) & 0xf;
380 imm = (insn >> 4) & 0xf;
381 register_offsets[rn] = framesize - (imm << 2);
382 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
383 mcore_insn_debug (("MCORE: continuing\n"));
384 continue;
385 }
386 else if (IS_MOVx0 (insn))
387 {
388 /* We have a frame pointer, so this prologue is over. Note
389 the register which is acting as the frame pointer. */
390 flags |= MY_FRAME_IN_FP;
391 flags &= ~MY_FRAME_IN_SP;
392 fp_regnum = insn & 0xf;
393 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
394
395 /* If we found an FP, we're at the end of the prologue. */
396 mcore_insn_debug (("MCORE: end of prologue\n"));
397 if (skip_prologue)
398 continue;
399
400 /* If we're decoding prologue, stop here. */
401 addr += 2;
402 break;
403 }
404 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
405 {
406 /* Special case. Skip over stack slot allocs, too. */
407 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
408 continue;
409 }
410 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
411 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
412 {
413 int adjust = 0;
414 int offset = 0;
415 int insn2;
416
417 mcore_insn_debug (("MCORE: looking at large frame\n"));
418 if (IS_LRW1 (insn))
419 {
420 adjust =
421 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
422 }
423 else if (IS_MOVI1 (insn))
424 adjust = (insn >> 4) & 0x7f;
425 else if (IS_BGENI1 (insn))
426 adjust = 1 << ((insn >> 4) & 0x1f);
427 else /* IS_BMASKI (insn) */
428 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
429
430 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
431
432 /* May have zero or more insns which modify r1 */
433 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
434 offset = 2;
435 insn2 = get_insn (addr + offset);
436 while (IS_R1_ADJUSTER (insn2))
437 {
438 int imm;
439
440 imm = (insn2 >> 4) & 0x1f;
441 mcore_dump_insn ("got 3: ", addr + offset, insn);
442 if (IS_ADDI1 (insn2))
443 {
444 adjust += (imm + 1);
445 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
446 }
447 else if (IS_SUBI1 (insn2))
448 {
449 adjust -= (imm + 1);
450 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
451 }
452 else if (IS_RSUBI1 (insn2))
453 {
454 adjust = imm - adjust;
455 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
456 }
457 else if (IS_NOT1 (insn2))
458 {
459 adjust = ~adjust;
460 mcore_insn_debug (("MCORE: not r1\n"));
461 }
462 else if (IS_ROTLI1 (insn2))
463 {
464 adjust <<= imm;
465 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
466 }
467 else if (IS_BSETI1 (insn2))
468 {
469 adjust |= (1 << imm);
470 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
471 }
472 else if (IS_BCLRI1 (insn2))
473 {
474 adjust &= ~(1 << imm);
475 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
476 }
477 else if (IS_IXH1 (insn2))
478 {
479 adjust *= 3;
480 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
481 }
482 else if (IS_IXW1 (insn2))
483 {
484 adjust *= 5;
485 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
486 }
487
488 offset += 2;
489 insn2 = get_insn (addr + offset);
490 };
491
492 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
493
494 /* If the next insn adjusts the stack pointer, we keep everything;
495 if not, we scrap it and we've found the end of the prologue. */
496 if (IS_SUB01 (insn2))
497 {
498 addr += offset;
499 framesize += adjust;
500 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
501 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
502 mcore_insn_debug (("MCORE: continuing\n"));
503 continue;
504 }
505
506 /* None of these instructions are prologue, so don't touch
507 anything. */
508 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
509 break;
510 }
511
512 /* This is not a prologue insn, so stop here. */
513 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
514 break;
515 }
516
517 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
518 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
519
520 /* Save everything we have learned about this frame into FI. */
521 if (fi != NULL)
522 {
523 fi->extra_info->framesize = framesize;
524 fi->extra_info->fp_regnum = fp_regnum;
525 fi->extra_info->status = flags;
526
527 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
528 it is really an arg ptr. We adjust fi->frame to be a "real"
529 frame pointer. */
530 if (fi->next == NULL)
531 {
532 if (fi->extra_info->status & MY_FRAME_IN_SP)
533 fi->frame = read_sp () + framesize;
534 else
535 fi->frame = read_register (fp_regnum) + framesize;
536 }
537
538 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
539 are computed relative to the top of the frame. */
540 for (rn = 0; rn < NUM_REGS; rn++)
541 {
542 if (register_offsets[rn] >= 0)
543 {
544 fi->saved_regs[rn] = fi->frame - register_offsets[rn];
545 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
546 mcore_register_names[rn], fi->saved_regs[rn],
547 read_memory_integer (fi->saved_regs[rn], 4)));
548 }
549 }
550 }
551
552 /* Return addr of first non-prologue insn. */
553 return addr;
554}
555
556/* Given a GDB frame, determine the address of the calling function's frame.
557 This will be used to create a new GDB frame struct, and then
558 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
559
560CORE_ADDR
561mcore_frame_chain (struct frame_info * fi)
562{
563 struct frame_info *dummy;
564 CORE_ADDR callers_addr;
565
566 /* Analyze the prologue of this function. */
567 if (fi->extra_info->status == 0)
568 mcore_analyze_prologue (fi, 0, 0);
569
570 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
571 if (fi->extra_info->status & NO_MORE_FRAMES)
572 return 0;
573
574 /* Now that we've analyzed our prologue, we can start to ask
575 for information about our caller. The easiest way to do
576 this is to analyze our caller's prologue.
577
578 If our caller has a frame pointer, then we need to find
579 the value of that register upon entry to our frame.
580 This value is either in fi->saved_regs[rn] if it's saved,
581 or it's still in a register.
582
583 If our caller does not have a frame pointer, then his frame base
584 is <our base> + -<caller's frame size>. */
585 dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame);
586
587 if (dummy->extra_info->status & MY_FRAME_IN_FP)
588 {
589 int fp = dummy->extra_info->fp_regnum;
590
591 /* Our caller has a frame pointer. */
592 if (fi->saved_regs[fp] != 0)
593 {
594 /* The "FP" was saved on the stack. Don't forget to adjust
595 the "FP" with the framesize to get a real FP. */
596 callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE)
597 + dummy->extra_info->framesize;
598 }
599 else
600 {
601 /* It's still in the register. Don't forget to adjust
602 the "FP" with the framesize to get a real FP. */
603 callers_addr = read_register (fp) + dummy->extra_info->framesize;
604 }
605 }
606 else
607 {
608 /* Our caller does not have a frame pointer. */
609 callers_addr = fi->frame + dummy->extra_info->framesize;
610 }
611
612 return callers_addr;
613}
614
615/* Skip the prologue of the function at PC. */
616
617CORE_ADDR
618mcore_skip_prologue (CORE_ADDR pc)
619{
620 CORE_ADDR func_addr, func_end;
621 struct symtab_and_line sal;
622
623 /* If we have line debugging information, then the end of the
7e73cedf 624 prologue should be the first assembly instruction of the first
96baa820
JM
625 source line */
626 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
627 {
628 sal = find_pc_line (func_addr, 0);
629 if (sal.end && sal.end < func_end)
630 return sal.end;
631 }
632
633 return mcore_analyze_prologue (NULL, pc, 1);
634}
635
636/* Return the address at which function arguments are offset. */
637CORE_ADDR
638mcore_frame_args_address (struct frame_info * fi)
639{
640 return fi->frame - fi->extra_info->framesize;
641}
642
643CORE_ADDR
644mcore_frame_locals_address (struct frame_info * fi)
645{
646 return fi->frame - fi->extra_info->framesize;
647}
648
649/* Return the frame pointer in use at address PC. */
650
651void
652mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset)
653{
654 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
655 if (dummy->extra_info->status & MY_FRAME_IN_SP)
656 {
657 *reg = SP_REGNUM;
658 *offset = 0;
659 }
660 else
661 {
662 *reg = dummy->extra_info->fp_regnum;
663 *offset = 0;
664 }
665}
666
667/* Find the value of register REGNUM in frame FI. */
668
669CORE_ADDR
670mcore_find_callers_reg (struct frame_info *fi, int regnum)
671{
672 for (; fi != NULL; fi = fi->next)
673 {
674 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
675 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
676 else if (fi->saved_regs[regnum] != 0)
677 return read_memory_integer (fi->saved_regs[regnum],
678 REGISTER_SIZE);
679 }
680
681 return read_register (regnum);
682}
683
684/* Find the saved pc in frame FI. */
685
686CORE_ADDR
687mcore_frame_saved_pc (struct frame_info * fi)
688{
689
690 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
691 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
692 else
693 return mcore_find_callers_reg (fi, PR_REGNUM);
694}
695\f
696/* INFERIOR FUNCTION CALLS */
697
698/* This routine gets called when either the user uses the "return"
699 command, or the call dummy breakpoint gets hit. */
700
701void
702mcore_pop_frame (struct frame_info *fi)
703{
704 int rn;
705
706 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
707 generic_pop_dummy_frame ();
708 else
709 {
710 /* Write out the PC we saved. */
711 write_register (PC_REGNUM, FRAME_SAVED_PC (fi));
712
713 /* Restore any saved registers. */
714 for (rn = 0; rn < NUM_REGS; rn++)
715 {
716 if (fi->saved_regs[rn] != 0)
717 {
718 ULONGEST value;
719
720 value = read_memory_unsigned_integer (fi->saved_regs[rn],
721 REGISTER_SIZE);
722 write_register (rn, value);
723 }
724 }
725
726 /* Actually cut back the stack. */
727 write_register (SP_REGNUM, FRAME_FP (fi));
728 }
729
730 /* Finally, throw away any cached frame information. */
731 flush_cached_frames ();
732}
733
734/* Setup arguments and PR for a call to the target. First six arguments
735 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
736
737 * Types with lengths greater than REGISTER_SIZE may not be split
738 between registers and the stack, and they must start in an even-numbered
739 register. Subsequent args will go onto the stack.
740
741 * Structs may be split between registers and stack, left-aligned.
742
743 * If the function returns a struct which will not fit into registers (it's
744 more than eight bytes), we must allocate for that, too. Gdb will tell
745 us where this buffer is (STRUCT_ADDR), and we simply place it into
746 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
747 bytes) as hidden first arguments. */
748
749CORE_ADDR
ea7c478f 750mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
96baa820
JM
751 unsigned char struct_return, CORE_ADDR struct_addr)
752{
753 int argreg;
754 int argnum;
755 struct stack_arg
756 {
757 int len;
758 char *val;
759 }
760 *stack_args;
761 int nstack_args = 0;
762
763 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
764
765 argreg = FIRST_ARGREG;
766
767 /* Align the stack. This is mostly a nop, but not always. It will be needed
768 if we call a function which has argument overflow. */
769 sp &= ~3;
770
771 /* If this function returns a struct which does not fit in the
772 return registers, we must pass a buffer to the function
773 which it can use to save the return value. */
774 if (struct_return)
775 write_register (argreg++, struct_addr);
776
777 /* FIXME: what about unions? */
778 for (argnum = 0; argnum < nargs; argnum++)
779 {
780 char *val = (char *) VALUE_CONTENTS (args[argnum]);
781 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
782 struct type *type = VALUE_TYPE (args[argnum]);
783 int olen;
784
785 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
786 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
787 /* Arguments larger than a register must start in an even
788 numbered register. */
789 olen = len;
790
791 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
792 {
793 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
794 len, mcore_register_names[argreg]));
795 argreg++;
796 }
797
798 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
799 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
800 {
801 /* Something that will fit entirely into registers (or a struct
802 which may be split between registers and stack). */
803 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
804
805 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
806 {
807 /* Small structs must be right aligned within the register,
808 the most significant bits are undefined. */
809 write_register (argreg, extract_unsigned_integer (val, len));
810 argreg++;
811 len = 0;
812 }
813
814 while (len > 0 && argreg <= LAST_ARGREG)
815 {
816 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
817 argreg++;
818 val += REGISTER_SIZE;
819 len -= REGISTER_SIZE;
820 }
821
822 /* Any remainder for the stack is noted below... */
823 }
824 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
825 && len > REGISTER_SIZE)
826 {
827 /* All subsequent args go onto the stack. */
828 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
829 argnum = LAST_ARGREG + 1;
830 }
831
832 if (len > 0)
833 {
834 /* Note that this must be saved onto the stack */
835 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
836 stack_args[nstack_args].val = val;
837 stack_args[nstack_args].len = len;
838 nstack_args++;
839 }
840
841 }
842
843 /* We're done with registers and stack allocation. Now do the actual
844 stack pushes. */
845 while (nstack_args--)
846 {
847 sp -= stack_args[nstack_args].len;
848 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
849 }
850
851 /* Return adjusted stack pointer. */
852 return sp;
853}
854
855/* Store the return address for the call dummy. For MCore, we've
856 opted to use generic call dummies, so we simply store the
857 CALL_DUMMY_ADDRESS into the PR register (r15). */
858
859CORE_ADDR
860mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
861{
862 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
863 return sp;
864}
865
866/* Setting/getting return values from functions.
867
868 The Motorola MCore processors use r2/r3 to return anything
869 not larger than 32 bits. Everything else goes into a caller-
870 supplied buffer, which is passed in via a hidden first
871 argument.
872
873 For gdb, this leaves us two routes, based on what
874 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
875 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
876 EXTRACT_STRUCT_VALUE_ADDRESS.
877
878 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
879 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
880
881/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
882 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
883 and TYPE is the type (which is known to be struct, union or array). */
884
885int
886mcore_use_struct_convention (int gcc_p, struct type *type)
887{
888 return (TYPE_LENGTH (type) > 8);
889}
890
891/* Where is the return value saved? For MCore, a pointer to
892 this buffer was passed as a hidden first argument, so
893 just return that address. */
894
895CORE_ADDR
896mcore_extract_struct_value_address (char *regbuf)
897{
898 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
899}
900
901/* Given a function which returns a value of type TYPE, extract the
902 the function's return value and place the result into VALBUF.
903 REGBUF is the register contents of the target. */
904
905void
906mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
907{
908 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
909 /* Only getting the first byte! if len = 1, we need the last byte of
910 the register, not the first. */
911 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
912 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
913}
914
915/* Store the return value in VALBUF (of type TYPE) where the caller
916 expects to see it.
917
918 Values less than 32 bits are stored in r2, right justified and
919 sign or zero extended.
920
921 Values between 32 and 64 bits are stored in r2 (most
922 significant word) and r3 (least significant word, left justified).
923 Note that this includes structures of less than eight bytes, too. */
924
925void
926mcore_store_return_value (struct type *type, char *valbuf)
927{
928 int value_size;
929 int return_size;
930 int offset;
931 char *zeros;
932
933 value_size = TYPE_LENGTH (type);
934
935 /* Return value fits into registers. */
936 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
937 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
938 zeros = alloca (return_size);
939 memset (zeros, 0, return_size);
940
941 write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size);
942 write_register_bytes (offset, valbuf, value_size);
943}
944
945/* Initialize our target-dependent "stuff" for this newly created frame.
946
947 This includes allocating space for saved registers and analyzing
948 the prologue of this frame. */
949
950void
951mcore_init_extra_frame_info (struct frame_info *fi)
952{
953 if (fi->next)
954 fi->pc = FRAME_SAVED_PC (fi->next);
955
956 frame_saved_regs_zalloc (fi);
957
958 fi->extra_info = (struct frame_extra_info *)
959 frame_obstack_alloc (sizeof (struct frame_extra_info));
960 fi->extra_info->status = 0;
961 fi->extra_info->framesize = 0;
962
963 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
964 {
965 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
966 by assuming it's always FP. */
967 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
968 }
969 else
970 mcore_analyze_prologue (fi, 0, 0);
971}
972
973/* Get an insturction from memory. */
974
975static int
976get_insn (CORE_ADDR pc)
977{
978 char buf[4];
979 int status = read_memory_nobpt (pc, buf, 2);
980 if (status != 0)
981 return 0;
982
983 return extract_unsigned_integer (buf, 2);
984}
985
986void
fba45db2 987_initialize_mcore_tdep (void)
96baa820
JM
988{
989 extern int print_insn_mcore (bfd_vma, disassemble_info *);
990 tm_print_insn = print_insn_mcore;
991
992#ifdef MCORE_DEBUG
993 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
994 var_boolean, (char *) &mcore_debug,
995 "Set mcore debugging.\n", &setlist),
996 &showlist);
997#endif
998}
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