2004-07-26 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
CommitLineData
96baa820 1/* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
464e0365
AC
2
3 Copyright 1999, 2000, 2001, 2002, 2003, 2004 Free Software
4 Foundation, Inc.
96baa820
JM
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "symtab.h"
25#include "value.h"
26#include "gdbcmd.h"
4e052eda 27#include "regcache.h"
9ab9195f 28#include "objfiles.h"
58841d58
AC
29#include "gdbcore.h"
30#include "inferior.h"
4e0d9804 31#include "arch-utils.h"
9bbe19fb 32#include "gdb_string.h"
92bf2b80 33#include "disasm.h"
a89aa300 34#include "dis-asm.h"
96baa820 35
a78f21af
AC
36static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc,
37 int skip_prologue);
96baa820
JM
38static int get_insn (CORE_ADDR pc);
39
96baa820
JM
40#ifdef MCORE_DEBUG
41int mcore_debug = 0;
42#endif
43
96baa820 44
4cfe2084
GS
45/* All registers are 4 bytes long. */
46#define MCORE_REG_SIZE 4
47#define MCORE_NUM_REGS 65
96baa820 48
efdc1108
GS
49/* Some useful register numbers. */
50#define PR_REGNUM 15
51#define FIRST_ARGREG 2
52#define LAST_ARGREG 7
53#define RETVAL_REGNUM 2
54
4cfe2084 55
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JM
56/* Additional info that we use for managing frames */
57struct frame_extra_info
58 {
59 /* A generic status word */
60 int status;
61
62 /* Size of this frame */
63 int framesize;
64
65 /* The register that is acting as a frame pointer, if
66 it is being used. This is undefined if status
67 does not contain the flag MY_FRAME_IN_FP. */
68 int fp_regnum;
69 };
70
71/* frame_extra_info status flags */
72
73/* The base of the current frame is actually in the stack pointer.
74 This happens when there is no frame pointer (MCore ABI does not
75 require a frame pointer) or when we're stopped in the prologue or
76 epilogue itself. In these cases, mcore_analyze_prologue will need
77 to update fi->frame before returning or analyzing the register
78 save instructions. */
79#define MY_FRAME_IN_SP 0x1
80
81/* The base of the current frame is in a frame pointer register.
82 This register is noted in frame_extra_info->fp_regnum.
83
8e1a459b 84 Note that the existence of an FP might also indicate that the
96baa820
JM
85 function has called alloca. */
86#define MY_FRAME_IN_FP 0x2
87
88/* This flag is set to indicate that this frame is the top-most
89 frame. This tells frame chain not to bother trying to unwind
90 beyond this frame. */
91#define NO_MORE_FRAMES 0x4
92
93/* Instruction macros used for analyzing the prologue */
94#define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
95#define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
96#define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
97#define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
98#define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
99#define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
100#define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
101#define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
102#define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
103#define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
104#define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
105#define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
106#define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
107#define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
108#define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
109#define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
110#define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
111#define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
112#define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
113#define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
114
115#define IS_R1_ADJUSTER(x) \
116 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
117 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
118 || IS_IXH1(x) || IS_IXW1(x))
119\f
120
121#ifdef MCORE_DEBUG
122static void
123mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
124{
125 if (mcore_debug)
126 {
127 printf_filtered ("MCORE: %s %08x %08x ",
128 commnt, (unsigned int) pc, (unsigned int) insn);
92bf2b80 129 gdb_print_insn (pc, gdb_stdout);
96baa820
JM
130 printf_filtered ("\n");
131 }
132}
133#define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
134#else /* !MCORE_DEBUG */
135#define mcore_dump_insn(a,b,c) {}
136#define mcore_insn_debug(args) {}
137#endif
138
4cfe2084
GS
139
140static struct type *
141mcore_register_virtual_type (int regnum)
142{
143 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
144 internal_error (__FILE__, __LINE__,
145 "mcore_register_virtual_type: illegal register number %d",
146 regnum);
147 else
148 return builtin_type_int;
149}
150
151static int
152mcore_register_byte (int regnum)
153{
154 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
155 internal_error (__FILE__, __LINE__,
156 "mcore_register_byte: illegal register number %d",
157 regnum);
158 else
159 return (regnum * MCORE_REG_SIZE);
160}
161
162static int
163mcore_register_size (int regnum)
164{
165
166 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
167 internal_error (__FILE__, __LINE__,
168 "mcore_register_size: illegal register number %d",
169 regnum);
170 else
171 return MCORE_REG_SIZE;
172}
173
174/* The registers of the Motorola MCore processors */
175
176static const char *
177mcore_register_name (int regnum)
178{
179
180 static char *register_names[] = {
181 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
182 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
183 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
184 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
185 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
186 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
187 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
188 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
189 "pc"
190 };
191
192 if (regnum < 0 ||
193 regnum >= sizeof (register_names) / sizeof (register_names[0]))
194 internal_error (__FILE__, __LINE__,
195 "mcore_register_name: illegal register number %d",
196 regnum);
197 else
198 return register_names[regnum];
199}
200
96baa820
JM
201/* Given the address at which to insert a breakpoint (BP_ADDR),
202 what will that breakpoint be?
203
204 For MCore, we have a breakpoint instruction. Since all MCore
205 instructions are 16 bits, this is all we need, regardless of
206 address. bpkt = 0x0000 */
207
e14e6e9c 208static const unsigned char *
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JM
209mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
210{
211 static char breakpoint[] =
212 {0x00, 0x00};
213 *bp_size = 2;
214 return breakpoint;
215}
216
4e0d9804
GS
217static CORE_ADDR
218mcore_saved_pc_after_call (struct frame_info *frame)
219{
220 return read_register (PR_REGNUM);
221}
222
223/* This is currently handled by init_extra_frame_info. */
224static void
225mcore_frame_init_saved_regs (struct frame_info *frame)
226{
227
228}
229
230/* This is currently handled by mcore_push_arguments */
231static void
232mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
233{
234
235}
236
efdc1108
GS
237static int
238mcore_reg_struct_has_addr (int gcc_p, struct type *type)
239{
240 return 0;
241}
242
243
96baa820
JM
244/* Helper function for several routines below. This funtion simply
245 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
246 we can analyze with mcore_analyze_prologue. */
247
248static struct frame_info *
249analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
250{
213cc0ad
AC
251 struct cleanup *old_chain = make_cleanup (null_cleanup, NULL);
252 struct frame_info *dummy
253 = deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS,
254 sizeof (struct frame_extra_info));
50abf9e5 255 deprecated_update_frame_pc_hack (dummy, pc);
8ccd593b 256 deprecated_update_frame_base_hack (dummy, frame);
da50a4b7
AC
257 get_frame_extra_info (dummy)->status = 0;
258 get_frame_extra_info (dummy)->framesize = 0;
96baa820 259 mcore_analyze_prologue (dummy, 0, 0);
213cc0ad 260 do_cleanups (old_chain);
96baa820
JM
261 return dummy;
262}
263
0fb34c3a 264/* Function prologues on the Motorola MCore processors consist of:
96baa820
JM
265
266 - adjustments to the stack pointer (r1 used as scratch register)
267 - store word/multiples that use r0 as the base address
268 - making a copy of r0 into another register (a "frame" pointer)
269
270 Note that the MCore really doesn't have a real frame pointer.
271 Instead, the compiler may copy the SP into a register (usually
272 r8) to act as an arg pointer. For our target-dependent purposes,
273 the frame info's "frame" member will be the beginning of the
274 frame. The SP could, in fact, point below this.
275
276 The prologue ends when an instruction fails to meet either of
277 the first two criteria or when an FP is made. We make a special
278 exception for gcc. When compiling unoptimized code, gcc will
279 setup stack slots. We need to make sure that we skip the filling
280 of these stack slots as much as possible. This is only done
281 when SKIP_PROLOGUE is set, so that it does not mess up
282 backtraces. */
283
284/* Analyze the prologue of frame FI to determine where registers are saved,
285 the end of the prologue, etc. Return the address of the first line
286 of "real" code (i.e., the end of the prologue). */
287
288static CORE_ADDR
289mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
290{
291 CORE_ADDR func_addr, func_end, addr, stop;
292 CORE_ADDR stack_size;
293 int insn, rn;
93d56215
AC
294 int status;
295 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
296 int flags;
96baa820
JM
297 int framesize;
298 int register_offsets[NUM_REGS];
299 char *name;
300
301 /* If provided, use the PC in the frame to look up the
302 start of this function. */
50abf9e5 303 pc = (fi == NULL ? pc : get_frame_pc (fi));
96baa820
JM
304
305 /* Find the start of this function. */
306 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
307
308 /* If the start of this function could not be found or if the debbuger
309 is stopped at the first instruction of the prologue, do nothing. */
310 if (status == 0)
311 return pc;
312
313 /* If the debugger is entry function, give up. */
314 if (func_addr == entry_point_address ())
315 {
316 if (fi != NULL)
da50a4b7 317 get_frame_extra_info (fi)->status |= NO_MORE_FRAMES;
96baa820
JM
318 return pc;
319 }
320
321 /* At the start of a function, our frame is in the stack pointer. */
322 flags = MY_FRAME_IN_SP;
323
324 /* Start decoding the prologue. We start by checking two special cases:
325
326 1. We're about to return
327 2. We're at the first insn of the prologue.
328
329 If we're about to return, our frame has already been deallocated.
330 If we are stopped at the first instruction of a prologue,
331 then our frame has not yet been set up. */
332
333 /* Get the first insn from memory (all MCore instructions are 16 bits) */
334 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
335 insn = get_insn (pc);
336 mcore_dump_insn ("got 1: ", pc, insn);
337
338 /* Check for return. */
339 if (fi != NULL && IS_RTS (insn))
340 {
341 mcore_insn_debug (("MCORE: got jmp r15"));
11c02a10 342 if (get_next_frame (fi) == NULL)
8ccd593b 343 deprecated_update_frame_base_hack (fi, read_sp ());
50abf9e5 344 return get_frame_pc (fi);
96baa820
JM
345 }
346
347 /* Check for first insn of prologue */
50abf9e5 348 if (fi != NULL && get_frame_pc (fi) == func_addr)
96baa820 349 {
11c02a10 350 if (get_next_frame (fi) == NULL)
8ccd593b 351 deprecated_update_frame_base_hack (fi, read_sp ());
50abf9e5 352 return get_frame_pc (fi);
96baa820
JM
353 }
354
355 /* Figure out where to stop scanning */
50abf9e5 356 stop = (fi ? get_frame_pc (fi) : func_end);
96baa820
JM
357
358 /* Don't walk off the end of the function */
359 stop = (stop > func_end ? func_end : stop);
360
361 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
362 (NOT the frame pointer), for the various saved registers or -1
363 if the register is not saved. */
364 for (rn = 0; rn < NUM_REGS; rn++)
365 register_offsets[rn] = -1;
366
367 /* Analyze the prologue. Things we determine from analyzing the
368 prologue include:
369 * the size of the frame
370 * where saved registers are located (and which are saved)
371 * FP used? */
372 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
373 (unsigned int) func_addr, (unsigned int) stop));
374
375 framesize = 0;
376 for (addr = func_addr; addr < stop; addr += 2)
377 {
378 /* Get next insn */
379 insn = get_insn (addr);
380 mcore_dump_insn ("got 2: ", addr, insn);
381
382 if (IS_SUBI0 (insn))
383 {
384 int offset = 1 + ((insn >> 4) & 0x1f);
8e1a459b 385 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
96baa820
JM
386 framesize += offset;
387 continue;
388 }
389 else if (IS_STM (insn))
390 {
391 /* Spill register(s) */
392 int offset;
393 int start_register;
394
395 /* BIG WARNING! The MCore ABI does not restrict functions
396 to taking only one stack allocation. Therefore, when
397 we save a register, we record the offset of where it was
398 saved relative to the current framesize. This will
399 then give an offset from the SP upon entry to our
400 function. Remember, framesize is NOT constant until
401 we're done scanning the prologue. */
402 start_register = (insn & 0xf);
403 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
404
405 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
406 {
407 register_offsets[rn] = framesize - offset;
408 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
409 register_offsets[rn], offset));
410 }
411 mcore_insn_debug (("MCORE: continuing\n"));
412 continue;
413 }
414 else if (IS_STWx0 (insn))
415 {
416 /* Spill register: see note for IS_STM above. */
417 int imm;
418
419 rn = (insn >> 8) & 0xf;
420 imm = (insn >> 4) & 0xf;
421 register_offsets[rn] = framesize - (imm << 2);
422 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
423 mcore_insn_debug (("MCORE: continuing\n"));
424 continue;
425 }
426 else if (IS_MOVx0 (insn))
427 {
428 /* We have a frame pointer, so this prologue is over. Note
429 the register which is acting as the frame pointer. */
430 flags |= MY_FRAME_IN_FP;
431 flags &= ~MY_FRAME_IN_SP;
432 fp_regnum = insn & 0xf;
433 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
434
435 /* If we found an FP, we're at the end of the prologue. */
436 mcore_insn_debug (("MCORE: end of prologue\n"));
437 if (skip_prologue)
438 continue;
439
440 /* If we're decoding prologue, stop here. */
441 addr += 2;
442 break;
443 }
444 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
445 {
446 /* Special case. Skip over stack slot allocs, too. */
447 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
448 continue;
449 }
450 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
451 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
452 {
453 int adjust = 0;
454 int offset = 0;
455 int insn2;
456
457 mcore_insn_debug (("MCORE: looking at large frame\n"));
458 if (IS_LRW1 (insn))
459 {
460 adjust =
461 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
462 }
463 else if (IS_MOVI1 (insn))
464 adjust = (insn >> 4) & 0x7f;
465 else if (IS_BGENI1 (insn))
466 adjust = 1 << ((insn >> 4) & 0x1f);
467 else /* IS_BMASKI (insn) */
468 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
469
470 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
471
472 /* May have zero or more insns which modify r1 */
473 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
474 offset = 2;
475 insn2 = get_insn (addr + offset);
476 while (IS_R1_ADJUSTER (insn2))
477 {
478 int imm;
479
480 imm = (insn2 >> 4) & 0x1f;
481 mcore_dump_insn ("got 3: ", addr + offset, insn);
482 if (IS_ADDI1 (insn2))
483 {
484 adjust += (imm + 1);
485 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
486 }
487 else if (IS_SUBI1 (insn2))
488 {
489 adjust -= (imm + 1);
490 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
491 }
492 else if (IS_RSUBI1 (insn2))
493 {
494 adjust = imm - adjust;
495 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
496 }
497 else if (IS_NOT1 (insn2))
498 {
499 adjust = ~adjust;
500 mcore_insn_debug (("MCORE: not r1\n"));
501 }
502 else if (IS_ROTLI1 (insn2))
503 {
504 adjust <<= imm;
505 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
506 }
507 else if (IS_BSETI1 (insn2))
508 {
509 adjust |= (1 << imm);
510 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
511 }
512 else if (IS_BCLRI1 (insn2))
513 {
514 adjust &= ~(1 << imm);
515 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
516 }
517 else if (IS_IXH1 (insn2))
518 {
519 adjust *= 3;
520 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
521 }
522 else if (IS_IXW1 (insn2))
523 {
524 adjust *= 5;
525 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
526 }
527
528 offset += 2;
529 insn2 = get_insn (addr + offset);
530 };
531
532 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
533
534 /* If the next insn adjusts the stack pointer, we keep everything;
535 if not, we scrap it and we've found the end of the prologue. */
536 if (IS_SUB01 (insn2))
537 {
538 addr += offset;
539 framesize += adjust;
540 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
541 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
542 mcore_insn_debug (("MCORE: continuing\n"));
543 continue;
544 }
545
546 /* None of these instructions are prologue, so don't touch
547 anything. */
548 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
549 break;
550 }
551
552 /* This is not a prologue insn, so stop here. */
553 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
554 break;
555 }
556
557 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
558 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
559
560 /* Save everything we have learned about this frame into FI. */
561 if (fi != NULL)
562 {
da50a4b7
AC
563 get_frame_extra_info (fi)->framesize = framesize;
564 get_frame_extra_info (fi)->fp_regnum = fp_regnum;
565 get_frame_extra_info (fi)->status = flags;
96baa820
JM
566
567 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
568 it is really an arg ptr. We adjust fi->frame to be a "real"
569 frame pointer. */
11c02a10 570 if (get_next_frame (fi) == NULL)
96baa820 571 {
da50a4b7 572 if (get_frame_extra_info (fi)->status & MY_FRAME_IN_SP)
8ccd593b 573 deprecated_update_frame_base_hack (fi, read_sp () + framesize);
96baa820 574 else
8ccd593b 575 deprecated_update_frame_base_hack (fi, read_register (fp_regnum) + framesize);
96baa820
JM
576 }
577
578 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
579 are computed relative to the top of the frame. */
580 for (rn = 0; rn < NUM_REGS; rn++)
581 {
582 if (register_offsets[rn] >= 0)
583 {
1b1d3794 584 deprecated_get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - register_offsets[rn];
96baa820
JM
585 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
586 mcore_register_names[rn], fi->saved_regs[rn],
587 read_memory_integer (fi->saved_regs[rn], 4)));
588 }
589 }
590 }
591
592 /* Return addr of first non-prologue insn. */
593 return addr;
594}
595
a5afb99f
AC
596/* Given a GDB frame, determine the address of the calling function's
597 frame. This will be used to create a new GDB frame struct, and
e9582e71
AC
598 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
599 will be called for the new frame. */
96baa820 600
e14e6e9c 601static CORE_ADDR
96baa820
JM
602mcore_frame_chain (struct frame_info * fi)
603{
604 struct frame_info *dummy;
605 CORE_ADDR callers_addr;
606
607 /* Analyze the prologue of this function. */
da50a4b7 608 if (get_frame_extra_info (fi)->status == 0)
96baa820
JM
609 mcore_analyze_prologue (fi, 0, 0);
610
611 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
da50a4b7 612 if (get_frame_extra_info (fi)->status & NO_MORE_FRAMES)
96baa820
JM
613 return 0;
614
615 /* Now that we've analyzed our prologue, we can start to ask
616 for information about our caller. The easiest way to do
617 this is to analyze our caller's prologue.
618
619 If our caller has a frame pointer, then we need to find
620 the value of that register upon entry to our frame.
621 This value is either in fi->saved_regs[rn] if it's saved,
622 or it's still in a register.
623
624 If our caller does not have a frame pointer, then his frame base
625 is <our base> + -<caller's frame size>. */
8bedc050 626 dummy = analyze_dummy_frame (DEPRECATED_FRAME_SAVED_PC (fi), get_frame_base (fi));
96baa820 627
da50a4b7 628 if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_FP)
96baa820 629 {
da50a4b7 630 int fp = get_frame_extra_info (dummy)->fp_regnum;
96baa820
JM
631
632 /* Our caller has a frame pointer. */
1b1d3794 633 if (deprecated_get_frame_saved_regs (fi)[fp] != 0)
96baa820
JM
634 {
635 /* The "FP" was saved on the stack. Don't forget to adjust
636 the "FP" with the framesize to get a real FP. */
1b1d3794 637 callers_addr = read_memory_integer (deprecated_get_frame_saved_regs (fi)[fp],
b1e29e33 638 DEPRECATED_REGISTER_SIZE)
da50a4b7 639 + get_frame_extra_info (dummy)->framesize;
96baa820
JM
640 }
641 else
642 {
643 /* It's still in the register. Don't forget to adjust
644 the "FP" with the framesize to get a real FP. */
da50a4b7 645 callers_addr = read_register (fp) + get_frame_extra_info (dummy)->framesize;
96baa820
JM
646 }
647 }
648 else
649 {
650 /* Our caller does not have a frame pointer. */
da50a4b7 651 callers_addr = get_frame_base (fi) + get_frame_extra_info (dummy)->framesize;
96baa820
JM
652 }
653
654 return callers_addr;
655}
656
657/* Skip the prologue of the function at PC. */
658
e14e6e9c 659static CORE_ADDR
96baa820
JM
660mcore_skip_prologue (CORE_ADDR pc)
661{
662 CORE_ADDR func_addr, func_end;
663 struct symtab_and_line sal;
664
665 /* If we have line debugging information, then the end of the
7e73cedf 666 prologue should be the first assembly instruction of the first
96baa820
JM
667 source line */
668 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
669 {
670 sal = find_pc_line (func_addr, 0);
671 if (sal.end && sal.end < func_end)
672 return sal.end;
673 }
674
675 return mcore_analyze_prologue (NULL, pc, 1);
676}
677
678/* Return the address at which function arguments are offset. */
e14e6e9c 679static CORE_ADDR
96baa820
JM
680mcore_frame_args_address (struct frame_info * fi)
681{
da50a4b7 682 return get_frame_base (fi) - get_frame_extra_info (fi)->framesize;
96baa820
JM
683}
684
e14e6e9c 685static CORE_ADDR
96baa820
JM
686mcore_frame_locals_address (struct frame_info * fi)
687{
da50a4b7 688 return get_frame_base (fi) - get_frame_extra_info (fi)->framesize;
96baa820
JM
689}
690
691/* Return the frame pointer in use at address PC. */
692
a78f21af 693static void
e0441cf0 694mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset)
96baa820
JM
695{
696 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
da50a4b7 697 if (get_frame_extra_info (dummy)->status & MY_FRAME_IN_SP)
96baa820
JM
698 {
699 *reg = SP_REGNUM;
700 *offset = 0;
701 }
702 else
703 {
da50a4b7 704 *reg = get_frame_extra_info (dummy)->fp_regnum;
96baa820
JM
705 *offset = 0;
706 }
707}
708
709/* Find the value of register REGNUM in frame FI. */
710
e14e6e9c 711static CORE_ADDR
96baa820
JM
712mcore_find_callers_reg (struct frame_info *fi, int regnum)
713{
11c02a10 714 for (; fi != NULL; fi = get_next_frame (fi))
96baa820 715 {
30a4a8e0 716 if (deprecated_pc_in_call_dummy (get_frame_pc (fi)))
1e2330ba
AC
717 return deprecated_read_register_dummy (get_frame_pc (fi),
718 get_frame_base (fi), regnum);
1b1d3794
AC
719 else if (deprecated_get_frame_saved_regs (fi)[regnum] != 0)
720 return read_memory_integer (deprecated_get_frame_saved_regs (fi)[regnum],
b1e29e33 721 DEPRECATED_REGISTER_SIZE);
96baa820
JM
722 }
723
724 return read_register (regnum);
725}
726
727/* Find the saved pc in frame FI. */
728
e14e6e9c 729static CORE_ADDR
96baa820
JM
730mcore_frame_saved_pc (struct frame_info * fi)
731{
732
30a4a8e0 733 if (deprecated_pc_in_call_dummy (get_frame_pc (fi)))
1e2330ba
AC
734 return deprecated_read_register_dummy (get_frame_pc (fi),
735 get_frame_base (fi), PC_REGNUM);
96baa820
JM
736 else
737 return mcore_find_callers_reg (fi, PR_REGNUM);
738}
739\f
740/* INFERIOR FUNCTION CALLS */
741
742/* This routine gets called when either the user uses the "return"
743 command, or the call dummy breakpoint gets hit. */
744
a78f21af 745static void
5ae5f592 746mcore_pop_frame (void)
96baa820
JM
747{
748 int rn;
4e0d9804 749 struct frame_info *fi = get_current_frame ();
96baa820 750
30a4a8e0 751 if (deprecated_pc_in_call_dummy (get_frame_pc (fi)))
8adf9e78 752 deprecated_pop_dummy_frame ();
96baa820
JM
753 else
754 {
755 /* Write out the PC we saved. */
8bedc050 756 write_register (PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (fi));
96baa820
JM
757
758 /* Restore any saved registers. */
759 for (rn = 0; rn < NUM_REGS; rn++)
760 {
1b1d3794 761 if (deprecated_get_frame_saved_regs (fi)[rn] != 0)
96baa820
JM
762 {
763 ULONGEST value;
764
1b1d3794 765 value = read_memory_unsigned_integer (deprecated_get_frame_saved_regs (fi)[rn],
b1e29e33 766 DEPRECATED_REGISTER_SIZE);
96baa820
JM
767 write_register (rn, value);
768 }
769 }
770
771 /* Actually cut back the stack. */
c193f6ac 772 write_register (SP_REGNUM, get_frame_base (fi));
96baa820
JM
773 }
774
775 /* Finally, throw away any cached frame information. */
776 flush_cached_frames ();
777}
778
779/* Setup arguments and PR for a call to the target. First six arguments
780 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
781
b1e29e33
AC
782 - Types with lengths greater than DEPRECATED_REGISTER_SIZE may not
783 be split between registers and the stack, and they must start in an
784 even-numbered register. Subsequent args will go onto the stack.
96baa820
JM
785
786 * Structs may be split between registers and stack, left-aligned.
787
788 * If the function returns a struct which will not fit into registers (it's
789 more than eight bytes), we must allocate for that, too. Gdb will tell
790 us where this buffer is (STRUCT_ADDR), and we simply place it into
791 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
792 bytes) as hidden first arguments. */
793
e14e6e9c 794static CORE_ADDR
ea7c478f 795mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
4e0d9804 796 int struct_return, CORE_ADDR struct_addr)
96baa820
JM
797{
798 int argreg;
799 int argnum;
800 struct stack_arg
801 {
802 int len;
803 char *val;
804 }
805 *stack_args;
806 int nstack_args = 0;
807
808 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
809
810 argreg = FIRST_ARGREG;
811
812 /* Align the stack. This is mostly a nop, but not always. It will be needed
813 if we call a function which has argument overflow. */
814 sp &= ~3;
815
816 /* If this function returns a struct which does not fit in the
817 return registers, we must pass a buffer to the function
818 which it can use to save the return value. */
819 if (struct_return)
820 write_register (argreg++, struct_addr);
821
822 /* FIXME: what about unions? */
823 for (argnum = 0; argnum < nargs; argnum++)
824 {
825 char *val = (char *) VALUE_CONTENTS (args[argnum]);
826 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
827 struct type *type = VALUE_TYPE (args[argnum]);
828 int olen;
829
830 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
831 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
832 /* Arguments larger than a register must start in an even
833 numbered register. */
834 olen = len;
835
b1e29e33 836 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > DEPRECATED_REGISTER_SIZE && argreg % 2)
96baa820 837 {
b1e29e33 838 mcore_insn_debug (("MCORE PUSH: %d > DEPRECATED_REGISTER_SIZE: and %s is not even\n",
96baa820
JM
839 len, mcore_register_names[argreg]));
840 argreg++;
841 }
842
b1e29e33 843 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * DEPRECATED_REGISTER_SIZE)
96baa820
JM
844 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
845 {
846 /* Something that will fit entirely into registers (or a struct
847 which may be split between registers and stack). */
848 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
849
b1e29e33 850 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < DEPRECATED_REGISTER_SIZE)
96baa820
JM
851 {
852 /* Small structs must be right aligned within the register,
853 the most significant bits are undefined. */
854 write_register (argreg, extract_unsigned_integer (val, len));
855 argreg++;
856 len = 0;
857 }
858
859 while (len > 0 && argreg <= LAST_ARGREG)
860 {
b1e29e33 861 write_register (argreg, extract_unsigned_integer (val, DEPRECATED_REGISTER_SIZE));
96baa820 862 argreg++;
b1e29e33
AC
863 val += DEPRECATED_REGISTER_SIZE;
864 len -= DEPRECATED_REGISTER_SIZE;
96baa820
JM
865 }
866
867 /* Any remainder for the stack is noted below... */
868 }
869 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
b1e29e33 870 && len > DEPRECATED_REGISTER_SIZE)
96baa820
JM
871 {
872 /* All subsequent args go onto the stack. */
873 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
874 argnum = LAST_ARGREG + 1;
875 }
876
877 if (len > 0)
878 {
879 /* Note that this must be saved onto the stack */
880 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
881 stack_args[nstack_args].val = val;
882 stack_args[nstack_args].len = len;
883 nstack_args++;
884 }
885
886 }
887
888 /* We're done with registers and stack allocation. Now do the actual
889 stack pushes. */
890 while (nstack_args--)
891 {
892 sp -= stack_args[nstack_args].len;
893 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
894 }
895
896 /* Return adjusted stack pointer. */
897 return sp;
898}
899
88a82a65
AC
900/* Store the return address for the call dummy. For MCore, we've opted
901 to use generic call dummies, so we simply store the entry-point
902 address into the PR register (r15). */
96baa820 903
e14e6e9c 904static CORE_ADDR
96baa820
JM
905mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
906{
88a82a65 907 write_register (PR_REGNUM, entry_point_address ());
96baa820
JM
908 return sp;
909}
910
911/* Setting/getting return values from functions.
912
913 The Motorola MCore processors use r2/r3 to return anything
914 not larger than 32 bits. Everything else goes into a caller-
915 supplied buffer, which is passed in via a hidden first
916 argument.
917
918 For gdb, this leaves us two routes, based on what
b5622e8d
AC
919 DEPRECATED_USE_STRUCT_CONVENTION (mcore_use_struct_convention)
920 returns. If this macro returns 1, gdb will call
921 STORE_STRUCT_RETURN to store the return value.
96baa820 922
b5622e8d 923 If DEPRECATED_USE_STRUCT_CONVENTION returns 0, then gdb uses
464e0365
AC
924 STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE to store/fetch the
925 functions return value. */
96baa820 926
e14e6e9c 927static int
96baa820
JM
928mcore_use_struct_convention (int gcc_p, struct type *type)
929{
930 return (TYPE_LENGTH (type) > 8);
931}
932
96baa820
JM
933/* Given a function which returns a value of type TYPE, extract the
934 the function's return value and place the result into VALBUF.
935 REGBUF is the register contents of the target. */
936
e14e6e9c 937static void
96baa820
JM
938mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
939{
940 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
941 /* Only getting the first byte! if len = 1, we need the last byte of
942 the register, not the first. */
62700349 943 memcpy (valbuf, regbuf + DEPRECATED_REGISTER_BYTE (RETVAL_REGNUM) +
96baa820
JM
944 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
945}
946
947/* Store the return value in VALBUF (of type TYPE) where the caller
948 expects to see it.
949
950 Values less than 32 bits are stored in r2, right justified and
951 sign or zero extended.
952
953 Values between 32 and 64 bits are stored in r2 (most
954 significant word) and r3 (least significant word, left justified).
955 Note that this includes structures of less than eight bytes, too. */
956
e14e6e9c 957static void
96baa820
JM
958mcore_store_return_value (struct type *type, char *valbuf)
959{
960 int value_size;
961 int return_size;
962 int offset;
963 char *zeros;
964
965 value_size = TYPE_LENGTH (type);
966
967 /* Return value fits into registers. */
b1e29e33 968 return_size = (value_size + DEPRECATED_REGISTER_SIZE - 1) & ~(DEPRECATED_REGISTER_SIZE - 1);
62700349 969 offset = DEPRECATED_REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
96baa820
JM
970 zeros = alloca (return_size);
971 memset (zeros, 0, return_size);
972
62700349 973 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (RETVAL_REGNUM), zeros,
73937e03
AC
974 return_size);
975 deprecated_write_register_bytes (offset, valbuf, value_size);
96baa820
JM
976}
977
978/* Initialize our target-dependent "stuff" for this newly created frame.
979
980 This includes allocating space for saved registers and analyzing
981 the prologue of this frame. */
982
e14e6e9c 983static void
4e0d9804 984mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi)
96baa820 985{
11c02a10 986 if (fi && get_next_frame (fi))
8bedc050 987 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
96baa820
JM
988
989 frame_saved_regs_zalloc (fi);
990
a00a19e9 991 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
da50a4b7
AC
992 get_frame_extra_info (fi)->status = 0;
993 get_frame_extra_info (fi)->framesize = 0;
96baa820 994
30a4a8e0 995 if (deprecated_pc_in_call_dummy (get_frame_pc (fi)))
96baa820 996 {
04714b91
AC
997 /* We need to setup fi->frame here because call_function_by_hand
998 gets it wrong by assuming it's always FP. */
1e2330ba 999 deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM));
96baa820
JM
1000 }
1001 else
1002 mcore_analyze_prologue (fi, 0, 0);
1003}
1004
1005/* Get an insturction from memory. */
1006
1007static int
1008get_insn (CORE_ADDR pc)
1009{
1010 char buf[4];
1f602b35 1011 int status = deprecated_read_memory_nobpt (pc, buf, 2);
96baa820
JM
1012 if (status != 0)
1013 return 0;
1014
1015 return extract_unsigned_integer (buf, 2);
1016}
1017
4cfe2084
GS
1018static struct gdbarch *
1019mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1020{
4cfe2084
GS
1021 struct gdbarch_tdep *tdep = NULL;
1022 struct gdbarch *gdbarch;
1023
1024 /* find a candidate among the list of pre-declared architectures. */
1025 arches = gdbarch_list_lookup_by_info (arches, &info);
1026 if (arches != NULL)
1027 return (arches->gdbarch);
1028
1029 gdbarch = gdbarch_alloc (&info, 0);
1030
a5afb99f
AC
1031 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1032 ready to unwind the PC first (see frame.c:get_prev_frame()). */
0968aa8c 1033 set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default);
a5afb99f 1034
4e0d9804
GS
1035 /* Registers: */
1036
4cfe2084 1037 /* All registers are 32 bits */
b1e29e33 1038 set_gdbarch_deprecated_register_size (gdbarch, MCORE_REG_SIZE);
4cfe2084 1039 set_gdbarch_register_name (gdbarch, mcore_register_name);
9c04cab7
AC
1040 set_gdbarch_deprecated_register_virtual_type (gdbarch, mcore_register_virtual_type);
1041 set_gdbarch_deprecated_register_virtual_size (gdbarch, mcore_register_size);
1042 set_gdbarch_deprecated_register_raw_size (gdbarch, mcore_register_size);
1043 set_gdbarch_deprecated_register_byte (gdbarch, mcore_register_byte);
b8b527c5 1044 set_gdbarch_deprecated_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS);
4e0d9804
GS
1045 set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS);
1046 set_gdbarch_pc_regnum (gdbarch, 64);
1047 set_gdbarch_sp_regnum (gdbarch, 0);
0ba6dca9 1048 set_gdbarch_deprecated_fp_regnum (gdbarch, 0);
4e0d9804
GS
1049
1050 /* Call Dummies: */
4cfe2084 1051
6913c89a 1052 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call);
4e0d9804 1053 set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc);
28f617b3 1054 set_gdbarch_deprecated_push_return_address (gdbarch, mcore_push_return_address);
b81774d8 1055 set_gdbarch_deprecated_push_arguments (gdbarch, mcore_push_arguments);
4e0d9804
GS
1056
1057 /* Frames: */
1058
e9582e71 1059 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info);
618ce49f 1060 set_gdbarch_deprecated_frame_chain (gdbarch, mcore_frame_chain);
f30ee0bc 1061 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs);
8bedc050 1062 set_gdbarch_deprecated_frame_saved_pc (gdbarch, mcore_frame_saved_pc);
ebba8386 1063 set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value);
4e0d9804
GS
1064 set_gdbarch_deprecated_extract_return_value (gdbarch,
1065 mcore_extract_return_value);
4183d812 1066 set_gdbarch_deprecated_store_struct_return (gdbarch, mcore_store_struct_return);
4e0d9804 1067 set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue);
42efa47a
AC
1068 set_gdbarch_deprecated_frame_args_address (gdbarch, mcore_frame_args_address);
1069 set_gdbarch_deprecated_frame_locals_address (gdbarch, mcore_frame_locals_address);
749b82f6 1070 set_gdbarch_deprecated_pop_frame (gdbarch, mcore_pop_frame);
efdc1108 1071 set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer);
4e0d9804
GS
1072
1073 /* Misc.: */
1074
1075 /* Stack grows down. */
1076 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
b5622e8d 1077 set_gdbarch_deprecated_use_struct_convention (gdbarch, mcore_use_struct_convention);
efdc1108
GS
1078 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1079 /* MCore will never pass a sturcture by reference. It will always be split
1080 between registers and stack. */
2110b94f
MK
1081 set_gdbarch_deprecated_reg_struct_has_addr
1082 (gdbarch, mcore_reg_struct_has_addr);
4cfe2084 1083
6c0e89ed 1084 /* Should be using push_dummy_call. */
b46e02f6 1085 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
6c0e89ed 1086
36482093
AC
1087 set_gdbarch_print_insn (gdbarch, print_insn_mcore);
1088
4cfe2084
GS
1089 return gdbarch;
1090}
1091
1092static void
1093mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1094{
1095
1096}
1097
a78f21af
AC
1098extern initialize_file_ftype _initialize_mcore_tdep; /* -Wmissing-prototypes */
1099
96baa820 1100void
fba45db2 1101_initialize_mcore_tdep (void)
96baa820 1102{
4cfe2084 1103 gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep);
96baa820
JM
1104
1105#ifdef MCORE_DEBUG
cb1a6d5f
AC
1106 deprecated_add_show_from_set
1107 (add_set_cmd ("mcoredebug", no_class,
1108 var_boolean, (char *) &mcore_debug,
1109 "Set mcore debugging.\n", &setlist),
1110 &showlist);
96baa820
JM
1111#endif
1112}
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