Add entry for change in solib-osf.c (osf_in_dynsym_resolve_code).
[deliverable/binutils-gdb.git] / gdb / memattr.h
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1/* memattr.h */
2#ifndef MEMATTR_H
3#define MEMATTR_H
4
5enum mem_access_mode
6{
7 MEM_RW, /* read/write */
8 MEM_RO, /* read only */
ba41d549 9 MEM_WO /* write only */
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10};
11
12enum mem_access_width
13{
14 MEM_WIDTH_UNSPECIFIED,
15 MEM_WIDTH_8, /* 8 bit accesses */
16 MEM_WIDTH_16, /* 16 " " */
17 MEM_WIDTH_32, /* 32 " " */
18 MEM_WIDTH_64 /* 64 " " */
19};
20
21/* The set of all attributes that can be set for a memory region.
22
23 This structure was created so that memory attributes can be passed
24 to target_ functions without exposing the details of memory region
25 list, which would be necessary if these fields were simply added to
26 the mem_region structure.
27
28 FIXME: It would be useful if there was a mechanism for targets to
29 add their own attributes. For example, the number of wait states. */
30
31struct mem_attrib
32{
33 /* read/write, read-only, or write-only */
34 enum mem_access_mode mode;
35
36 enum mem_access_width width;
37
38 /* enables hardware breakpoints */
39 int hwbreak;
40
41 /* enables host-side caching of memory region data */
42 int cache;
43
44 /* enables memory verification. after a write, memory is re-read
45 to verify that the write was successful. */
46 int verify;
47};
48
49struct mem_region
50{
51 /* FIXME: memory regions are stored in an unsorted singly-linked
52 list. This probably won't scale to handle hundreds of memory
53 regions --- that many could be needed to describe the allowed
54 access modes for memory mapped i/o device registers. */
55 struct mem_region *next;
56
57 CORE_ADDR lo;
58 CORE_ADDR hi;
59
60 /* Item number of this memory region. */
61 int number;
62
63 /* Status of this memory region (enabled or disabled) */
64 int status;
65
66 /* Attributes for this region */
67 struct mem_attrib attrib;
68};
69
70extern struct mem_region *lookup_mem_region(CORE_ADDR);
71
72#endif /* MEMATTR_H */
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