Commit | Line | Data |
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75c9abc6 | 1 | /* Native-dependent code for GNU/Linux on MIPS processors. |
a094c6fb | 2 | |
6aba47ca | 3 | Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007 |
dc60ece8 | 4 | Free Software Foundation, Inc. |
2aa830e4 DJ |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
197e01b6 EZ |
20 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
2aa830e4 DJ |
22 | |
23 | #include "defs.h" | |
d37eb719 | 24 | #include "inferior.h" |
6b753f60 | 25 | #include "mips-tdep.h" |
10d6c8cd | 26 | #include "target.h" |
28f5035f | 27 | #include "regcache.h" |
10d6c8cd | 28 | #include "linux-nat.h" |
d37eb719 | 29 | #include "mips-linux-tdep.h" |
822b6570 DJ |
30 | #include "target-descriptions.h" |
31 | #include "xml-support.h" | |
2aa830e4 | 32 | |
dc60ece8 | 33 | #include "gdb_proc_service.h" |
3e00823e | 34 | #include "gregset.h" |
dc60ece8 | 35 | |
822b6570 | 36 | #include <sgidefs.h> |
d37eb719 DJ |
37 | #include <sys/ptrace.h> |
38 | ||
dc60ece8 DJ |
39 | #ifndef PTRACE_GET_THREAD_AREA |
40 | #define PTRACE_GET_THREAD_AREA 25 | |
41 | #endif | |
42 | ||
d37eb719 DJ |
43 | /* Assume that we have PTRACE_GETREGS et al. support. If we do not, |
44 | we'll clear this and use PTRACE_PEEKUSER instead. */ | |
45 | static int have_ptrace_regsets = 1; | |
46 | ||
47 | /* Saved function pointers to fetch and store a single register using | |
48 | PTRACE_PEEKUSER and PTRACE_POKEUSER. */ | |
49 | ||
56be3814 UW |
50 | void (*super_fetch_registers) (struct regcache *, int); |
51 | void (*super_store_registers) (struct regcache *, int); | |
d37eb719 | 52 | |
dda0c97e | 53 | /* Map gdb internal register number to ptrace ``address''. |
7714d83a UW |
54 | These ``addresses'' are normally defined in <asm/ptrace.h>. |
55 | ||
56 | ptrace does not provide a way to read (or set) MIPS_PS_REGNUM, | |
57 | and there's no point in reading or setting MIPS_ZERO_REGNUM. | |
58 | We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */ | |
dda0c97e UW |
59 | |
60 | static CORE_ADDR | |
7714d83a | 61 | mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store) |
dda0c97e | 62 | { |
7714d83a | 63 | CORE_ADDR regaddr; |
dda0c97e | 64 | |
f57d151a | 65 | if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch)) |
dda0c97e UW |
66 | error (_("Bogon register number %d."), regno); |
67 | ||
7714d83a | 68 | if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32) |
dda0c97e | 69 | regaddr = regno; |
7714d83a UW |
70 | else if ((regno >= mips_regnum (gdbarch)->fp0) |
71 | && (regno < mips_regnum (gdbarch)->fp0 + 32)) | |
72 | regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0); | |
73 | else if (regno == mips_regnum (gdbarch)->pc) | |
dda0c97e | 74 | regaddr = PC; |
7714d83a UW |
75 | else if (regno == mips_regnum (gdbarch)->cause) |
76 | regaddr = store? (CORE_ADDR) -1 : CAUSE; | |
77 | else if (regno == mips_regnum (gdbarch)->badvaddr) | |
78 | regaddr = store? (CORE_ADDR) -1 : BADVADDR; | |
79 | else if (regno == mips_regnum (gdbarch)->lo) | |
dda0c97e | 80 | regaddr = MMLO; |
7714d83a | 81 | else if (regno == mips_regnum (gdbarch)->hi) |
dda0c97e | 82 | regaddr = MMHI; |
7714d83a | 83 | else if (regno == mips_regnum (gdbarch)->fp_control_status) |
dda0c97e | 84 | regaddr = FPC_CSR; |
7714d83a UW |
85 | else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) |
86 | regaddr = store? (CORE_ADDR) -1 : FPC_EIR; | |
822b6570 DJ |
87 | else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM) |
88 | regaddr = 0; | |
dda0c97e | 89 | else |
7714d83a | 90 | regaddr = (CORE_ADDR) -1; |
dda0c97e UW |
91 | |
92 | return regaddr; | |
93 | } | |
94 | ||
95 | static CORE_ADDR | |
7714d83a | 96 | mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store) |
dda0c97e | 97 | { |
7714d83a | 98 | CORE_ADDR regaddr; |
dda0c97e | 99 | |
f57d151a | 100 | if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch)) |
dda0c97e UW |
101 | error (_("Bogon register number %d."), regno); |
102 | ||
7714d83a | 103 | if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32) |
dda0c97e | 104 | regaddr = regno; |
7714d83a UW |
105 | else if ((regno >= mips_regnum (gdbarch)->fp0) |
106 | && (regno < mips_regnum (gdbarch)->fp0 + 32)) | |
3e8c568d | 107 | regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (current_gdbarch)); |
7714d83a | 108 | else if (regno == mips_regnum (gdbarch)->pc) |
dda0c97e | 109 | regaddr = MIPS64_PC; |
7714d83a UW |
110 | else if (regno == mips_regnum (gdbarch)->cause) |
111 | regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE; | |
112 | else if (regno == mips_regnum (gdbarch)->badvaddr) | |
113 | regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR; | |
114 | else if (regno == mips_regnum (gdbarch)->lo) | |
dda0c97e | 115 | regaddr = MIPS64_MMLO; |
7714d83a | 116 | else if (regno == mips_regnum (gdbarch)->hi) |
dda0c97e | 117 | regaddr = MIPS64_MMHI; |
7714d83a | 118 | else if (regno == mips_regnum (gdbarch)->fp_control_status) |
dda0c97e | 119 | regaddr = MIPS64_FPC_CSR; |
7714d83a UW |
120 | else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) |
121 | regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR; | |
822b6570 DJ |
122 | else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM) |
123 | regaddr = 0; | |
dda0c97e | 124 | else |
7714d83a | 125 | regaddr = (CORE_ADDR) -1; |
dda0c97e UW |
126 | |
127 | return regaddr; | |
128 | } | |
129 | ||
dc60ece8 DJ |
130 | /* Fetch the thread-local storage pointer for libthread_db. */ |
131 | ||
132 | ps_err_e | |
133 | ps_get_thread_area (const struct ps_prochandle *ph, | |
134 | lwpid_t lwpid, int idx, void **base) | |
135 | { | |
136 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) | |
137 | return PS_ERR; | |
138 | ||
139 | /* IDX is the bias from the thread pointer to the beginning of the | |
140 | thread descriptor. It has to be subtracted due to implementation | |
141 | quirks in libthread_db. */ | |
142 | *base = (void *) ((char *)*base - idx); | |
143 | ||
144 | return PS_OK; | |
145 | } | |
146 | ||
3e00823e UW |
147 | /* Wrapper functions. These are only used by libthread_db. */ |
148 | ||
149 | void | |
7f7fe91e | 150 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) |
3e00823e UW |
151 | { |
152 | if (mips_isa_regsize (current_gdbarch) == 4) | |
7f7fe91e | 153 | mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp); |
3e00823e | 154 | else |
7f7fe91e | 155 | mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp); |
3e00823e UW |
156 | } |
157 | ||
158 | void | |
7f7fe91e UW |
159 | fill_gregset (const struct regcache *regcache, |
160 | gdb_gregset_t *gregsetp, int regno) | |
3e00823e UW |
161 | { |
162 | if (mips_isa_regsize (current_gdbarch) == 4) | |
7f7fe91e | 163 | mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno); |
3e00823e | 164 | else |
7f7fe91e | 165 | mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno); |
3e00823e UW |
166 | } |
167 | ||
168 | void | |
7f7fe91e | 169 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) |
3e00823e UW |
170 | { |
171 | if (mips_isa_regsize (current_gdbarch) == 4) | |
7f7fe91e | 172 | mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp); |
3e00823e | 173 | else |
7f7fe91e | 174 | mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *) fpregsetp); |
3e00823e UW |
175 | } |
176 | ||
177 | void | |
7f7fe91e UW |
178 | fill_fpregset (const struct regcache *regcache, |
179 | gdb_fpregset_t *fpregsetp, int regno) | |
3e00823e UW |
180 | { |
181 | if (mips_isa_regsize (current_gdbarch) == 4) | |
7f7fe91e | 182 | mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno); |
3e00823e | 183 | else |
7f7fe91e | 184 | mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *) fpregsetp, regno); |
3e00823e UW |
185 | } |
186 | ||
187 | ||
d37eb719 DJ |
188 | /* Fetch REGNO (or all registers if REGNO == -1) from the target |
189 | using PTRACE_GETREGS et al. */ | |
190 | ||
191 | static void | |
56be3814 | 192 | mips64_linux_regsets_fetch_registers (struct regcache *regcache, int regno) |
d37eb719 DJ |
193 | { |
194 | int is_fp; | |
195 | int tid; | |
196 | ||
197 | if (regno >= mips_regnum (current_gdbarch)->fp0 | |
198 | && regno <= mips_regnum (current_gdbarch)->fp0 + 32) | |
199 | is_fp = 1; | |
200 | else if (regno == mips_regnum (current_gdbarch)->fp_control_status) | |
201 | is_fp = 1; | |
202 | else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision) | |
203 | is_fp = 1; | |
204 | else | |
205 | is_fp = 0; | |
206 | ||
207 | tid = ptid_get_lwp (inferior_ptid); | |
208 | if (tid == 0) | |
209 | tid = ptid_get_pid (inferior_ptid); | |
210 | ||
211 | if (regno == -1 || !is_fp) | |
212 | { | |
213 | mips64_elf_gregset_t regs; | |
214 | ||
215 | if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1) | |
216 | { | |
217 | if (errno == EIO) | |
218 | { | |
219 | have_ptrace_regsets = 0; | |
220 | return; | |
221 | } | |
222 | perror_with_name (_("Couldn't get registers")); | |
223 | } | |
224 | ||
56be3814 | 225 | mips64_supply_gregset (regcache, |
28f5035f | 226 | (const mips64_elf_gregset_t *) ®s); |
d37eb719 DJ |
227 | } |
228 | ||
229 | if (regno == -1 || is_fp) | |
230 | { | |
231 | mips64_elf_fpregset_t fp_regs; | |
232 | ||
233 | if (ptrace (PTRACE_GETFPREGS, tid, 0L, | |
234 | (PTRACE_TYPE_ARG3) &fp_regs) == -1) | |
235 | { | |
236 | if (errno == EIO) | |
237 | { | |
238 | have_ptrace_regsets = 0; | |
239 | return; | |
240 | } | |
241 | perror_with_name (_("Couldn't get FP registers")); | |
242 | } | |
243 | ||
56be3814 | 244 | mips64_supply_fpregset (regcache, |
28f5035f | 245 | (const mips64_elf_fpregset_t *) &fp_regs); |
d37eb719 DJ |
246 | } |
247 | } | |
248 | ||
249 | /* Store REGNO (or all registers if REGNO == -1) to the target | |
250 | using PTRACE_SETREGS et al. */ | |
251 | ||
252 | static void | |
56be3814 | 253 | mips64_linux_regsets_store_registers (const struct regcache *regcache, int regno) |
d37eb719 DJ |
254 | { |
255 | int is_fp; | |
256 | int tid; | |
257 | ||
258 | if (regno >= mips_regnum (current_gdbarch)->fp0 | |
259 | && regno <= mips_regnum (current_gdbarch)->fp0 + 32) | |
260 | is_fp = 1; | |
261 | else if (regno == mips_regnum (current_gdbarch)->fp_control_status) | |
262 | is_fp = 1; | |
263 | else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision) | |
264 | is_fp = 1; | |
265 | else | |
266 | is_fp = 0; | |
267 | ||
268 | tid = ptid_get_lwp (inferior_ptid); | |
269 | if (tid == 0) | |
270 | tid = ptid_get_pid (inferior_ptid); | |
271 | ||
272 | if (regno == -1 || !is_fp) | |
273 | { | |
274 | mips64_elf_gregset_t regs; | |
275 | ||
276 | if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1) | |
277 | perror_with_name (_("Couldn't get registers")); | |
278 | ||
56be3814 | 279 | mips64_fill_gregset (regcache, ®s, regno); |
d37eb719 DJ |
280 | |
281 | if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1) | |
282 | perror_with_name (_("Couldn't set registers")); | |
283 | } | |
284 | ||
285 | if (regno == -1 || is_fp) | |
286 | { | |
287 | mips64_elf_fpregset_t fp_regs; | |
288 | ||
289 | if (ptrace (PTRACE_GETFPREGS, tid, 0L, | |
290 | (PTRACE_TYPE_ARG3) &fp_regs) == -1) | |
291 | perror_with_name (_("Couldn't get FP registers")); | |
292 | ||
56be3814 | 293 | mips64_fill_fpregset (regcache, &fp_regs, regno); |
d37eb719 DJ |
294 | |
295 | if (ptrace (PTRACE_SETFPREGS, tid, 0L, | |
296 | (PTRACE_TYPE_ARG3) &fp_regs) == -1) | |
297 | perror_with_name (_("Couldn't set FP registers")); | |
298 | } | |
299 | } | |
300 | ||
301 | /* Fetch REGNO (or all registers if REGNO == -1) from the target | |
302 | using any working method. */ | |
303 | ||
304 | static void | |
56be3814 | 305 | mips64_linux_fetch_registers (struct regcache *regcache, int regnum) |
d37eb719 DJ |
306 | { |
307 | /* Unless we already know that PTRACE_GETREGS does not work, try it. */ | |
308 | if (have_ptrace_regsets) | |
56be3814 | 309 | mips64_linux_regsets_fetch_registers (regcache, regnum); |
d37eb719 DJ |
310 | |
311 | /* If we know, or just found out, that PTRACE_GETREGS does not work, fall | |
312 | back to PTRACE_PEEKUSER. */ | |
313 | if (!have_ptrace_regsets) | |
56be3814 | 314 | super_fetch_registers (regcache, regnum); |
d37eb719 DJ |
315 | } |
316 | ||
317 | /* Store REGNO (or all registers if REGNO == -1) to the target | |
318 | using any working method. */ | |
319 | ||
320 | static void | |
56be3814 | 321 | mips64_linux_store_registers (struct regcache *regcache, int regnum) |
d37eb719 DJ |
322 | { |
323 | /* Unless we already know that PTRACE_GETREGS does not work, try it. */ | |
324 | if (have_ptrace_regsets) | |
56be3814 | 325 | mips64_linux_regsets_store_registers (regcache, regnum); |
d37eb719 DJ |
326 | |
327 | /* If we know, or just found out, that PTRACE_GETREGS does not work, fall | |
328 | back to PTRACE_PEEKUSER. */ | |
329 | if (!have_ptrace_regsets) | |
56be3814 | 330 | super_store_registers (regcache, regnum); |
d37eb719 DJ |
331 | } |
332 | ||
910122bf UW |
333 | /* Return the address in the core dump or inferior of register |
334 | REGNO. */ | |
335 | ||
336 | static CORE_ADDR | |
7714d83a | 337 | mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p) |
910122bf | 338 | { |
7714d83a UW |
339 | if (mips_abi_regsize (gdbarch) == 8) |
340 | return mips64_linux_register_addr (gdbarch, regno, store_p); | |
dda0c97e | 341 | else |
7714d83a | 342 | return mips_linux_register_addr (gdbarch, regno, store_p); |
910122bf UW |
343 | } |
344 | ||
822b6570 DJ |
345 | static LONGEST (*super_xfer_partial) (struct target_ops *, enum target_object, |
346 | const char *, gdb_byte *, const gdb_byte *, | |
347 | ULONGEST, LONGEST); | |
348 | ||
349 | static LONGEST | |
350 | mips_linux_xfer_partial (struct target_ops *ops, | |
351 | enum target_object object, | |
352 | const char *annex, | |
353 | gdb_byte *readbuf, const gdb_byte *writebuf, | |
354 | ULONGEST offset, LONGEST len) | |
355 | { | |
356 | if (object == TARGET_OBJECT_AVAILABLE_FEATURES) | |
357 | { | |
358 | if (annex != NULL && strcmp (annex, "target.xml") == 0) | |
359 | { | |
360 | /* Report that target registers are a size we know for sure | |
361 | that we can get from ptrace. */ | |
362 | if (_MIPS_SIM == _ABIO32) | |
363 | annex = "mips-linux.xml"; | |
364 | else | |
365 | annex = "mips64-linux.xml"; | |
366 | } | |
367 | ||
368 | return xml_builtin_xfer_partial (annex, readbuf, writebuf, offset, len); | |
369 | } | |
370 | ||
371 | return super_xfer_partial (ops, object, annex, readbuf, writebuf, | |
372 | offset, len); | |
373 | } | |
374 | ||
10d6c8cd DJ |
375 | void _initialize_mips_linux_nat (void); |
376 | ||
377 | void | |
378 | _initialize_mips_linux_nat (void) | |
379 | { | |
910122bf | 380 | struct target_ops *t = linux_trad_target (mips_linux_register_u_offset); |
d37eb719 DJ |
381 | |
382 | super_fetch_registers = t->to_fetch_registers; | |
383 | super_store_registers = t->to_store_registers; | |
384 | ||
385 | t->to_fetch_registers = mips64_linux_fetch_registers; | |
386 | t->to_store_registers = mips64_linux_store_registers; | |
387 | ||
822b6570 DJ |
388 | /* Override the default to_xfer_partial. */ |
389 | super_xfer_partial = t->to_xfer_partial; | |
390 | t->to_xfer_partial = mips_linux_xfer_partial; | |
391 | ||
f973ed9c | 392 | linux_nat_add_target (t); |
10d6c8cd | 393 | } |