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* vaxnbsd-tdep.c: New file.
[deliverable/binutils-gdb.git] / gdb / mips-linux-tdep.c
CommitLineData
75c9abc6 1/* Target-dependent code for GNU/Linux on MIPS processors.
a094c6fb 2
c4c5b7ba 3 Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
2aa830e4
DJ		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "gdbcore.h"
24#include "target.h"
25#include "solib-svr4.h"
19ed69dd 26#include "osabi.h"
96f026fc 27#include "mips-tdep.h"
19ed69dd 28#include "gdb_string.h"
96f026fc 29#include "gdb_assert.h"
6de918a6 30#include "frame.h"
5792a79b
DJ		 31#include "trad-frame.h"
32#include "tramp-frame.h"
2aa830e4
DJ		 33
34/* Copied from <asm/elf.h>. */
35#define ELF_NGREG 45
36#define ELF_NFPREG 33
37
38typedef unsigned char elf_greg_t[4];
39typedef elf_greg_t elf_gregset_t[ELF_NGREG];
40
41typedef unsigned char elf_fpreg_t[8];
42typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
43
44/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
45#define FPR_BASE 32
46#define PC 64
47#define CAUSE 65
48#define BADVADDR 66
49#define MMHI 67
50#define MMLO 68
51#define FPC_CSR 69
52#define FPC_EIR 70
53
54#define EF_REG0 6
55#define EF_REG31 37
56#define EF_LO 38
57#define EF_HI 39
58#define EF_CP0_EPC 40
59#define EF_CP0_BADVADDR 41
60#define EF_CP0_STATUS 42
61#define EF_CP0_CAUSE 43
62
63#define EF_SIZE 180
64
65/* Figure out where the longjmp will land.
66 We expect the first arg to be a pointer to the jmp_buf structure from
bf072999
DJ		 67 which we extract the pc (MIPS_LINUX_JB_PC) that we will land at. The pc
68 is copied into PC. This routine returns 1 on success. */
2aa830e4 69
19ed69dd
KB		 70#define MIPS_LINUX_JB_ELEMENT_SIZE 4
71#define MIPS_LINUX_JB_PC 0
72
73static int
2aa830e4
DJ		 74mips_linux_get_longjmp_target (CORE_ADDR *pc)
75{
76 CORE_ADDR jb_addr;
77 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
78
79 jb_addr = read_register (A0_REGNUM);
80
bf072999
DJ		 81 if (target_read_memory (jb_addr
82 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
83 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
2aa830e4
DJ		 84 return 0;
85
7c0b4a20 86 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
2aa830e4
DJ		 87
88 return 1;
89}
90
4246e332
AC		 91/* Transform the bits comprising a 32-bit register to the right size
92 for supply_register(). This is needed when mips_regsize() is 8. */
96f026fc
KB		 93
94static void
95supply_32bit_reg (int regnum, const void *addr)
96{
d9d9c31f 97 char buf[MAX_REGISTER_SIZE];
12c266ea 98 store_signed_integer (buf, DEPRECATED_REGISTER_RAW_SIZE (regnum),
96f026fc
KB		 99 extract_signed_integer (addr, 4));
100 supply_register (regnum, buf);
101}
102
2aa830e4
DJ		 103/* Unpack an elf_gregset_t into GDB's register cache. */
104
105void
106supply_gregset (elf_gregset_t *gregsetp)
107{
108 int regi;
109 elf_greg_t *regp = *gregsetp;
d9d9c31f 110 char zerobuf[MAX_REGISTER_SIZE];
bf072999 111
d9d9c31f 112 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4
DJ		 113
114 for (regi = EF_REG0; regi <= EF_REG31; regi++)
96f026fc 115 supply_32bit_reg ((regi - EF_REG0), (char *)(regp + regi));
2aa830e4 116
56cea623
AC		 117 supply_32bit_reg (mips_regnum (current_gdbarch)->lo,
118 (char *)(regp + EF_LO));
119 supply_32bit_reg (mips_regnum (current_gdbarch)->hi,
120 (char *)(regp + EF_HI));
121
122 supply_32bit_reg (mips_regnum (current_gdbarch)->pc,
123 (char *)(regp + EF_CP0_EPC));
124 supply_32bit_reg (mips_regnum (current_gdbarch)->badvaddr,
125 (char *)(regp + EF_CP0_BADVADDR));
96f026fc 126 supply_32bit_reg (PS_REGNUM, (char *)(regp + EF_CP0_STATUS));
56cea623
AC		 127 supply_32bit_reg (mips_regnum (current_gdbarch)->cause,
128 (char *)(regp + EF_CP0_CAUSE));
2aa830e4
DJ		 129
130 /* Fill inaccessible registers with zero. */
2aa830e4
DJ		 131 supply_register (UNUSED_REGNUM, zerobuf);
132 for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
133 supply_register (regi, zerobuf);
134}
135
136/* Pack our registers (or one register) into an elf_gregset_t. */
137
138void
139fill_gregset (elf_gregset_t *gregsetp, int regno)
140{
141 int regaddr, regi;
142 elf_greg_t *regp = *gregsetp;
96f026fc 143 void *dst;
2aa830e4
DJ		 144
145 if (regno == -1)
146 {
147 memset (regp, 0, sizeof (elf_gregset_t));
148 for (regi = 0; regi < 32; regi++)
149 fill_gregset (gregsetp, regi);
56cea623
AC		 150 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
151 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
152 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
153 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
2aa830e4 154 fill_gregset (gregsetp, PS_REGNUM);
56cea623 155 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
2aa830e4
DJ		 156
157 return;
158 }
159
160 if (regno < 32)
161 {
2aa830e4 162 dst = regp + regno + EF_REG0;
96f026fc 163 regcache_collect (regno, dst);
2aa830e4
DJ		 164 return;
165 }
166
56cea623
AC		 167 if (regno == mips_regnum (current_gdbarch)->lo)
168 regaddr = EF_LO;
169 else if (regno == mips_regnum (current_gdbarch)->hi)
170 regaddr = EF_HI;
171 else if (regno == mips_regnum (current_gdbarch)->pc)
172 regaddr = EF_CP0_EPC;
173 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
174 regaddr = EF_CP0_BADVADDR;
175 else if (regno == PS_REGNUM)
176 regaddr = EF_CP0_STATUS;
177 else if (regno == mips_regnum (current_gdbarch)->cause)
178 regaddr = EF_CP0_CAUSE;
179 else
180 regaddr = -1;
2aa830e4
DJ		 181
182 if (regaddr != -1)
183 {
2aa830e4 184 dst = regp + regaddr;
96f026fc 185 regcache_collect (regno, dst);
2aa830e4
DJ		 186 }
187}
188
189/* Likewise, unpack an elf_fpregset_t. */
190
191void
192supply_fpregset (elf_fpregset_t *fpregsetp)
193{
52f0bd74 194 int regi;
d9d9c31f 195 char zerobuf[MAX_REGISTER_SIZE];
bf072999 196
d9d9c31f 197 memset (zerobuf, 0, MAX_REGISTER_SIZE);
2aa830e4
DJ		 198
199 for (regi = 0; regi < 32; regi++)
200 supply_register (FP0_REGNUM + regi,
201 (char *)(*fpregsetp + regi));
202
56cea623
AC		 203 supply_register (mips_regnum (current_gdbarch)->fp_control_status,
204 (char *)(*fpregsetp + 32));
2aa830e4 205
56cea623
AC		 206 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
207 supply_register (mips_regnum (current_gdbarch)->fp_implementation_revision,
208 zerobuf);
2aa830e4
DJ		 209}
210
211/* Likewise, pack one or all floating point registers into an
212 elf_fpregset_t. */
213
214void
215fill_fpregset (elf_fpregset_t *fpregsetp, int regno)
216{
217 char *from, *to;
218
219 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
220 {
62700349 221 from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
2aa830e4 222 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
12c266ea 223 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno - FP0_REGNUM));
2aa830e4 224 }
56cea623 225 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
2aa830e4 226 {
62700349 227 from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
2aa830e4 228 to = (char *) (*fpregsetp + 32);
12c266ea 229 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno));
2aa830e4
DJ		 230 }
231 else if (regno == -1)
232 {
233 int regi;
234
235 for (regi = 0; regi < 32; regi++)
236 fill_fpregset (fpregsetp, FP0_REGNUM + regi);
56cea623 237 fill_fpregset(fpregsetp, mips_regnum (current_gdbarch)->fp_control_status);
2aa830e4
DJ		 238 }
239}
240
241/* Map gdb internal register number to ptrace ``address''.
242 These ``addresses'' are normally defined in <asm/ptrace.h>. */
243
96f026fc
KB		 244static CORE_ADDR
245mips_linux_register_addr (int regno, CORE_ADDR blockend)
2aa830e4
DJ		 246{
247 int regaddr;
248
249 if (regno < 0 || regno >= NUM_REGS)
250 error ("Bogon register number %d.", regno);
251
252 if (regno < 32)
253 regaddr = regno;
56cea623
AC		 254 else if ((regno >= mips_regnum (current_gdbarch)->fp0)
255 && (regno < mips_regnum (current_gdbarch)->fp0 + 32))
256 regaddr = FPR_BASE + (regno - mips_regnum (current_gdbarch)->fp0);
257 else if (regno == mips_regnum (current_gdbarch)->pc)
2aa830e4 258 regaddr = PC;
56cea623 259 else if (regno == mips_regnum (current_gdbarch)->cause)
2aa830e4 260 regaddr = CAUSE;
56cea623 261 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
2aa830e4 262 regaddr = BADVADDR;
56cea623 263 else if (regno == mips_regnum (current_gdbarch)->lo)
2aa830e4 264 regaddr = MMLO;
56cea623 265 else if (regno == mips_regnum (current_gdbarch)->hi)
2aa830e4 266 regaddr = MMHI;
56cea623 267 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
2aa830e4 268 regaddr = FPC_CSR;
56cea623 269 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
2aa830e4
DJ		 270 regaddr = FPC_EIR;
271 else
272 error ("Unknowable register number %d.", regno);
273
274 return regaddr;
275}
276
96f026fc
KB		 277
278/* Fetch (and possibly build) an appropriate link_map_offsets
279 structure for native GNU/Linux MIPS targets using the struct offsets
280 defined in link.h (but without actual reference to that file).
281
282 This makes it possible to access GNU/Linux MIPS shared libraries from a
283 GDB that was built on a different host platform (for cross debugging). */
284
285static struct link_map_offsets *
286mips_linux_svr4_fetch_link_map_offsets (void)
287{
288 static struct link_map_offsets lmo;
289 static struct link_map_offsets *lmp = NULL;
290
291 if (lmp == NULL)
292 {
293 lmp = &lmo;
294
295 lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
296 this is all we need. */
297 lmo.r_map_offset = 4;
298 lmo.r_map_size = 4;
299
300 lmo.link_map_size = 20;
301
302 lmo.l_addr_offset = 0;
303 lmo.l_addr_size = 4;
304
305 lmo.l_name_offset = 4;
306 lmo.l_name_size = 4;
307
308 lmo.l_next_offset = 12;
309 lmo.l_next_size = 4;
310
311 lmo.l_prev_offset = 16;
312 lmo.l_prev_size = 4;
313 }
314
315 return lmp;
316}
317
318/* Support for 64-bit ABIs. */
319
320/* Copied from <asm/elf.h>. */
321#define MIPS64_ELF_NGREG 45
322#define MIPS64_ELF_NFPREG 33
323
324typedef unsigned char mips64_elf_greg_t[8];
325typedef mips64_elf_greg_t mips64_elf_gregset_t[MIPS64_ELF_NGREG];
326
327typedef unsigned char mips64_elf_fpreg_t[8];
328typedef mips64_elf_fpreg_t mips64_elf_fpregset_t[MIPS64_ELF_NFPREG];
329
330/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
331#define MIPS64_FPR_BASE 32
332#define MIPS64_PC 64
333#define MIPS64_CAUSE 65
334#define MIPS64_BADVADDR 66
335#define MIPS64_MMHI 67
336#define MIPS64_MMLO 68
337#define MIPS64_FPC_CSR 69
338#define MIPS64_FPC_EIR 70
339
340#define MIPS64_EF_REG0 0
341#define MIPS64_EF_REG31 31
342#define MIPS64_EF_LO 32
343#define MIPS64_EF_HI 33
344#define MIPS64_EF_CP0_EPC 34
345#define MIPS64_EF_CP0_BADVADDR 35
346#define MIPS64_EF_CP0_STATUS 36
347#define MIPS64_EF_CP0_CAUSE 37
348
349#define MIPS64_EF_SIZE 304
350
351/* Figure out where the longjmp will land.
352 We expect the first arg to be a pointer to the jmp_buf structure from
353 which we extract the pc (MIPS_LINUX_JB_PC) that we will land at. The pc
354 is copied into PC. This routine returns 1 on success. */
355
356/* Details about jmp_buf. */
357
358#define MIPS64_LINUX_JB_PC 0
359
360static int
361mips64_linux_get_longjmp_target (CORE_ADDR *pc)
362{
363 CORE_ADDR jb_addr;
364 void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
365 int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
366
367 jb_addr = read_register (A0_REGNUM);
368
369 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
370 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
371 return 0;
372
7c0b4a20 373 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
96f026fc
KB		 374
375 return 1;
376}
377
378/* Unpack an elf_gregset_t into GDB's register cache. */
379
380static void
381mips64_supply_gregset (mips64_elf_gregset_t *gregsetp)
382{
383 int regi;
384 mips64_elf_greg_t *regp = *gregsetp;
d9d9c31f 385 char zerobuf[MAX_REGISTER_SIZE];
96f026fc 386
d9d9c31f 387 memset (zerobuf, 0, MAX_REGISTER_SIZE);
96f026fc
KB		 388
389 for (regi = MIPS64_EF_REG0; regi <= MIPS64_EF_REG31; regi++)
390 supply_register ((regi - MIPS64_EF_REG0), (char *)(regp + regi));
391
56cea623
AC		 392 supply_register (mips_regnum (current_gdbarch)->lo,
393 (char *)(regp + MIPS64_EF_LO));
394 supply_register (mips_regnum (current_gdbarch)->hi,
395 (char *)(regp + MIPS64_EF_HI));
96f026fc 396
56cea623
AC		 397 supply_register (mips_regnum (current_gdbarch)->pc,
398 (char *)(regp + MIPS64_EF_CP0_EPC));
399 supply_register (mips_regnum (current_gdbarch)->badvaddr,
400 (char *)(regp + MIPS64_EF_CP0_BADVADDR));
96f026fc 401 supply_register (PS_REGNUM, (char *)(regp + MIPS64_EF_CP0_STATUS));
56cea623
AC		 402 supply_register (mips_regnum (current_gdbarch)->cause,
403 (char *)(regp + MIPS64_EF_CP0_CAUSE));
96f026fc
KB		 404
405 /* Fill inaccessible registers with zero. */
406 supply_register (UNUSED_REGNUM, zerobuf);
407 for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
408 supply_register (regi, zerobuf);
409}
410
411/* Pack our registers (or one register) into an elf_gregset_t. */
412
413static void
414mips64_fill_gregset (mips64_elf_gregset_t *gregsetp, int regno)
415{
416 int regaddr, regi;
417 mips64_elf_greg_t *regp = *gregsetp;
418 void *src, *dst;
419
420 if (regno == -1)
421 {
422 memset (regp, 0, sizeof (mips64_elf_gregset_t));
423 for (regi = 0; regi < 32; regi++)
424 mips64_fill_gregset (gregsetp, regi);
56cea623
AC		 425 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
426 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
427 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
428 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
96f026fc 429 mips64_fill_gregset (gregsetp, PS_REGNUM);
56cea623 430 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
96f026fc
KB		 431
432 return;
433 }
434
435 if (regno < 32)
436 {
437 dst = regp + regno + MIPS64_EF_REG0;
438 regcache_collect (regno, dst);
439 return;
440 }
441
56cea623
AC		 442 if (regno == mips_regnum (current_gdbarch)->lo)
443 regaddr = MIPS64_EF_LO;
444 else if (regno == mips_regnum (current_gdbarch)->hi)
445 regaddr = MIPS64_EF_HI;
446 else if (regno == mips_regnum (current_gdbarch)->pc)
447 regaddr = MIPS64_EF_CP0_EPC;
448 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
449 regaddr = MIPS64_EF_CP0_BADVADDR;
450 else if (regno == PS_REGNUM)
451 regaddr = MIPS64_EF_CP0_STATUS;
452 else if (regno == mips_regnum (current_gdbarch)->cause)
453 regaddr = MIPS64_EF_CP0_CAUSE;
454 else
455 regaddr = -1;
96f026fc
KB		 456
457 if (regaddr != -1)
458 {
459 dst = regp + regaddr;
460 regcache_collect (regno, dst);
461 }
462}
463
464/* Likewise, unpack an elf_fpregset_t. */
465
466static void
467mips64_supply_fpregset (mips64_elf_fpregset_t *fpregsetp)
468{
52f0bd74 469 int regi;
d9d9c31f 470 char zerobuf[MAX_REGISTER_SIZE];
96f026fc 471
d9d9c31f 472 memset (zerobuf, 0, MAX_REGISTER_SIZE);
96f026fc
KB		 473
474 for (regi = 0; regi < 32; regi++)
475 supply_register (FP0_REGNUM + regi,
476 (char *)(*fpregsetp + regi));
477
56cea623
AC		 478 supply_register (mips_regnum (current_gdbarch)->fp_control_status,
479 (char *)(*fpregsetp + 32));
96f026fc 480
56cea623
AC		 481 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
482 supply_register (mips_regnum (current_gdbarch)->fp_implementation_revision,
483 zerobuf);
96f026fc
KB		 484}
485
486/* Likewise, pack one or all floating point registers into an
487 elf_fpregset_t. */
488
489static void
490mips64_fill_fpregset (mips64_elf_fpregset_t *fpregsetp, int regno)
491{
492 char *from, *to;
493
494 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
495 {
62700349 496 from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
96f026fc 497 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
12c266ea 498 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno - FP0_REGNUM));
96f026fc 499 }
56cea623 500 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
96f026fc 501 {
62700349 502 from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
96f026fc 503 to = (char *) (*fpregsetp + 32);
12c266ea 504 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno));
96f026fc
KB		 505 }
506 else if (regno == -1)
507 {
508 int regi;
509
510 for (regi = 0; regi < 32; regi++)
511 mips64_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
56cea623
AC		 512 mips64_fill_fpregset(fpregsetp,
513 mips_regnum (current_gdbarch)->fp_control_status);
96f026fc
KB		 514 }
515}
516
517
518/* Map gdb internal register number to ptrace ``address''.
519 These ``addresses'' are normally defined in <asm/ptrace.h>. */
520
521static CORE_ADDR
522mips64_linux_register_addr (int regno, CORE_ADDR blockend)
523{
524 int regaddr;
525
526 if (regno < 0 || regno >= NUM_REGS)
527 error ("Bogon register number %d.", regno);
528
529 if (regno < 32)
530 regaddr = regno;
56cea623
AC		 531 else if ((regno >= mips_regnum (current_gdbarch)->fp0)
532 && (regno < mips_regnum (current_gdbarch)->fp0 + 32))
96f026fc 533 regaddr = MIPS64_FPR_BASE + (regno - FP0_REGNUM);
56cea623 534 else if (regno == mips_regnum (current_gdbarch)->pc)
96f026fc 535 regaddr = MIPS64_PC;
56cea623 536 else if (regno == mips_regnum (current_gdbarch)->cause)
96f026fc 537 regaddr = MIPS64_CAUSE;
56cea623 538 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
96f026fc 539 regaddr = MIPS64_BADVADDR;
56cea623 540 else if (regno == mips_regnum (current_gdbarch)->lo)
96f026fc 541 regaddr = MIPS64_MMLO;
56cea623 542 else if (regno == mips_regnum (current_gdbarch)->hi)
96f026fc 543 regaddr = MIPS64_MMHI;
56cea623 544 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
96f026fc 545 regaddr = MIPS64_FPC_CSR;
56cea623 546 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
96f026fc
KB		 547 regaddr = MIPS64_FPC_EIR;
548 else
549 error ("Unknowable register number %d.", regno);
550
551 return regaddr;
552}
553
2aa830e4
DJ		 554/* Use a local version of this function to get the correct types for
555 regsets, until multi-arch core support is ready. */
556
557static void
558fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
559 int which, CORE_ADDR reg_addr)
560{
561 elf_gregset_t gregset;
562 elf_fpregset_t fpregset;
96f026fc
KB		 563 mips64_elf_gregset_t gregset64;
564 mips64_elf_fpregset_t fpregset64;
2aa830e4
DJ		 565
566 if (which == 0)
567 {
96f026fc 568 if (core_reg_size == sizeof (gregset))
2aa830e4 569 {
96f026fc
KB		 570 memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
571 supply_gregset (&gregset);
572 }
573 else if (core_reg_size == sizeof (gregset64))
574 {
575 memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
576 mips64_supply_gregset (&gregset64);
2aa830e4
DJ		 577 }
578 else
579 {
96f026fc 580 warning ("wrong size gregset struct in core file");
2aa830e4
DJ		 581 }
582 }
583 else if (which == 2)
584 {
96f026fc 585 if (core_reg_size == sizeof (fpregset))
2aa830e4 586 {
96f026fc
KB		 587 memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
588 supply_fpregset (&fpregset);
589 }
590 else if (core_reg_size == sizeof (fpregset64))
591 {
592 memcpy ((char *) &fpregset64, core_reg_sect, sizeof (fpregset64));
593 mips64_supply_fpregset (&fpregset64);
2aa830e4
DJ		 594 }
595 else
596 {
96f026fc 597 warning ("wrong size fpregset struct in core file");
2aa830e4
DJ		 598 }
599 }
600}
601
602/* Register that we are able to handle ELF file formats using standard
603 procfs "regset" structures. */
604
605static struct core_fns regset_core_fns =
606{
607 bfd_target_elf_flavour, /* core_flavour */
608 default_check_format, /* check_format */
609 default_core_sniffer, /* core_sniffer */
610 fetch_core_registers, /* core_read_registers */
611 NULL /* next */
612};
613
614/* Fetch (and possibly build) an appropriate link_map_offsets
75c9abc6 615 structure for native GNU/Linux MIPS targets using the struct offsets
2aa830e4
DJ		 616 defined in link.h (but without actual reference to that file).
617
75c9abc6
DJ		 618 This makes it possible to access GNU/Linux MIPS shared libraries from a
619 GDB that was built on a different host platform (for cross debugging). */
2aa830e4 620
19ed69dd 621static struct link_map_offsets *
96f026fc 622mips64_linux_svr4_fetch_link_map_offsets (void)
2aa830e4
DJ		 623{
624 static struct link_map_offsets lmo;
625 static struct link_map_offsets *lmp = NULL;
626
627 if (lmp == NULL)
628 {
629 lmp = &lmo;
630
96f026fc 631 lmo.r_debug_size = 16; /* The actual size is 40 bytes, but
2aa830e4 632 this is all we need. */
96f026fc
KB		 633 lmo.r_map_offset = 8;
634 lmo.r_map_size = 8;
2aa830e4 635
96f026fc 636 lmo.link_map_size = 40;
2aa830e4
DJ		 637
638 lmo.l_addr_offset = 0;
96f026fc 639 lmo.l_addr_size = 8;
2aa830e4 640
96f026fc
KB		 641 lmo.l_name_offset = 8;
642 lmo.l_name_size = 8;
2aa830e4 643
96f026fc
KB		 644 lmo.l_next_offset = 24;
645 lmo.l_next_size = 8;
2aa830e4 646
96f026fc
KB		 647 lmo.l_prev_offset = 32;
648 lmo.l_prev_size = 8;
2aa830e4
DJ		 649 }
650
651 return lmp;
652}
653
96f026fc
KB		 654/* Handle for obtaining pointer to the current register_addr() function
655 for a given architecture. */
656static struct gdbarch_data *register_addr_data;
657
658CORE_ADDR
659register_addr (int regno, CORE_ADDR blockend)
660{
661 CORE_ADDR (*register_addr_ptr) (int, CORE_ADDR) =
662 gdbarch_data (current_gdbarch, register_addr_data);
663
664 gdb_assert (register_addr_ptr != 0);
665
666 return register_addr_ptr (regno, blockend);
667}
668
669static void
670set_mips_linux_register_addr (struct gdbarch *gdbarch,
671 CORE_ADDR (*register_addr_ptr) (int, CORE_ADDR))
672{
030f20e1 673 deprecated_set_gdbarch_data (gdbarch, register_addr_data, register_addr_ptr);
96f026fc
KB		 674}
675
676static void *
677init_register_addr_data (struct gdbarch *gdbarch)
678{
679 return 0;
680}
681
6de918a6
DJ		 682/* Check the code at PC for a dynamic linker lazy resolution stub. Because
683 they aren't in the .plt section, we pattern-match on the code generated
684 by GNU ld. They look like this:
685
686 lw t9,0x8010(gp)
687 addu t7,ra
688 jalr t9,ra
689 addiu t8,zero,INDEX
690
691 (with the appropriate doubleword instructions for N64). Also return the
692 dynamic symbol index used in the last instruction. */
693
694static int
695mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
696{
697 unsigned char buf[28], *p;
698 ULONGEST insn, insn1;
699 int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
700
701 read_memory (pc - 12, buf, 28);
702
703 if (n64)
704 {
705 /* ld t9,0x8010(gp) */
706 insn1 = 0xdf998010;
707 }
708 else
709 {
710 /* lw t9,0x8010(gp) */
711 insn1 = 0x8f998010;
712 }
713
714 p = buf + 12;
715 while (p >= buf)
716 {
717 insn = extract_unsigned_integer (p, 4);
718 if (insn == insn1)
719 break;
720 p -= 4;
721 }
722 if (p < buf)
723 return 0;
724
725 insn = extract_unsigned_integer (p + 4, 4);
726 if (n64)
727 {
728 /* daddu t7,ra */
729 if (insn != 0x03e0782d)
730 return 0;
731 }
732 else
733 {
734 /* addu t7,ra */
735 if (insn != 0x03e07821)
736 return 0;
737 }
738
739 insn = extract_unsigned_integer (p + 8, 4);
740 /* jalr t9,ra */
741 if (insn != 0x0320f809)
742 return 0;
743
744 insn = extract_unsigned_integer (p + 12, 4);
745 if (n64)
746 {
747 /* daddiu t8,zero,0 */
748 if ((insn & 0xffff0000) != 0x64180000)
749 return 0;
750 }
751 else
752 {
753 /* addiu t8,zero,0 */
754 if ((insn & 0xffff0000) != 0x24180000)
755 return 0;
756 }
757
758 return (insn & 0xffff);
759}
760
761/* Return non-zero iff PC belongs to the dynamic linker resolution code
762 or to a stub. */
763
764int
765mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
766{
767 /* Check whether PC is in the dynamic linker. This also checks whether
768 it is in the .plt section, which MIPS does not use. */
769 if (in_solib_dynsym_resolve_code (pc))
770 return 1;
771
772 /* Pattern match for the stub. It would be nice if there were a more
773 efficient way to avoid this check. */
774 if (mips_linux_in_dynsym_stub (pc, NULL))
775 return 1;
776
777 return 0;
778}
779
780/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
781 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
782 implementation of this triggers at "fixup" from the same objfile as
c4c5b7ba
AC		 783 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
784 "__dl_runtime_resolve" directly. An unresolved PLT entry will
785 point to _dl_runtime_resolve, which will first call
786 __dl_runtime_resolve, and then pass control to the resolved
787 function. */
6de918a6
DJ		 788
789static CORE_ADDR
790mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
791{
792 struct minimal_symbol *resolver;
793
794 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
795
796 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
797 return frame_pc_unwind (get_current_frame ());
798
799 return 0;
800}
801
5792a79b
DJ		 802/* Signal trampoline support. There are four supported layouts for a
803 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
804 n64 rt_sigframe. We handle them all independently; not the most
805 efficient way, but simplest. First, declare all the unwinders. */
806
807static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
808 struct frame_info *next_frame,
809 struct trad_frame_cache *this_cache,
810 CORE_ADDR func);
811
812static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
813 struct frame_info *next_frame,
814 struct trad_frame_cache *this_cache,
815 CORE_ADDR func);
816
817#define MIPS_NR_LINUX 4000
818#define MIPS_NR_N64_LINUX 5000
819#define MIPS_NR_N32_LINUX 6000
820
821#define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
822#define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
823#define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
824#define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
825
826#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
827#define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
828#define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
829#define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
830#define MIPS_INST_SYSCALL 0x0000000c
831
832struct tramp_frame mips_linux_o32_sigframe = {
833 4,
834 { MIPS_INST_LI_V0_SIGRETURN, MIPS_INST_SYSCALL, TRAMP_SENTINEL_INSN },
835 mips_linux_o32_sigframe_init
836};
837
838struct tramp_frame mips_linux_o32_rt_sigframe = {
839 4,
840 { MIPS_INST_LI_V0_RT_SIGRETURN, MIPS_INST_SYSCALL, TRAMP_SENTINEL_INSN },
841 mips_linux_o32_sigframe_init
842};
843
844struct tramp_frame mips_linux_n32_rt_sigframe = {
845 4,
846 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, MIPS_INST_SYSCALL, TRAMP_SENTINEL_INSN },
847 mips_linux_n32n64_sigframe_init
848};
849
850struct tramp_frame mips_linux_n64_rt_sigframe = {
851 4,
852 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, MIPS_INST_SYSCALL, TRAMP_SENTINEL_INSN },
853 mips_linux_n32n64_sigframe_init
854};
855
856/* *INDENT-OFF* */
857/* The unwinder for o32 signal frames. The legacy structures look
858 like this:
859
860 struct sigframe {
861 u32 sf_ass[4]; [argument save space for o32]
862 u32 sf_code[2]; [signal trampoline]
863 struct sigcontext sf_sc;
864 sigset_t sf_mask;
865 };
866
867 struct sigcontext {
868 unsigned int sc_regmask; [Unused]
869 unsigned int sc_status;
870 unsigned long long sc_pc;
871 unsigned long long sc_regs[32];
872 unsigned long long sc_fpregs[32];
873 unsigned int sc_ownedfp;
874 unsigned int sc_fpc_csr;
875 unsigned int sc_fpc_eir; [Unused]
876 unsigned int sc_used_math;
877 unsigned int sc_ssflags; [Unused]
878 [Alignment hole of four bytes]
879 unsigned long long sc_mdhi;
880 unsigned long long sc_mdlo;
881
882 unsigned int sc_cause; [Unused]
883 unsigned int sc_badvaddr; [Unused]
884
885 unsigned long sc_sigset[4]; [kernel's sigset_t]
886 };
887
888 The RT signal frames look like this:
889
890 struct rt_sigframe {
891 u32 rs_ass[4]; [argument save space for o32]
892 u32 rs_code[2] [signal trampoline]
893 struct siginfo rs_info;
894 struct ucontext rs_uc;
895 };
896
897 struct ucontext {
898 unsigned long uc_flags;
899 struct ucontext *uc_link;
900 stack_t uc_stack;
901 [Alignment hole of four bytes]
902 struct sigcontext uc_mcontext;
903 sigset_t uc_sigmask;
904 }; */
905/* *INDENT-ON* */
906
907#define SIGFRAME_CODE_OFFSET (4 * 4)
908#define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
909
910#define RTSIGFRAME_SIGINFO_SIZE 128
911#define STACK_T_SIZE (3 * 4)
912#define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
913#define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
914 + RTSIGFRAME_SIGINFO_SIZE \
915 + UCONTEXT_SIGCONTEXT_OFFSET)
916
917#define SIGCONTEXT_PC (1 * 8)
918#define SIGCONTEXT_REGS (2 * 8)
919#define SIGCONTEXT_FPREGS (34 * 8)
920#define SIGCONTEXT_FPCSR (66 * 8 + 4)
921#define SIGCONTEXT_HI (69 * 8)
922#define SIGCONTEXT_LO (70 * 8)
923#define SIGCONTEXT_CAUSE (71 * 8 + 0)
924#define SIGCONTEXT_BADVADDR (71 * 8 + 4)
925
926#define SIGCONTEXT_REG_SIZE 8
927
928static void
929mips_linux_o32_sigframe_init (const struct tramp_frame *self,
930 struct frame_info *next_frame,
931 struct trad_frame_cache *this_cache,
932 CORE_ADDR func)
933{
934 int ireg, reg_position;
935 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
936 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
937
938 if (self == &mips_linux_o32_sigframe)
939 sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
940 else
941 sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
942
943 /* I'm not proud of this hack. Eventually we will have the infrastructure
944 to indicate the size of saved registers on a per-frame basis, but
945 right now we don't; the kernel saves eight bytes but we only want
946 four. */
947 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
948 sigcontext_base += 4;
949
950#if 0
951 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
952 sigcontext_base + SIGCONTEXT_REGS);
953#endif
954
955 for (ireg = 1; ireg < 32; ireg++)
956 trad_frame_set_reg_addr (this_cache, ireg + ZERO_REGNUM + NUM_REGS,
957 sigcontext_base + SIGCONTEXT_REGS
958 + ireg * SIGCONTEXT_REG_SIZE);
959
960 for (ireg = 0; ireg < 32; ireg++)
961 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
962 sigcontext_base + SIGCONTEXT_FPREGS
963 + ireg * SIGCONTEXT_REG_SIZE);
964
965 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
966 sigcontext_base + SIGCONTEXT_PC);
967
968 trad_frame_set_reg_addr (this_cache, regs->fp_control_status + NUM_REGS,
969 sigcontext_base + SIGCONTEXT_FPCSR);
970 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
971 sigcontext_base + SIGCONTEXT_HI);
972 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
973 sigcontext_base + SIGCONTEXT_LO);
974 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
975 sigcontext_base + SIGCONTEXT_CAUSE);
976 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
977 sigcontext_base + SIGCONTEXT_BADVADDR);
978
979 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
980 trad_frame_set_id (this_cache,
981 frame_id_build (func - SIGFRAME_CODE_OFFSET, func));
982}
983
984/* *INDENT-OFF* */
985/* For N32/N64 things look different. There is no non-rt signal frame.
986
987 struct rt_sigframe_n32 {
988 u32 rs_ass[4]; [ argument save space for o32 ]
989 u32 rs_code[2]; [ signal trampoline ]
990 struct siginfo rs_info;
991 struct ucontextn32 rs_uc;
992 };
993
994 struct ucontextn32 {
995 u32 uc_flags;
996 s32 uc_link;
997 stack32_t uc_stack;
998 struct sigcontext uc_mcontext;
999 sigset_t uc_sigmask; [ mask last for extensibility ]
1000 };
1001
1002 struct rt_sigframe_n32 {
1003 u32 rs_ass[4]; [ argument save space for o32 ]
1004 u32 rs_code[2]; [ signal trampoline ]
1005 struct siginfo rs_info;
1006 struct ucontext rs_uc;
1007 };
1008
1009 struct ucontext {
1010 unsigned long uc_flags;
1011 struct ucontext *uc_link;
1012 stack_t uc_stack;
1013 struct sigcontext uc_mcontext;
1014 sigset_t uc_sigmask; [ mask last for extensibility ]
1015 };
1016
1017 And the sigcontext is different (this is for both n32 and n64):
1018
1019 struct sigcontext {
1020 unsigned long long sc_regs[32];
1021 unsigned long long sc_fpregs[32];
1022 unsigned long long sc_mdhi;
1023 unsigned long long sc_mdlo;
1024 unsigned long long sc_pc;
1025 unsigned int sc_status;
1026 unsigned int sc_fpc_csr;
1027 unsigned int sc_fpc_eir;
1028 unsigned int sc_used_math;
1029 unsigned int sc_cause;
1030 unsigned int sc_badvaddr;
1031 }; */
1032/* *INDENT-ON* */
1033
1034#define N32_STACK_T_SIZE STACK_T_SIZE
1035#define N64_STACK_T_SIZE (2 * 8 + 4)
1036#define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1037#define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1038#define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1039 + RTSIGFRAME_SIGINFO_SIZE \
1040 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1041#define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1042 + RTSIGFRAME_SIGINFO_SIZE \
1043 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1044
1045#define N64_SIGCONTEXT_REGS (0 * 8)
1046#define N64_SIGCONTEXT_FPREGS (32 * 8)
1047#define N64_SIGCONTEXT_HI (64 * 8)
1048#define N64_SIGCONTEXT_LO (65 * 8)
1049#define N64_SIGCONTEXT_PC (66 * 8)
1050#define N64_SIGCONTEXT_FPCSR (67 * 8 + 1 * 4)
1051#define N64_SIGCONTEXT_FIR (67 * 8 + 2 * 4)
1052#define N64_SIGCONTEXT_CAUSE (67 * 8 + 4 * 4)
1053#define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
1054
1055#define N64_SIGCONTEXT_REG_SIZE 8
1056
1057static void
1058mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1059 struct frame_info *next_frame,
1060 struct trad_frame_cache *this_cache,
1061 CORE_ADDR func)
1062{
1063 int ireg, reg_position;
1064 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
1065 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
1066
1067 if (self == &mips_linux_n32_rt_sigframe)
1068 sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
1069 else
1070 sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
1071
1072#if 0
1073 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
1074 sigcontext_base + N64_SIGCONTEXT_REGS);
1075#endif
1076
1077 for (ireg = 1; ireg < 32; ireg++)
1078 trad_frame_set_reg_addr (this_cache, ireg + ZERO_REGNUM + NUM_REGS,
1079 sigcontext_base + N64_SIGCONTEXT_REGS
1080 + ireg * N64_SIGCONTEXT_REG_SIZE);
1081
1082 for (ireg = 0; ireg < 32; ireg++)
1083 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
1084 sigcontext_base + N64_SIGCONTEXT_FPREGS
1085 + ireg * N64_SIGCONTEXT_REG_SIZE);
1086
1087 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
1088 sigcontext_base + N64_SIGCONTEXT_PC);
1089
1090 trad_frame_set_reg_addr (this_cache, regs->fp_control_status + NUM_REGS,
1091 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1092 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
1093 sigcontext_base + N64_SIGCONTEXT_HI);
1094 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
1095 sigcontext_base + N64_SIGCONTEXT_LO);
1096 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
1097 sigcontext_base + N64_SIGCONTEXT_CAUSE);
1098 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
1099 sigcontext_base + N64_SIGCONTEXT_BADVADDR);
1100
1101 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1102 trad_frame_set_id (this_cache,
1103 frame_id_build (func - SIGFRAME_CODE_OFFSET, func));
1104}
1105
1106/* Initialize one of the GNU/Linux OS ABIs. */
1107
19ed69dd
KB		 1108static void
1109mips_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1110{
96f026fc
KB		 1111 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1112 enum mips_abi abi = mips_abi (gdbarch);
1113
1114 switch (abi)
1115 {
1116 case MIPS_ABI_O32:
1117 set_gdbarch_get_longjmp_target (gdbarch,
1118 mips_linux_get_longjmp_target);
1119 set_solib_svr4_fetch_link_map_offsets
1120 (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
1121 set_mips_linux_register_addr (gdbarch, mips_linux_register_addr);
fb2be677
AC		 1122 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1123 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
96f026fc
KB		 1124 break;
1125 case MIPS_ABI_N32:
1126 set_gdbarch_get_longjmp_target (gdbarch,
1127 mips_linux_get_longjmp_target);
1128 set_solib_svr4_fetch_link_map_offsets
1129 (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
1130 set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
fb2be677 1131 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
96f026fc
KB		 1132 break;
1133 case MIPS_ABI_N64:
1134 set_gdbarch_get_longjmp_target (gdbarch,
1135 mips64_linux_get_longjmp_target);
1136 set_solib_svr4_fetch_link_map_offsets
1137 (gdbarch, mips64_linux_svr4_fetch_link_map_offsets);
1138 set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
fb2be677 1139 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
96f026fc
KB		 1140 break;
1141 default:
1142 internal_error (__FILE__, __LINE__, "can't handle ABI");
1143 break;
1144 }
6de918a6
DJ		 1145
1146 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1147
c4c5b7ba
AC		 1148 /* This overrides the MIPS16 stub support from mips-tdep. But no
1149 one uses MIPS16 on GNU/Linux yet, so this isn't much of a loss. */
6de918a6 1150 set_gdbarch_in_solib_call_trampoline (gdbarch, mips_linux_in_dynsym_stub);
19ed69dd
KB		 1151}
1152
2aa830e4 1153void
d1bacddc 1154_initialize_mips_linux_tdep (void)
2aa830e4 1155{
96f026fc
KB		 1156 const struct bfd_arch_info *arch_info;
1157
1158 register_addr_data =
030f20e1 1159 gdbarch_data_register_post_init (init_register_addr_data);
96f026fc
KB		 1160
1161 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1162 arch_info != NULL;
1163 arch_info = arch_info->next)
1164 {
1165 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach, GDB_OSABI_LINUX,
1166 mips_linux_init_abi);
1167 }
1168
2aa830e4
DJ		 1169 add_core_fns (&regset_core_fns);
1170}
GDB Binutils - Deliverables
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