* dwarf2read.c (read_tag_const_type, read_tag_volatile_type):
[deliverable/binutils-gdb.git] / gdb / mips-nat.c
CommitLineData
c906108c
SS
1/* Low level DECstation interface to ptrace, for GDB when running native.
2 Copyright 1988, 1989, 1991, 1992, 1995 Free Software Foundation, Inc.
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "inferior.h"
25#include "gdbcore.h"
26#include <sys/ptrace.h>
27#include <sys/types.h>
28#include <sys/param.h>
29#include <sys/user.h>
30#undef JB_S0
31#undef JB_S1
32#undef JB_S2
33#undef JB_S3
34#undef JB_S4
35#undef JB_S5
36#undef JB_S6
37#undef JB_S7
38#undef JB_SP
39#undef JB_S8
40#undef JB_PC
41#undef JB_SR
42#undef NJBREGS
43#include <setjmp.h> /* For JB_XXX. */
44
45/* Size of elements in jmpbuf */
46
47#define JB_ELEMENT_SIZE 4
48
49/* Map gdb internal register number to ptrace ``address''.
50 These ``addresses'' are defined in DECstation <sys/ptrace.h> */
51
52#define REGISTER_PTRACE_ADDR(regno) \
53 (regno < 32 ? GPR_BASE + regno \
54 : regno == PC_REGNUM ? PC \
55 : regno == CAUSE_REGNUM ? CAUSE \
56 : regno == HI_REGNUM ? MMHI \
57 : regno == LO_REGNUM ? MMLO \
58 : regno == FCRCS_REGNUM ? FPC_CSR \
59 : regno == FCRIR_REGNUM ? FPC_EIR \
60 : regno >= FP0_REGNUM ? FPR_BASE + (regno - FP0_REGNUM) \
61 : 0)
62
c5aa993b
JM
63static char zerobuf[MAX_REGISTER_RAW_SIZE] =
64{0};
c906108c 65
a14ed312 66static void fetch_core_registers (char *, unsigned, int, CORE_ADDR);
c906108c
SS
67
68/* Get all registers from the inferior */
69
70void
fba45db2 71fetch_inferior_registers (int regno)
c906108c
SS
72{
73 register unsigned int regaddr;
74 char buf[MAX_REGISTER_RAW_SIZE];
75 register int i;
76
77 registers_fetched ();
78
79 for (regno = 1; regno < NUM_REGS; regno++)
80 {
81 regaddr = REGISTER_PTRACE_ADDR (regno);
82 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
c5aa993b
JM
83 {
84 *(int *) &buf[i] = ptrace (PT_READ_U, inferior_pid,
c906108c 85 (PTRACE_ARG3_TYPE) regaddr, 0);
c5aa993b
JM
86 regaddr += sizeof (int);
87 }
c906108c
SS
88 supply_register (regno, buf);
89 }
90
91 supply_register (ZERO_REGNUM, zerobuf);
92 /* Frame ptr reg must appear to be 0; it is faked by stack handling code. */
93 supply_register (FP_REGNUM, zerobuf);
94}
95
96/* Store our register values back into the inferior.
97 If REGNO is -1, do this for all registers.
98 Otherwise, REGNO specifies which register (so we can save time). */
99
100void
fba45db2 101store_inferior_registers (int regno)
c906108c
SS
102{
103 register unsigned int regaddr;
104 char buf[80];
105
106 if (regno > 0)
107 {
108 if (regno == ZERO_REGNUM || regno == PS_REGNUM
109 || regno == BADVADDR_REGNUM || regno == CAUSE_REGNUM
110 || regno == FCRIR_REGNUM || regno == FP_REGNUM
111 || (regno >= FIRST_EMBED_REGNUM && regno <= LAST_EMBED_REGNUM))
112 return;
113 regaddr = REGISTER_PTRACE_ADDR (regno);
114 errno = 0;
115 ptrace (PT_WRITE_U, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
116 read_register (regno));
117 if (errno != 0)
118 {
119 sprintf (buf, "writing register number %d", regno);
120 perror_with_name (buf);
121 }
122 }
123 else
124 {
125 for (regno = 0; regno < NUM_REGS; regno++)
126 store_inferior_registers (regno);
127 }
128}
129
130
131/* Figure out where the longjmp will land.
132 We expect the first arg to be a pointer to the jmp_buf structure from which
133 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
134 This routine returns true on success. */
135
136int
fba45db2 137get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
138{
139 CORE_ADDR jb_addr;
35fc8285 140 char *buf;
c906108c 141
35fc8285 142 buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
c906108c
SS
143 jb_addr = read_register (A0_REGNUM);
144
145 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
146 TARGET_PTR_BIT / TARGET_CHAR_BIT))
147 return 0;
148
149 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
150
151 return 1;
152}
153
154/* Extract the register values out of the core file and store
155 them where `read_register' will find them.
156
157 CORE_REG_SECT points to the register values themselves, read into memory.
158 CORE_REG_SIZE is the size of that area.
159 WHICH says which set of registers we are handling (0 = int, 2 = float
c5aa993b 160 on machines where they are discontiguous).
c906108c 161 REG_ADDR is the offset from u.u_ar0 to the register values relative to
c5aa993b
JM
162 core_reg_sect. This is used with old-fashioned core files to
163 locate the registers in a large upage-plus-stack ".reg" section.
164 Original upage address X is at location core_reg_sect+x+reg_addr.
c906108c
SS
165 */
166
167static void
fba45db2
KB
168fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
169 CORE_ADDR reg_addr)
c906108c
SS
170{
171 register int regno;
172 register unsigned int addr;
173 int bad_reg = -1;
c5aa993b 174 register reg_ptr = -reg_addr; /* Original u.u_ar0 is -reg_addr. */
c906108c
SS
175
176 /* If u.u_ar0 was an absolute address in the core file, relativize it now,
177 so we can use it as an offset into core_reg_sect. When we're done,
178 "register 0" will be at core_reg_sect+reg_ptr, and we can use
179 register_addr to offset to the other registers. If this is a modern
180 core file without a upage, reg_ptr will be zero and this is all a big
181 NOP. */
182 if (reg_ptr > core_reg_size)
183#ifdef KERNEL_U_ADDR
184 reg_ptr -= KERNEL_U_ADDR;
185#else
186 error ("Old mips core file can't be processed on this machine.");
187#endif
188
189 for (regno = 0; regno < NUM_REGS; regno++)
190 {
191 addr = register_addr (regno, reg_ptr);
c5aa993b
JM
192 if (addr >= core_reg_size)
193 {
194 if (bad_reg < 0)
195 bad_reg = regno;
196 }
197 else
198 {
199 supply_register (regno, core_reg_sect + addr);
200 }
c906108c
SS
201 }
202 if (bad_reg >= 0)
203 {
204 error ("Register %s not found in core file.", REGISTER_NAME (bad_reg));
205 }
206 supply_register (ZERO_REGNUM, zerobuf);
207 /* Frame ptr reg must appear to be 0; it is faked by stack handling code. */
208 supply_register (FP_REGNUM, zerobuf);
209}
210
211/* Return the address in the core dump or inferior of register REGNO.
212 BLOCKEND is the address of the end of the user structure. */
213
214CORE_ADDR
fba45db2 215register_addr (int regno, CORE_ADDR blockend)
c906108c
SS
216{
217 CORE_ADDR addr;
218
219 if (regno < 0 || regno >= NUM_REGS)
220 error ("Invalid register number %d.", regno);
221
222 REGISTER_U_ADDR (addr, blockend, regno);
223
224 return addr;
225}
c906108c 226\f
c5aa993b 227
c906108c
SS
228/* Register that we are able to handle mips core file formats.
229 FIXME: is this really bfd_target_unknown_flavour? */
230
231static struct core_fns mips_core_fns =
232{
2acceee2
JM
233 bfd_target_unknown_flavour, /* core_flavour */
234 default_check_format, /* check_format */
235 default_core_sniffer, /* core_sniffer */
236 fetch_core_registers, /* core_read_registers */
237 NULL /* next */
c906108c
SS
238};
239
240void
fba45db2 241_initialize_core_mips (void)
c906108c
SS
242{
243 add_core_fns (&mips_core_fns);
244}
This page took 0.0910609999999999 seconds and 4 git commands to generate.