* symtab.c (decode_line_1): Use end of block to figure out whether
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
bd5635a1 33#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 34\f
c2a0f1cb
ILT
35/* Some MIPS boards don't support floating point, so we permit the
36 user to turn it off. */
37int mips_fpu = 1;
38
3127785a
RP
39/* Heuristic_proc_start may hunt through the text section for a long
40 time across a 2400 baud serial line. Allows the user to limit this
41 search. */
42static unsigned int heuristic_fence_post = 0;
43
0f552c5f
JG
44#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
45#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
46#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
47#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
48#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
49#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
50#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
51#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
52#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
53#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 54#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
55#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
56#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
57
58struct linked_proc_info
59{
60 struct mips_extra_func_info info;
61 struct linked_proc_info *next;
dac4929a 62} *linked_proc_desc_table = NULL;
bd5635a1
RP
63
64\f
65#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
66
0f552c5f 67static int
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RP
68read_next_frame_reg(fi, regno)
69 FRAME fi;
70 int regno;
71{
e157305c
PS
72 /* If it is the frame for sigtramp we have a complete sigcontext
73 immediately below the frame and we get the saved registers from there.
74 If the stack layout for sigtramp changes we might have to change these
75 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 76#ifndef SIGFRAME_BASE
e157305c
PS
77#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
78#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
79#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 80#endif
bd5635a1
RP
81 for (; fi; fi = fi->next)
82 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
83 int offset;
84 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 85 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
86 else return 0;
87 return read_memory_integer(fi->frame + offset, 4);
88 }
89 else if (regno == SP_REGNUM) return fi->frame;
90 else if (fi->saved_regs->regs[regno])
91 return read_memory_integer(fi->saved_regs->regs[regno], 4);
92 return read_register(regno);
93}
94
95int
96mips_frame_saved_pc(frame)
97 FRAME frame;
98{
0f552c5f 99 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 100 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 101
bd5635a1
RP
102 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
103 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 104
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RP
105 return read_next_frame_reg(frame, pcreg);
106}
107
108static struct mips_extra_func_info temp_proc_desc;
109static struct frame_saved_regs temp_saved_regs;
110
a8172eea
RP
111/* This fencepost looks highly suspicious to me. Removing it also
112 seems suspicious as it could affect remote debugging across serial
3127785a 113 lines. */
a8172eea 114
0f552c5f
JG
115static CORE_ADDR
116heuristic_proc_start(pc)
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RP
117 CORE_ADDR pc;
118{
bd5635a1 119 CORE_ADDR start_pc = pc;
3127785a 120 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
121
122 if (start_pc == 0) return 0;
3127785a
RP
123
124 if (heuristic_fence_post == UINT_MAX
125 || fence < VM_MIN_ADDRESS)
126 fence = VM_MIN_ADDRESS;
0f552c5f 127
bd5635a1
RP
128 /* search back for previous return */
129 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
130 if (start_pc < fence)
131 {
3127785a
RP
132 /* It's not clear to me why we reach this point when
133 stop_soon_quietly, but with this test, at least we
134 don't print out warnings for every child forked (eg, on
135 decstation). 22apr93 rich@cygnus.com. */
136 if (!stop_soon_quietly)
137 {
138 if (fence == VM_MIN_ADDRESS)
139 warning("Hit beginning of text section without finding");
140 else
141 warning("Hit heuristic-fence-post without finding");
142
143 warning("enclosing function for pc 0x%x", pc);
144 }
145
a8172eea
RP
146 return 0;
147 }
bd5635a1
RP
148 else if (ABOUT_TO_RETURN(start_pc))
149 break;
150
151 start_pc += 8; /* skip return, and its delay slot */
152#if 0
153 /* skip nops (usually 1) 0 - is this */
154 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
155 start_pc += 4;
156#endif
157 return start_pc;
158}
159
0f552c5f 160static mips_extra_func_info_t
bd5635a1
RP
161heuristic_proc_desc(start_pc, limit_pc, next_frame)
162 CORE_ADDR start_pc, limit_pc;
163 FRAME next_frame;
164{
165 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
166 CORE_ADDR cur_pc;
167 int frame_size;
168 int has_frame_reg = 0;
169 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
170 unsigned long reg_mask = 0;
171
172 if (start_pc == 0) return NULL;
173 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
174 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
175 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
176
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RP
177 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
178 restart:
179 frame_size = 0;
180 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 181 char buf[4];
bd5635a1
RP
182 unsigned long word;
183 int status;
184
34df79fc
JK
185 status = read_memory_nobpt (cur_pc, buf, 4);
186 if (status) memory_error (status, cur_pc);
187 word = extract_unsigned_integer (buf, 4);
188
bd5635a1
RP
189 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
190 frame_size += (-word) & 0xFFFF;
191 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
192 frame_size += (-word) & 0xFFFF;
193 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
194 int reg = (word & 0x001F0000) >> 16;
195 reg_mask |= 1 << reg;
196 temp_saved_regs.regs[reg] = sp + (short)word;
197 }
198 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
199 if ((unsigned short)word != frame_size)
200 reg30 = sp + (unsigned short)word;
201 else if (!has_frame_reg) {
202 int alloca_adjust;
203 has_frame_reg = 1;
204 reg30 = read_next_frame_reg(next_frame, 30);
205 alloca_adjust = reg30 - (sp + (unsigned short)word);
206 if (alloca_adjust > 0) {
207 /* FP > SP + frame_size. This may be because
208 /* of an alloca or somethings similar.
209 * Fix sp to "pre-alloca" value, and try again.
210 */
211 sp += alloca_adjust;
212 goto restart;
213 }
214 }
215 }
216 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
217 int reg = (word & 0x001F0000) >> 16;
218 reg_mask |= 1 << reg;
219 temp_saved_regs.regs[reg] = reg30 + (short)word;
220 }
221 }
222 if (has_frame_reg) {
223 PROC_FRAME_REG(&temp_proc_desc) = 30;
224 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
225 }
226 else {
227 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
228 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
229 }
230 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
231 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
232 return &temp_proc_desc;
233}
234
0f552c5f 235static mips_extra_func_info_t
bd5635a1
RP
236find_proc_desc(pc, next_frame)
237 CORE_ADDR pc;
238 FRAME next_frame;
239{
240 mips_extra_func_info_t proc_desc;
0f552c5f 241 struct block *b = block_for_pc(pc);
bd5635a1 242 struct symbol *sym =
dac4929a 243 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
244
245 if (sym)
bd5635a1
RP
246 {
247 /* IF this is the topmost frame AND
248 * (this proc does not have debugging information OR
249 * the PC is in the procedure prologue)
be772100 250 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
251 * the actual code) to replace the "official" proc_desc.
252 */
0f552c5f 253 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
254 if (next_frame == NULL) {
255 struct symtab_and_line val;
256 struct symbol *proc_symbol =
257 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 258
bd5635a1
RP
259 if (proc_symbol) {
260 val = find_pc_line (BLOCK_START
261 (SYMBOL_BLOCK_VALUE(proc_symbol)),
262 0);
263 val.pc = val.end ? val.end : pc;
264 }
265 if (!proc_symbol || pc < val.pc) {
266 mips_extra_func_info_t found_heuristic =
267 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
268 pc, next_frame);
269 if (found_heuristic) proc_desc = found_heuristic;
270 }
271 }
272 }
273 else
274 {
0f552c5f
JG
275 /* Is linked_proc_desc_table really necessary? It only seems to be used
276 by procedure call dummys. However, the procedures being called ought
277 to have their own proc_descs, and even if they don't,
278 heuristic_proc_desc knows how to create them! */
279
bd5635a1
RP
280 register struct linked_proc_info *link;
281 for (link = linked_proc_desc_table; link; link = link->next)
282 if (PROC_LOW_ADDR(&link->info) <= pc
283 && PROC_HIGH_ADDR(&link->info) > pc)
284 return &link->info;
285 proc_desc =
286 heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame);
287 }
288 return proc_desc;
289}
290
291mips_extra_func_info_t cached_proc_desc;
292
0f552c5f
JG
293FRAME_ADDR
294mips_frame_chain(frame)
bd5635a1
RP
295 FRAME frame;
296{
bd5635a1
RP
297 mips_extra_func_info_t proc_desc;
298 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 299
0f552c5f
JG
300 if (saved_pc == 0 || inside_entry_file (saved_pc))
301 return 0;
302
bd5635a1 303 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
304 if (!proc_desc)
305 return 0;
306
bd5635a1
RP
307 cached_proc_desc = proc_desc;
308 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 309 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
310}
311
312void
313init_extra_frame_info(fci)
314 struct frame_info *fci;
315{
316 extern struct obstack frame_cache_obstack;
317 /* Use proc_desc calculated in frame_chain */
318 mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc :
319 find_proc_desc(fci->pc, fci->next);
0f552c5f 320
bd5635a1
RP
321 fci->saved_regs = (struct frame_saved_regs*)
322 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
323 bzero(fci->saved_regs, sizeof(struct frame_saved_regs));
324 fci->proc_desc =
0f552c5f 325 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
326 if (proc_desc)
327 {
328 int ireg;
329 CORE_ADDR reg_position;
330 unsigned long mask;
331 /* r0 bit means kernel trap */
332 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
333
c2a0f1cb
ILT
334 /* Fixup frame-pointer - only needed for top frame */
335 /* This may not be quite right, if proc has a real frame register */
2fcdae93 336 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
337 fci->frame = read_register (SP_REGNUM);
338 else
339 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
340 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
341
342 if (proc_desc == &temp_proc_desc)
343 *fci->saved_regs = temp_saved_regs;
344 else
345 {
346 /* find which general-purpose registers were saved */
347 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
348 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
349 for (ireg= 31; mask; --ireg, mask <<= 1)
350 if (mask & 0x80000000)
351 {
352 fci->saved_regs->regs[ireg] = reg_position;
353 reg_position -= 4;
354 }
355 /* find which floating-point registers were saved */
356 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
357 /* The freg_offset points to where the first *double* register is saved.
358 * So skip to the high-order word. */
359 reg_position += 4;
360 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
361 for (ireg = 31; mask; --ireg, mask <<= 1)
362 if (mask & 0x80000000)
363 {
d747e0af 364 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
bd5635a1
RP
365 reg_position -= 4;
366 }
367 }
368
369 /* hack: if argument regs are saved, guess these contain args */
370 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
371 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
372 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
373 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
374 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
375
376 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
377 }
bd5635a1
RP
378}
379
a70dc898
RP
380/* MIPS stack frames are almost impenetrable. When execution stops,
381 we basically have to look at symbol information for the function
382 that we stopped in, which tells us *which* register (if any) is
383 the base of the frame pointer, and what offset from that register
384 the frame itself is at.
385
386 This presents a problem when trying to examine a stack in memory
387 (that isn't executing at the moment), using the "frame" command. We
388 don't have a PC, nor do we have any registers except SP.
389
390 This routine takes two arguments, SP and PC, and tries to make the
391 cached frames look as if these two arguments defined a frame on the
392 cache. This allows the rest of info frame to extract the important
393 arguments without difficulty. */
394
395FRAME
c2a0f1cb
ILT
396setup_arbitrary_frame (argc, argv)
397 int argc;
398 FRAME_ADDR *argv;
a70dc898 399{
c2a0f1cb
ILT
400 if (argc != 2)
401 error ("MIPS frame specifications require two arguments: sp and pc");
402
403 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
404}
405
bd5635a1 406
0f552c5f
JG
407CORE_ADDR
408mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
409 int nargs;
410 value *args;
411 CORE_ADDR sp;
412 int struct_return;
413 CORE_ADDR struct_addr;
414{
415 CORE_ADDR buf;
416 register i;
417 int accumulate_size = struct_return ? 4 : 0;
418 struct mips_arg { char *contents; int len; int offset; };
419 struct mips_arg *mips_args =
420 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
421 register struct mips_arg *m_arg;
422 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
423 extern value value_arg_coerce();
424 value arg = value_arg_coerce (args[i]);
425 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
426 /* This entire mips-specific routine is because doubles must be aligned
427 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
428 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
429 * breaks their varargs implementation...). A correct solution
430 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
431 * in stdarg.h/varargs.h).
432 */
433 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
434 m_arg->offset = accumulate_size;
435 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
436 m_arg->contents = VALUE_CONTENTS(arg);
437 }
438 accumulate_size = (accumulate_size + 7) & (-8);
439 if (accumulate_size < 16) accumulate_size = 16;
440 sp -= accumulate_size;
441 for (i = nargs; m_arg--, --i >= 0; )
442 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
443 if (struct_return) {
444 buf = struct_addr;
a70dc898
RP
445 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
446 }
bd5635a1
RP
447 return sp;
448}
449
450/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
451#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
452
453void
454mips_push_dummy_frame()
455{
456 int ireg;
457 struct linked_proc_info *link = (struct linked_proc_info*)
458 xmalloc(sizeof(struct linked_proc_info));
459 mips_extra_func_info_t proc_desc = &link->info;
460 CORE_ADDR sp = read_register (SP_REGNUM);
461 CORE_ADDR save_address;
462 REGISTER_TYPE buffer;
463 link->next = linked_proc_desc_table;
464 linked_proc_desc_table = link;
465#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
466#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
467#define GEN_REG_SAVE_COUNT 22
468#define FLOAT_REG_SAVE_MASK MASK(0,19)
469#define FLOAT_REG_SAVE_COUNT 20
470#define SPECIAL_REG_SAVE_COUNT 4
471 /*
472 * The registers we must save are all those not preserved across
473 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
474 * In addition, we must save the PC, and PUSH_FP_REGNUM.
475 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
476 *
477 * Dummy frame layout:
478 * (high memory)
479 * Saved PC
480 * Saved MMHI, MMLO, FPC_CSR
481 * Saved R31
482 * Saved R28
483 * ...
484 * Saved R1
485 * Saved D18 (i.e. F19, F18)
486 * ...
487 * Saved D0 (i.e. F1, F0)
c2a0f1cb 488 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
489 * Parameter build area (not yet implemented)
490 * (low memory)
491 */
492 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 493 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
494 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
495 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
496 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
497 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
498 /* save general registers */
499 save_address = sp + PROC_REG_OFFSET(proc_desc);
500 for (ireg = 32; --ireg >= 0; )
501 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
502 {
503 buffer = read_register (ireg);
a70dc898 504 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
505 save_address -= 4;
506 }
0b0d6c3f
PS
507 /* save floating-points registers starting with high order word */
508 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
509 for (ireg = 32; --ireg >= 0; )
510 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
511 {
7d9884b9 512 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 513 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
514 save_address -= 4;
515 }
516 write_register (PUSH_FP_REGNUM, sp);
517 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
518 PROC_FRAME_OFFSET(proc_desc) = 0;
519 buffer = read_register (PC_REGNUM);
a70dc898 520 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 521 buffer = read_register (HI_REGNUM);
a70dc898 522 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 523 buffer = read_register (LO_REGNUM);
a70dc898 524 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 525 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 526 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
527 sp -= 4 * (GEN_REG_SAVE_COUNT
528 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
529 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
530 write_register (SP_REGNUM, sp);
531 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
532 PROC_HIGH_ADDR(proc_desc) = sp;
533 SET_PROC_DESC_IS_DUMMY(proc_desc);
534 PROC_PC_REG(proc_desc) = RA_REGNUM;
535}
536
537void
538mips_pop_frame()
dac4929a
SG
539{
540 register int regnum;
bd5635a1
RP
541 FRAME frame = get_current_frame ();
542 CORE_ADDR new_sp = frame->frame;
dac4929a 543
a70dc898 544 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
545
546 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
547 if (proc_desc)
548 {
549 for (regnum = 32; --regnum >= 0; )
550 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
551 write_register (regnum,
552 read_memory_integer (frame->saved_regs->regs[regnum],
553 4));
554 for (regnum = 32; --regnum >= 0; )
555 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
556 write_register (regnum + FP0_REGNUM,
557 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
558 }
559 write_register (SP_REGNUM, new_sp);
560 flush_cached_frames ();
561 /* We let mips_init_extra_frame_info figure out the frame pointer */
562 set_current_frame (create_new_frame (0, read_pc ()));
563
bd5635a1
RP
564 if (PROC_DESC_IS_DUMMY(proc_desc))
565 {
dac4929a
SG
566 struct linked_proc_info *pi_ptr, *prev_ptr;
567
568 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
569 pi_ptr != NULL;
570 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
571 {
572 if (&pi_ptr->info == proc_desc)
573 break;
574 }
575
576 if (pi_ptr == NULL)
577 error ("Can't locate dummy extra frame info\n");
578
579 if (prev_ptr != NULL)
580 prev_ptr->next = pi_ptr->next;
581 else
582 linked_proc_desc_table = pi_ptr->next;
583
584 free (pi_ptr);
585
bd5635a1
RP
586 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
587 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
588 if (mips_fpu)
589 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 590 }
bd5635a1
RP
591}
592
0f552c5f 593static void
a70dc898 594mips_print_register (regnum, all)
bd5635a1
RP
595 int regnum, all;
596{
ac8cf67d 597 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1
RP
598 REGISTER_TYPE val;
599
5e2e79f8
FF
600 /* Get the data in raw format. */
601 if (read_relative_register_raw_bytes (regnum, raw_buffer))
602 {
603 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
604 return;
605 }
606
d747e0af
MT
607 /* If an even floating pointer register, also print as double. */
608 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
609 && !((regnum-FP0_REGNUM) & 1)) {
ac8cf67d
PS
610 char dbuffer[MAX_REGISTER_RAW_SIZE];
611
612 read_relative_register_raw_bytes (regnum, dbuffer);
613 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
614#ifdef REGISTER_CONVERT_TO_TYPE
615 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
616#endif
d747e0af 617 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
ac8cf67d 618 val_print (builtin_type_double, dbuffer, 0,
bd5635a1 619 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 620 printf_filtered ("); ");
bd5635a1
RP
621 }
622 fputs_filtered (reg_names[regnum], stdout);
623#ifndef NUMERIC_REG_NAMES
624 if (regnum < 32)
625 printf_filtered ("(r%d): ", regnum);
626 else
627#endif
628 printf_filtered (": ");
629
630 /* If virtual format is floating, print it that way. */
631 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
632 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
633 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
634 stdout, 0, 1, 0, Val_pretty_default);
635 }
636 /* Else print as integer in hex. */
637 else
638 {
639 long val;
640
34df79fc
JK
641 val = extract_signed_integer (raw_buffer,
642 REGISTER_RAW_SIZE (regnum));
643
bd5635a1
RP
644 if (val == 0)
645 printf_filtered ("0");
646 else if (all)
d8b3b00e 647 printf_filtered (local_hex_format(), val);
bd5635a1 648 else
d8b3b00e 649 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
650 }
651}
652
d8b3b00e 653/* Replacement for generic do_registers_info. */
0f552c5f 654void
361bf6ee 655mips_do_registers_info (regnum, fpregs)
bd5635a1 656 int regnum;
361bf6ee 657 int fpregs;
bd5635a1
RP
658{
659 if (regnum != -1) {
660 mips_print_register (regnum, 0);
661 printf_filtered ("\n");
662 }
663 else {
664 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
665 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
666 regnum++;
667 continue;
668 }
bd5635a1
RP
669 mips_print_register (regnum, 1);
670 regnum++;
671 if ((regnum & 3) == 0 || regnum == NUM_REGS)
672 printf_filtered (";\n");
673 else
674 printf_filtered ("; ");
675 }
676 }
677}
678/* Return number of args passed to a frame. described by FIP.
679 Can return -1, meaning no way to tell. */
680
0f552c5f 681int
bd5635a1
RP
682mips_frame_num_args(fip)
683 FRAME fip;
684{
685#if 0
686 struct chain_info_t *p;
687
688 p = mips_find_cached_frame(FRAME_FP(fip));
689 if (p->valid)
690 return p->the_info.numargs;
691#endif
692 return -1;
693}
407a8389 694\f
0b0d6c3f
PS
695/* To skip prologues, I use this predicate. Returns either PC
696 itself if the code at PC does not look like a function prologue;
697 otherwise returns an address that (if we're lucky) follows
698 the prologue. */
bd5635a1 699
be772100
JG
700CORE_ADDR
701mips_skip_prologue(pc)
bd5635a1
RP
702 CORE_ADDR pc;
703{
704 struct symbol *f;
705 struct block *b;
706 unsigned long inst;
d747e0af 707 int offset;
0b0d6c3f 708 int seen_sp_adjust = 0;
bd5635a1 709
e157305c
PS
710 /* Skip the typical prologue instructions. These are the stack adjustment
711 instruction and the instructions that save registers on the stack
712 or in the gcc frame. */
d747e0af
MT
713 for (offset = 0; offset < 100; offset += 4) {
714 inst = read_memory_integer(pc + offset, 4);
e157305c 715 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 716 seen_sp_adjust = 1;
e157305c
PS
717 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
718 continue; /* sw reg,n($sp) */
719 /* reg != $zero */
720 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
721 continue;
722 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
723 /* sx reg,n($s8) */
724 continue; /* reg != $zero */
725 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 726 continue;
1b71de8e
PS
727 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
728 continue;
0b0d6c3f 729 else
e157305c 730 break;
d747e0af 731 }
e157305c
PS
732 return pc + offset;
733
734/* FIXME schauer. The following code seems no longer necessary if we
735 always skip the typical prologue instructions. */
736
737#if 0
0b0d6c3f
PS
738 if (seen_sp_adjust)
739 return pc + offset;
bd5635a1
RP
740
741 /* Well, it looks like a frameless. Let's make sure.
742 Note that we are not called on the current PC,
743 but on the function`s start PC, and I have definitely
744 seen optimized code that adjusts the SP quite later */
745 b = block_for_pc(pc);
746 if (!b) return pc;
747
dac4929a 748 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
749 if (!f) return pc;
750 /* Ideally, I would like to use the adjusted info
751 from mips_frame_info(), but for all practical
752 purposes it will not matter (and it would require
753 a different definition of SKIP_PROLOGUE())
754
755 Actually, it would not hurt to skip the storing
756 of arguments on the stack as well. */
0f552c5f 757 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
758 return pc + 4;
759
760 return pc;
e157305c 761#endif
bd5635a1 762}
c2a0f1cb 763
ac8cf67d
PS
764/* Given a return value in `regbuf' with a type `valtype',
765 extract and copy its value into `valbuf'. */
766void
767mips_extract_return_value (valtype, regbuf, valbuf)
768 struct type *valtype;
769 char regbuf[REGISTER_BYTES];
770 char *valbuf;
771{
772 int regnum;
773
774 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
775
776 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
777#ifdef REGISTER_CONVERT_TO_TYPE
778 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
779#endif
780}
781
782/* Given a return value in `regbuf' with a type `valtype',
783 write it's value into the appropriate register. */
784void
785mips_store_return_value (valtype, valbuf)
786 struct type *valtype;
787 char *valbuf;
788{
789 int regnum;
790 char raw_buffer[MAX_REGISTER_RAW_SIZE];
791
792 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
793 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
794
795#ifdef REGISTER_CONVERT_FROM_TYPE
796 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
797#endif
798
799 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
800}
801
3127785a
RP
802/* Let the user turn off floating point and set the fence post for
803 heuristic_proc_start. */
c2a0f1cb
ILT
804
805void
806_initialize_mips_tdep ()
807{
808 add_show_from_set
a8172eea 809 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
810 (char *) &mips_fpu,
811 "Set use of floating point coprocessor.\n\
812Turn off to avoid using floating point instructions when calling functions\n\
813or dealing with return values.", &setlist),
814 &showlist);
3127785a
RP
815
816 add_show_from_set
817 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
818 (char *) &heuristic_fence_post,
819 "Set the distance searched for the start of a function.\n\
ac8cf67d 820Set number of bytes to be searched backward to find the beginning of a\n\
3127785a
RP
821function without symbols.", &setlist),
822 &showlist);
c2a0f1cb 823}
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