* stabs.texinfo: Express disapproval of 'D' symbol descriptor
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
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RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
bd5635a1 33#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 34\f
c2a0f1cb
ILT
35/* Some MIPS boards don't support floating point, so we permit the
36 user to turn it off. */
37int mips_fpu = 1;
38
3127785a
RP
39/* Heuristic_proc_start may hunt through the text section for a long
40 time across a 2400 baud serial line. Allows the user to limit this
41 search. */
42static unsigned int heuristic_fence_post = 0;
43
0f552c5f
JG
44#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
45#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
46#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
47#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
48#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
49#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
50#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
51#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
52#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
53#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 54#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
55#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
56#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
57
58struct linked_proc_info
59{
60 struct mips_extra_func_info info;
61 struct linked_proc_info *next;
dac4929a 62} *linked_proc_desc_table = NULL;
bd5635a1
RP
63
64\f
65#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
66
0f552c5f 67static int
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RP
68read_next_frame_reg(fi, regno)
69 FRAME fi;
70 int regno;
71{
e157305c
PS
72 /* If it is the frame for sigtramp we have a complete sigcontext
73 immediately below the frame and we get the saved registers from there.
74 If the stack layout for sigtramp changes we might have to change these
75 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 76#ifndef SIGFRAME_BASE
e157305c
PS
77#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
78#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
79#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 80#endif
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RP
81 for (; fi; fi = fi->next)
82 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
83 int offset;
84 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 85 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
86 else return 0;
87 return read_memory_integer(fi->frame + offset, 4);
88 }
89 else if (regno == SP_REGNUM) return fi->frame;
90 else if (fi->saved_regs->regs[regno])
91 return read_memory_integer(fi->saved_regs->regs[regno], 4);
92 return read_register(regno);
93}
94
95int
96mips_frame_saved_pc(frame)
97 FRAME frame;
98{
0f552c5f 99 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 100 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 101
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RP
102 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
103 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 104
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RP
105 return read_next_frame_reg(frame, pcreg);
106}
107
108static struct mips_extra_func_info temp_proc_desc;
109static struct frame_saved_regs temp_saved_regs;
110
a8172eea
RP
111/* This fencepost looks highly suspicious to me. Removing it also
112 seems suspicious as it could affect remote debugging across serial
3127785a 113 lines. */
a8172eea 114
0f552c5f
JG
115static CORE_ADDR
116heuristic_proc_start(pc)
bd5635a1
RP
117 CORE_ADDR pc;
118{
bd5635a1 119 CORE_ADDR start_pc = pc;
3127785a 120 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
121
122 if (start_pc == 0) return 0;
3127785a
RP
123
124 if (heuristic_fence_post == UINT_MAX
125 || fence < VM_MIN_ADDRESS)
126 fence = VM_MIN_ADDRESS;
0f552c5f 127
bd5635a1
RP
128 /* search back for previous return */
129 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
130 if (start_pc < fence)
131 {
3127785a
RP
132 /* It's not clear to me why we reach this point when
133 stop_soon_quietly, but with this test, at least we
134 don't print out warnings for every child forked (eg, on
135 decstation). 22apr93 rich@cygnus.com. */
136 if (!stop_soon_quietly)
137 {
138 if (fence == VM_MIN_ADDRESS)
139 warning("Hit beginning of text section without finding");
140 else
141 warning("Hit heuristic-fence-post without finding");
142
143 warning("enclosing function for pc 0x%x", pc);
144 }
145
a8172eea
RP
146 return 0;
147 }
bd5635a1
RP
148 else if (ABOUT_TO_RETURN(start_pc))
149 break;
150
151 start_pc += 8; /* skip return, and its delay slot */
152#if 0
153 /* skip nops (usually 1) 0 - is this */
154 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
155 start_pc += 4;
156#endif
157 return start_pc;
158}
159
0f552c5f 160static mips_extra_func_info_t
bd5635a1
RP
161heuristic_proc_desc(start_pc, limit_pc, next_frame)
162 CORE_ADDR start_pc, limit_pc;
163 FRAME next_frame;
164{
165 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
166 CORE_ADDR cur_pc;
167 int frame_size;
168 int has_frame_reg = 0;
169 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
170 unsigned long reg_mask = 0;
171
172 if (start_pc == 0) return NULL;
173 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
174 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
175 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
176
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RP
177 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
178 restart:
179 frame_size = 0;
180 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
181 unsigned long word;
182 int status;
183
a70dc898 184 status = read_memory_nobpt (cur_pc, (char *)&word, 4);
bd5635a1 185 if (status) memory_error (status, cur_pc);
5e2e79f8 186 SWAP_TARGET_AND_HOST (&word, sizeof (word));
bd5635a1
RP
187 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
188 frame_size += (-word) & 0xFFFF;
189 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
190 frame_size += (-word) & 0xFFFF;
191 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
192 int reg = (word & 0x001F0000) >> 16;
193 reg_mask |= 1 << reg;
194 temp_saved_regs.regs[reg] = sp + (short)word;
195 }
196 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
197 if ((unsigned short)word != frame_size)
198 reg30 = sp + (unsigned short)word;
199 else if (!has_frame_reg) {
200 int alloca_adjust;
201 has_frame_reg = 1;
202 reg30 = read_next_frame_reg(next_frame, 30);
203 alloca_adjust = reg30 - (sp + (unsigned short)word);
204 if (alloca_adjust > 0) {
205 /* FP > SP + frame_size. This may be because
206 /* of an alloca or somethings similar.
207 * Fix sp to "pre-alloca" value, and try again.
208 */
209 sp += alloca_adjust;
210 goto restart;
211 }
212 }
213 }
214 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
215 int reg = (word & 0x001F0000) >> 16;
216 reg_mask |= 1 << reg;
217 temp_saved_regs.regs[reg] = reg30 + (short)word;
218 }
219 }
220 if (has_frame_reg) {
221 PROC_FRAME_REG(&temp_proc_desc) = 30;
222 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
223 }
224 else {
225 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
226 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
227 }
228 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
229 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
230 return &temp_proc_desc;
231}
232
0f552c5f 233static mips_extra_func_info_t
bd5635a1
RP
234find_proc_desc(pc, next_frame)
235 CORE_ADDR pc;
236 FRAME next_frame;
237{
238 mips_extra_func_info_t proc_desc;
0f552c5f 239 struct block *b = block_for_pc(pc);
bd5635a1 240 struct symbol *sym =
dac4929a 241 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
0f552c5f
JG
242
243 if (sym)
bd5635a1
RP
244 {
245 /* IF this is the topmost frame AND
246 * (this proc does not have debugging information OR
247 * the PC is in the procedure prologue)
be772100 248 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
249 * the actual code) to replace the "official" proc_desc.
250 */
0f552c5f 251 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
252 if (next_frame == NULL) {
253 struct symtab_and_line val;
254 struct symbol *proc_symbol =
255 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 256
bd5635a1
RP
257 if (proc_symbol) {
258 val = find_pc_line (BLOCK_START
259 (SYMBOL_BLOCK_VALUE(proc_symbol)),
260 0);
261 val.pc = val.end ? val.end : pc;
262 }
263 if (!proc_symbol || pc < val.pc) {
264 mips_extra_func_info_t found_heuristic =
265 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
266 pc, next_frame);
267 if (found_heuristic) proc_desc = found_heuristic;
268 }
269 }
270 }
271 else
272 {
0f552c5f
JG
273 /* Is linked_proc_desc_table really necessary? It only seems to be used
274 by procedure call dummys. However, the procedures being called ought
275 to have their own proc_descs, and even if they don't,
276 heuristic_proc_desc knows how to create them! */
277
bd5635a1
RP
278 register struct linked_proc_info *link;
279 for (link = linked_proc_desc_table; link; link = link->next)
280 if (PROC_LOW_ADDR(&link->info) <= pc
281 && PROC_HIGH_ADDR(&link->info) > pc)
282 return &link->info;
283 proc_desc =
284 heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame);
285 }
286 return proc_desc;
287}
288
289mips_extra_func_info_t cached_proc_desc;
290
0f552c5f
JG
291FRAME_ADDR
292mips_frame_chain(frame)
bd5635a1
RP
293 FRAME frame;
294{
bd5635a1
RP
295 mips_extra_func_info_t proc_desc;
296 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 297
0f552c5f
JG
298 if (saved_pc == 0 || inside_entry_file (saved_pc))
299 return 0;
300
bd5635a1 301 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
302 if (!proc_desc)
303 return 0;
304
bd5635a1
RP
305 cached_proc_desc = proc_desc;
306 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 307 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
308}
309
310void
311init_extra_frame_info(fci)
312 struct frame_info *fci;
313{
314 extern struct obstack frame_cache_obstack;
315 /* Use proc_desc calculated in frame_chain */
316 mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc :
317 find_proc_desc(fci->pc, fci->next);
0f552c5f 318
bd5635a1
RP
319 fci->saved_regs = (struct frame_saved_regs*)
320 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
321 bzero(fci->saved_regs, sizeof(struct frame_saved_regs));
322 fci->proc_desc =
0f552c5f 323 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
324 if (proc_desc)
325 {
326 int ireg;
327 CORE_ADDR reg_position;
328 unsigned long mask;
329 /* r0 bit means kernel trap */
330 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
331
c2a0f1cb
ILT
332 /* Fixup frame-pointer - only needed for top frame */
333 /* This may not be quite right, if proc has a real frame register */
334 if (fci->pc == PROC_LOW_ADDR(proc_desc))
335 fci->frame = read_register (SP_REGNUM);
336 else
337 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
338 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
339
340 if (proc_desc == &temp_proc_desc)
341 *fci->saved_regs = temp_saved_regs;
342 else
343 {
344 /* find which general-purpose registers were saved */
345 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
346 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
347 for (ireg= 31; mask; --ireg, mask <<= 1)
348 if (mask & 0x80000000)
349 {
350 fci->saved_regs->regs[ireg] = reg_position;
351 reg_position -= 4;
352 }
353 /* find which floating-point registers were saved */
354 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
355 /* The freg_offset points to where the first *double* register is saved.
356 * So skip to the high-order word. */
357 reg_position += 4;
358 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
359 for (ireg = 31; mask; --ireg, mask <<= 1)
360 if (mask & 0x80000000)
361 {
d747e0af 362 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
bd5635a1
RP
363 reg_position -= 4;
364 }
365 }
366
367 /* hack: if argument regs are saved, guess these contain args */
368 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
369 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
370 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
371 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
372 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
373
374 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
375 }
bd5635a1
RP
376}
377
a70dc898
RP
378/* MIPS stack frames are almost impenetrable. When execution stops,
379 we basically have to look at symbol information for the function
380 that we stopped in, which tells us *which* register (if any) is
381 the base of the frame pointer, and what offset from that register
382 the frame itself is at.
383
384 This presents a problem when trying to examine a stack in memory
385 (that isn't executing at the moment), using the "frame" command. We
386 don't have a PC, nor do we have any registers except SP.
387
388 This routine takes two arguments, SP and PC, and tries to make the
389 cached frames look as if these two arguments defined a frame on the
390 cache. This allows the rest of info frame to extract the important
391 arguments without difficulty. */
392
393FRAME
c2a0f1cb
ILT
394setup_arbitrary_frame (argc, argv)
395 int argc;
396 FRAME_ADDR *argv;
a70dc898 397{
c2a0f1cb
ILT
398 if (argc != 2)
399 error ("MIPS frame specifications require two arguments: sp and pc");
400
401 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
402}
403
bd5635a1 404
0f552c5f
JG
405CORE_ADDR
406mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
407 int nargs;
408 value *args;
409 CORE_ADDR sp;
410 int struct_return;
411 CORE_ADDR struct_addr;
412{
413 CORE_ADDR buf;
414 register i;
415 int accumulate_size = struct_return ? 4 : 0;
416 struct mips_arg { char *contents; int len; int offset; };
417 struct mips_arg *mips_args =
418 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
419 register struct mips_arg *m_arg;
420 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
421 extern value value_arg_coerce();
422 value arg = value_arg_coerce (args[i]);
423 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
424 /* This entire mips-specific routine is because doubles must be aligned
425 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
426 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
427 * breaks their varargs implementation...). A correct solution
428 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
429 * in stdarg.h/varargs.h).
430 */
431 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
432 m_arg->offset = accumulate_size;
433 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
434 m_arg->contents = VALUE_CONTENTS(arg);
435 }
436 accumulate_size = (accumulate_size + 7) & (-8);
437 if (accumulate_size < 16) accumulate_size = 16;
438 sp -= accumulate_size;
439 for (i = nargs; m_arg--, --i >= 0; )
440 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
441 if (struct_return) {
442 buf = struct_addr;
a70dc898
RP
443 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
444 }
bd5635a1
RP
445 return sp;
446}
447
448/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
449#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
450
451void
452mips_push_dummy_frame()
453{
454 int ireg;
455 struct linked_proc_info *link = (struct linked_proc_info*)
456 xmalloc(sizeof(struct linked_proc_info));
457 mips_extra_func_info_t proc_desc = &link->info;
458 CORE_ADDR sp = read_register (SP_REGNUM);
459 CORE_ADDR save_address;
460 REGISTER_TYPE buffer;
461 link->next = linked_proc_desc_table;
462 linked_proc_desc_table = link;
463#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
464#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
465#define GEN_REG_SAVE_COUNT 22
466#define FLOAT_REG_SAVE_MASK MASK(0,19)
467#define FLOAT_REG_SAVE_COUNT 20
468#define SPECIAL_REG_SAVE_COUNT 4
469 /*
470 * The registers we must save are all those not preserved across
471 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
472 * In addition, we must save the PC, and PUSH_FP_REGNUM.
473 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
474 *
475 * Dummy frame layout:
476 * (high memory)
477 * Saved PC
478 * Saved MMHI, MMLO, FPC_CSR
479 * Saved R31
480 * Saved R28
481 * ...
482 * Saved R1
483 * Saved D18 (i.e. F19, F18)
484 * ...
485 * Saved D0 (i.e. F1, F0)
c2a0f1cb 486 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
487 * Parameter build area (not yet implemented)
488 * (low memory)
489 */
490 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 491 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
492 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
493 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
494 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
495 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
496 /* save general registers */
497 save_address = sp + PROC_REG_OFFSET(proc_desc);
498 for (ireg = 32; --ireg >= 0; )
499 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
500 {
501 buffer = read_register (ireg);
a70dc898 502 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
503 save_address -= 4;
504 }
0b0d6c3f
PS
505 /* save floating-points registers starting with high order word */
506 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
507 for (ireg = 32; --ireg >= 0; )
508 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
509 {
7d9884b9 510 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 511 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
512 save_address -= 4;
513 }
514 write_register (PUSH_FP_REGNUM, sp);
515 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
516 PROC_FRAME_OFFSET(proc_desc) = 0;
517 buffer = read_register (PC_REGNUM);
a70dc898 518 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 519 buffer = read_register (HI_REGNUM);
a70dc898 520 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 521 buffer = read_register (LO_REGNUM);
a70dc898 522 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 523 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 524 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
525 sp -= 4 * (GEN_REG_SAVE_COUNT
526 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
527 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
528 write_register (SP_REGNUM, sp);
529 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
530 PROC_HIGH_ADDR(proc_desc) = sp;
531 SET_PROC_DESC_IS_DUMMY(proc_desc);
532 PROC_PC_REG(proc_desc) = RA_REGNUM;
533}
534
535void
536mips_pop_frame()
dac4929a
SG
537{
538 register int regnum;
bd5635a1
RP
539 FRAME frame = get_current_frame ();
540 CORE_ADDR new_sp = frame->frame;
dac4929a 541
a70dc898 542 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
543
544 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
545 if (proc_desc)
546 {
547 for (regnum = 32; --regnum >= 0; )
548 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
549 write_register (regnum,
550 read_memory_integer (frame->saved_regs->regs[regnum],
551 4));
552 for (regnum = 32; --regnum >= 0; )
553 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
554 write_register (regnum + FP0_REGNUM,
555 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
556 }
557 write_register (SP_REGNUM, new_sp);
558 flush_cached_frames ();
559 /* We let mips_init_extra_frame_info figure out the frame pointer */
560 set_current_frame (create_new_frame (0, read_pc ()));
561
bd5635a1
RP
562 if (PROC_DESC_IS_DUMMY(proc_desc))
563 {
dac4929a
SG
564 struct linked_proc_info *pi_ptr, *prev_ptr;
565
566 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
567 pi_ptr != NULL;
568 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
569 {
570 if (&pi_ptr->info == proc_desc)
571 break;
572 }
573
574 if (pi_ptr == NULL)
575 error ("Can't locate dummy extra frame info\n");
576
577 if (prev_ptr != NULL)
578 prev_ptr->next = pi_ptr->next;
579 else
580 linked_proc_desc_table = pi_ptr->next;
581
582 free (pi_ptr);
583
bd5635a1
RP
584 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
585 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
586 if (mips_fpu)
587 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 588 }
bd5635a1
RP
589}
590
0f552c5f 591static void
a70dc898 592mips_print_register (regnum, all)
bd5635a1
RP
593 int regnum, all;
594{
ac8cf67d 595 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
bd5635a1
RP
596 REGISTER_TYPE val;
597
5e2e79f8
FF
598 /* Get the data in raw format. */
599 if (read_relative_register_raw_bytes (regnum, raw_buffer))
600 {
601 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
602 return;
603 }
604
d747e0af
MT
605 /* If an even floating pointer register, also print as double. */
606 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
607 && !((regnum-FP0_REGNUM) & 1)) {
ac8cf67d
PS
608 char dbuffer[MAX_REGISTER_RAW_SIZE];
609
610 read_relative_register_raw_bytes (regnum, dbuffer);
611 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
612#ifdef REGISTER_CONVERT_TO_TYPE
613 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
614#endif
d747e0af 615 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
ac8cf67d 616 val_print (builtin_type_double, dbuffer, 0,
bd5635a1 617 stdout, 0, 1, 0, Val_pretty_default);
d747e0af 618 printf_filtered ("); ");
bd5635a1
RP
619 }
620 fputs_filtered (reg_names[regnum], stdout);
621#ifndef NUMERIC_REG_NAMES
622 if (regnum < 32)
623 printf_filtered ("(r%d): ", regnum);
624 else
625#endif
626 printf_filtered (": ");
627
628 /* If virtual format is floating, print it that way. */
629 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
630 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
631 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
632 stdout, 0, 1, 0, Val_pretty_default);
633 }
634 /* Else print as integer in hex. */
635 else
636 {
637 long val;
638
639 bcopy (raw_buffer, &val, sizeof (long));
5e2e79f8 640 SWAP_TARGET_AND_HOST ((char *)&val, sizeof (long));
bd5635a1
RP
641 if (val == 0)
642 printf_filtered ("0");
643 else if (all)
d8b3b00e 644 printf_filtered (local_hex_format(), val);
bd5635a1 645 else
d8b3b00e 646 printf_filtered ("%s=%d", local_hex_string(val), val);
bd5635a1
RP
647 }
648}
649
d8b3b00e 650/* Replacement for generic do_registers_info. */
0f552c5f 651void
361bf6ee 652mips_do_registers_info (regnum, fpregs)
bd5635a1 653 int regnum;
361bf6ee 654 int fpregs;
bd5635a1
RP
655{
656 if (regnum != -1) {
657 mips_print_register (regnum, 0);
658 printf_filtered ("\n");
659 }
660 else {
661 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
662 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
663 regnum++;
664 continue;
665 }
bd5635a1
RP
666 mips_print_register (regnum, 1);
667 regnum++;
668 if ((regnum & 3) == 0 || regnum == NUM_REGS)
669 printf_filtered (";\n");
670 else
671 printf_filtered ("; ");
672 }
673 }
674}
675/* Return number of args passed to a frame. described by FIP.
676 Can return -1, meaning no way to tell. */
677
0f552c5f 678int
bd5635a1
RP
679mips_frame_num_args(fip)
680 FRAME fip;
681{
682#if 0
683 struct chain_info_t *p;
684
685 p = mips_find_cached_frame(FRAME_FP(fip));
686 if (p->valid)
687 return p->the_info.numargs;
688#endif
689 return -1;
690}
691
692\f
693/* Bad floats: Returns 0 if P points to a valid IEEE floating point number,
694 1 if P points to a denormalized number or a NaN. LEN says whether this is
695 a single-precision or double-precision float */
696#define SINGLE_EXP_BITS 8
697#define DOUBLE_EXP_BITS 11
698int
699isa_NAN(p, len)
700 int *p, len;
701{
702 int exponent;
703 if (len == 4)
704 {
705 exponent = *p;
706 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
f68e6931 707 return ((exponent == -1) || (exponent == 0 && ((*p << 1) != 0)));
bd5635a1
RP
708 }
709 else if (len == 8)
710 {
c2a0f1cb
ILT
711#if TARGET_BYTE_ORDER == BIG_ENDIAN
712 exponent = *p;
713#else
bd5635a1 714 exponent = *(p+1);
c2a0f1cb 715#endif
bd5635a1
RP
716 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
717 return ((exponent == -1) || (! exponent && *p * *(p+1)));
718 }
719 else return 1;
720}
407a8389 721\f
0b0d6c3f
PS
722/* To skip prologues, I use this predicate. Returns either PC
723 itself if the code at PC does not look like a function prologue;
724 otherwise returns an address that (if we're lucky) follows
725 the prologue. */
bd5635a1 726
be772100
JG
727CORE_ADDR
728mips_skip_prologue(pc)
bd5635a1
RP
729 CORE_ADDR pc;
730{
731 struct symbol *f;
732 struct block *b;
733 unsigned long inst;
d747e0af 734 int offset;
0b0d6c3f 735 int seen_sp_adjust = 0;
bd5635a1 736
e157305c
PS
737 /* Skip the typical prologue instructions. These are the stack adjustment
738 instruction and the instructions that save registers on the stack
739 or in the gcc frame. */
d747e0af
MT
740 for (offset = 0; offset < 100; offset += 4) {
741 inst = read_memory_integer(pc + offset, 4);
e157305c 742 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 743 seen_sp_adjust = 1;
e157305c
PS
744 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
745 continue; /* sw reg,n($sp) */
746 /* reg != $zero */
747 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
748 continue;
749 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
750 /* sx reg,n($s8) */
751 continue; /* reg != $zero */
752 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 753 continue;
1b71de8e
PS
754 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
755 continue;
0b0d6c3f 756 else
e157305c 757 break;
d747e0af 758 }
e157305c
PS
759 return pc + offset;
760
761/* FIXME schauer. The following code seems no longer necessary if we
762 always skip the typical prologue instructions. */
763
764#if 0
0b0d6c3f
PS
765 if (seen_sp_adjust)
766 return pc + offset;
bd5635a1
RP
767
768 /* Well, it looks like a frameless. Let's make sure.
769 Note that we are not called on the current PC,
770 but on the function`s start PC, and I have definitely
771 seen optimized code that adjusts the SP quite later */
772 b = block_for_pc(pc);
773 if (!b) return pc;
774
dac4929a 775 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
776 if (!f) return pc;
777 /* Ideally, I would like to use the adjusted info
778 from mips_frame_info(), but for all practical
779 purposes it will not matter (and it would require
780 a different definition of SKIP_PROLOGUE())
781
782 Actually, it would not hurt to skip the storing
783 of arguments on the stack as well. */
0f552c5f 784 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
785 return pc + 4;
786
787 return pc;
e157305c 788#endif
bd5635a1 789}
c2a0f1cb 790
ac8cf67d
PS
791/* Given a return value in `regbuf' with a type `valtype',
792 extract and copy its value into `valbuf'. */
793void
794mips_extract_return_value (valtype, regbuf, valbuf)
795 struct type *valtype;
796 char regbuf[REGISTER_BYTES];
797 char *valbuf;
798{
799 int regnum;
800
801 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
802
803 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
804#ifdef REGISTER_CONVERT_TO_TYPE
805 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
806#endif
807}
808
809/* Given a return value in `regbuf' with a type `valtype',
810 write it's value into the appropriate register. */
811void
812mips_store_return_value (valtype, valbuf)
813 struct type *valtype;
814 char *valbuf;
815{
816 int regnum;
817 char raw_buffer[MAX_REGISTER_RAW_SIZE];
818
819 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
820 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
821
822#ifdef REGISTER_CONVERT_FROM_TYPE
823 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
824#endif
825
826 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
827}
828
3127785a
RP
829/* Let the user turn off floating point and set the fence post for
830 heuristic_proc_start. */
c2a0f1cb
ILT
831
832void
833_initialize_mips_tdep ()
834{
835 add_show_from_set
a8172eea 836 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
837 (char *) &mips_fpu,
838 "Set use of floating point coprocessor.\n\
839Turn off to avoid using floating point instructions when calling functions\n\
840or dealing with return values.", &setlist),
841 &showlist);
3127785a
RP
842
843 add_show_from_set
844 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
845 (char *) &heuristic_fence_post,
846 "Set the distance searched for the start of a function.\n\
ac8cf67d 847Set number of bytes to be searched backward to find the beginning of a\n\
3127785a
RP
848function without symbols.", &setlist),
849 &showlist);
c2a0f1cb 850}
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