* gdbserver/low-sun3.c: New file.
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
ee5fb959
JK
37static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
38
c2a0f1cb
ILT
39/* Some MIPS boards don't support floating point, so we permit the
40 user to turn it off. */
41int mips_fpu = 1;
42
3127785a
RP
43/* Heuristic_proc_start may hunt through the text section for a long
44 time across a 2400 baud serial line. Allows the user to limit this
45 search. */
46static unsigned int heuristic_fence_post = 0;
47
0f552c5f
JG
48#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
49#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
50#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
51#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
52#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
53#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
54#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
55#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
56#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
57#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 58#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
59#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
60#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
61
62struct linked_proc_info
63{
64 struct mips_extra_func_info info;
65 struct linked_proc_info *next;
dac4929a 66} *linked_proc_desc_table = NULL;
bd5635a1
RP
67
68\f
69#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
70
0f552c5f 71static int
bd5635a1
RP
72read_next_frame_reg(fi, regno)
73 FRAME fi;
74 int regno;
75{
e157305c
PS
76 /* If it is the frame for sigtramp we have a complete sigcontext
77 immediately below the frame and we get the saved registers from there.
78 If the stack layout for sigtramp changes we might have to change these
79 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 80#ifndef SIGFRAME_BASE
e157305c
PS
81#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
82#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
83#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 84#endif
bd5635a1
RP
85 for (; fi; fi = fi->next)
86 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
87 int offset;
88 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 89 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
90 else return 0;
91 return read_memory_integer(fi->frame + offset, 4);
92 }
93 else if (regno == SP_REGNUM) return fi->frame;
94 else if (fi->saved_regs->regs[regno])
95 return read_memory_integer(fi->saved_regs->regs[regno], 4);
96 return read_register(regno);
97}
98
99int
100mips_frame_saved_pc(frame)
101 FRAME frame;
102{
0f552c5f 103 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 104 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 105
bd5635a1
RP
106 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
107 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 108
bd5635a1
RP
109 return read_next_frame_reg(frame, pcreg);
110}
111
112static struct mips_extra_func_info temp_proc_desc;
113static struct frame_saved_regs temp_saved_regs;
114
a8172eea
RP
115/* This fencepost looks highly suspicious to me. Removing it also
116 seems suspicious as it could affect remote debugging across serial
3127785a 117 lines. */
a8172eea 118
0f552c5f
JG
119static CORE_ADDR
120heuristic_proc_start(pc)
bd5635a1
RP
121 CORE_ADDR pc;
122{
bd5635a1 123 CORE_ADDR start_pc = pc;
3127785a 124 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
125
126 if (start_pc == 0) return 0;
3127785a
RP
127
128 if (heuristic_fence_post == UINT_MAX
129 || fence < VM_MIN_ADDRESS)
130 fence = VM_MIN_ADDRESS;
0f552c5f 131
bd5635a1
RP
132 /* search back for previous return */
133 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
134 if (start_pc < fence)
135 {
3127785a
RP
136 /* It's not clear to me why we reach this point when
137 stop_soon_quietly, but with this test, at least we
138 don't print out warnings for every child forked (eg, on
139 decstation). 22apr93 rich@cygnus.com. */
140 if (!stop_soon_quietly)
141 {
23d35572
JK
142 static int blurb_printed = 0;
143
3127785a
RP
144 if (fence == VM_MIN_ADDRESS)
145 warning("Hit beginning of text section without finding");
146 else
147 warning("Hit heuristic-fence-post without finding");
148
23d35572
JK
149 warning("enclosing function for address 0x%x", pc);
150 if (!blurb_printed)
151 {
152 printf_filtered ("\
153This warning occurs if you are debugging a function without any symbols\n\
154(for example, in a stripped executable). In that case, you may wish to\n\
155increase the size of the search with the `set heuristic-fence-post' command.\n\
156\n\
157Otherwise, you told GDB there was a function where there isn't one, or\n\
158(more likely) you have encountered a bug in GDB.\n");
159 blurb_printed = 1;
160 }
3127785a
RP
161 }
162
a8172eea
RP
163 return 0;
164 }
bd5635a1
RP
165 else if (ABOUT_TO_RETURN(start_pc))
166 break;
167
168 start_pc += 8; /* skip return, and its delay slot */
169#if 0
170 /* skip nops (usually 1) 0 - is this */
171 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
172 start_pc += 4;
173#endif
174 return start_pc;
175}
176
0f552c5f 177static mips_extra_func_info_t
bd5635a1
RP
178heuristic_proc_desc(start_pc, limit_pc, next_frame)
179 CORE_ADDR start_pc, limit_pc;
180 FRAME next_frame;
181{
182 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
183 CORE_ADDR cur_pc;
184 int frame_size;
185 int has_frame_reg = 0;
186 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
187 unsigned long reg_mask = 0;
188
189 if (start_pc == 0) return NULL;
190 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
191 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
a70dc898
RP
192 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
193
bd5635a1
RP
194 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
195 restart:
196 frame_size = 0;
197 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 198 char buf[4];
bd5635a1
RP
199 unsigned long word;
200 int status;
201
34df79fc
JK
202 status = read_memory_nobpt (cur_pc, buf, 4);
203 if (status) memory_error (status, cur_pc);
204 word = extract_unsigned_integer (buf, 4);
205
bd5635a1
RP
206 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
207 frame_size += (-word) & 0xFFFF;
208 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
211 int reg = (word & 0x001F0000) >> 16;
212 reg_mask |= 1 << reg;
213 temp_saved_regs.regs[reg] = sp + (short)word;
214 }
215 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
216 if ((unsigned short)word != frame_size)
217 reg30 = sp + (unsigned short)word;
218 else if (!has_frame_reg) {
219 int alloca_adjust;
220 has_frame_reg = 1;
221 reg30 = read_next_frame_reg(next_frame, 30);
222 alloca_adjust = reg30 - (sp + (unsigned short)word);
223 if (alloca_adjust > 0) {
224 /* FP > SP + frame_size. This may be because
225 /* of an alloca or somethings similar.
226 * Fix sp to "pre-alloca" value, and try again.
227 */
228 sp += alloca_adjust;
229 goto restart;
230 }
231 }
232 }
233 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
234 int reg = (word & 0x001F0000) >> 16;
235 reg_mask |= 1 << reg;
236 temp_saved_regs.regs[reg] = reg30 + (short)word;
237 }
238 }
239 if (has_frame_reg) {
240 PROC_FRAME_REG(&temp_proc_desc) = 30;
241 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
242 }
243 else {
244 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
246 }
247 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
248 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
249 return &temp_proc_desc;
250}
251
0f552c5f 252static mips_extra_func_info_t
bd5635a1
RP
253find_proc_desc(pc, next_frame)
254 CORE_ADDR pc;
255 FRAME next_frame;
256{
257 mips_extra_func_info_t proc_desc;
0f552c5f 258 struct block *b = block_for_pc(pc);
48be4c35
JK
259 struct symbol *sym;
260 CORE_ADDR startaddr;
261
262 find_pc_partial_function (pc, NULL, &startaddr, NULL);
263 if (b == NULL)
264 sym = NULL;
265 else
266 {
267 if (startaddr > BLOCK_START (b))
268 /* This is the "pathological" case referred to in a comment in
269 print_frame_info. It might be better to move this check into
270 symbol reading. */
271 sym = NULL;
272 else
273 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
274 0, NULL);
275 }
0f552c5f
JG
276
277 if (sym)
bd5635a1
RP
278 {
279 /* IF this is the topmost frame AND
280 * (this proc does not have debugging information OR
281 * the PC is in the procedure prologue)
be772100 282 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
283 * the actual code) to replace the "official" proc_desc.
284 */
0f552c5f 285 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
286 if (next_frame == NULL) {
287 struct symtab_and_line val;
288 struct symbol *proc_symbol =
289 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 290
bd5635a1
RP
291 if (proc_symbol) {
292 val = find_pc_line (BLOCK_START
293 (SYMBOL_BLOCK_VALUE(proc_symbol)),
294 0);
295 val.pc = val.end ? val.end : pc;
296 }
297 if (!proc_symbol || pc < val.pc) {
298 mips_extra_func_info_t found_heuristic =
299 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
300 pc, next_frame);
301 if (found_heuristic) proc_desc = found_heuristic;
302 }
303 }
304 }
305 else
306 {
0f552c5f
JG
307 /* Is linked_proc_desc_table really necessary? It only seems to be used
308 by procedure call dummys. However, the procedures being called ought
309 to have their own proc_descs, and even if they don't,
310 heuristic_proc_desc knows how to create them! */
311
bd5635a1
RP
312 register struct linked_proc_info *link;
313 for (link = linked_proc_desc_table; link; link = link->next)
314 if (PROC_LOW_ADDR(&link->info) <= pc
315 && PROC_HIGH_ADDR(&link->info) > pc)
316 return &link->info;
23d35572 317
48be4c35
JK
318 if (startaddr == 0)
319 startaddr = heuristic_proc_start (pc);
320
bd5635a1 321 proc_desc =
48be4c35 322 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
323 }
324 return proc_desc;
325}
326
327mips_extra_func_info_t cached_proc_desc;
328
0f552c5f
JG
329FRAME_ADDR
330mips_frame_chain(frame)
bd5635a1
RP
331 FRAME frame;
332{
bd5635a1
RP
333 mips_extra_func_info_t proc_desc;
334 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 335
0f552c5f
JG
336 if (saved_pc == 0 || inside_entry_file (saved_pc))
337 return 0;
338
bd5635a1 339 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
340 if (!proc_desc)
341 return 0;
342
bd5635a1
RP
343 cached_proc_desc = proc_desc;
344 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
0f552c5f 345 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
346}
347
348void
349init_extra_frame_info(fci)
350 struct frame_info *fci;
351{
352 extern struct obstack frame_cache_obstack;
353 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
354 mips_extra_func_info_t proc_desc =
355 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 356
bd5635a1
RP
357 fci->saved_regs = (struct frame_saved_regs*)
358 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 359 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 360 fci->proc_desc =
ee5fb959 361 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
362 if (proc_desc)
363 {
364 int ireg;
365 CORE_ADDR reg_position;
366 unsigned long mask;
367 /* r0 bit means kernel trap */
368 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
369
c2a0f1cb
ILT
370 /* Fixup frame-pointer - only needed for top frame */
371 /* This may not be quite right, if proc has a real frame register */
2fcdae93 372 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
373 fci->frame = read_register (SP_REGNUM);
374 else
375 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
376 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 377
ee5fb959
JK
378 /* If this is the innermost frame, and we are still in the
379 prologue (loosely defined), then the registers may not have
48be4c35 380 been saved yet. */
ee5fb959 381 if (fci->next == NULL
66fe7416 382 && !PROC_DESC_IS_DUMMY(proc_desc)
ee5fb959 383 && mips_in_lenient_prologue (PROC_LOW_ADDR (proc_desc), fci->pc))
48be4c35
JK
384 {
385 /* Can't just say that the registers are not saved, because they
386 might get clobbered halfway through the prologue.
387 heuristic_proc_desc already has the right code to figure out
388 exactly what has been saved, so use it. As far as I know we
389 could be doing this (as we do on the 68k, for example)
390 regardless of whether we are in the prologue; I'm leaving in
391 the check for being in the prologue only out of conservatism
392 (I'm not sure whether heuristic_proc_desc handles all cases,
393 for example).
394
395 This stuff is ugly (and getting uglier by the minute). Probably
396 the best way to clean it up is to ignore the proc_desc's from
397 the symbols altogher, and get all the information we need by
398 examining the prologue (provided we can make the prologue
399 examining code good enough to get all the cases...). */
400 proc_desc =
401 heuristic_proc_desc (PROC_LOW_ADDR (proc_desc),
402 fci->pc,
403 fci->next);
404 }
405
406 if (proc_desc == &temp_proc_desc)
ee5fb959 407 *fci->saved_regs = temp_saved_regs;
bd5635a1 408 else
ee5fb959 409 {
bd5635a1
RP
410 /* find which general-purpose registers were saved */
411 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
412 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
413 for (ireg= 31; mask; --ireg, mask <<= 1)
ee5fb959 414 if (mask & 0x80000000)
bd5635a1 415 {
ee5fb959
JK
416 fci->saved_regs->regs[ireg] = reg_position;
417 reg_position -= 4;
bd5635a1
RP
418 }
419 /* find which floating-point registers were saved */
420 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
ee5fb959
JK
421
422 /* The freg_offset points to where the first *double* register
423 is saved. So skip to the high-order word. */
bd5635a1
RP
424 reg_position += 4;
425 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
426 for (ireg = 31; mask; --ireg, mask <<= 1)
ee5fb959 427 if (mask & 0x80000000)
bd5635a1 428 {
ee5fb959
JK
429 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
430 reg_position -= 4;
bd5635a1 431 }
ee5fb959 432 }
bd5635a1
RP
433
434 /* hack: if argument regs are saved, guess these contain args */
435 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
436 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
437 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
438 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
439 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
440
441 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
442 }
bd5635a1
RP
443}
444
a70dc898
RP
445/* MIPS stack frames are almost impenetrable. When execution stops,
446 we basically have to look at symbol information for the function
447 that we stopped in, which tells us *which* register (if any) is
448 the base of the frame pointer, and what offset from that register
449 the frame itself is at.
450
451 This presents a problem when trying to examine a stack in memory
452 (that isn't executing at the moment), using the "frame" command. We
453 don't have a PC, nor do we have any registers except SP.
454
455 This routine takes two arguments, SP and PC, and tries to make the
456 cached frames look as if these two arguments defined a frame on the
457 cache. This allows the rest of info frame to extract the important
458 arguments without difficulty. */
459
460FRAME
c2a0f1cb
ILT
461setup_arbitrary_frame (argc, argv)
462 int argc;
463 FRAME_ADDR *argv;
a70dc898 464{
c2a0f1cb
ILT
465 if (argc != 2)
466 error ("MIPS frame specifications require two arguments: sp and pc");
467
468 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
469}
470
bd5635a1 471
0f552c5f
JG
472CORE_ADDR
473mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
474 int nargs;
475 value *args;
476 CORE_ADDR sp;
477 int struct_return;
478 CORE_ADDR struct_addr;
479{
480 CORE_ADDR buf;
481 register i;
482 int accumulate_size = struct_return ? 4 : 0;
483 struct mips_arg { char *contents; int len; int offset; };
484 struct mips_arg *mips_args =
485 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
486 register struct mips_arg *m_arg;
487 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
488 extern value value_arg_coerce();
489 value arg = value_arg_coerce (args[i]);
490 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
491 /* This entire mips-specific routine is because doubles must be aligned
492 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
493 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
494 * breaks their varargs implementation...). A correct solution
495 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
496 * in stdarg.h/varargs.h).
497 */
498 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
499 m_arg->offset = accumulate_size;
500 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
501 m_arg->contents = VALUE_CONTENTS(arg);
502 }
503 accumulate_size = (accumulate_size + 7) & (-8);
504 if (accumulate_size < 16) accumulate_size = 16;
505 sp -= accumulate_size;
506 for (i = nargs; m_arg--, --i >= 0; )
507 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
508 if (struct_return) {
509 buf = struct_addr;
a70dc898
RP
510 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
511 }
bd5635a1
RP
512 return sp;
513}
514
515/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
516#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
517
518void
519mips_push_dummy_frame()
520{
521 int ireg;
522 struct linked_proc_info *link = (struct linked_proc_info*)
523 xmalloc(sizeof(struct linked_proc_info));
524 mips_extra_func_info_t proc_desc = &link->info;
525 CORE_ADDR sp = read_register (SP_REGNUM);
526 CORE_ADDR save_address;
527 REGISTER_TYPE buffer;
528 link->next = linked_proc_desc_table;
529 linked_proc_desc_table = link;
530#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
531#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
532#define GEN_REG_SAVE_COUNT 22
533#define FLOAT_REG_SAVE_MASK MASK(0,19)
534#define FLOAT_REG_SAVE_COUNT 20
535#define SPECIAL_REG_SAVE_COUNT 4
536 /*
537 * The registers we must save are all those not preserved across
538 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
539 * In addition, we must save the PC, and PUSH_FP_REGNUM.
540 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
541 *
542 * Dummy frame layout:
543 * (high memory)
544 * Saved PC
545 * Saved MMHI, MMLO, FPC_CSR
546 * Saved R31
547 * Saved R28
548 * ...
549 * Saved R1
550 * Saved D18 (i.e. F19, F18)
551 * ...
552 * Saved D0 (i.e. F1, F0)
c2a0f1cb 553 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
554 * Parameter build area (not yet implemented)
555 * (low memory)
556 */
557 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 558 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
559 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
560 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
561 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
562 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
563 /* save general registers */
564 save_address = sp + PROC_REG_OFFSET(proc_desc);
565 for (ireg = 32; --ireg >= 0; )
566 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
567 {
568 buffer = read_register (ireg);
a70dc898 569 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
570 save_address -= 4;
571 }
0b0d6c3f
PS
572 /* save floating-points registers starting with high order word */
573 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
574 for (ireg = 32; --ireg >= 0; )
575 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
576 {
7d9884b9 577 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 578 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
579 save_address -= 4;
580 }
581 write_register (PUSH_FP_REGNUM, sp);
582 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
583 PROC_FRAME_OFFSET(proc_desc) = 0;
584 buffer = read_register (PC_REGNUM);
a70dc898 585 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 586 buffer = read_register (HI_REGNUM);
a70dc898 587 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 588 buffer = read_register (LO_REGNUM);
a70dc898 589 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 590 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 591 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
592 sp -= 4 * (GEN_REG_SAVE_COUNT
593 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
594 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
595 write_register (SP_REGNUM, sp);
596 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
597 PROC_HIGH_ADDR(proc_desc) = sp;
598 SET_PROC_DESC_IS_DUMMY(proc_desc);
599 PROC_PC_REG(proc_desc) = RA_REGNUM;
600}
601
602void
603mips_pop_frame()
dac4929a
SG
604{
605 register int regnum;
bd5635a1
RP
606 FRAME frame = get_current_frame ();
607 CORE_ADDR new_sp = frame->frame;
dac4929a 608
a70dc898 609 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
610
611 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
612 if (proc_desc)
613 {
614 for (regnum = 32; --regnum >= 0; )
615 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
616 write_register (regnum,
617 read_memory_integer (frame->saved_regs->regs[regnum],
618 4));
619 for (regnum = 32; --regnum >= 0; )
620 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
621 write_register (regnum + FP0_REGNUM,
622 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
623 }
624 write_register (SP_REGNUM, new_sp);
625 flush_cached_frames ();
626 /* We let mips_init_extra_frame_info figure out the frame pointer */
627 set_current_frame (create_new_frame (0, read_pc ()));
628
bd5635a1
RP
629 if (PROC_DESC_IS_DUMMY(proc_desc))
630 {
dac4929a
SG
631 struct linked_proc_info *pi_ptr, *prev_ptr;
632
633 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
634 pi_ptr != NULL;
635 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
636 {
637 if (&pi_ptr->info == proc_desc)
638 break;
639 }
640
641 if (pi_ptr == NULL)
642 error ("Can't locate dummy extra frame info\n");
643
644 if (prev_ptr != NULL)
645 prev_ptr->next = pi_ptr->next;
646 else
647 linked_proc_desc_table = pi_ptr->next;
648
649 free (pi_ptr);
650
bd5635a1
RP
651 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
652 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
653 if (mips_fpu)
654 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 655 }
bd5635a1
RP
656}
657
0f552c5f 658static void
a70dc898 659mips_print_register (regnum, all)
bd5635a1
RP
660 int regnum, all;
661{
48be4c35
JK
662 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
663 REGISTER_TYPE val;
bd5635a1 664
48be4c35
JK
665 /* Get the data in raw format. */
666 if (read_relative_register_raw_bytes (regnum, raw_buffer))
667 {
668 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
669 return;
670 }
671
672 /* If an even floating pointer register, also print as double. */
673 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
674 && !((regnum-FP0_REGNUM) & 1)) {
675 char dbuffer[MAX_REGISTER_RAW_SIZE];
676
677 read_relative_register_raw_bytes (regnum, dbuffer);
678 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 679#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 680 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 681#endif
48be4c35
JK
682 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
683 val_print (builtin_type_double, dbuffer, 0,
684 stdout, 0, 1, 0, Val_pretty_default);
685 printf_filtered ("); ");
686 }
687 fputs_filtered (reg_names[regnum], stdout);
688
689 /* The problem with printing numeric register names (r26, etc.) is that
690 the user can't use them on input. Probably the best solution is to
691 fix it so that either the numeric or the funky (a2, etc.) names
692 are accepted on input. */
693 if (regnum < 32)
694 printf_filtered ("(r%d): ", regnum);
695 else
696 printf_filtered (": ");
bd5635a1 697
48be4c35
JK
698 /* If virtual format is floating, print it that way. */
699 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
700 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
701 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
702 stdout, 0, 1, 0, Val_pretty_default);
703 }
704 /* Else print as integer in hex. */
705 else
706 {
707 long val;
bd5635a1 708
48be4c35
JK
709 val = extract_signed_integer (raw_buffer,
710 REGISTER_RAW_SIZE (regnum));
34df79fc 711
48be4c35
JK
712 if (val == 0)
713 printf_filtered ("0");
714 else if (all)
715 /* FIXME: We should be printing this in a fixed field width, so that
716 registers line up. */
717 printf_filtered (local_hex_format(), val);
718 else
719 printf_filtered ("%s=%d", local_hex_string(val), val);
720 }
bd5635a1
RP
721}
722
d8b3b00e 723/* Replacement for generic do_registers_info. */
0f552c5f 724void
361bf6ee 725mips_do_registers_info (regnum, fpregs)
bd5635a1 726 int regnum;
361bf6ee 727 int fpregs;
bd5635a1
RP
728{
729 if (regnum != -1) {
730 mips_print_register (regnum, 0);
731 printf_filtered ("\n");
732 }
733 else {
734 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
735 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
736 regnum++;
737 continue;
738 }
bd5635a1
RP
739 mips_print_register (regnum, 1);
740 regnum++;
741 if ((regnum & 3) == 0 || regnum == NUM_REGS)
742 printf_filtered (";\n");
743 else
744 printf_filtered ("; ");
745 }
746 }
747}
748/* Return number of args passed to a frame. described by FIP.
749 Can return -1, meaning no way to tell. */
750
0f552c5f 751int
bd5635a1
RP
752mips_frame_num_args(fip)
753 FRAME fip;
754{
755#if 0
756 struct chain_info_t *p;
757
758 p = mips_find_cached_frame(FRAME_FP(fip));
759 if (p->valid)
760 return p->the_info.numargs;
761#endif
762 return -1;
763}
407a8389 764\f
ee5fb959
JK
765/* Does this instruction involve use of a delay slot? */
766static int
767is_delayed (insn)
768 unsigned long insn;
769{
770 int i;
771 for (i = 0; i < NUMOPCODES; ++i)
772 if (mips_opcodes[i].pinfo != INSN_MACRO
773 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
774 break;
775 return i < NUMOPCODES && (mips_opcodes[i].pinfo & ANY_DELAY);
776}
777
778/* To skip prologues, I use this predicate. Returns either PC itself
779 if the code at PC does not look like a function prologue; otherwise
780 returns an address that (if we're lucky) follows the prologue. If
781 LENIENT, then we must skip everything which is involved in setting
782 up the frame (it's OK to skip more, just so long as we don't skip
783 anything which might clobber the registers which are being saved.
784 We must skip more in the case where part of the prologue is in the
785 delay slot of a non-prologue instruction). */
bd5635a1 786
be772100 787CORE_ADDR
ee5fb959 788mips_skip_prologue (pc, lenient)
bd5635a1 789 CORE_ADDR pc;
ee5fb959 790 int lenient;
bd5635a1
RP
791{
792 struct symbol *f;
793 struct block *b;
794 unsigned long inst;
d747e0af 795 int offset;
0b0d6c3f 796 int seen_sp_adjust = 0;
bd5635a1 797
e157305c
PS
798 /* Skip the typical prologue instructions. These are the stack adjustment
799 instruction and the instructions that save registers on the stack
800 or in the gcc frame. */
ee5fb959
JK
801 for (offset = 0; offset < 100; offset += 4)
802 {
803 char buf[4];
804 int status;
805
806 status = read_memory_nobpt (pc + offset, buf, 4);
807 if (status)
808 memory_error (status, pc + offset);
809 inst = extract_unsigned_integer (buf, 4);
810
811 if (lenient && is_delayed (inst))
812 continue;
813
e157305c 814 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 815 seen_sp_adjust = 1;
e157305c
PS
816 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
817 continue; /* sw reg,n($sp) */
818 /* reg != $zero */
819 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
820 continue;
821 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
822 /* sx reg,n($s8) */
823 continue; /* reg != $zero */
824 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 825 continue;
1b71de8e
PS
826 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
827 continue;
0b0d6c3f 828 else
e157305c 829 break;
d747e0af 830 }
e157305c
PS
831 return pc + offset;
832
833/* FIXME schauer. The following code seems no longer necessary if we
834 always skip the typical prologue instructions. */
835
836#if 0
0b0d6c3f
PS
837 if (seen_sp_adjust)
838 return pc + offset;
bd5635a1
RP
839
840 /* Well, it looks like a frameless. Let's make sure.
841 Note that we are not called on the current PC,
842 but on the function`s start PC, and I have definitely
843 seen optimized code that adjusts the SP quite later */
844 b = block_for_pc(pc);
845 if (!b) return pc;
846
dac4929a 847 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
848 if (!f) return pc;
849 /* Ideally, I would like to use the adjusted info
850 from mips_frame_info(), but for all practical
851 purposes it will not matter (and it would require
852 a different definition of SKIP_PROLOGUE())
853
854 Actually, it would not hurt to skip the storing
855 of arguments on the stack as well. */
0f552c5f 856 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
857 return pc + 4;
858
859 return pc;
e157305c 860#endif
bd5635a1 861}
c2a0f1cb 862
ee5fb959
JK
863/* Is address PC in the prologue (loosely defined) for function at
864 STARTADDR? */
865
866static int
867mips_in_lenient_prologue (startaddr, pc)
868 CORE_ADDR startaddr;
869 CORE_ADDR pc;
870{
871 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
872 return pc >= startaddr && pc < end_prologue;
873}
874
ac8cf67d
PS
875/* Given a return value in `regbuf' with a type `valtype',
876 extract and copy its value into `valbuf'. */
877void
878mips_extract_return_value (valtype, regbuf, valbuf)
879 struct type *valtype;
880 char regbuf[REGISTER_BYTES];
881 char *valbuf;
882{
883 int regnum;
884
885 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
886
887 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
888#ifdef REGISTER_CONVERT_TO_TYPE
889 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
890#endif
891}
892
893/* Given a return value in `regbuf' with a type `valtype',
894 write it's value into the appropriate register. */
895void
896mips_store_return_value (valtype, valbuf)
897 struct type *valtype;
898 char *valbuf;
899{
900 int regnum;
901 char raw_buffer[MAX_REGISTER_RAW_SIZE];
902
903 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
904 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
905
906#ifdef REGISTER_CONVERT_FROM_TYPE
907 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
908#endif
909
910 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
911}
912
3127785a
RP
913/* Let the user turn off floating point and set the fence post for
914 heuristic_proc_start. */
c2a0f1cb
ILT
915
916void
917_initialize_mips_tdep ()
918{
919 add_show_from_set
a8172eea 920 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
921 (char *) &mips_fpu,
922 "Set use of floating point coprocessor.\n\
923Turn off to avoid using floating point instructions when calling functions\n\
924or dealing with return values.", &setlist),
925 &showlist);
3127785a
RP
926
927 add_show_from_set
928 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
929 (char *) &heuristic_fence_post,
23d35572
JK
930 "\
931Set the distance searched for the start of a function.\n\
932If you are debugging a stripped executable, GDB needs to search through the\n\
933program for the start of a function. This command sets the distance of the\n\
934search. The only need to set it is when debugging a stripped executable.",
935 &setlist),
3127785a 936 &showlist);
c2a0f1cb 937}
This page took 0.159896 seconds and 4 git commands to generate.