* objdump.c (usage): Mention --stabs.
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
ee5fb959
JK
37static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
38
c2a0f1cb
ILT
39/* Some MIPS boards don't support floating point, so we permit the
40 user to turn it off. */
41int mips_fpu = 1;
42
3127785a
RP
43/* Heuristic_proc_start may hunt through the text section for a long
44 time across a 2400 baud serial line. Allows the user to limit this
45 search. */
46static unsigned int heuristic_fence_post = 0;
47
0f552c5f
JG
48#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
49#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
50#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
51#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
52#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
53#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
54#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
55#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
56#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
57#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 58#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
59#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
60#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
61
62struct linked_proc_info
63{
64 struct mips_extra_func_info info;
65 struct linked_proc_info *next;
dac4929a 66} *linked_proc_desc_table = NULL;
bd5635a1
RP
67
68\f
69#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
70
0f552c5f 71static int
bd5635a1
RP
72read_next_frame_reg(fi, regno)
73 FRAME fi;
74 int regno;
75{
e157305c
PS
76 /* If it is the frame for sigtramp we have a complete sigcontext
77 immediately below the frame and we get the saved registers from there.
78 If the stack layout for sigtramp changes we might have to change these
79 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 80#ifndef SIGFRAME_BASE
e157305c
PS
81#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
82#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
83#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 84#endif
bd5635a1
RP
85 for (; fi; fi = fi->next)
86 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
87 int offset;
88 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 89 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
90 else return 0;
91 return read_memory_integer(fi->frame + offset, 4);
92 }
93 else if (regno == SP_REGNUM) return fi->frame;
94 else if (fi->saved_regs->regs[regno])
95 return read_memory_integer(fi->saved_regs->regs[regno], 4);
96 return read_register(regno);
97}
98
99int
100mips_frame_saved_pc(frame)
101 FRAME frame;
102{
0f552c5f 103 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 104 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 105
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RP
106 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
107 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 108
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RP
109 return read_next_frame_reg(frame, pcreg);
110}
111
112static struct mips_extra_func_info temp_proc_desc;
113static struct frame_saved_regs temp_saved_regs;
114
a8172eea
RP
115/* This fencepost looks highly suspicious to me. Removing it also
116 seems suspicious as it could affect remote debugging across serial
3127785a 117 lines. */
a8172eea 118
0f552c5f
JG
119static CORE_ADDR
120heuristic_proc_start(pc)
bd5635a1
RP
121 CORE_ADDR pc;
122{
bd5635a1 123 CORE_ADDR start_pc = pc;
3127785a 124 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
125
126 if (start_pc == 0) return 0;
3127785a
RP
127
128 if (heuristic_fence_post == UINT_MAX
129 || fence < VM_MIN_ADDRESS)
130 fence = VM_MIN_ADDRESS;
0f552c5f 131
bd5635a1
RP
132 /* search back for previous return */
133 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
134 if (start_pc < fence)
135 {
3127785a
RP
136 /* It's not clear to me why we reach this point when
137 stop_soon_quietly, but with this test, at least we
138 don't print out warnings for every child forked (eg, on
139 decstation). 22apr93 rich@cygnus.com. */
140 if (!stop_soon_quietly)
141 {
23d35572
JK
142 static int blurb_printed = 0;
143
3127785a
RP
144 if (fence == VM_MIN_ADDRESS)
145 warning("Hit beginning of text section without finding");
146 else
147 warning("Hit heuristic-fence-post without finding");
148
23d35572
JK
149 warning("enclosing function for address 0x%x", pc);
150 if (!blurb_printed)
151 {
152 printf_filtered ("\
153This warning occurs if you are debugging a function without any symbols\n\
154(for example, in a stripped executable). In that case, you may wish to\n\
155increase the size of the search with the `set heuristic-fence-post' command.\n\
156\n\
157Otherwise, you told GDB there was a function where there isn't one, or\n\
158(more likely) you have encountered a bug in GDB.\n");
159 blurb_printed = 1;
160 }
3127785a
RP
161 }
162
a8172eea
RP
163 return 0;
164 }
bd5635a1
RP
165 else if (ABOUT_TO_RETURN(start_pc))
166 break;
167
168 start_pc += 8; /* skip return, and its delay slot */
169#if 0
170 /* skip nops (usually 1) 0 - is this */
171 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
172 start_pc += 4;
173#endif
174 return start_pc;
175}
176
0f552c5f 177static mips_extra_func_info_t
bd5635a1
RP
178heuristic_proc_desc(start_pc, limit_pc, next_frame)
179 CORE_ADDR start_pc, limit_pc;
180 FRAME next_frame;
181{
182 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
183 CORE_ADDR cur_pc;
184 int frame_size;
185 int has_frame_reg = 0;
186 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
187 unsigned long reg_mask = 0;
188
189 if (start_pc == 0) return NULL;
4ed97c9a
RP
190 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
191 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
192 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
193
bd5635a1
RP
194 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
195 restart:
196 frame_size = 0;
197 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 198 char buf[4];
bd5635a1
RP
199 unsigned long word;
200 int status;
201
34df79fc
JK
202 status = read_memory_nobpt (cur_pc, buf, 4);
203 if (status) memory_error (status, cur_pc);
204 word = extract_unsigned_integer (buf, 4);
205
bd5635a1
RP
206 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
207 frame_size += (-word) & 0xFFFF;
208 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
211 int reg = (word & 0x001F0000) >> 16;
212 reg_mask |= 1 << reg;
213 temp_saved_regs.regs[reg] = sp + (short)word;
214 }
215 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
216 if ((unsigned short)word != frame_size)
217 reg30 = sp + (unsigned short)word;
218 else if (!has_frame_reg) {
219 int alloca_adjust;
220 has_frame_reg = 1;
221 reg30 = read_next_frame_reg(next_frame, 30);
222 alloca_adjust = reg30 - (sp + (unsigned short)word);
223 if (alloca_adjust > 0) {
224 /* FP > SP + frame_size. This may be because
225 /* of an alloca or somethings similar.
226 * Fix sp to "pre-alloca" value, and try again.
227 */
228 sp += alloca_adjust;
229 goto restart;
230 }
231 }
232 }
233 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
234 int reg = (word & 0x001F0000) >> 16;
235 reg_mask |= 1 << reg;
236 temp_saved_regs.regs[reg] = reg30 + (short)word;
237 }
238 }
239 if (has_frame_reg) {
240 PROC_FRAME_REG(&temp_proc_desc) = 30;
241 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
242 }
243 else {
244 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
246 }
247 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
248 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
249 return &temp_proc_desc;
250}
251
0f552c5f 252static mips_extra_func_info_t
bd5635a1
RP
253find_proc_desc(pc, next_frame)
254 CORE_ADDR pc;
255 FRAME next_frame;
256{
257 mips_extra_func_info_t proc_desc;
0f552c5f 258 struct block *b = block_for_pc(pc);
48be4c35
JK
259 struct symbol *sym;
260 CORE_ADDR startaddr;
261
262 find_pc_partial_function (pc, NULL, &startaddr, NULL);
263 if (b == NULL)
264 sym = NULL;
265 else
266 {
267 if (startaddr > BLOCK_START (b))
268 /* This is the "pathological" case referred to in a comment in
269 print_frame_info. It might be better to move this check into
270 symbol reading. */
271 sym = NULL;
272 else
273 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
274 0, NULL);
275 }
0f552c5f
JG
276
277 if (sym)
bd5635a1
RP
278 {
279 /* IF this is the topmost frame AND
280 * (this proc does not have debugging information OR
281 * the PC is in the procedure prologue)
be772100 282 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
283 * the actual code) to replace the "official" proc_desc.
284 */
0f552c5f 285 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
286 if (next_frame == NULL) {
287 struct symtab_and_line val;
288 struct symbol *proc_symbol =
289 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 290
bd5635a1
RP
291 if (proc_symbol) {
292 val = find_pc_line (BLOCK_START
293 (SYMBOL_BLOCK_VALUE(proc_symbol)),
294 0);
295 val.pc = val.end ? val.end : pc;
296 }
297 if (!proc_symbol || pc < val.pc) {
298 mips_extra_func_info_t found_heuristic =
299 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
300 pc, next_frame);
301 if (found_heuristic) proc_desc = found_heuristic;
302 }
303 }
304 }
305 else
306 {
0f552c5f
JG
307 /* Is linked_proc_desc_table really necessary? It only seems to be used
308 by procedure call dummys. However, the procedures being called ought
309 to have their own proc_descs, and even if they don't,
310 heuristic_proc_desc knows how to create them! */
311
bd5635a1
RP
312 register struct linked_proc_info *link;
313 for (link = linked_proc_desc_table; link; link = link->next)
314 if (PROC_LOW_ADDR(&link->info) <= pc
315 && PROC_HIGH_ADDR(&link->info) > pc)
316 return &link->info;
23d35572 317
48be4c35
JK
318 if (startaddr == 0)
319 startaddr = heuristic_proc_start (pc);
320
bd5635a1 321 proc_desc =
48be4c35 322 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
323 }
324 return proc_desc;
325}
326
327mips_extra_func_info_t cached_proc_desc;
328
0f552c5f
JG
329FRAME_ADDR
330mips_frame_chain(frame)
bd5635a1
RP
331 FRAME frame;
332{
bd5635a1
RP
333 mips_extra_func_info_t proc_desc;
334 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 335
0f552c5f
JG
336 if (saved_pc == 0 || inside_entry_file (saved_pc))
337 return 0;
338
bd5635a1 339 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
340 if (!proc_desc)
341 return 0;
342
bd5635a1 343 cached_proc_desc = proc_desc;
e797b4bc
JK
344
345 /* If no frame pointer and frame size is zero, we must be at end
346 of stack (or otherwise hosed). If we don't check frame size,
347 we loop forever if we see a zero size frame. */
348 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
349 && PROC_FRAME_OFFSET (proc_desc) == 0)
bdef72d2
JK
350 return 0;
351 else
352 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
353 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
354}
355
356void
357init_extra_frame_info(fci)
358 struct frame_info *fci;
359{
360 extern struct obstack frame_cache_obstack;
361 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
362 mips_extra_func_info_t proc_desc =
363 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 364
bd5635a1
RP
365 fci->saved_regs = (struct frame_saved_regs*)
366 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 367 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 368 fci->proc_desc =
ee5fb959 369 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
370 if (proc_desc)
371 {
372 int ireg;
373 CORE_ADDR reg_position;
374 unsigned long mask;
375 /* r0 bit means kernel trap */
376 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
377
c2a0f1cb
ILT
378 /* Fixup frame-pointer - only needed for top frame */
379 /* This may not be quite right, if proc has a real frame register */
2fcdae93 380 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
381 fci->frame = read_register (SP_REGNUM);
382 else
383 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
384 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 385
ee5fb959
JK
386 /* If this is the innermost frame, and we are still in the
387 prologue (loosely defined), then the registers may not have
48be4c35 388 been saved yet. */
ee5fb959 389 if (fci->next == NULL
66fe7416 390 && !PROC_DESC_IS_DUMMY(proc_desc)
ee5fb959 391 && mips_in_lenient_prologue (PROC_LOW_ADDR (proc_desc), fci->pc))
48be4c35
JK
392 {
393 /* Can't just say that the registers are not saved, because they
394 might get clobbered halfway through the prologue.
395 heuristic_proc_desc already has the right code to figure out
396 exactly what has been saved, so use it. As far as I know we
397 could be doing this (as we do on the 68k, for example)
398 regardless of whether we are in the prologue; I'm leaving in
399 the check for being in the prologue only out of conservatism
400 (I'm not sure whether heuristic_proc_desc handles all cases,
401 for example).
402
403 This stuff is ugly (and getting uglier by the minute). Probably
404 the best way to clean it up is to ignore the proc_desc's from
405 the symbols altogher, and get all the information we need by
406 examining the prologue (provided we can make the prologue
407 examining code good enough to get all the cases...). */
408 proc_desc =
409 heuristic_proc_desc (PROC_LOW_ADDR (proc_desc),
410 fci->pc,
411 fci->next);
412 }
413
414 if (proc_desc == &temp_proc_desc)
ee5fb959 415 *fci->saved_regs = temp_saved_regs;
bd5635a1 416 else
ee5fb959 417 {
bd5635a1
RP
418 /* find which general-purpose registers were saved */
419 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
420 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
421 for (ireg= 31; mask; --ireg, mask <<= 1)
ee5fb959 422 if (mask & 0x80000000)
bd5635a1 423 {
ee5fb959
JK
424 fci->saved_regs->regs[ireg] = reg_position;
425 reg_position -= 4;
bd5635a1
RP
426 }
427 /* find which floating-point registers were saved */
428 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
ee5fb959
JK
429
430 /* The freg_offset points to where the first *double* register
431 is saved. So skip to the high-order word. */
bd5635a1
RP
432 reg_position += 4;
433 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
434 for (ireg = 31; mask; --ireg, mask <<= 1)
ee5fb959 435 if (mask & 0x80000000)
bd5635a1 436 {
ee5fb959
JK
437 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
438 reg_position -= 4;
bd5635a1 439 }
ee5fb959 440 }
bd5635a1
RP
441
442 /* hack: if argument regs are saved, guess these contain args */
443 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
444 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
445 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
446 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
447 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
448
449 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
450 }
bd5635a1
RP
451}
452
a70dc898
RP
453/* MIPS stack frames are almost impenetrable. When execution stops,
454 we basically have to look at symbol information for the function
455 that we stopped in, which tells us *which* register (if any) is
456 the base of the frame pointer, and what offset from that register
457 the frame itself is at.
458
459 This presents a problem when trying to examine a stack in memory
460 (that isn't executing at the moment), using the "frame" command. We
461 don't have a PC, nor do we have any registers except SP.
462
463 This routine takes two arguments, SP and PC, and tries to make the
464 cached frames look as if these two arguments defined a frame on the
465 cache. This allows the rest of info frame to extract the important
466 arguments without difficulty. */
467
468FRAME
c2a0f1cb
ILT
469setup_arbitrary_frame (argc, argv)
470 int argc;
471 FRAME_ADDR *argv;
a70dc898 472{
c2a0f1cb
ILT
473 if (argc != 2)
474 error ("MIPS frame specifications require two arguments: sp and pc");
475
476 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
477}
478
bd5635a1 479
0f552c5f
JG
480CORE_ADDR
481mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
482 int nargs;
483 value *args;
484 CORE_ADDR sp;
485 int struct_return;
486 CORE_ADDR struct_addr;
487{
488 CORE_ADDR buf;
489 register i;
490 int accumulate_size = struct_return ? 4 : 0;
491 struct mips_arg { char *contents; int len; int offset; };
492 struct mips_arg *mips_args =
493 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
494 register struct mips_arg *m_arg;
495 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
496 extern value value_arg_coerce();
497 value arg = value_arg_coerce (args[i]);
498 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
499 /* This entire mips-specific routine is because doubles must be aligned
500 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
501 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
502 * breaks their varargs implementation...). A correct solution
503 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
504 * in stdarg.h/varargs.h).
505 */
506 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
507 m_arg->offset = accumulate_size;
508 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
509 m_arg->contents = VALUE_CONTENTS(arg);
510 }
511 accumulate_size = (accumulate_size + 7) & (-8);
512 if (accumulate_size < 16) accumulate_size = 16;
513 sp -= accumulate_size;
514 for (i = nargs; m_arg--, --i >= 0; )
515 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
516 if (struct_return) {
517 buf = struct_addr;
a70dc898
RP
518 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
519 }
bd5635a1
RP
520 return sp;
521}
522
523/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
524#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
525
526void
527mips_push_dummy_frame()
528{
529 int ireg;
530 struct linked_proc_info *link = (struct linked_proc_info*)
531 xmalloc(sizeof(struct linked_proc_info));
532 mips_extra_func_info_t proc_desc = &link->info;
533 CORE_ADDR sp = read_register (SP_REGNUM);
534 CORE_ADDR save_address;
535 REGISTER_TYPE buffer;
536 link->next = linked_proc_desc_table;
537 linked_proc_desc_table = link;
538#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
539#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
540#define GEN_REG_SAVE_COUNT 22
541#define FLOAT_REG_SAVE_MASK MASK(0,19)
542#define FLOAT_REG_SAVE_COUNT 20
543#define SPECIAL_REG_SAVE_COUNT 4
544 /*
545 * The registers we must save are all those not preserved across
546 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
547 * In addition, we must save the PC, and PUSH_FP_REGNUM.
548 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
549 *
550 * Dummy frame layout:
551 * (high memory)
552 * Saved PC
553 * Saved MMHI, MMLO, FPC_CSR
554 * Saved R31
555 * Saved R28
556 * ...
557 * Saved R1
558 * Saved D18 (i.e. F19, F18)
559 * ...
560 * Saved D0 (i.e. F1, F0)
c2a0f1cb 561 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
562 * Parameter build area (not yet implemented)
563 * (low memory)
564 */
565 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 566 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
567 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
568 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
569 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
570 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
571 /* save general registers */
572 save_address = sp + PROC_REG_OFFSET(proc_desc);
573 for (ireg = 32; --ireg >= 0; )
574 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
575 {
576 buffer = read_register (ireg);
a70dc898 577 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
578 save_address -= 4;
579 }
0b0d6c3f
PS
580 /* save floating-points registers starting with high order word */
581 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
582 for (ireg = 32; --ireg >= 0; )
583 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
584 {
7d9884b9 585 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 586 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
587 save_address -= 4;
588 }
589 write_register (PUSH_FP_REGNUM, sp);
590 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
591 PROC_FRAME_OFFSET(proc_desc) = 0;
592 buffer = read_register (PC_REGNUM);
a70dc898 593 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 594 buffer = read_register (HI_REGNUM);
a70dc898 595 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 596 buffer = read_register (LO_REGNUM);
a70dc898 597 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 598 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 599 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
600 sp -= 4 * (GEN_REG_SAVE_COUNT
601 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
602 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
603 write_register (SP_REGNUM, sp);
604 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
605 PROC_HIGH_ADDR(proc_desc) = sp;
606 SET_PROC_DESC_IS_DUMMY(proc_desc);
607 PROC_PC_REG(proc_desc) = RA_REGNUM;
608}
609
610void
611mips_pop_frame()
dac4929a
SG
612{
613 register int regnum;
bd5635a1
RP
614 FRAME frame = get_current_frame ();
615 CORE_ADDR new_sp = frame->frame;
dac4929a 616
a70dc898 617 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
618
619 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
620 if (proc_desc)
621 {
622 for (regnum = 32; --regnum >= 0; )
623 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
624 write_register (regnum,
625 read_memory_integer (frame->saved_regs->regs[regnum],
626 4));
627 for (regnum = 32; --regnum >= 0; )
628 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
629 write_register (regnum + FP0_REGNUM,
630 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
631 }
632 write_register (SP_REGNUM, new_sp);
633 flush_cached_frames ();
634 /* We let mips_init_extra_frame_info figure out the frame pointer */
635 set_current_frame (create_new_frame (0, read_pc ()));
636
bd5635a1
RP
637 if (PROC_DESC_IS_DUMMY(proc_desc))
638 {
dac4929a
SG
639 struct linked_proc_info *pi_ptr, *prev_ptr;
640
641 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
642 pi_ptr != NULL;
643 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
644 {
645 if (&pi_ptr->info == proc_desc)
646 break;
647 }
648
649 if (pi_ptr == NULL)
650 error ("Can't locate dummy extra frame info\n");
651
652 if (prev_ptr != NULL)
653 prev_ptr->next = pi_ptr->next;
654 else
655 linked_proc_desc_table = pi_ptr->next;
656
657 free (pi_ptr);
658
bd5635a1
RP
659 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
660 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
661 if (mips_fpu)
662 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 663 }
bd5635a1
RP
664}
665
0f552c5f 666static void
a70dc898 667mips_print_register (regnum, all)
bd5635a1
RP
668 int regnum, all;
669{
48be4c35
JK
670 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
671 REGISTER_TYPE val;
bd5635a1 672
48be4c35
JK
673 /* Get the data in raw format. */
674 if (read_relative_register_raw_bytes (regnum, raw_buffer))
675 {
676 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
677 return;
678 }
679
680 /* If an even floating pointer register, also print as double. */
681 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
682 && !((regnum-FP0_REGNUM) & 1)) {
683 char dbuffer[MAX_REGISTER_RAW_SIZE];
684
685 read_relative_register_raw_bytes (regnum, dbuffer);
686 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 687#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 688 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 689#endif
48be4c35
JK
690 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
691 val_print (builtin_type_double, dbuffer, 0,
692 stdout, 0, 1, 0, Val_pretty_default);
693 printf_filtered ("); ");
694 }
695 fputs_filtered (reg_names[regnum], stdout);
696
697 /* The problem with printing numeric register names (r26, etc.) is that
698 the user can't use them on input. Probably the best solution is to
699 fix it so that either the numeric or the funky (a2, etc.) names
700 are accepted on input. */
701 if (regnum < 32)
702 printf_filtered ("(r%d): ", regnum);
703 else
704 printf_filtered (": ");
bd5635a1 705
48be4c35
JK
706 /* If virtual format is floating, print it that way. */
707 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
708 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
709 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
710 stdout, 0, 1, 0, Val_pretty_default);
711 }
712 /* Else print as integer in hex. */
713 else
714 {
715 long val;
bd5635a1 716
48be4c35
JK
717 val = extract_signed_integer (raw_buffer,
718 REGISTER_RAW_SIZE (regnum));
34df79fc 719
48be4c35
JK
720 if (val == 0)
721 printf_filtered ("0");
722 else if (all)
723 /* FIXME: We should be printing this in a fixed field width, so that
724 registers line up. */
725 printf_filtered (local_hex_format(), val);
726 else
727 printf_filtered ("%s=%d", local_hex_string(val), val);
728 }
bd5635a1
RP
729}
730
d8b3b00e 731/* Replacement for generic do_registers_info. */
0f552c5f 732void
361bf6ee 733mips_do_registers_info (regnum, fpregs)
bd5635a1 734 int regnum;
361bf6ee 735 int fpregs;
bd5635a1
RP
736{
737 if (regnum != -1) {
738 mips_print_register (regnum, 0);
739 printf_filtered ("\n");
740 }
741 else {
742 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
743 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
744 regnum++;
745 continue;
746 }
bd5635a1
RP
747 mips_print_register (regnum, 1);
748 regnum++;
749 if ((regnum & 3) == 0 || regnum == NUM_REGS)
750 printf_filtered (";\n");
751 else
752 printf_filtered ("; ");
753 }
754 }
755}
756/* Return number of args passed to a frame. described by FIP.
757 Can return -1, meaning no way to tell. */
758
0f552c5f 759int
bd5635a1
RP
760mips_frame_num_args(fip)
761 FRAME fip;
762{
763#if 0
764 struct chain_info_t *p;
765
766 p = mips_find_cached_frame(FRAME_FP(fip));
767 if (p->valid)
768 return p->the_info.numargs;
769#endif
770 return -1;
771}
407a8389 772\f
427fec5d 773/* Is this a branch with a delay slot? */
ee5fb959
JK
774static int
775is_delayed (insn)
776 unsigned long insn;
777{
778 int i;
779 for (i = 0; i < NUMOPCODES; ++i)
780 if (mips_opcodes[i].pinfo != INSN_MACRO
781 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
782 break;
427fec5d
JK
783 return (i < NUMOPCODES
784 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
785 | INSN_COND_BRANCH_DELAY
786 | INSN_COND_BRANCH_LIKELY)));
ee5fb959
JK
787}
788
789/* To skip prologues, I use this predicate. Returns either PC itself
790 if the code at PC does not look like a function prologue; otherwise
791 returns an address that (if we're lucky) follows the prologue. If
792 LENIENT, then we must skip everything which is involved in setting
793 up the frame (it's OK to skip more, just so long as we don't skip
794 anything which might clobber the registers which are being saved.
795 We must skip more in the case where part of the prologue is in the
796 delay slot of a non-prologue instruction). */
bd5635a1 797
be772100 798CORE_ADDR
ee5fb959 799mips_skip_prologue (pc, lenient)
bd5635a1 800 CORE_ADDR pc;
ee5fb959 801 int lenient;
bd5635a1
RP
802{
803 struct symbol *f;
804 struct block *b;
805 unsigned long inst;
d747e0af 806 int offset;
0b0d6c3f 807 int seen_sp_adjust = 0;
bd5635a1 808
e157305c
PS
809 /* Skip the typical prologue instructions. These are the stack adjustment
810 instruction and the instructions that save registers on the stack
811 or in the gcc frame. */
ee5fb959
JK
812 for (offset = 0; offset < 100; offset += 4)
813 {
814 char buf[4];
815 int status;
816
817 status = read_memory_nobpt (pc + offset, buf, 4);
818 if (status)
819 memory_error (status, pc + offset);
820 inst = extract_unsigned_integer (buf, 4);
821
822 if (lenient && is_delayed (inst))
823 continue;
824
e157305c 825 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 826 seen_sp_adjust = 1;
e157305c
PS
827 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
828 continue; /* sw reg,n($sp) */
829 /* reg != $zero */
830 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
831 continue;
832 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
833 /* sx reg,n($s8) */
834 continue; /* reg != $zero */
835 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 836 continue;
1b71de8e
PS
837 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
838 continue;
0b0d6c3f 839 else
e157305c 840 break;
d747e0af 841 }
e157305c
PS
842 return pc + offset;
843
844/* FIXME schauer. The following code seems no longer necessary if we
845 always skip the typical prologue instructions. */
846
847#if 0
0b0d6c3f
PS
848 if (seen_sp_adjust)
849 return pc + offset;
bd5635a1
RP
850
851 /* Well, it looks like a frameless. Let's make sure.
852 Note that we are not called on the current PC,
853 but on the function`s start PC, and I have definitely
854 seen optimized code that adjusts the SP quite later */
855 b = block_for_pc(pc);
856 if (!b) return pc;
857
dac4929a 858 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
859 if (!f) return pc;
860 /* Ideally, I would like to use the adjusted info
861 from mips_frame_info(), but for all practical
862 purposes it will not matter (and it would require
863 a different definition of SKIP_PROLOGUE())
864
865 Actually, it would not hurt to skip the storing
866 of arguments on the stack as well. */
0f552c5f 867 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
868 return pc + 4;
869
870 return pc;
e157305c 871#endif
bd5635a1 872}
c2a0f1cb 873
ee5fb959
JK
874/* Is address PC in the prologue (loosely defined) for function at
875 STARTADDR? */
876
877static int
878mips_in_lenient_prologue (startaddr, pc)
879 CORE_ADDR startaddr;
880 CORE_ADDR pc;
881{
882 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
883 return pc >= startaddr && pc < end_prologue;
884}
885
ac8cf67d
PS
886/* Given a return value in `regbuf' with a type `valtype',
887 extract and copy its value into `valbuf'. */
888void
889mips_extract_return_value (valtype, regbuf, valbuf)
890 struct type *valtype;
891 char regbuf[REGISTER_BYTES];
892 char *valbuf;
893{
894 int regnum;
895
896 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
897
898 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
899#ifdef REGISTER_CONVERT_TO_TYPE
900 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
901#endif
902}
903
904/* Given a return value in `regbuf' with a type `valtype',
905 write it's value into the appropriate register. */
906void
907mips_store_return_value (valtype, valbuf)
908 struct type *valtype;
909 char *valbuf;
910{
911 int regnum;
912 char raw_buffer[MAX_REGISTER_RAW_SIZE];
913
914 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
915 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
916
917#ifdef REGISTER_CONVERT_FROM_TYPE
918 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
919#endif
920
921 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
922}
923
427fec5d
JK
924static void reinit_frame_cache_sfunc PARAMS ((char *, int
925 struct cmd_list_element *));
926
927/* Just like reinit_frame_cache, but with the right arguments to be
928 callable as an sfunc. */
929static void
930reinit_frame_cache_sfunc (args, from_tty, c)
931 char *args;
932 int from_tty;
933 struct cmd_list_element *c;
934{
935 reinit_frame_cache ();
936}
c2a0f1cb
ILT
937
938void
939_initialize_mips_tdep ()
940{
427fec5d
JK
941 struct cmd_list_element *c;
942
943 /* Let the user turn off floating point and set the fence post for
944 heuristic_proc_start. */
945
c2a0f1cb 946 add_show_from_set
a8172eea 947 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
948 (char *) &mips_fpu,
949 "Set use of floating point coprocessor.\n\
950Turn off to avoid using floating point instructions when calling functions\n\
951or dealing with return values.", &setlist),
952 &showlist);
3127785a 953
bdef72d2
JK
954 /* We really would like to have both "0" and "unlimited" work, but
955 command.c doesn't deal with that. So make it a var_zinteger
956 because the user can always use "999999" or some such for unlimited. */
957 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
427fec5d
JK
958 (char *) &heuristic_fence_post,
959 "\
23d35572
JK
960Set the distance searched for the start of a function.\n\
961If you are debugging a stripped executable, GDB needs to search through the\n\
962program for the start of a function. This command sets the distance of the\n\
963search. The only need to set it is when debugging a stripped executable.",
427fec5d
JK
964 &setlist);
965 /* We need to throw away the frame cache when we set this, since it
966 might change our ability to get backtraces. */
967 c->function.sfunc = reinit_frame_cache_sfunc;
968 add_show_from_set (c, &showlist);
c2a0f1cb 969}
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