* reloc.c (enum bfd_reloc_code_real): Added
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
CommitLineData
7d9884b9 1/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
c2a0f1cb 2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
bd5635a1
RP
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6This file is part of GDB.
7
361bf6ee 8This program is free software; you can redistribute it and/or modify
bd5635a1 9it under the terms of the GNU General Public License as published by
361bf6ee
JG
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
bd5635a1 12
361bf6ee 13This program is distributed in the hope that it will be useful,
bd5635a1
RP
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
361bf6ee
JG
19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
bd5635a1 21
bd5635a1 22#include "defs.h"
bd5635a1
RP
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "value.h"
27#include "gdbcmd.h"
ef08856f 28#include "language.h"
bd5635a1 29#include "gdbcore.h"
62a469e1
SG
30#include "symfile.h"
31#include "objfiles.h"
bd5635a1 32
ee5fb959
JK
33#include "opcode/mips.h"
34
bd5635a1 35#define VM_MIN_ADDRESS (unsigned)0x400000
bd5635a1 36\f
ee5fb959
JK
37static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
38
c2a0f1cb
ILT
39/* Some MIPS boards don't support floating point, so we permit the
40 user to turn it off. */
41int mips_fpu = 1;
42
3127785a
RP
43/* Heuristic_proc_start may hunt through the text section for a long
44 time across a 2400 baud serial line. Allows the user to limit this
45 search. */
46static unsigned int heuristic_fence_post = 0;
47
0f552c5f
JG
48#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
49#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
50#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
51#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
52#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
53#define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
54#define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
55#define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
56#define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
57#define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
bd5635a1 58#define _PROC_MAGIC_ 0x0F0F0F0F
0f552c5f
JG
59#define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
60#define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
bd5635a1
RP
61
62struct linked_proc_info
63{
64 struct mips_extra_func_info info;
65 struct linked_proc_info *next;
dac4929a 66} *linked_proc_desc_table = NULL;
bd5635a1
RP
67
68\f
69#define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
70
0f552c5f 71static int
bd5635a1
RP
72read_next_frame_reg(fi, regno)
73 FRAME fi;
74 int regno;
75{
e157305c
PS
76 /* If it is the frame for sigtramp we have a complete sigcontext
77 immediately below the frame and we get the saved registers from there.
78 If the stack layout for sigtramp changes we might have to change these
79 constants and the companion fixup_sigtramp in mipsread.c */
1b71de8e 80#ifndef SIGFRAME_BASE
e157305c
PS
81#define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
82#define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
83#define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
1b71de8e 84#endif
bd5635a1
RP
85 for (; fi; fi = fi->next)
86 if (in_sigtramp(fi->pc, 0)) {
bd5635a1
RP
87 int offset;
88 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
e157305c 89 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
bd5635a1
RP
90 else return 0;
91 return read_memory_integer(fi->frame + offset, 4);
92 }
93 else if (regno == SP_REGNUM) return fi->frame;
94 else if (fi->saved_regs->regs[regno])
95 return read_memory_integer(fi->saved_regs->regs[regno], 4);
96 return read_register(regno);
97}
98
99int
100mips_frame_saved_pc(frame)
101 FRAME frame;
102{
0f552c5f 103 mips_extra_func_info_t proc_desc = frame->proc_desc;
bd5635a1 104 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
0f552c5f 105
bd5635a1
RP
106 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
107 return read_memory_integer(frame->frame - 4, 4);
0f552c5f 108
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RP
109 return read_next_frame_reg(frame, pcreg);
110}
111
112static struct mips_extra_func_info temp_proc_desc;
113static struct frame_saved_regs temp_saved_regs;
114
a8172eea
RP
115/* This fencepost looks highly suspicious to me. Removing it also
116 seems suspicious as it could affect remote debugging across serial
3127785a 117 lines. */
a8172eea 118
0f552c5f
JG
119static CORE_ADDR
120heuristic_proc_start(pc)
bd5635a1
RP
121 CORE_ADDR pc;
122{
bd5635a1 123 CORE_ADDR start_pc = pc;
3127785a 124 CORE_ADDR fence = start_pc - heuristic_fence_post;
0f552c5f
JG
125
126 if (start_pc == 0) return 0;
3127785a
RP
127
128 if (heuristic_fence_post == UINT_MAX
129 || fence < VM_MIN_ADDRESS)
130 fence = VM_MIN_ADDRESS;
0f552c5f 131
bd5635a1
RP
132 /* search back for previous return */
133 for (start_pc -= 4; ; start_pc -= 4)
a8172eea
RP
134 if (start_pc < fence)
135 {
3127785a
RP
136 /* It's not clear to me why we reach this point when
137 stop_soon_quietly, but with this test, at least we
138 don't print out warnings for every child forked (eg, on
139 decstation). 22apr93 rich@cygnus.com. */
140 if (!stop_soon_quietly)
141 {
23d35572
JK
142 static int blurb_printed = 0;
143
3127785a
RP
144 if (fence == VM_MIN_ADDRESS)
145 warning("Hit beginning of text section without finding");
146 else
147 warning("Hit heuristic-fence-post without finding");
148
23d35572
JK
149 warning("enclosing function for address 0x%x", pc);
150 if (!blurb_printed)
151 {
152 printf_filtered ("\
153This warning occurs if you are debugging a function without any symbols\n\
154(for example, in a stripped executable). In that case, you may wish to\n\
155increase the size of the search with the `set heuristic-fence-post' command.\n\
156\n\
157Otherwise, you told GDB there was a function where there isn't one, or\n\
158(more likely) you have encountered a bug in GDB.\n");
159 blurb_printed = 1;
160 }
3127785a
RP
161 }
162
a8172eea
RP
163 return 0;
164 }
bd5635a1
RP
165 else if (ABOUT_TO_RETURN(start_pc))
166 break;
167
168 start_pc += 8; /* skip return, and its delay slot */
169#if 0
170 /* skip nops (usually 1) 0 - is this */
171 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
172 start_pc += 4;
173#endif
174 return start_pc;
175}
176
0f552c5f 177static mips_extra_func_info_t
bd5635a1
RP
178heuristic_proc_desc(start_pc, limit_pc, next_frame)
179 CORE_ADDR start_pc, limit_pc;
180 FRAME next_frame;
181{
182 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
183 CORE_ADDR cur_pc;
184 int frame_size;
185 int has_frame_reg = 0;
186 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
187 unsigned long reg_mask = 0;
188
189 if (start_pc == 0) return NULL;
4ed97c9a
RP
190 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
191 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
a70dc898
RP
192 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
193
bd5635a1
RP
194 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
195 restart:
196 frame_size = 0;
197 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
34df79fc 198 char buf[4];
bd5635a1
RP
199 unsigned long word;
200 int status;
201
34df79fc
JK
202 status = read_memory_nobpt (cur_pc, buf, 4);
203 if (status) memory_error (status, cur_pc);
204 word = extract_unsigned_integer (buf, 4);
205
bd5635a1
RP
206 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
207 frame_size += (-word) & 0xFFFF;
208 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
211 int reg = (word & 0x001F0000) >> 16;
212 reg_mask |= 1 << reg;
213 temp_saved_regs.regs[reg] = sp + (short)word;
214 }
215 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
216 if ((unsigned short)word != frame_size)
217 reg30 = sp + (unsigned short)word;
218 else if (!has_frame_reg) {
219 int alloca_adjust;
220 has_frame_reg = 1;
221 reg30 = read_next_frame_reg(next_frame, 30);
222 alloca_adjust = reg30 - (sp + (unsigned short)word);
223 if (alloca_adjust > 0) {
224 /* FP > SP + frame_size. This may be because
225 /* of an alloca or somethings similar.
226 * Fix sp to "pre-alloca" value, and try again.
227 */
228 sp += alloca_adjust;
229 goto restart;
230 }
231 }
232 }
233 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
234 int reg = (word & 0x001F0000) >> 16;
235 reg_mask |= 1 << reg;
236 temp_saved_regs.regs[reg] = reg30 + (short)word;
237 }
238 }
239 if (has_frame_reg) {
240 PROC_FRAME_REG(&temp_proc_desc) = 30;
241 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
242 }
243 else {
244 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
246 }
247 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
248 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
249 return &temp_proc_desc;
250}
251
0f552c5f 252static mips_extra_func_info_t
bd5635a1
RP
253find_proc_desc(pc, next_frame)
254 CORE_ADDR pc;
255 FRAME next_frame;
256{
257 mips_extra_func_info_t proc_desc;
0f552c5f 258 struct block *b = block_for_pc(pc);
48be4c35
JK
259 struct symbol *sym;
260 CORE_ADDR startaddr;
261
262 find_pc_partial_function (pc, NULL, &startaddr, NULL);
263 if (b == NULL)
264 sym = NULL;
265 else
266 {
267 if (startaddr > BLOCK_START (b))
268 /* This is the "pathological" case referred to in a comment in
269 print_frame_info. It might be better to move this check into
270 symbol reading. */
271 sym = NULL;
272 else
273 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
274 0, NULL);
275 }
0f552c5f
JG
276
277 if (sym)
bd5635a1
RP
278 {
279 /* IF this is the topmost frame AND
280 * (this proc does not have debugging information OR
281 * the PC is in the procedure prologue)
be772100 282 * THEN create a "heuristic" proc_desc (by analyzing
bd5635a1
RP
283 * the actual code) to replace the "official" proc_desc.
284 */
0f552c5f 285 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
bd5635a1
RP
286 if (next_frame == NULL) {
287 struct symtab_and_line val;
288 struct symbol *proc_symbol =
289 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
0f552c5f 290
bd5635a1
RP
291 if (proc_symbol) {
292 val = find_pc_line (BLOCK_START
293 (SYMBOL_BLOCK_VALUE(proc_symbol)),
294 0);
295 val.pc = val.end ? val.end : pc;
296 }
297 if (!proc_symbol || pc < val.pc) {
298 mips_extra_func_info_t found_heuristic =
299 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
300 pc, next_frame);
301 if (found_heuristic) proc_desc = found_heuristic;
302 }
303 }
304 }
305 else
306 {
0f552c5f
JG
307 /* Is linked_proc_desc_table really necessary? It only seems to be used
308 by procedure call dummys. However, the procedures being called ought
309 to have their own proc_descs, and even if they don't,
310 heuristic_proc_desc knows how to create them! */
311
bd5635a1
RP
312 register struct linked_proc_info *link;
313 for (link = linked_proc_desc_table; link; link = link->next)
314 if (PROC_LOW_ADDR(&link->info) <= pc
315 && PROC_HIGH_ADDR(&link->info) > pc)
316 return &link->info;
23d35572 317
48be4c35
JK
318 if (startaddr == 0)
319 startaddr = heuristic_proc_start (pc);
320
bd5635a1 321 proc_desc =
48be4c35 322 heuristic_proc_desc (startaddr, pc, next_frame);
bd5635a1
RP
323 }
324 return proc_desc;
325}
326
327mips_extra_func_info_t cached_proc_desc;
328
0f552c5f
JG
329FRAME_ADDR
330mips_frame_chain(frame)
bd5635a1
RP
331 FRAME frame;
332{
bd5635a1
RP
333 mips_extra_func_info_t proc_desc;
334 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
be772100 335
0f552c5f
JG
336 if (saved_pc == 0 || inside_entry_file (saved_pc))
337 return 0;
338
bd5635a1 339 proc_desc = find_proc_desc(saved_pc, frame);
0f552c5f
JG
340 if (!proc_desc)
341 return 0;
342
bd5635a1 343 cached_proc_desc = proc_desc;
e797b4bc
JK
344
345 /* If no frame pointer and frame size is zero, we must be at end
346 of stack (or otherwise hosed). If we don't check frame size,
347 we loop forever if we see a zero size frame. */
348 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
3f528883
JK
349 && PROC_FRAME_OFFSET (proc_desc) == 0
350 /* Frameless functions, which can happen on the innermost frame
351 or a frame which was innermost when a signal happened, can
352 have frame size zero. No need to check for non-frameless
353 functions in these situations, though (I don't think). */
354 && frame->next != NULL
355 && !frame->next->signal_handler_caller)
bdef72d2
JK
356 return 0;
357 else
358 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
359 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1
RP
360}
361
362void
363init_extra_frame_info(fci)
364 struct frame_info *fci;
365{
366 extern struct obstack frame_cache_obstack;
367 /* Use proc_desc calculated in frame_chain */
ee5fb959
JK
368 mips_extra_func_info_t proc_desc =
369 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
0f552c5f 370
bd5635a1
RP
371 fci->saved_regs = (struct frame_saved_regs*)
372 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
ee5fb959 373 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
bd5635a1 374 fci->proc_desc =
ee5fb959 375 proc_desc == &temp_proc_desc ? 0 : proc_desc;
bd5635a1
RP
376 if (proc_desc)
377 {
378 int ireg;
379 CORE_ADDR reg_position;
380 unsigned long mask;
381 /* r0 bit means kernel trap */
382 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
383
c2a0f1cb
ILT
384 /* Fixup frame-pointer - only needed for top frame */
385 /* This may not be quite right, if proc has a real frame register */
2fcdae93 386 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
c2a0f1cb
ILT
387 fci->frame = read_register (SP_REGNUM);
388 else
389 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
390 + PROC_FRAME_OFFSET(proc_desc);
bd5635a1 391
ee5fb959
JK
392 /* If this is the innermost frame, and we are still in the
393 prologue (loosely defined), then the registers may not have
48be4c35 394 been saved yet. */
ee5fb959 395 if (fci->next == NULL
66fe7416 396 && !PROC_DESC_IS_DUMMY(proc_desc)
ee5fb959 397 && mips_in_lenient_prologue (PROC_LOW_ADDR (proc_desc), fci->pc))
48be4c35
JK
398 {
399 /* Can't just say that the registers are not saved, because they
400 might get clobbered halfway through the prologue.
401 heuristic_proc_desc already has the right code to figure out
402 exactly what has been saved, so use it. As far as I know we
403 could be doing this (as we do on the 68k, for example)
404 regardless of whether we are in the prologue; I'm leaving in
405 the check for being in the prologue only out of conservatism
406 (I'm not sure whether heuristic_proc_desc handles all cases,
407 for example).
408
409 This stuff is ugly (and getting uglier by the minute). Probably
410 the best way to clean it up is to ignore the proc_desc's from
411 the symbols altogher, and get all the information we need by
412 examining the prologue (provided we can make the prologue
413 examining code good enough to get all the cases...). */
414 proc_desc =
415 heuristic_proc_desc (PROC_LOW_ADDR (proc_desc),
416 fci->pc,
417 fci->next);
418 }
419
420 if (proc_desc == &temp_proc_desc)
ee5fb959 421 *fci->saved_regs = temp_saved_regs;
bd5635a1 422 else
ee5fb959 423 {
bd5635a1
RP
424 /* find which general-purpose registers were saved */
425 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
426 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
427 for (ireg= 31; mask; --ireg, mask <<= 1)
ee5fb959 428 if (mask & 0x80000000)
bd5635a1 429 {
ee5fb959
JK
430 fci->saved_regs->regs[ireg] = reg_position;
431 reg_position -= 4;
bd5635a1
RP
432 }
433 /* find which floating-point registers were saved */
434 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
ee5fb959
JK
435
436 /* The freg_offset points to where the first *double* register
437 is saved. So skip to the high-order word. */
bd5635a1
RP
438 reg_position += 4;
439 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
440 for (ireg = 31; mask; --ireg, mask <<= 1)
ee5fb959 441 if (mask & 0x80000000)
bd5635a1 442 {
ee5fb959
JK
443 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
444 reg_position -= 4;
bd5635a1 445 }
ee5fb959 446 }
bd5635a1
RP
447
448 /* hack: if argument regs are saved, guess these contain args */
449 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
450 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
451 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
452 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
453 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
454
455 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
456 }
bd5635a1
RP
457}
458
a70dc898
RP
459/* MIPS stack frames are almost impenetrable. When execution stops,
460 we basically have to look at symbol information for the function
461 that we stopped in, which tells us *which* register (if any) is
462 the base of the frame pointer, and what offset from that register
463 the frame itself is at.
464
465 This presents a problem when trying to examine a stack in memory
466 (that isn't executing at the moment), using the "frame" command. We
467 don't have a PC, nor do we have any registers except SP.
468
469 This routine takes two arguments, SP and PC, and tries to make the
470 cached frames look as if these two arguments defined a frame on the
471 cache. This allows the rest of info frame to extract the important
472 arguments without difficulty. */
473
474FRAME
c2a0f1cb
ILT
475setup_arbitrary_frame (argc, argv)
476 int argc;
477 FRAME_ADDR *argv;
a70dc898 478{
c2a0f1cb
ILT
479 if (argc != 2)
480 error ("MIPS frame specifications require two arguments: sp and pc");
481
482 return create_new_frame (argv[0], argv[1]);
a70dc898
RP
483}
484
bd5635a1 485
0f552c5f
JG
486CORE_ADDR
487mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
bd5635a1
RP
488 int nargs;
489 value *args;
490 CORE_ADDR sp;
491 int struct_return;
492 CORE_ADDR struct_addr;
493{
494 CORE_ADDR buf;
495 register i;
496 int accumulate_size = struct_return ? 4 : 0;
497 struct mips_arg { char *contents; int len; int offset; };
498 struct mips_arg *mips_args =
499 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
500 register struct mips_arg *m_arg;
501 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
502 extern value value_arg_coerce();
503 value arg = value_arg_coerce (args[i]);
504 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
505 /* This entire mips-specific routine is because doubles must be aligned
506 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
507 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
508 * breaks their varargs implementation...). A correct solution
509 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
510 * in stdarg.h/varargs.h).
511 */
512 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
513 m_arg->offset = accumulate_size;
514 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
515 m_arg->contents = VALUE_CONTENTS(arg);
516 }
517 accumulate_size = (accumulate_size + 7) & (-8);
518 if (accumulate_size < 16) accumulate_size = 16;
519 sp -= accumulate_size;
520 for (i = nargs; m_arg--, --i >= 0; )
521 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
522 if (struct_return) {
523 buf = struct_addr;
a70dc898
RP
524 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
525 }
bd5635a1
RP
526 return sp;
527}
528
529/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
530#define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
531
532void
533mips_push_dummy_frame()
534{
535 int ireg;
536 struct linked_proc_info *link = (struct linked_proc_info*)
537 xmalloc(sizeof(struct linked_proc_info));
538 mips_extra_func_info_t proc_desc = &link->info;
539 CORE_ADDR sp = read_register (SP_REGNUM);
540 CORE_ADDR save_address;
541 REGISTER_TYPE buffer;
542 link->next = linked_proc_desc_table;
543 linked_proc_desc_table = link;
544#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
545#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
546#define GEN_REG_SAVE_COUNT 22
547#define FLOAT_REG_SAVE_MASK MASK(0,19)
548#define FLOAT_REG_SAVE_COUNT 20
549#define SPECIAL_REG_SAVE_COUNT 4
550 /*
551 * The registers we must save are all those not preserved across
552 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
553 * In addition, we must save the PC, and PUSH_FP_REGNUM.
554 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
555 *
556 * Dummy frame layout:
557 * (high memory)
558 * Saved PC
559 * Saved MMHI, MMLO, FPC_CSR
560 * Saved R31
561 * Saved R28
562 * ...
563 * Saved R1
564 * Saved D18 (i.e. F19, F18)
565 * ...
566 * Saved D0 (i.e. F1, F0)
c2a0f1cb 567 * CALL_DUMMY (subroutine stub; see tm-mips.h)
bd5635a1
RP
568 * Parameter build area (not yet implemented)
569 * (low memory)
570 */
571 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
c2a0f1cb 572 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
bd5635a1
RP
573 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
574 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
575 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
576 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
577 /* save general registers */
578 save_address = sp + PROC_REG_OFFSET(proc_desc);
579 for (ireg = 32; --ireg >= 0; )
580 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
581 {
582 buffer = read_register (ireg);
a70dc898 583 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1
RP
584 save_address -= 4;
585 }
0b0d6c3f
PS
586 /* save floating-points registers starting with high order word */
587 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
bd5635a1
RP
588 for (ireg = 32; --ireg >= 0; )
589 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
590 {
7d9884b9 591 buffer = read_register (ireg + FP0_REGNUM);
a70dc898 592 write_memory (save_address, (char *)&buffer, 4);
bd5635a1
RP
593 save_address -= 4;
594 }
595 write_register (PUSH_FP_REGNUM, sp);
596 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
597 PROC_FRAME_OFFSET(proc_desc) = 0;
598 buffer = read_register (PC_REGNUM);
a70dc898 599 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 600 buffer = read_register (HI_REGNUM);
a70dc898 601 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
bd5635a1 602 buffer = read_register (LO_REGNUM);
a70dc898 603 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb 604 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
a70dc898 605 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
c2a0f1cb
ILT
606 sp -= 4 * (GEN_REG_SAVE_COUNT
607 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
608 + SPECIAL_REG_SAVE_COUNT);
bd5635a1
RP
609 write_register (SP_REGNUM, sp);
610 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
611 PROC_HIGH_ADDR(proc_desc) = sp;
612 SET_PROC_DESC_IS_DUMMY(proc_desc);
613 PROC_PC_REG(proc_desc) = RA_REGNUM;
614}
615
616void
617mips_pop_frame()
dac4929a
SG
618{
619 register int regnum;
bd5635a1
RP
620 FRAME frame = get_current_frame ();
621 CORE_ADDR new_sp = frame->frame;
dac4929a 622
a70dc898 623 mips_extra_func_info_t proc_desc = frame->proc_desc;
dac4929a
SG
624
625 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
626 if (proc_desc)
627 {
628 for (regnum = 32; --regnum >= 0; )
629 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
630 write_register (regnum,
631 read_memory_integer (frame->saved_regs->regs[regnum],
632 4));
633 for (regnum = 32; --regnum >= 0; )
634 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
635 write_register (regnum + FP0_REGNUM,
636 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
637 }
638 write_register (SP_REGNUM, new_sp);
639 flush_cached_frames ();
640 /* We let mips_init_extra_frame_info figure out the frame pointer */
641 set_current_frame (create_new_frame (0, read_pc ()));
642
bd5635a1
RP
643 if (PROC_DESC_IS_DUMMY(proc_desc))
644 {
dac4929a
SG
645 struct linked_proc_info *pi_ptr, *prev_ptr;
646
647 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
648 pi_ptr != NULL;
649 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
650 {
651 if (&pi_ptr->info == proc_desc)
652 break;
653 }
654
655 if (pi_ptr == NULL)
656 error ("Can't locate dummy extra frame info\n");
657
658 if (prev_ptr != NULL)
659 prev_ptr->next = pi_ptr->next;
660 else
661 linked_proc_desc_table = pi_ptr->next;
662
663 free (pi_ptr);
664
bd5635a1
RP
665 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
666 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
c2a0f1cb
ILT
667 if (mips_fpu)
668 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
bd5635a1 669 }
bd5635a1
RP
670}
671
0f552c5f 672static void
a70dc898 673mips_print_register (regnum, all)
bd5635a1
RP
674 int regnum, all;
675{
48be4c35
JK
676 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
677 REGISTER_TYPE val;
bd5635a1 678
48be4c35
JK
679 /* Get the data in raw format. */
680 if (read_relative_register_raw_bytes (regnum, raw_buffer))
681 {
682 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
683 return;
684 }
685
686 /* If an even floating pointer register, also print as double. */
687 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
688 && !((regnum-FP0_REGNUM) & 1)) {
689 char dbuffer[MAX_REGISTER_RAW_SIZE];
690
691 read_relative_register_raw_bytes (regnum, dbuffer);
692 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
ac8cf67d 693#ifdef REGISTER_CONVERT_TO_TYPE
48be4c35 694 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
ac8cf67d 695#endif
48be4c35
JK
696 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
697 val_print (builtin_type_double, dbuffer, 0,
698 stdout, 0, 1, 0, Val_pretty_default);
699 printf_filtered ("); ");
700 }
701 fputs_filtered (reg_names[regnum], stdout);
702
703 /* The problem with printing numeric register names (r26, etc.) is that
704 the user can't use them on input. Probably the best solution is to
705 fix it so that either the numeric or the funky (a2, etc.) names
706 are accepted on input. */
707 if (regnum < 32)
708 printf_filtered ("(r%d): ", regnum);
709 else
710 printf_filtered (": ");
bd5635a1 711
48be4c35
JK
712 /* If virtual format is floating, print it that way. */
713 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
714 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
715 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
716 stdout, 0, 1, 0, Val_pretty_default);
717 }
718 /* Else print as integer in hex. */
719 else
720 {
721 long val;
bd5635a1 722
48be4c35
JK
723 val = extract_signed_integer (raw_buffer,
724 REGISTER_RAW_SIZE (regnum));
34df79fc 725
48be4c35
JK
726 if (val == 0)
727 printf_filtered ("0");
728 else if (all)
729 /* FIXME: We should be printing this in a fixed field width, so that
730 registers line up. */
731 printf_filtered (local_hex_format(), val);
732 else
733 printf_filtered ("%s=%d", local_hex_string(val), val);
734 }
bd5635a1
RP
735}
736
d8b3b00e 737/* Replacement for generic do_registers_info. */
0f552c5f 738void
361bf6ee 739mips_do_registers_info (regnum, fpregs)
bd5635a1 740 int regnum;
361bf6ee 741 int fpregs;
bd5635a1
RP
742{
743 if (regnum != -1) {
744 mips_print_register (regnum, 0);
745 printf_filtered ("\n");
746 }
747 else {
748 for (regnum = 0; regnum < NUM_REGS; ) {
d8b3b00e
JG
749 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
750 regnum++;
751 continue;
752 }
bd5635a1
RP
753 mips_print_register (regnum, 1);
754 regnum++;
755 if ((regnum & 3) == 0 || regnum == NUM_REGS)
756 printf_filtered (";\n");
757 else
758 printf_filtered ("; ");
759 }
760 }
761}
762/* Return number of args passed to a frame. described by FIP.
763 Can return -1, meaning no way to tell. */
764
0f552c5f 765int
bd5635a1
RP
766mips_frame_num_args(fip)
767 FRAME fip;
768{
769#if 0
770 struct chain_info_t *p;
771
772 p = mips_find_cached_frame(FRAME_FP(fip));
773 if (p->valid)
774 return p->the_info.numargs;
775#endif
776 return -1;
777}
407a8389 778\f
427fec5d 779/* Is this a branch with a delay slot? */
ee5fb959
JK
780static int
781is_delayed (insn)
782 unsigned long insn;
783{
784 int i;
785 for (i = 0; i < NUMOPCODES; ++i)
786 if (mips_opcodes[i].pinfo != INSN_MACRO
787 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
788 break;
427fec5d
JK
789 return (i < NUMOPCODES
790 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
791 | INSN_COND_BRANCH_DELAY
792 | INSN_COND_BRANCH_LIKELY)));
ee5fb959
JK
793}
794
795/* To skip prologues, I use this predicate. Returns either PC itself
796 if the code at PC does not look like a function prologue; otherwise
797 returns an address that (if we're lucky) follows the prologue. If
798 LENIENT, then we must skip everything which is involved in setting
799 up the frame (it's OK to skip more, just so long as we don't skip
800 anything which might clobber the registers which are being saved.
801 We must skip more in the case where part of the prologue is in the
802 delay slot of a non-prologue instruction). */
bd5635a1 803
be772100 804CORE_ADDR
ee5fb959 805mips_skip_prologue (pc, lenient)
bd5635a1 806 CORE_ADDR pc;
ee5fb959 807 int lenient;
bd5635a1
RP
808{
809 struct symbol *f;
810 struct block *b;
811 unsigned long inst;
d747e0af 812 int offset;
0b0d6c3f 813 int seen_sp_adjust = 0;
bd5635a1 814
e157305c
PS
815 /* Skip the typical prologue instructions. These are the stack adjustment
816 instruction and the instructions that save registers on the stack
817 or in the gcc frame. */
ee5fb959
JK
818 for (offset = 0; offset < 100; offset += 4)
819 {
820 char buf[4];
821 int status;
822
823 status = read_memory_nobpt (pc + offset, buf, 4);
824 if (status)
825 memory_error (status, pc + offset);
826 inst = extract_unsigned_integer (buf, 4);
827
828 if (lenient && is_delayed (inst))
829 continue;
830
e157305c 831 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
0b0d6c3f 832 seen_sp_adjust = 1;
e157305c
PS
833 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
834 continue; /* sw reg,n($sp) */
835 /* reg != $zero */
836 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
837 continue;
838 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
839 /* sx reg,n($s8) */
840 continue; /* reg != $zero */
841 else if (inst == 0x03A0F021) /* move $s8,$sp */
0b0d6c3f 842 continue;
1b71de8e
PS
843 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
844 continue;
0b0d6c3f 845 else
e157305c 846 break;
d747e0af 847 }
e157305c
PS
848 return pc + offset;
849
850/* FIXME schauer. The following code seems no longer necessary if we
851 always skip the typical prologue instructions. */
852
853#if 0
0b0d6c3f
PS
854 if (seen_sp_adjust)
855 return pc + offset;
bd5635a1
RP
856
857 /* Well, it looks like a frameless. Let's make sure.
858 Note that we are not called on the current PC,
859 but on the function`s start PC, and I have definitely
860 seen optimized code that adjusts the SP quite later */
861 b = block_for_pc(pc);
862 if (!b) return pc;
863
dac4929a 864 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
bd5635a1
RP
865 if (!f) return pc;
866 /* Ideally, I would like to use the adjusted info
867 from mips_frame_info(), but for all practical
868 purposes it will not matter (and it would require
869 a different definition of SKIP_PROLOGUE())
870
871 Actually, it would not hurt to skip the storing
872 of arguments on the stack as well. */
0f552c5f 873 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
bd5635a1
RP
874 return pc + 4;
875
876 return pc;
e157305c 877#endif
bd5635a1 878}
c2a0f1cb 879
ee5fb959
JK
880/* Is address PC in the prologue (loosely defined) for function at
881 STARTADDR? */
882
883static int
884mips_in_lenient_prologue (startaddr, pc)
885 CORE_ADDR startaddr;
886 CORE_ADDR pc;
887{
888 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
889 return pc >= startaddr && pc < end_prologue;
890}
891
ac8cf67d
PS
892/* Given a return value in `regbuf' with a type `valtype',
893 extract and copy its value into `valbuf'. */
894void
895mips_extract_return_value (valtype, regbuf, valbuf)
896 struct type *valtype;
897 char regbuf[REGISTER_BYTES];
898 char *valbuf;
899{
900 int regnum;
901
902 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
903
904 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
905#ifdef REGISTER_CONVERT_TO_TYPE
906 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
907#endif
908}
909
910/* Given a return value in `regbuf' with a type `valtype',
911 write it's value into the appropriate register. */
912void
913mips_store_return_value (valtype, valbuf)
914 struct type *valtype;
915 char *valbuf;
916{
917 int regnum;
918 char raw_buffer[MAX_REGISTER_RAW_SIZE];
919
920 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
921 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
922
923#ifdef REGISTER_CONVERT_FROM_TYPE
924 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
925#endif
926
927 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
928}
929
8b52d486 930static void reinit_frame_cache_sfunc PARAMS ((char *, int,
427fec5d
JK
931 struct cmd_list_element *));
932
933/* Just like reinit_frame_cache, but with the right arguments to be
934 callable as an sfunc. */
935static void
936reinit_frame_cache_sfunc (args, from_tty, c)
937 char *args;
938 int from_tty;
939 struct cmd_list_element *c;
940{
941 reinit_frame_cache ();
942}
c2a0f1cb
ILT
943
944void
945_initialize_mips_tdep ()
946{
427fec5d
JK
947 struct cmd_list_element *c;
948
949 /* Let the user turn off floating point and set the fence post for
950 heuristic_proc_start. */
951
c2a0f1cb 952 add_show_from_set
a8172eea 953 (add_set_cmd ("mipsfpu", class_support, var_boolean,
c2a0f1cb
ILT
954 (char *) &mips_fpu,
955 "Set use of floating point coprocessor.\n\
956Turn off to avoid using floating point instructions when calling functions\n\
957or dealing with return values.", &setlist),
958 &showlist);
3127785a 959
bdef72d2
JK
960 /* We really would like to have both "0" and "unlimited" work, but
961 command.c doesn't deal with that. So make it a var_zinteger
962 because the user can always use "999999" or some such for unlimited. */
963 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
427fec5d
JK
964 (char *) &heuristic_fence_post,
965 "\
23d35572
JK
966Set the distance searched for the start of a function.\n\
967If you are debugging a stripped executable, GDB needs to search through the\n\
968program for the start of a function. This command sets the distance of the\n\
969search. The only need to set it is when debugging a stripped executable.",
427fec5d
JK
970 &setlist);
971 /* We need to throw away the frame cache when we set this, since it
972 might change our ability to get backtraces. */
973 c->function.sfunc = reinit_frame_cache_sfunc;
974 add_show_from_set (c, &showlist);
c2a0f1cb 975}
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