Make GDB -Wpointer-sign clean on MinGW too.
[deliverable/binutils-gdb.git] / gdb / mips-tdep.h
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1/* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
2
28e7fd62 3 Copyright (C) 2002-2013 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20#ifndef MIPS_TDEP_H
21#define MIPS_TDEP_H
22
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23struct gdbarch;
24
025bb325 25/* All the possible MIPS ABIs. */
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26enum mips_abi
27 {
28 MIPS_ABI_UNKNOWN = 0,
29 MIPS_ABI_N32,
30 MIPS_ABI_O32,
31 MIPS_ABI_N64,
32 MIPS_ABI_O64,
33 MIPS_ABI_EABI32,
34 MIPS_ABI_EABI64,
35 MIPS_ABI_LAST
36 };
37
38/* Return the MIPS ABI associated with GDBARCH. */
39enum mips_abi mips_abi (struct gdbarch *gdbarch);
40
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41/* Base and compressed MIPS ISA variations. */
42enum mips_isa
43 {
44 ISA_MIPS = -1, /* mips_compression_string depends on it. */
45 ISA_MIPS16,
46 ISA_MICROMIPS
47 };
48
1b13c4f6 49/* Return the MIPS ISA's register size. Just a short cut to the BFD
4246e332 50 architecture's word size. */
1b13c4f6 51extern int mips_isa_regsize (struct gdbarch *gdbarch);
4246e332 52
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53/* Return the current index for various MIPS registers. */
54struct mips_regnum
55{
56 int pc;
57 int fp0;
58 int fp_implementation_revision;
59 int fp_control_status;
60 int badvaddr; /* Bad vaddr for addressing exception. */
61 int cause; /* Describes last exception. */
62 int hi; /* Multiply/divide temp. */
63 int lo; /* ... */
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64 int dspacc; /* SmartMIPS/DSP accumulators. */
65 int dspctl; /* DSP control. */
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66};
67extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
68
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69/* Some MIPS boards don't support floating point while others only
70 support single-precision floating-point operations. */
71
72enum mips_fpu_type
73{
74 MIPS_FPU_DOUBLE, /* Full double precision floating point. */
75 MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */
76 MIPS_FPU_NONE /* No floating point. */
77};
78
025bb325 79/* MIPS specific per-architecture information. */
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80struct gdbarch_tdep
81{
82 /* from the elf header */
83 int elf_flags;
84
85 /* mips options */
86 enum mips_abi mips_abi;
87 enum mips_abi found_abi;
4cc0665f 88 enum mips_isa mips_isa;
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89 enum mips_fpu_type mips_fpu_type;
90 int mips_last_arg_regnum;
91 int mips_last_fp_arg_regnum;
92 int default_mask_address_p;
93 /* Is the target using 64-bit raw integer registers but only
94 storing a left-aligned 32-bit value in each? */
95 int mips64_transfers_32bit_regs_p;
96 /* Indexes for various registers. IRIX and embedded have
97 different values. This contains the "public" fields. Don't
98 add any that do not need to be public. */
99 const struct mips_regnum *regnum;
100 /* Register names table for the current register set. */
101 const char **mips_processor_reg_names;
102
103 /* The size of register data available from the target, if known.
104 This doesn't quite obsolete the manual
105 mips64_transfers_32bit_regs_p, since that is documented to force
106 left alignment even for big endian (very strange). */
107 int register_size_valid_p;
108 int register_size;
109
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110 /* General-purpose registers. */
111 struct regset *gregset;
112 struct regset *gregset64;
113
114 /* Floating-point registers. */
115 struct regset *fpregset;
116 struct regset *fpregset64;
117
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118 /* Return the expected next PC if FRAME is stopped at a syscall
119 instruction. */
120 CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
121};
122
7157eed4 123/* Register numbers of various important registers. */
613e114f 124
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125enum
126{
613e114f 127 MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
9c46b6f0 128 MIPS_AT_REGNUM = 1,
613e114f 129 MIPS_V0_REGNUM = 2, /* Function integer return value. */
025bb325 130 MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call. */
14132e89 131 MIPS_S2_REGNUM = 18, /* Contains return address in MIPS16 thunks. */
613e114f 132 MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
14132e89 133 MIPS_GP_REGNUM = 28,
f10683bb 134 MIPS_SP_REGNUM = 29,
9c46b6f0 135 MIPS_RA_REGNUM = 31,
24e05951 136 MIPS_PS_REGNUM = 32, /* Contains processor status. */
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137 MIPS_EMBED_LO_REGNUM = 33,
138 MIPS_EMBED_HI_REGNUM = 34,
139 MIPS_EMBED_BADVADDR_REGNUM = 35,
140 MIPS_EMBED_CAUSE_REGNUM = 36,
141 MIPS_EMBED_PC_REGNUM = 37,
613e114f 142 MIPS_EMBED_FP0_REGNUM = 38,
025bb325 143 MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME. */
607fc93c 144 MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */
a5c9623c 145 MIPS_PRID_REGNUM = 89, /* Processor ID. */
607fc93c 146 MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */
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147};
148
025bb325 149/* Defined in mips-tdep.c and used in remote-mips.c. */
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150extern void deprecated_mips_set_processor_regs_hack (void);
151
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152/* Instruction sizes and other useful constants. */
153enum
9c46b6f0 154{
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155 MIPS_INSN16_SIZE = 2,
156 MIPS_INSN32_SIZE = 4,
157 /* The number of floating-point or integer registers. */
158 MIPS_NUMREGS = 32
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159};
160
0d0266c6 161/* Single step based on where the current instruction will take us. */
0b1b3e42 162extern int mips_software_single_step (struct frame_info *frame);
691c0433 163
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164/* Tell if the program counter value in MEMADDR is in a standard
165 MIPS function. */
166extern int mips_pc_is_mips (bfd_vma memaddr);
167
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168/* Tell if the program counter value in MEMADDR is in a MIPS16
169 function. */
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170extern int mips_pc_is_mips16 (struct gdbarch *gdbarch, bfd_vma memaddr);
171
172/* Tell if the program counter value in MEMADDR is in a microMIPS
173 function. */
174extern int mips_pc_is_micromips (struct gdbarch *gdbarch, bfd_vma memaddr);
0fe7e7c8 175
025bb325 176/* Return the currently configured (or set) saved register size. */
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177extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
178
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179/* Make PC the address of the next instruction to execute. */
180extern void mips_write_pc (struct regcache *regcache, CORE_ADDR pc);
181
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182/* Target descriptions which only indicate the size of general
183 registers. */
184extern struct target_desc *mips_tdesc_gp32;
185extern struct target_desc *mips_tdesc_gp64;
186
d1973055 187#endif /* MIPS_TDEP_H */
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