Commit | Line | Data |
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d1180b0f MK |
1 | /* Target-dependent code for NetBSD/mips. |
2 | ||
6aba47ca | 3 | Copyright (C) 2002, 2003, 2004, 2006, 2007 Free Software Foundation, Inc. |
e4cd0d6a | 4 | |
45888261 JT |
5 | Contributed by Wasabi Systems, Inc. |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
45888261 JT |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
45888261 JT |
21 | |
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
24 | #include "regcache.h" | |
d1180b0f | 25 | #include "regset.h" |
45888261 JT |
26 | #include "target.h" |
27 | #include "value.h" | |
28 | #include "osabi.h" | |
29 | ||
d1180b0f | 30 | #include "gdb_assert.h" |
4c7d22cb MK |
31 | #include "gdb_string.h" |
32 | ||
3d9b49b0 | 33 | #include "nbsd-tdep.h" |
45888261 | 34 | #include "mipsnbsd-tdep.h" |
1777c7b4 | 35 | #include "mips-tdep.h" |
45888261 JT |
36 | |
37 | #include "solib-svr4.h" | |
38 | ||
d1180b0f MK |
39 | /* Shorthand for some register numbers used below. */ |
40 | #define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM | |
41 | #define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM | |
42 | #define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32 | |
43 | ||
44 | /* Core file support. */ | |
45 | ||
46 | /* Number of registers in `struct reg' from <machine/reg.h>. */ | |
47 | #define MIPSNBSD_NUM_GREGS 38 | |
48 | ||
49 | /* Number of registers in `struct fpreg' from <machine/reg.h>. */ | |
50 | #define MIPSNBSD_NUM_FPREGS 33 | |
51 | ||
52 | /* Supply register REGNUM from the buffer specified by FPREGS and LEN | |
53 | in the floating-point register set REGSET to register cache | |
54 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
55 | ||
56 | static void | |
57 | mipsnbsd_supply_fpregset (const struct regset *regset, | |
58 | struct regcache *regcache, | |
59 | int regnum, const void *fpregs, size_t len) | |
60 | { | |
61 | size_t regsize = mips_isa_regsize (get_regcache_arch (regcache)); | |
62 | const char *regs = fpregs; | |
63 | int i; | |
64 | ||
65 | gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize); | |
66 | ||
67 | for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++) | |
68 | { | |
69 | if (regnum == i || regnum == -1) | |
70 | regcache_raw_supply (regcache, i, | |
71 | regs + (i - MIPS_FP0_REGNUM) * regsize); | |
72 | } | |
73 | } | |
74 | ||
75 | /* Supply register REGNUM from the buffer specified by GREGS and LEN | |
76 | in the general-purpose register set REGSET to register cache | |
77 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
78 | ||
79 | static void | |
80 | mipsnbsd_supply_gregset (const struct regset *regset, | |
81 | struct regcache *regcache, int regnum, | |
82 | const void *gregs, size_t len) | |
83 | { | |
84 | size_t regsize = mips_isa_regsize (get_regcache_arch (regcache)); | |
85 | const char *regs = gregs; | |
86 | int i; | |
87 | ||
88 | gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize); | |
89 | ||
90 | for (i = 0; i <= MIPS_PC_REGNUM; i++) | |
91 | { | |
92 | if (regnum == i || regnum == -1) | |
93 | regcache_raw_supply (regcache, i, regs + i * regsize); | |
94 | } | |
95 | ||
96 | if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize) | |
97 | { | |
98 | regs += MIPSNBSD_NUM_GREGS * regsize; | |
99 | len -= MIPSNBSD_NUM_GREGS * regsize; | |
100 | mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len); | |
101 | } | |
102 | } | |
103 | ||
104 | /* NetBSD/mips register sets. */ | |
105 | ||
106 | static struct regset mipsnbsd_gregset = | |
107 | { | |
108 | NULL, | |
109 | mipsnbsd_supply_gregset | |
110 | }; | |
111 | ||
112 | static struct regset mipsnbsd_fpregset = | |
113 | { | |
114 | NULL, | |
115 | mipsnbsd_supply_fpregset | |
116 | }; | |
117 | ||
118 | /* Return the appropriate register set for the core section identified | |
119 | by SECT_NAME and SECT_SIZE. */ | |
120 | ||
121 | static const struct regset * | |
122 | mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch, | |
123 | const char *sect_name, size_t sect_size) | |
124 | { | |
125 | size_t regsize = mips_isa_regsize (gdbarch); | |
126 | ||
127 | if (strcmp (sect_name, ".reg") == 0 | |
128 | && sect_size >= MIPSNBSD_NUM_GREGS * regsize) | |
129 | return &mipsnbsd_gregset; | |
130 | ||
131 | if (strcmp (sect_name, ".reg2") == 0 | |
132 | && sect_size >= MIPSNBSD_NUM_FPREGS * regsize) | |
133 | return &mipsnbsd_fpregset; | |
134 | ||
135 | return NULL; | |
136 | } | |
137 | \f | |
138 | ||
45888261 JT |
139 | /* Conveniently, GDB uses the same register numbering as the |
140 | ptrace register structure used by NetBSD/mips. */ | |
141 | ||
142 | void | |
28f5035f | 143 | mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno) |
45888261 | 144 | { |
2eb4d78b | 145 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
45888261 JT |
146 | int i; |
147 | ||
2eb4d78b | 148 | for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++) |
45888261 JT |
149 | { |
150 | if (regno == i || regno == -1) | |
151 | { | |
2eb4d78b | 152 | if (gdbarch_cannot_fetch_register (gdbarch, i)) |
28f5035f | 153 | regcache_raw_supply (regcache, i, NULL); |
45888261 | 154 | else |
28f5035f | 155 | regcache_raw_supply (regcache, i, |
2eb4d78b | 156 | regs + (i * mips_isa_regsize (gdbarch))); |
45888261 JT |
157 | } |
158 | } | |
159 | } | |
160 | ||
161 | void | |
28f5035f | 162 | mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno) |
45888261 | 163 | { |
2eb4d78b | 164 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
45888261 JT |
165 | int i; |
166 | ||
2eb4d78b | 167 | for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++) |
8d4c1ba3 | 168 | if ((regno == i || regno == -1) |
2eb4d78b | 169 | && ! gdbarch_cannot_store_register (gdbarch, i)) |
28f5035f | 170 | regcache_raw_collect (regcache, i, |
2eb4d78b | 171 | regs + (i * mips_isa_regsize (gdbarch))); |
45888261 JT |
172 | } |
173 | ||
174 | void | |
28f5035f | 175 | mipsnbsd_supply_fpreg (struct regcache *regcache, const char *fpregs, int regno) |
45888261 | 176 | { |
2eb4d78b | 177 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
45888261 JT |
178 | int i; |
179 | ||
2eb4d78b UW |
180 | for (i = gdbarch_fp0_regnum (gdbarch); |
181 | i <= mips_regnum (gdbarch)->fp_implementation_revision; | |
56cea623 | 182 | i++) |
45888261 JT |
183 | { |
184 | if (regno == i || regno == -1) | |
185 | { | |
2eb4d78b | 186 | if (gdbarch_cannot_fetch_register (gdbarch, i)) |
28f5035f | 187 | regcache_raw_supply (regcache, i, NULL); |
45888261 | 188 | else |
28f5035f | 189 | regcache_raw_supply (regcache, i, |
3e8c568d | 190 | fpregs |
2eb4d78b UW |
191 | + ((i - gdbarch_fp0_regnum (gdbarch)) |
192 | * mips_isa_regsize (gdbarch))); | |
45888261 JT |
193 | } |
194 | } | |
195 | } | |
196 | ||
197 | void | |
28f5035f | 198 | mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno) |
45888261 | 199 | { |
2eb4d78b | 200 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
45888261 JT |
201 | int i; |
202 | ||
2eb4d78b UW |
203 | for (i = gdbarch_fp0_regnum (gdbarch); |
204 | i <= mips_regnum (gdbarch)->fp_control_status; | |
56cea623 | 205 | i++) |
8d4c1ba3 | 206 | if ((regno == i || regno == -1) |
2eb4d78b | 207 | && ! gdbarch_cannot_store_register (gdbarch, i)) |
28f5035f | 208 | regcache_raw_collect (regcache, i, |
2eb4d78b UW |
209 | fpregs + ((i - gdbarch_fp0_regnum (gdbarch)) |
210 | * mips_isa_regsize (gdbarch))); | |
45888261 JT |
211 | } |
212 | ||
45888261 JT |
213 | /* Under NetBSD/mips, signal handler invocations can be identified by the |
214 | designated code sequence that is used to return from a signal handler. | |
215 | In particular, the return address of a signal handler points to the | |
216 | following code sequence: | |
217 | ||
218 | addu a0, sp, 16 | |
219 | li v0, 295 # __sigreturn14 | |
220 | syscall | |
221 | ||
222 | Each instruction has a unique encoding, so we simply attempt to match | |
223 | the instruction the PC is pointing to with any of the above instructions. | |
224 | If there is a hit, we know the offset to the start of the designated | |
225 | sequence and can then check whether we really are executing in the | |
226 | signal trampoline. If not, -1 is returned, otherwise the offset from the | |
227 | start of the return sequence is returned. */ | |
228 | ||
229 | #define RETCODE_NWORDS 3 | |
230 | #define RETCODE_SIZE (RETCODE_NWORDS * 4) | |
231 | ||
232 | static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] = | |
233 | { | |
234 | 0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */ | |
235 | 0x27, 0x01, 0x02, 0x24, /* li v0, 295 */ | |
236 | 0x0c, 0x00, 0x00, 0x00, /* syscall */ | |
237 | }; | |
238 | ||
239 | static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] = | |
240 | { | |
241 | 0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */ | |
242 | 0x24, 0x02, 0x01, 0x27, /* li v0, 295 */ | |
243 | 0x00, 0x00, 0x00, 0x0c, /* syscall */ | |
244 | }; | |
245 | ||
246 | static LONGEST | |
4c7d22cb | 247 | mipsnbsd_sigtramp_offset (struct frame_info *next_frame) |
45888261 | 248 | { |
4c7d22cb | 249 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
2eb4d78b | 250 | const char *retcode = gdbarch_byte_order (get_frame_arch (next_frame)) |
4c6b5505 UW |
251 | == BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb : |
252 | sigtramp_retcode_mipsel; | |
45888261 JT |
253 | unsigned char ret[RETCODE_SIZE], w[4]; |
254 | LONGEST off; | |
255 | int i; | |
256 | ||
4c7d22cb | 257 | if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w))) |
45888261 JT |
258 | return -1; |
259 | ||
260 | for (i = 0; i < RETCODE_NWORDS; i++) | |
261 | { | |
262 | if (memcmp (w, retcode + (i * 4), 4) == 0) | |
263 | break; | |
264 | } | |
265 | if (i == RETCODE_NWORDS) | |
266 | return -1; | |
267 | ||
268 | off = i * 4; | |
269 | pc -= off; | |
270 | ||
4c7d22cb | 271 | if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret))) |
45888261 JT |
272 | return -1; |
273 | ||
274 | if (memcmp (ret, retcode, RETCODE_SIZE) == 0) | |
275 | return off; | |
276 | ||
277 | return -1; | |
278 | } | |
279 | ||
45888261 | 280 | /* Figure out where the longjmp will land. We expect that we have |
4c7d22cb MK |
281 | just entered longjmp and haven't yet setup the stack frame, so the |
282 | args are still in the argument regs. MIPS_A0_REGNUM points at the | |
45888261 JT |
283 | jmp_buf structure from which we extract the PC that we will land |
284 | at. The PC is copied into *pc. This routine returns true on | |
285 | success. */ | |
286 | ||
287 | #define NBSD_MIPS_JB_PC (2 * 4) | |
1b13c4f6 | 288 | #define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch) |
45888261 JT |
289 | #define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \ |
290 | NBSD_MIPS_JB_ELEMENT_SIZE) | |
291 | ||
292 | static int | |
60ade65d | 293 | mipsnbsd_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) |
45888261 JT |
294 | { |
295 | CORE_ADDR jb_addr; | |
296 | char *buf; | |
297 | ||
298 | buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE); | |
299 | ||
60ade65d | 300 | jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM); |
45888261 JT |
301 | |
302 | if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf, | |
303 | NBSD_MIPS_JB_ELEMENT_SIZE)) | |
304 | return 0; | |
305 | ||
7c0b4a20 | 306 | *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE); |
45888261 JT |
307 | |
308 | return 1; | |
309 | } | |
310 | ||
311 | static int | |
64a3914f | 312 | mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno) |
45888261 | 313 | { |
4c7d22cb | 314 | return (regno == MIPS_ZERO_REGNUM |
64a3914f | 315 | || regno == mips_regnum (gdbarch)->fp_implementation_revision); |
45888261 JT |
316 | } |
317 | ||
318 | static int | |
64a3914f | 319 | mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno) |
45888261 | 320 | { |
4c7d22cb | 321 | return (regno == MIPS_ZERO_REGNUM |
64a3914f | 322 | || regno == mips_regnum (gdbarch)->fp_implementation_revision); |
45888261 JT |
323 | } |
324 | ||
fabe86c8 MK |
325 | /* Shared library support. */ |
326 | ||
327 | /* NetBSD/mips uses a slightly different `struct link_map' than the | |
45888261 | 328 | other NetBSD platforms. */ |
fabe86c8 | 329 | |
45888261 | 330 | static struct link_map_offsets * |
fabe86c8 | 331 | mipsnbsd_ilp32_fetch_link_map_offsets (void) |
45888261 JT |
332 | { |
333 | static struct link_map_offsets lmo; | |
334 | static struct link_map_offsets *lmp = NULL; | |
335 | ||
336 | if (lmp == NULL) | |
337 | { | |
338 | lmp = &lmo; | |
339 | ||
e4cd0d6a MK |
340 | lmo.r_version_offset = 0; |
341 | lmo.r_version_size = 4; | |
45888261 | 342 | lmo.r_map_offset = 4; |
e4cd0d6a | 343 | lmo.r_ldsomap_offset = -1; |
45888261 | 344 | |
fabe86c8 | 345 | /* Everything we need is in the first 24 bytes. */ |
45888261 | 346 | lmo.link_map_size = 24; |
4c7d22cb | 347 | lmo.l_addr_offset = 4; |
45888261 | 348 | lmo.l_name_offset = 8; |
cc10cae3 | 349 | lmo.l_ld_offset = 12; |
45888261 | 350 | lmo.l_next_offset = 16; |
45888261 | 351 | lmo.l_prev_offset = 20; |
45888261 JT |
352 | } |
353 | ||
354 | return lmp; | |
355 | } | |
356 | ||
357 | static struct link_map_offsets * | |
fabe86c8 | 358 | mipsnbsd_lp64_fetch_link_map_offsets (void) |
45888261 JT |
359 | { |
360 | static struct link_map_offsets lmo; | |
361 | static struct link_map_offsets *lmp = NULL; | |
362 | ||
363 | if (lmp == NULL) | |
364 | { | |
365 | lmp = &lmo; | |
366 | ||
e4cd0d6a MK |
367 | lmo.r_version_offset = 0; |
368 | lmo.r_version_size = 4; | |
369 | lmo.r_map_offset = 8; | |
370 | lmo.r_ldsomap_offset = -1; | |
45888261 | 371 | |
fabe86c8 | 372 | /* Everything we need is in the first 40 bytes. */ |
45888261 | 373 | lmo.link_map_size = 48; |
45888261 | 374 | lmo.l_addr_offset = 0; |
45888261 | 375 | lmo.l_name_offset = 16; |
cc10cae3 | 376 | lmo.l_ld_offset = 24; |
45888261 | 377 | lmo.l_next_offset = 32; |
45888261 | 378 | lmo.l_prev_offset = 40; |
45888261 JT |
379 | } |
380 | ||
381 | return lmp; | |
382 | } | |
fabe86c8 | 383 | \f |
45888261 JT |
384 | |
385 | static void | |
386 | mipsnbsd_init_abi (struct gdbarch_info info, | |
387 | struct gdbarch *gdbarch) | |
388 | { | |
d1180b0f MK |
389 | set_gdbarch_regset_from_core_section |
390 | (gdbarch, mipsnbsd_regset_from_core_section); | |
391 | ||
45888261 JT |
392 | set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target); |
393 | ||
394 | set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register); | |
395 | set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register); | |
396 | ||
397 | set_gdbarch_software_single_step (gdbarch, mips_software_single_step); | |
398 | ||
fabe86c8 MK |
399 | /* NetBSD/mips has SVR4-style shared libraries. */ |
400 | set_solib_svr4_fetch_link_map_offsets | |
401 | (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ? | |
402 | mipsnbsd_ilp32_fetch_link_map_offsets : | |
403 | mipsnbsd_lp64_fetch_link_map_offsets)); | |
45888261 | 404 | } |
d1180b0f MK |
405 | \f |
406 | ||
407 | static enum gdb_osabi | |
408 | mipsnbsd_core_osabi_sniffer (bfd *abfd) | |
409 | { | |
410 | if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0) | |
411 | return GDB_OSABI_NETBSD_ELF; | |
412 | ||
413 | return GDB_OSABI_UNKNOWN; | |
414 | } | |
45888261 JT |
415 | |
416 | void | |
417 | _initialize_mipsnbsd_tdep (void) | |
418 | { | |
05816f70 | 419 | gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF, |
45888261 | 420 | mipsnbsd_init_abi); |
45888261 | 421 | } |