[deliverable/binutils-gdb.git] / gdb / mipsnbsd-tdep.c

/* Target-dependent code for NetBSD/mips.

   Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc.

   Contributed by Wasabi Systems, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street, Fifth Floor,
   Boston, MA 02110-1301, USA.  */

#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "regset.h"
#include "target.h"
#include "value.h"
#include "osabi.h"

#include "gdb_assert.h"
#include "gdb_string.h"

#include "nbsd-tdep.h"
#include "mipsnbsd-tdep.h"
#include "mips-tdep.h"

#include "solib-svr4.h"

/* Shorthand for some register numbers used below.  */
#define MIPS_PC_REGNUM  MIPS_EMBED_PC_REGNUM
#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32

/* Core file support.  */

/* Number of registers in `struct reg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_GREGS	38

/* Number of registers in `struct fpreg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_FPREGS	33

/* Supply register REGNUM from the buffer specified by FPREGS and LEN
   in the floating-point register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_fpregset (const struct regset *regset,
			  struct regcache *regcache,
			  int regnum, const void *fpregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = fpregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);

  for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i,
			     regs + (i - MIPS_FP0_REGNUM) * regsize);
    }
}

/* Supply register REGNUM from the buffer specified by GREGS and LEN
   in the general-purpose register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_gregset (const struct regset *regset,
			 struct regcache *regcache, int regnum,
			 const void *gregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = gregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);

  for (i = 0; i <= MIPS_PC_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i, regs + i * regsize);
    }

  if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
    {
      regs += MIPSNBSD_NUM_GREGS * regsize;
      len -= MIPSNBSD_NUM_GREGS * regsize;
      mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
    }
}

/* NetBSD/mips register sets.  */

static struct regset mipsnbsd_gregset =
{
  NULL,
  mipsnbsd_supply_gregset
};

static struct regset mipsnbsd_fpregset =
{
  NULL,
  mipsnbsd_supply_fpregset
};

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */

static const struct regset *
mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
				   const char *sect_name, size_t sect_size)
{
  size_t regsize = mips_isa_regsize (gdbarch);
  
  if (strcmp (sect_name, ".reg") == 0
      && sect_size >= MIPSNBSD_NUM_GREGS * regsize)
    return &mipsnbsd_gregset;

  if (strcmp (sect_name, ".reg2") == 0
      && sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
    return &mipsnbsd_fpregset;

  return NULL;
}
\f

/* Conveniently, GDB uses the same register numbering as the
   ptrace register structure used by NetBSD/mips.  */

void
mipsnbsd_supply_reg (char *regs, int regno)
{
  int i;

  for (i = 0; i <= PC_REGNUM; i++)
    {
      if (regno == i || regno == -1)
	{
	  if (CANNOT_FETCH_REGISTER (i))
	    regcache_raw_supply (current_regcache, i, NULL);
	  else
            regcache_raw_supply (current_regcache, i,
				 regs + (i * mips_isa_regsize (current_gdbarch)));
        }
    }
}

void
mipsnbsd_fill_reg (char *regs, int regno)
{
  int i;

  for (i = 0; i <= PC_REGNUM; i++)
    if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
      regcache_raw_collect (current_regcache, i,
			    regs + (i * mips_isa_regsize (current_gdbarch)));
}

void
mipsnbsd_supply_fpreg (char *fpregs, int regno)
{
  int i;

  for (i = FP0_REGNUM;
       i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
       i++)
    {
      if (regno == i || regno == -1)
	{
	  if (CANNOT_FETCH_REGISTER (i))
	    regcache_raw_supply (current_regcache, i, NULL);
	  else
            regcache_raw_supply (current_regcache, i,
				 fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
	}
    }
}

void
mipsnbsd_fill_fpreg (char *fpregs, int regno)
{
  int i;

  for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
       i++)
    if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
      regcache_raw_collect (current_regcache, i,
			    fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
}

/* Under NetBSD/mips, signal handler invocations can be identified by the
   designated code sequence that is used to return from a signal handler.
   In particular, the return address of a signal handler points to the
   following code sequence:

	addu	a0, sp, 16
	li	v0, 295			# __sigreturn14
	syscall
   
   Each instruction has a unique encoding, so we simply attempt to match
   the instruction the PC is pointing to with any of the above instructions.
   If there is a hit, we know the offset to the start of the designated
   sequence and can then check whether we really are executing in the
   signal trampoline.  If not, -1 is returned, otherwise the offset from the
   start of the return sequence is returned.  */

#define RETCODE_NWORDS	3
#define RETCODE_SIZE	(RETCODE_NWORDS * 4)

static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
{
  0x10, 0x00, 0xa4, 0x27,	/* addu a0, sp, 16 */
  0x27, 0x01, 0x02, 0x24,	/* li v0, 295 */
  0x0c, 0x00, 0x00, 0x00,	/* syscall */
};

static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
{
  0x27, 0xa4, 0x00, 0x10,	/* addu a0, sp, 16 */
  0x24, 0x02, 0x01, 0x27,	/* li v0, 295 */
  0x00, 0x00, 0x00, 0x0c,	/* syscall */
};

static LONGEST
mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
{
  CORE_ADDR pc = frame_pc_unwind (next_frame);
  const char *retcode = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
  	? sigtramp_retcode_mipseb : sigtramp_retcode_mipsel;
  unsigned char ret[RETCODE_SIZE], w[4];
  LONGEST off;
  int i;

  if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
    return -1;

  for (i = 0; i < RETCODE_NWORDS; i++)
    {
      if (memcmp (w, retcode + (i * 4), 4) == 0)
	break;
    }
  if (i == RETCODE_NWORDS)
    return -1;

  off = i * 4;
  pc -= off;

  if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
    return -1;

  if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
    return off;

  return -1;
}

/* Figure out where the longjmp will land.  We expect that we have
   just entered longjmp and haven't yet setup the stack frame, so the
   args are still in the argument regs.  MIPS_A0_REGNUM points at the
   jmp_buf structure from which we extract the PC that we will land
   at.  The PC is copied into *pc.  This routine returns true on
   success.  */

#define NBSD_MIPS_JB_PC			(2 * 4)
#define NBSD_MIPS_JB_ELEMENT_SIZE	mips_isa_regsize (current_gdbarch)
#define NBSD_MIPS_JB_OFFSET		(NBSD_MIPS_JB_PC * \
					 NBSD_MIPS_JB_ELEMENT_SIZE)

static int
mipsnbsd_get_longjmp_target (CORE_ADDR *pc)
{
  CORE_ADDR jb_addr;
  char *buf;

  buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);

  jb_addr = read_register (MIPS_A0_REGNUM);

  if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
  			  NBSD_MIPS_JB_ELEMENT_SIZE))
    return 0;

  *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);

  return 1;
}

static int
mipsnbsd_cannot_fetch_register (int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
}

static int
mipsnbsd_cannot_store_register (int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
}

/* Shared library support.  */

/* NetBSD/mips uses a slightly different `struct link_map' than the
   other NetBSD platforms.  */

static struct link_map_offsets *
mipsnbsd_ilp32_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL) 
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 4;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 24 bytes.  */
      lmo.link_map_size = 24;
      lmo.l_addr_offset = 4;
      lmo.l_addr_size = 4;
      lmo.l_name_offset = 8;
      lmo.l_name_size = 4;
      lmo.l_ld_offset = 12;
      lmo.l_ld_size = 4;
      lmo.l_next_offset = 16;
      lmo.l_next_size = 4;
      lmo.l_prev_offset = 20;
      lmo.l_prev_size = 4;
    }

  return lmp;
}

static struct link_map_offsets *
mipsnbsd_lp64_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL)
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 8;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 40 bytes.  */
      lmo.link_map_size = 48;
      lmo.l_addr_offset = 0;
      lmo.l_addr_size = 8;
      lmo.l_name_offset = 16; 
      lmo.l_name_size = 8;
      lmo.l_ld_offset = 24;
      lmo.l_ld_size = 8;
      lmo.l_next_offset = 32;
      lmo.l_next_size = 8;
      lmo.l_prev_offset = 40;
      lmo.l_prev_size = 8;
    }

  return lmp;
}
\f

static void
mipsnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
{
  set_gdbarch_regset_from_core_section
    (gdbarch, mipsnbsd_regset_from_core_section);

  set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);

  set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
  set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);

  set_gdbarch_software_single_step (gdbarch, mips_software_single_step);

  /* NetBSD/mips has SVR4-style shared libraries.  */
  set_solib_svr4_fetch_link_map_offsets
    (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	       mipsnbsd_ilp32_fetch_link_map_offsets :
	       mipsnbsd_lp64_fetch_link_map_offsets));
}
\f

static enum gdb_osabi
mipsnbsd_core_osabi_sniffer (bfd *abfd)
{
  if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
    return GDB_OSABI_NETBSD_ELF;

  return GDB_OSABI_UNKNOWN;
}

void
_initialize_mipsnbsd_tdep (void)
{
  gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
			  mipsnbsd_init_abi);
}
Commit	Line	Data
d1180b0f MK	1	/* Target-dependent code for NetBSD/mips.
d1180b0f MK	2
e4cd0d6a MK	3	Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc.
e4cd0d6a MK	4
45888261 JT	5	Contributed by Wasabi Systems, Inc.
	6
	7	This file is part of GDB.
	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
	11	the Free Software Foundation; either version 2 of the License, or
	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
	20	along with this program; if not, write to the Free Software
197e01b6 EZ	21	Foundation, Inc., 51 Franklin Street, Fifth Floor,
197e01b6 EZ	22	Boston, MA 02110-1301, USA. */
45888261 JT	23
	24	#include "defs.h"
	25	#include "gdbcore.h"
	26	#include "regcache.h"
d1180b0f	27	#include "regset.h"
45888261 JT	28	#include "target.h"
	29	#include "value.h"
	30	#include "osabi.h"
	31
d1180b0f	32	#include "gdb_assert.h"
4c7d22cb MK	33	#include "gdb_string.h"
4c7d22cb MK	34
3d9b49b0	35	#include "nbsd-tdep.h"
45888261	36	#include "mipsnbsd-tdep.h"
1777c7b4	37	#include "mips-tdep.h"
45888261 JT	38
	39	#include "solib-svr4.h"
	40
d1180b0f MK	41	/* Shorthand for some register numbers used below. */
	42	#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
	43	#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
	44	#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
	45
	46	/* Core file support. */
	47
	48	/* Number of registers in `struct reg' from <machine/reg.h>. */
	49	#define MIPSNBSD_NUM_GREGS 38
	50
	51	/* Number of registers in `struct fpreg' from <machine/reg.h>. */
	52	#define MIPSNBSD_NUM_FPREGS 33
	53
	54	/* Supply register REGNUM from the buffer specified by FPREGS and LEN
	55	in the floating-point register set REGSET to register cache
	56	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	57
	58	static void
	59	mipsnbsd_supply_fpregset (const struct regset *regset,
	60	struct regcache *regcache,
	61	int regnum, const void *fpregs, size_t len)
	62	{
	63	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	64	const char *regs = fpregs;
	65	int i;
	66
	67	gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
	68
	69	for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
	70	{
	71	if (regnum == i \|\| regnum == -1)
	72	regcache_raw_supply (regcache, i,
	73	regs + (i - MIPS_FP0_REGNUM) * regsize);
	74	}
	75	}
	76
	77	/* Supply register REGNUM from the buffer specified by GREGS and LEN
	78	in the general-purpose register set REGSET to register cache
	79	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	80
	81	static void
	82	mipsnbsd_supply_gregset (const struct regset *regset,
	83	struct regcache *regcache, int regnum,
	84	const void *gregs, size_t len)
	85	{
	86	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	87	const char *regs = gregs;
	88	int i;
	89
	90	gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
	91
	92	for (i = 0; i <= MIPS_PC_REGNUM; i++)
	93	{
	94	if (regnum == i \|\| regnum == -1)
	95	regcache_raw_supply (regcache, i, regs + i * regsize);
	96	}
	97
	98	if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
	99	{
	100	regs += MIPSNBSD_NUM_GREGS * regsize;
	101	len -= MIPSNBSD_NUM_GREGS * regsize;
	102	mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
	103	}
	104	}
105
106	/* NetBSD/mips register sets. */
107
108	static struct regset mipsnbsd_gregset =
109	{
110	NULL,
111	mipsnbsd_supply_gregset
112	};
113
114	static struct regset mipsnbsd_fpregset =
115	{
116	NULL,
117	mipsnbsd_supply_fpregset
118	};
119
120	/* Return the appropriate register set for the core section identified
121	by SECT_NAME and SECT_SIZE. */
122
123	static const struct regset *
124	mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
125	const char *sect_name, size_t sect_size)
126	{
127	size_t regsize = mips_isa_regsize (gdbarch);
128
129	if (strcmp (sect_name, ".reg") == 0
130	&& sect_size >= MIPSNBSD_NUM_GREGS * regsize)
131	return &mipsnbsd_gregset;
132
133	if (strcmp (sect_name, ".reg2") == 0
134	&& sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
135	return &mipsnbsd_fpregset;
136
137	return NULL;
138	}
139	\f
140
45888261 JT	141	/* Conveniently, GDB uses the same register numbering as the
	142	ptrace register structure used by NetBSD/mips. */
	143
	144	void
	145	mipsnbsd_supply_reg (char *regs, int regno)
	146	{
	147	int i;
	148
	149	for (i = 0; i <= PC_REGNUM; i++)
	150	{
	151	if (regno == i \|\| regno == -1)
	152	{
	153	if (CANNOT_FETCH_REGISTER (i))
23a6d369	154	regcache_raw_supply (current_regcache, i, NULL);
45888261	155	else
23a6d369 AC	156	regcache_raw_supply (current_regcache, i,
23a6d369 AC	157	regs + (i * mips_isa_regsize (current_gdbarch)));
45888261 JT	158	}
	159	}
	160	}
	161
	162	void
	163	mipsnbsd_fill_reg (char *regs, int regno)
	164	{
	165	int i;
	166
	167	for (i = 0; i <= PC_REGNUM; i++)
	168	if ((regno == i \|\| regno == -1) && ! CANNOT_STORE_REGISTER (i))
822c9732 AC	169	regcache_raw_collect (current_regcache, i,
822c9732 AC	170	regs + (i * mips_isa_regsize (current_gdbarch)));
45888261 JT	171	}
	172
	173	void
	174	mipsnbsd_supply_fpreg (char *fpregs, int regno)
	175	{
	176	int i;
	177
56cea623 AC	178	for (i = FP0_REGNUM;
	179	i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
	180	i++)
45888261 JT	181	{
	182	if (regno == i \|\| regno == -1)
	183	{
	184	if (CANNOT_FETCH_REGISTER (i))
23a6d369	185	regcache_raw_supply (current_regcache, i, NULL);
45888261	186	else
23a6d369 AC	187	regcache_raw_supply (current_regcache, i,
23a6d369 AC	188	fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
45888261 JT	189	}
	190	}
	191	}
	192
	193	void
	194	mipsnbsd_fill_fpreg (char *fpregs, int regno)
	195	{
	196	int i;
	197
56cea623 AC	198	for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
56cea623 AC	199	i++)
45888261	200	if ((regno == i \|\| regno == -1) && ! CANNOT_STORE_REGISTER (i))
822c9732 AC	201	regcache_raw_collect (current_regcache, i,
822c9732 AC	202	fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
45888261 JT	203	}
45888261 JT	204
45888261 JT	205	/* Under NetBSD/mips, signal handler invocations can be identified by the
	206	designated code sequence that is used to return from a signal handler.
	207	In particular, the return address of a signal handler points to the
	208	following code sequence:
	209
	210	addu a0, sp, 16
	211	li v0, 295 # __sigreturn14
	212	syscall
	213
	214	Each instruction has a unique encoding, so we simply attempt to match
	215	the instruction the PC is pointing to with any of the above instructions.
	216	If there is a hit, we know the offset to the start of the designated
	217	sequence and can then check whether we really are executing in the
	218	signal trampoline. If not, -1 is returned, otherwise the offset from the
	219	start of the return sequence is returned. */
	220
	221	#define RETCODE_NWORDS 3
	222	#define RETCODE_SIZE (RETCODE_NWORDS * 4)
	223
	224	static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
	225	{
	226	0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
	227	0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
	228	0x0c, 0x00, 0x00, 0x00, /* syscall */
	229	};
	230
	231	static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
	232	{
	233	0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
	234	0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
	235	0x00, 0x00, 0x00, 0x0c, /* syscall */
	236	};
	237
	238	static LONGEST
4c7d22cb	239	mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
45888261	240	{
4c7d22cb	241	CORE_ADDR pc = frame_pc_unwind (next_frame);
45888261 JT	242	const char *retcode = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
	243	? sigtramp_retcode_mipseb : sigtramp_retcode_mipsel;
	244	unsigned char ret[RETCODE_SIZE], w[4];
	245	LONGEST off;
	246	int i;
	247
4c7d22cb	248	if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
45888261 JT	249	return -1;
	250
	251	for (i = 0; i < RETCODE_NWORDS; i++)
	252	{
	253	if (memcmp (w, retcode + (i * 4), 4) == 0)
	254	break;
	255	}
	256	if (i == RETCODE_NWORDS)
	257	return -1;
	258
	259	off = i * 4;
	260	pc -= off;
	261
4c7d22cb	262	if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
45888261 JT	263	return -1;
	264
	265	if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
	266	return off;
	267
	268	return -1;
	269	}
	270
45888261	271	/* Figure out where the longjmp will land. We expect that we have
4c7d22cb MK	272	just entered longjmp and haven't yet setup the stack frame, so the
4c7d22cb MK	273	args are still in the argument regs. MIPS_A0_REGNUM points at the
45888261 JT	274	jmp_buf structure from which we extract the PC that we will land
	275	at. The PC is copied into *pc. This routine returns true on
	276	success. */
	277
	278	#define NBSD_MIPS_JB_PC (2 * 4)
1b13c4f6	279	#define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch)
45888261 JT	280	#define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \
	281	NBSD_MIPS_JB_ELEMENT_SIZE)
	282
	283	static int
	284	mipsnbsd_get_longjmp_target (CORE_ADDR *pc)
	285	{
	286	CORE_ADDR jb_addr;
	287	char *buf;
	288
	289	buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
	290
4c7d22cb	291	jb_addr = read_register (MIPS_A0_REGNUM);
45888261 JT	292
	293	if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
	294	NBSD_MIPS_JB_ELEMENT_SIZE))
	295	return 0;
	296
7c0b4a20	297	*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
45888261 JT	298
	299	return 1;
	300	}
	301
	302	static int
	303	mipsnbsd_cannot_fetch_register (int regno)
	304	{
4c7d22cb	305	return (regno == MIPS_ZERO_REGNUM
56cea623	306	\|\| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
45888261 JT	307	}
	308
	309	static int
	310	mipsnbsd_cannot_store_register (int regno)
	311	{
4c7d22cb	312	return (regno == MIPS_ZERO_REGNUM
56cea623	313	\|\| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
45888261 JT	314	}
45888261 JT	315
fabe86c8 MK	316	/* Shared library support. */
	317
	318	/* NetBSD/mips uses a slightly different `struct link_map' than the
45888261	319	other NetBSD platforms. */
fabe86c8	320
45888261	321	static struct link_map_offsets *
fabe86c8	322	mipsnbsd_ilp32_fetch_link_map_offsets (void)
45888261 JT	323	{
	324	static struct link_map_offsets lmo;
	325	static struct link_map_offsets *lmp = NULL;
	326
	327	if (lmp == NULL)
	328	{
	329	lmp = &lmo;
	330
e4cd0d6a MK	331	lmo.r_version_offset = 0;
e4cd0d6a MK	332	lmo.r_version_size = 4;
45888261	333	lmo.r_map_offset = 4;
e4cd0d6a	334	lmo.r_ldsomap_offset = -1;
45888261	335
fabe86c8	336	/* Everything we need is in the first 24 bytes. */
45888261	337	lmo.link_map_size = 24;
4c7d22cb	338	lmo.l_addr_offset = 4;
e4cd0d6a	339	lmo.l_addr_size = 4;
45888261	340	lmo.l_name_offset = 8;
e4cd0d6a	341	lmo.l_name_size = 4;
cc10cae3 AO	342	lmo.l_ld_offset = 12;
cc10cae3 AO	343	lmo.l_ld_size = 4;
45888261	344	lmo.l_next_offset = 16;
e4cd0d6a	345	lmo.l_next_size = 4;
45888261	346	lmo.l_prev_offset = 20;
e4cd0d6a	347	lmo.l_prev_size = 4;
45888261 JT	348	}
	349
	350	return lmp;
	351	}
	352
	353	static struct link_map_offsets *
fabe86c8	354	mipsnbsd_lp64_fetch_link_map_offsets (void)
45888261 JT	355	{
	356	static struct link_map_offsets lmo;
	357	static struct link_map_offsets *lmp = NULL;
	358
	359	if (lmp == NULL)
	360	{
	361	lmp = &lmo;
	362
e4cd0d6a MK	363	lmo.r_version_offset = 0;
	364	lmo.r_version_size = 4;
	365	lmo.r_map_offset = 8;
	366	lmo.r_ldsomap_offset = -1;
45888261	367
fabe86c8	368	/* Everything we need is in the first 40 bytes. */
45888261	369	lmo.link_map_size = 48;
45888261	370	lmo.l_addr_offset = 0;
e4cd0d6a	371	lmo.l_addr_size = 8;
45888261	372	lmo.l_name_offset = 16;
e4cd0d6a	373	lmo.l_name_size = 8;
cc10cae3 AO	374	lmo.l_ld_offset = 24;
cc10cae3 AO	375	lmo.l_ld_size = 8;
45888261	376	lmo.l_next_offset = 32;
e4cd0d6a	377	lmo.l_next_size = 8;
45888261	378	lmo.l_prev_offset = 40;
e4cd0d6a	379	lmo.l_prev_size = 8;
45888261 JT	380	}
	381
	382	return lmp;
	383	}
fabe86c8	384	\f
45888261 JT	385
	386	static void
	387	mipsnbsd_init_abi (struct gdbarch_info info,
	388	struct gdbarch *gdbarch)
	389	{
d1180b0f MK	390	set_gdbarch_regset_from_core_section
	391	(gdbarch, mipsnbsd_regset_from_core_section);
	392
45888261 JT	393	set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
	394
	395	set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
	396	set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
	397
	398	set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
	399
fabe86c8 MK	400	/* NetBSD/mips has SVR4-style shared libraries. */
	401	set_solib_svr4_fetch_link_map_offsets
	402	(gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	403	mipsnbsd_ilp32_fetch_link_map_offsets :
	404	mipsnbsd_lp64_fetch_link_map_offsets));
45888261	405	}
d1180b0f MK	406	\f
	407
	408	static enum gdb_osabi
	409	mipsnbsd_core_osabi_sniffer (bfd *abfd)
	410	{
	411	if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
	412	return GDB_OSABI_NETBSD_ELF;
	413
	414	return GDB_OSABI_UNKNOWN;
	415	}
45888261 JT	416
	417	void
	418	_initialize_mipsnbsd_tdep (void)
	419	{
05816f70	420	gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
45888261	421	mipsnbsd_init_abi);
45888261	422	}