[deliverable/binutils-gdb.git] / gdb / mipsnbsd-tdep.c

/* Target-dependent code for NetBSD/mips.

   Copyright (C) 2002, 2003, 2004, 2006, 2007, 2008
   Free Software Foundation, Inc.

   Contributed by Wasabi Systems, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "regset.h"
#include "target.h"
#include "value.h"
#include "osabi.h"

#include "gdb_assert.h"
#include "gdb_string.h"

#include "nbsd-tdep.h"
#include "mipsnbsd-tdep.h"
#include "mips-tdep.h"

#include "solib-svr4.h"

/* Shorthand for some register numbers used below.  */
#define MIPS_PC_REGNUM  MIPS_EMBED_PC_REGNUM
#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32

/* Core file support.  */

/* Number of registers in `struct reg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_GREGS	38

/* Number of registers in `struct fpreg' from <machine/reg.h>.  */
#define MIPSNBSD_NUM_FPREGS	33

/* Supply register REGNUM from the buffer specified by FPREGS and LEN
   in the floating-point register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_fpregset (const struct regset *regset,
			  struct regcache *regcache,
			  int regnum, const void *fpregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = fpregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);

  for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i,
			     regs + (i - MIPS_FP0_REGNUM) * regsize);
    }
}

/* Supply register REGNUM from the buffer specified by GREGS and LEN
   in the general-purpose register set REGSET to register cache
   REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */

static void
mipsnbsd_supply_gregset (const struct regset *regset,
			 struct regcache *regcache, int regnum,
			 const void *gregs, size_t len)
{
  size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  const char *regs = gregs;
  int i;

  gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);

  for (i = 0; i <= MIPS_PC_REGNUM; i++)
    {
      if (regnum == i || regnum == -1)
	regcache_raw_supply (regcache, i, regs + i * regsize);
    }

  if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
    {
      regs += MIPSNBSD_NUM_GREGS * regsize;
      len -= MIPSNBSD_NUM_GREGS * regsize;
      mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
    }
}

/* NetBSD/mips register sets.  */

static struct regset mipsnbsd_gregset =
{
  NULL,
  mipsnbsd_supply_gregset
};

static struct regset mipsnbsd_fpregset =
{
  NULL,
  mipsnbsd_supply_fpregset
};

/* Return the appropriate register set for the core section identified
   by SECT_NAME and SECT_SIZE.  */

static const struct regset *
mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
				   const char *sect_name, size_t sect_size)
{
  size_t regsize = mips_isa_regsize (gdbarch);
  
  if (strcmp (sect_name, ".reg") == 0
      && sect_size >= MIPSNBSD_NUM_GREGS * regsize)
    return &mipsnbsd_gregset;

  if (strcmp (sect_name, ".reg2") == 0
      && sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
    return &mipsnbsd_fpregset;

  return NULL;
}
\f

/* Conveniently, GDB uses the same register numbering as the
   ptrace register structure used by NetBSD/mips.  */

void
mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 regs + (i * mips_isa_regsize (gdbarch)));
        }
    }
}

void
mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
    if ((regno == i || regno == -1)
	&& ! gdbarch_cannot_store_register (gdbarch, i))
      regcache_raw_collect (regcache, i,
			    regs + (i * mips_isa_regsize (gdbarch)));
}

void
mipsnbsd_supply_fpreg (struct regcache *regcache, const char *fpregs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = gdbarch_fp0_regnum (gdbarch);
       i <= mips_regnum (gdbarch)->fp_implementation_revision;
       i++)
    {
      if (regno == i || regno == -1)
	{
	  if (gdbarch_cannot_fetch_register (gdbarch, i))
	    regcache_raw_supply (regcache, i, NULL);
	  else
            regcache_raw_supply (regcache, i,
				 fpregs 
				 + ((i - gdbarch_fp0_regnum (gdbarch))
				    * mips_isa_regsize (gdbarch)));
	}
    }
}

void
mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  int i;

  for (i = gdbarch_fp0_regnum (gdbarch);
       i <= mips_regnum (gdbarch)->fp_control_status;
       i++)
    if ((regno == i || regno == -1) 
	&& ! gdbarch_cannot_store_register (gdbarch, i))
      regcache_raw_collect (regcache, i,
			    fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
			      * mips_isa_regsize (gdbarch)));
}

/* Under NetBSD/mips, signal handler invocations can be identified by the
   designated code sequence that is used to return from a signal handler.
   In particular, the return address of a signal handler points to the
   following code sequence:

	addu	a0, sp, 16
	li	v0, 295			# __sigreturn14
	syscall
   
   Each instruction has a unique encoding, so we simply attempt to match
   the instruction the PC is pointing to with any of the above instructions.
   If there is a hit, we know the offset to the start of the designated
   sequence and can then check whether we really are executing in the
   signal trampoline.  If not, -1 is returned, otherwise the offset from the
   start of the return sequence is returned.  */

#define RETCODE_NWORDS	3
#define RETCODE_SIZE	(RETCODE_NWORDS * 4)

static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
{
  0x10, 0x00, 0xa4, 0x27,	/* addu a0, sp, 16 */
  0x27, 0x01, 0x02, 0x24,	/* li v0, 295 */
  0x0c, 0x00, 0x00, 0x00,	/* syscall */
};

static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
{
  0x27, 0xa4, 0x00, 0x10,	/* addu a0, sp, 16 */
  0x24, 0x02, 0x01, 0x27,	/* li v0, 295 */
  0x00, 0x00, 0x00, 0x0c,	/* syscall */
};

static LONGEST
mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
{
  CORE_ADDR pc = frame_pc_unwind (next_frame);
  const char *retcode = gdbarch_byte_order (get_frame_arch (next_frame))
			== BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb :
			sigtramp_retcode_mipsel;
  unsigned char ret[RETCODE_SIZE], w[4];
  LONGEST off;
  int i;

  if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
    return -1;

  for (i = 0; i < RETCODE_NWORDS; i++)
    {
      if (memcmp (w, retcode + (i * 4), 4) == 0)
	break;
    }
  if (i == RETCODE_NWORDS)
    return -1;

  off = i * 4;
  pc -= off;

  if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
    return -1;

  if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
    return off;

  return -1;
}

/* Figure out where the longjmp will land.  We expect that we have
   just entered longjmp and haven't yet setup the stack frame, so the
   args are still in the argument regs.  MIPS_A0_REGNUM points at the
   jmp_buf structure from which we extract the PC that we will land
   at.  The PC is copied into *pc.  This routine returns true on
   success.  */

#define NBSD_MIPS_JB_PC			(2 * 4)
#define NBSD_MIPS_JB_ELEMENT_SIZE	mips_isa_regsize (current_gdbarch)
#define NBSD_MIPS_JB_OFFSET		(NBSD_MIPS_JB_PC * \
					 NBSD_MIPS_JB_ELEMENT_SIZE)

static int
mipsnbsd_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
{
  CORE_ADDR jb_addr;
  char *buf;

  buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);

  jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);

  if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
  			  NBSD_MIPS_JB_ELEMENT_SIZE))
    return 0;

  *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);

  return 1;
}

static int
mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (gdbarch)->fp_implementation_revision);
}

static int
mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
{
  return (regno == MIPS_ZERO_REGNUM
	  || regno == mips_regnum (gdbarch)->fp_implementation_revision);
}

/* Shared library support.  */

/* NetBSD/mips uses a slightly different `struct link_map' than the
   other NetBSD platforms.  */

static struct link_map_offsets *
mipsnbsd_ilp32_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL) 
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 4;
      lmo.r_brk_offset = 8;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 24 bytes.  */
      lmo.link_map_size = 24;
      lmo.l_addr_offset = 4;
      lmo.l_name_offset = 8;
      lmo.l_ld_offset = 12;
      lmo.l_next_offset = 16;
      lmo.l_prev_offset = 20;
    }

  return lmp;
}

static struct link_map_offsets *
mipsnbsd_lp64_fetch_link_map_offsets (void)
{
  static struct link_map_offsets lmo;
  static struct link_map_offsets *lmp = NULL;

  if (lmp == NULL)
    {
      lmp = &lmo;

      lmo.r_version_offset = 0;
      lmo.r_version_size = 4;
      lmo.r_map_offset = 8;
      lmo.r_brk_offset = 16;
      lmo.r_ldsomap_offset = -1;

      /* Everything we need is in the first 40 bytes.  */
      lmo.link_map_size = 48;
      lmo.l_addr_offset = 0;
      lmo.l_name_offset = 16; 
      lmo.l_ld_offset = 24;
      lmo.l_next_offset = 32;
      lmo.l_prev_offset = 40;
    }

  return lmp;
}
\f

static void
mipsnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
{
  set_gdbarch_regset_from_core_section
    (gdbarch, mipsnbsd_regset_from_core_section);

  set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);

  set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
  set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);

  set_gdbarch_software_single_step (gdbarch, mips_software_single_step);

  /* NetBSD/mips has SVR4-style shared libraries.  */
  set_solib_svr4_fetch_link_map_offsets
    (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	       mipsnbsd_ilp32_fetch_link_map_offsets :
	       mipsnbsd_lp64_fetch_link_map_offsets));
}
\f

static enum gdb_osabi
mipsnbsd_core_osabi_sniffer (bfd *abfd)
{
  if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
    return GDB_OSABI_NETBSD_ELF;

  return GDB_OSABI_UNKNOWN;
}

void
_initialize_mipsnbsd_tdep (void)
{
  gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
			  mipsnbsd_init_abi);
}
Commit	Line	Data
d1180b0f MK	1	/* Target-dependent code for NetBSD/mips.
d1180b0f MK	2
9b254dd1 DJ	3	Copyright (C) 2002, 2003, 2004, 2006, 2007, 2008
9b254dd1 DJ	4	Free Software Foundation, Inc.
e4cd0d6a	5
45888261 JT	6	Contributed by Wasabi Systems, Inc.
	7
	8	This file is part of GDB.
	9
	10	This program is free software; you can redistribute it and/or modify
	11	it under the terms of the GNU General Public License as published by
a9762ec7	12	the Free Software Foundation; either version 3 of the License, or
45888261 JT	13	(at your option) any later version.
	14
	15	This program is distributed in the hope that it will be useful,
	16	but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	GNU General Public License for more details.
	19
	20	You should have received a copy of the GNU General Public License
a9762ec7	21	along with this program. If not, see <http://www.gnu.org/licenses/>. */
45888261 JT	22
	23	#include "defs.h"
	24	#include "gdbcore.h"
	25	#include "regcache.h"
d1180b0f	26	#include "regset.h"
45888261 JT	27	#include "target.h"
	28	#include "value.h"
	29	#include "osabi.h"
	30
d1180b0f	31	#include "gdb_assert.h"
4c7d22cb MK	32	#include "gdb_string.h"
4c7d22cb MK	33
3d9b49b0	34	#include "nbsd-tdep.h"
45888261	35	#include "mipsnbsd-tdep.h"
1777c7b4	36	#include "mips-tdep.h"
45888261 JT	37
	38	#include "solib-svr4.h"
	39
d1180b0f MK	40	/* Shorthand for some register numbers used below. */
	41	#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
	42	#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
	43	#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
	44
	45	/* Core file support. */
	46
	47	/* Number of registers in `struct reg' from <machine/reg.h>. */
	48	#define MIPSNBSD_NUM_GREGS 38
	49
	50	/* Number of registers in `struct fpreg' from <machine/reg.h>. */
	51	#define MIPSNBSD_NUM_FPREGS 33
	52
	53	/* Supply register REGNUM from the buffer specified by FPREGS and LEN
	54	in the floating-point register set REGSET to register cache
	55	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	56
	57	static void
	58	mipsnbsd_supply_fpregset (const struct regset *regset,
	59	struct regcache *regcache,
	60	int regnum, const void *fpregs, size_t len)
	61	{
	62	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	63	const char *regs = fpregs;
	64	int i;
	65
	66	gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
	67
	68	for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
	69	{
	70	if (regnum == i \|\| regnum == -1)
	71	regcache_raw_supply (regcache, i,
	72	regs + (i - MIPS_FP0_REGNUM) * regsize);
	73	}
	74	}
	75
	76	/* Supply register REGNUM from the buffer specified by GREGS and LEN
	77	in the general-purpose register set REGSET to register cache
	78	REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
	79
	80	static void
	81	mipsnbsd_supply_gregset (const struct regset *regset,
	82	struct regcache *regcache, int regnum,
	83	const void *gregs, size_t len)
	84	{
	85	size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
	86	const char *regs = gregs;
	87	int i;
	88
	89	gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
	90
	91	for (i = 0; i <= MIPS_PC_REGNUM; i++)
	92	{
	93	if (regnum == i \|\| regnum == -1)
	94	regcache_raw_supply (regcache, i, regs + i * regsize);
	95	}
	96
	97	if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
	98	{
	99	regs += MIPSNBSD_NUM_GREGS * regsize;
	100	len -= MIPSNBSD_NUM_GREGS * regsize;
	101	mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
	102	}
	103	}
104
105	/* NetBSD/mips register sets. */
106
107	static struct regset mipsnbsd_gregset =
108	{
109	NULL,
110	mipsnbsd_supply_gregset
111	};
112
113	static struct regset mipsnbsd_fpregset =
114	{
115	NULL,
116	mipsnbsd_supply_fpregset
117	};
118
119	/* Return the appropriate register set for the core section identified
120	by SECT_NAME and SECT_SIZE. */
121
122	static const struct regset *
123	mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
124	const char *sect_name, size_t sect_size)
125	{
126	size_t regsize = mips_isa_regsize (gdbarch);
127
128	if (strcmp (sect_name, ".reg") == 0
129	&& sect_size >= MIPSNBSD_NUM_GREGS * regsize)
130	return &mipsnbsd_gregset;
131
132	if (strcmp (sect_name, ".reg2") == 0
133	&& sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
134	return &mipsnbsd_fpregset;
135
136	return NULL;
137	}
138	\f
139
45888261 JT	140	/* Conveniently, GDB uses the same register numbering as the
	141	ptrace register structure used by NetBSD/mips. */
	142
	143	void
28f5035f	144	mipsnbsd_supply_reg (struct regcache regcache, const char regs, int regno)
45888261	145	{
2eb4d78b	146	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	147	int i;
45888261 JT	148
2eb4d78b	149	for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
45888261 JT	150	{
	151	if (regno == i \|\| regno == -1)
	152	{
2eb4d78b	153	if (gdbarch_cannot_fetch_register (gdbarch, i))
28f5035f	154	regcache_raw_supply (regcache, i, NULL);
45888261	155	else
28f5035f	156	regcache_raw_supply (regcache, i,
2eb4d78b	157	regs + (i * mips_isa_regsize (gdbarch)));
45888261 JT	158	}
	159	}
	160	}
	161
	162	void
28f5035f	163	mipsnbsd_fill_reg (const struct regcache regcache, char regs, int regno)
45888261	164	{
2eb4d78b	165	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	166	int i;
45888261 JT	167
2eb4d78b	168	for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
8d4c1ba3	169	if ((regno == i \|\| regno == -1)
2eb4d78b	170	&& ! gdbarch_cannot_store_register (gdbarch, i))
28f5035f	171	regcache_raw_collect (regcache, i,
2eb4d78b	172	regs + (i * mips_isa_regsize (gdbarch)));
45888261 JT	173	}
	174
	175	void
28f5035f	176	mipsnbsd_supply_fpreg (struct regcache regcache, const char fpregs, int regno)
45888261	177	{
2eb4d78b	178	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	179	int i;
45888261 JT	180
2eb4d78b UW	181	for (i = gdbarch_fp0_regnum (gdbarch);
2eb4d78b UW	182	i <= mips_regnum (gdbarch)->fp_implementation_revision;
56cea623	183	i++)
45888261 JT	184	{
	185	if (regno == i \|\| regno == -1)
	186	{
2eb4d78b	187	if (gdbarch_cannot_fetch_register (gdbarch, i))
28f5035f	188	regcache_raw_supply (regcache, i, NULL);
45888261	189	else
28f5035f	190	regcache_raw_supply (regcache, i,
3e8c568d	191	fpregs
2eb4d78b UW	192	+ ((i - gdbarch_fp0_regnum (gdbarch))
2eb4d78b UW	193	* mips_isa_regsize (gdbarch)));
45888261 JT	194	}
	195	}
	196	}
	197
	198	void
28f5035f	199	mipsnbsd_fill_fpreg (const struct regcache regcache, char fpregs, int regno)
45888261	200	{
2eb4d78b	201	struct gdbarch *gdbarch = get_regcache_arch (regcache);
45888261 JT	202	int i;
45888261 JT	203
2eb4d78b UW	204	for (i = gdbarch_fp0_regnum (gdbarch);
2eb4d78b UW	205	i <= mips_regnum (gdbarch)->fp_control_status;
56cea623	206	i++)
8d4c1ba3	207	if ((regno == i \|\| regno == -1)
2eb4d78b	208	&& ! gdbarch_cannot_store_register (gdbarch, i))
28f5035f	209	regcache_raw_collect (regcache, i,
2eb4d78b UW	210	fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
2eb4d78b UW	211	* mips_isa_regsize (gdbarch)));
45888261 JT	212	}
45888261 JT	213
45888261 JT	214	/* Under NetBSD/mips, signal handler invocations can be identified by the
	215	designated code sequence that is used to return from a signal handler.
	216	In particular, the return address of a signal handler points to the
	217	following code sequence:
	218
	219	addu a0, sp, 16
	220	li v0, 295 # __sigreturn14
	221	syscall
	222
	223	Each instruction has a unique encoding, so we simply attempt to match
	224	the instruction the PC is pointing to with any of the above instructions.
	225	If there is a hit, we know the offset to the start of the designated
	226	sequence and can then check whether we really are executing in the
	227	signal trampoline. If not, -1 is returned, otherwise the offset from the
	228	start of the return sequence is returned. */
	229
	230	#define RETCODE_NWORDS 3
	231	#define RETCODE_SIZE (RETCODE_NWORDS * 4)
	232
	233	static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
	234	{
	235	0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
	236	0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
	237	0x0c, 0x00, 0x00, 0x00, /* syscall */
	238	};
	239
	240	static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
	241	{
	242	0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
	243	0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
	244	0x00, 0x00, 0x00, 0x0c, /* syscall */
	245	};
	246
	247	static LONGEST
4c7d22cb	248	mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
45888261	249	{
4c7d22cb	250	CORE_ADDR pc = frame_pc_unwind (next_frame);
2eb4d78b	251	const char *retcode = gdbarch_byte_order (get_frame_arch (next_frame))
4c6b5505 UW	252	== BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb :
4c6b5505 UW	253	sigtramp_retcode_mipsel;
45888261 JT	254	unsigned char ret[RETCODE_SIZE], w[4];
	255	LONGEST off;
	256	int i;
	257
4c7d22cb	258	if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
45888261 JT	259	return -1;
	260
	261	for (i = 0; i < RETCODE_NWORDS; i++)
	262	{
	263	if (memcmp (w, retcode + (i * 4), 4) == 0)
	264	break;
	265	}
	266	if (i == RETCODE_NWORDS)
	267	return -1;
	268
	269	off = i * 4;
	270	pc -= off;
	271
4c7d22cb	272	if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
45888261 JT	273	return -1;
	274
	275	if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
	276	return off;
	277
	278	return -1;
	279	}
	280
45888261	281	/* Figure out where the longjmp will land. We expect that we have
4c7d22cb MK	282	just entered longjmp and haven't yet setup the stack frame, so the
4c7d22cb MK	283	args are still in the argument regs. MIPS_A0_REGNUM points at the
45888261 JT	284	jmp_buf structure from which we extract the PC that we will land
	285	at. The PC is copied into *pc. This routine returns true on
	286	success. */
	287
	288	#define NBSD_MIPS_JB_PC (2 * 4)
1b13c4f6	289	#define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch)
45888261 JT	290	#define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \
	291	NBSD_MIPS_JB_ELEMENT_SIZE)
	292
	293	static int
60ade65d	294	mipsnbsd_get_longjmp_target (struct frame_info frame, CORE_ADDR pc)
45888261 JT	295	{
	296	CORE_ADDR jb_addr;
	297	char *buf;
	298
	299	buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
	300
60ade65d	301	jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
45888261 JT	302
	303	if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
	304	NBSD_MIPS_JB_ELEMENT_SIZE))
	305	return 0;
	306
7c0b4a20	307	*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
45888261 JT	308
	309	return 1;
	310	}
	311
	312	static int
64a3914f	313	mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
45888261	314	{
4c7d22cb	315	return (regno == MIPS_ZERO_REGNUM
64a3914f	316	\|\| regno == mips_regnum (gdbarch)->fp_implementation_revision);
45888261 JT	317	}
	318
	319	static int
64a3914f	320	mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
45888261	321	{
4c7d22cb	322	return (regno == MIPS_ZERO_REGNUM
64a3914f	323	\|\| regno == mips_regnum (gdbarch)->fp_implementation_revision);
45888261 JT	324	}
45888261 JT	325
fabe86c8 MK	326	/* Shared library support. */
	327
	328	/* NetBSD/mips uses a slightly different `struct link_map' than the
45888261	329	other NetBSD platforms. */
fabe86c8	330
45888261	331	static struct link_map_offsets *
fabe86c8	332	mipsnbsd_ilp32_fetch_link_map_offsets (void)
45888261 JT	333	{
	334	static struct link_map_offsets lmo;
	335	static struct link_map_offsets *lmp = NULL;
	336
	337	if (lmp == NULL)
	338	{
	339	lmp = &lmo;
	340
e4cd0d6a MK	341	lmo.r_version_offset = 0;
e4cd0d6a MK	342	lmo.r_version_size = 4;
45888261	343	lmo.r_map_offset = 4;
7cd25cfc	344	lmo.r_brk_offset = 8;
e4cd0d6a	345	lmo.r_ldsomap_offset = -1;
45888261	346
fabe86c8	347	/* Everything we need is in the first 24 bytes. */
45888261	348	lmo.link_map_size = 24;
4c7d22cb	349	lmo.l_addr_offset = 4;
45888261	350	lmo.l_name_offset = 8;
cc10cae3	351	lmo.l_ld_offset = 12;
45888261	352	lmo.l_next_offset = 16;
45888261	353	lmo.l_prev_offset = 20;
45888261 JT	354	}
	355
	356	return lmp;
	357	}
	358
	359	static struct link_map_offsets *
fabe86c8	360	mipsnbsd_lp64_fetch_link_map_offsets (void)
45888261 JT	361	{
	362	static struct link_map_offsets lmo;
	363	static struct link_map_offsets *lmp = NULL;
	364
	365	if (lmp == NULL)
	366	{
	367	lmp = &lmo;
	368
e4cd0d6a MK	369	lmo.r_version_offset = 0;
	370	lmo.r_version_size = 4;
	371	lmo.r_map_offset = 8;
7cd25cfc	372	lmo.r_brk_offset = 16;
e4cd0d6a	373	lmo.r_ldsomap_offset = -1;
45888261	374
fabe86c8	375	/* Everything we need is in the first 40 bytes. */
45888261	376	lmo.link_map_size = 48;
45888261	377	lmo.l_addr_offset = 0;
45888261	378	lmo.l_name_offset = 16;
cc10cae3	379	lmo.l_ld_offset = 24;
45888261	380	lmo.l_next_offset = 32;
45888261	381	lmo.l_prev_offset = 40;
45888261 JT	382	}
	383
	384	return lmp;
	385	}
fabe86c8	386	\f
45888261 JT	387
	388	static void
	389	mipsnbsd_init_abi (struct gdbarch_info info,
	390	struct gdbarch *gdbarch)
	391	{
d1180b0f MK	392	set_gdbarch_regset_from_core_section
	393	(gdbarch, mipsnbsd_regset_from_core_section);
	394
45888261 JT	395	set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
	396
	397	set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
	398	set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
	399
	400	set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
	401
fabe86c8 MK	402	/* NetBSD/mips has SVR4-style shared libraries. */
	403	set_solib_svr4_fetch_link_map_offsets
	404	(gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
	405	mipsnbsd_ilp32_fetch_link_map_offsets :
	406	mipsnbsd_lp64_fetch_link_map_offsets));
45888261	407	}
d1180b0f MK	408	\f
	409
	410	static enum gdb_osabi
	411	mipsnbsd_core_osabi_sniffer (bfd *abfd)
	412	{
	413	if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
	414	return GDB_OSABI_NETBSD_ELF;
	415
	416	return GDB_OSABI_UNKNOWN;
	417	}
45888261 JT	418
	419	void
	420	_initialize_mipsnbsd_tdep (void)
	421	{
05816f70	422	gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
45888261	423	mipsnbsd_init_abi);
45888261	424	}