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Add AVX512DQ instructions and their AVX512VL variants.
[deliverable/binutils-gdb.git] / gdb / mn10300-linux-tdep.c
CommitLineData
611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1 2
ecd75fc8 3 Copyright (C) 2003-2014 Free Software Foundation, Inc.
611889b1
KB		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
611889b1
KB		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
611889b1
KB		 19
20#include "defs.h"
21#include "gdbcore.h"
0e9f083f 22#include <string.h>
611889b1
KB		 23#include "regcache.h"
24#include "mn10300-tdep.h"
25#include "gdb_assert.h"
26#include "bfd.h"
27#include "elf-bfd.h"
28#include "osabi.h"
29#include "regset.h"
696cc4a6 30#include "solib-svr4.h"
f9ec92b6
KB		 31#include "frame.h"
32#include "trad-frame.h"
33#include "tramp-frame.h"
a5ee0f0c 34#include "linux-tdep.h"
611889b1
KB		 35
36#include <stdlib.h>
37
38/* Transliterated from <asm-mn10300/elf.h>... */
39#define MN10300_ELF_NGREG 28
40#define MN10300_ELF_NFPREG 32
41
42typedef gdb_byte mn10300_elf_greg_t[4];
43typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
44
45typedef gdb_byte mn10300_elf_fpreg_t[4];
46typedef struct
47{
48 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
49 gdb_byte fpcr[4];
50} mn10300_elf_fpregset_t;
51
52/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
53#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
54#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
55#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
56#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
57#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
58#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
59#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
60#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
61#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
65#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
66#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
67#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
68#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
69#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
70#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
71#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
72#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
73#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
74#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
75#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
76#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
77#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
78#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
79#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
80
81/* New gdbarch API for corefile registers.
82 Given a section name and size, create a struct reg object
83 with a supply_register and a collect_register method. */
84
025bb325 85/* Copy register value of REGNUM from regset to regcache.
611889b1
KB		 86 If REGNUM is -1, do this for all gp registers in regset. */
87
88static void
89am33_supply_gregset_method (const struct regset *regset,
90 struct regcache *regcache,
91 int regnum, const void *gregs, size_t len)
92{
93 char zerobuf[MAX_REGISTER_SIZE];
94 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
95 int i;
96
97 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
98
99 switch (regnum) {
100 case E_D0_REGNUM:
101 regcache_raw_supply (regcache, E_D0_REGNUM,
102 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
103 break;
104 case E_D1_REGNUM:
105 regcache_raw_supply (regcache, E_D1_REGNUM,
106 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
107 break;
108 case E_D2_REGNUM:
109 regcache_raw_supply (regcache, E_D2_REGNUM,
110 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
111 break;
112 case E_D3_REGNUM:
113 regcache_raw_supply (regcache, E_D3_REGNUM,
114 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
115 break;
116 case E_A0_REGNUM:
117 regcache_raw_supply (regcache, E_A0_REGNUM,
118 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
119 break;
120 case E_A1_REGNUM:
121 regcache_raw_supply (regcache, E_A1_REGNUM,
122 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
123 break;
124 case E_A2_REGNUM:
125 regcache_raw_supply (regcache, E_A2_REGNUM,
126 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
127 break;
128 case E_A3_REGNUM:
129 regcache_raw_supply (regcache, E_A3_REGNUM,
130 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
131 break;
132 case E_SP_REGNUM:
133 regcache_raw_supply (regcache, E_SP_REGNUM,
134 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
135 break;
136 case E_PC_REGNUM:
137 regcache_raw_supply (regcache, E_PC_REGNUM,
138 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
139 break;
140 case E_MDR_REGNUM:
141 regcache_raw_supply (regcache, E_MDR_REGNUM,
142 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
143 break;
144 case E_PSW_REGNUM:
145 regcache_raw_supply (regcache, E_PSW_REGNUM,
146 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
147 break;
148 case E_LIR_REGNUM:
149 regcache_raw_supply (regcache, E_LIR_REGNUM,
150 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
151 break;
152 case E_LAR_REGNUM:
153 regcache_raw_supply (regcache, E_LAR_REGNUM,
154 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
155 break;
156 case E_MDRQ_REGNUM:
157 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
158 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
159 break;
160 case E_E0_REGNUM:
161 regcache_raw_supply (regcache, E_E0_REGNUM,
162 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
163 break;
164 case E_E1_REGNUM:
165 regcache_raw_supply (regcache, E_E1_REGNUM,
166 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
167 break;
168 case E_E2_REGNUM:
169 regcache_raw_supply (regcache, E_E2_REGNUM,
170 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
171 break;
172 case E_E3_REGNUM:
173 regcache_raw_supply (regcache, E_E3_REGNUM,
174 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
175 break;
176 case E_E4_REGNUM:
177 regcache_raw_supply (regcache, E_E4_REGNUM,
178 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
179 break;
180 case E_E5_REGNUM:
181 regcache_raw_supply (regcache, E_E5_REGNUM,
182 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
183 break;
184 case E_E6_REGNUM:
185 regcache_raw_supply (regcache, E_E6_REGNUM,
186 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
187 break;
188 case E_E7_REGNUM:
189 regcache_raw_supply (regcache, E_E7_REGNUM,
190 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
191 break;
192
193 /* ssp, msp, and usp are inaccessible. */
194 case E_E8_REGNUM:
195 memset (zerobuf, 0, MAX_REGISTER_SIZE);
196 regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
197 break;
198 case E_E9_REGNUM:
199 memset (zerobuf, 0, MAX_REGISTER_SIZE);
200 regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
201 break;
202 case E_E10_REGNUM:
203 memset (zerobuf, 0, MAX_REGISTER_SIZE);
204 regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
205
206 break;
207 case E_MCRH_REGNUM:
208 regcache_raw_supply (regcache, E_MCRH_REGNUM,
209 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
210 break;
211 case E_MCRL_REGNUM:
212 regcache_raw_supply (regcache, E_MCRL_REGNUM,
213 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
214 break;
215 case E_MCVF_REGNUM:
216 regcache_raw_supply (regcache, E_MCVF_REGNUM,
217 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
218 break;
219 case E_FPCR_REGNUM:
220 /* FPCR is numbered among the GP regs, but handled as an FP reg.
221 Do nothing. */
222 break;
223 case E_FPCR_REGNUM + 1:
224 /* The two unused registers beyond fpcr are inaccessible. */
225 memset (zerobuf, 0, MAX_REGISTER_SIZE);
226 regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
227 break;
228 case E_FPCR_REGNUM + 2:
229 memset (zerobuf, 0, MAX_REGISTER_SIZE);
230 regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
231 break;
232 default: /* An error, obviously, but should we error out? */
233 break;
234 case -1:
235 for (i = 0; i < MN10300_ELF_NGREG; i++)
236 am33_supply_gregset_method (regset, regcache, i, gregs, len);
237 break;
238 }
239 return;
240}
241
025bb325
MS		 242/* Copy fp register value of REGNUM from regset to regcache.
243 If REGNUM is -1, do this for all fp registers in regset. */
611889b1
KB		 244
245static void
246am33_supply_fpregset_method (const struct regset *regset,
247 struct regcache *regcache,
248 int regnum, const void *fpregs, size_t len)
249{
250 const mn10300_elf_fpregset_t *fpregset = fpregs;
251
252 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
253
254 if (regnum == -1)
255 {
256 int i;
257
258 for (i = 0; i < MN10300_ELF_NFPREG; i++)
259 am33_supply_fpregset_method (regset, regcache,
260 E_FS0_REGNUM + i, fpregs, len);
261 am33_supply_fpregset_method (regset, regcache,
262 E_FPCR_REGNUM, fpregs, len);
263 }
264 else if (regnum == E_FPCR_REGNUM)
9c9acae0 265 regcache_raw_supply (regcache, E_FPCR_REGNUM,
611889b1 266 &fpregset->fpcr);
025bb325
MS		 267 else if (E_FS0_REGNUM <= regnum
268 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 269 regcache_raw_supply (regcache, regnum,
611889b1
KB		 270 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
271
272 return;
273}
274
275/* Copy register values from regcache to regset. */
276
277static void
278am33_collect_gregset_method (const struct regset *regset,
279 const struct regcache *regcache,
280 int regnum, void *gregs, size_t len)
281{
282 mn10300_elf_gregset_t *regp = gregs;
283 int i;
284
285 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
286
287 switch (regnum) {
288 case E_D0_REGNUM:
289 regcache_raw_collect (regcache, E_D0_REGNUM,
290 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
291 break;
292 case E_D1_REGNUM:
293 regcache_raw_collect (regcache, E_D1_REGNUM,
294 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
295 break;
296 case E_D2_REGNUM:
297 regcache_raw_collect (regcache, E_D2_REGNUM,
298 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
299 break;
300 case E_D3_REGNUM:
301 regcache_raw_collect (regcache, E_D3_REGNUM,
302 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
303 break;
304 case E_A0_REGNUM:
305 regcache_raw_collect (regcache, E_A0_REGNUM,
306 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
307 break;
308 case E_A1_REGNUM:
309 regcache_raw_collect (regcache, E_A1_REGNUM,
310 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
311 break;
312 case E_A2_REGNUM:
313 regcache_raw_collect (regcache, E_A2_REGNUM,
314 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
315 break;
316 case E_A3_REGNUM:
317 regcache_raw_collect (regcache, E_A3_REGNUM,
318 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
319 break;
320 case E_SP_REGNUM:
321 regcache_raw_collect (regcache, E_SP_REGNUM,
322 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
323 break;
324 case E_PC_REGNUM:
325 regcache_raw_collect (regcache, E_PC_REGNUM,
326 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
327 break;
328 case E_MDR_REGNUM:
329 regcache_raw_collect (regcache, E_MDR_REGNUM,
330 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
331 break;
332 case E_PSW_REGNUM:
333 regcache_raw_collect (regcache, E_PSW_REGNUM,
334 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
335 break;
336 case E_LIR_REGNUM:
337 regcache_raw_collect (regcache, E_LIR_REGNUM,
338 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
339 break;
340 case E_LAR_REGNUM:
341 regcache_raw_collect (regcache, E_LAR_REGNUM,
342 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
343 break;
344 case E_MDRQ_REGNUM:
345 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
346 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
347 break;
348 case E_E0_REGNUM:
349 regcache_raw_collect (regcache, E_E0_REGNUM,
350 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
351 break;
352 case E_E1_REGNUM:
353 regcache_raw_collect (regcache, E_E1_REGNUM,
354 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
355 break;
356 case E_E2_REGNUM:
357 regcache_raw_collect (regcache, E_E2_REGNUM,
358 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
359 break;
360 case E_E3_REGNUM:
361 regcache_raw_collect (regcache, E_E3_REGNUM,
362 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
363 break;
364 case E_E4_REGNUM:
365 regcache_raw_collect (regcache, E_E4_REGNUM,
366 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
367 break;
368 case E_E5_REGNUM:
369 regcache_raw_collect (regcache, E_E5_REGNUM,
370 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
371 break;
372 case E_E6_REGNUM:
373 regcache_raw_collect (regcache, E_E6_REGNUM,
374 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
375 break;
376 case E_E7_REGNUM:
377 regcache_raw_collect (regcache, E_E7_REGNUM,
378 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
379 break;
380
381 /* ssp, msp, and usp are inaccessible. */
382 case E_E8_REGNUM:
383 /* The gregset struct has noplace to put this: do nothing. */
384 break;
385 case E_E9_REGNUM:
386 /* The gregset struct has noplace to put this: do nothing. */
387 break;
388 case E_E10_REGNUM:
389 /* The gregset struct has noplace to put this: do nothing. */
390 break;
391 case E_MCRH_REGNUM:
392 regcache_raw_collect (regcache, E_MCRH_REGNUM,
393 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
394 break;
395 case E_MCRL_REGNUM:
396 regcache_raw_collect (regcache, E_MCRL_REGNUM,
397 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
398 break;
399 case E_MCVF_REGNUM:
400 regcache_raw_collect (regcache, E_MCVF_REGNUM,
401 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
402 break;
403 case E_FPCR_REGNUM:
404 /* FPCR is numbered among the GP regs, but handled as an FP reg.
405 Do nothing. */
406 break;
407 case E_FPCR_REGNUM + 1:
408 /* The gregset struct has noplace to put this: do nothing. */
409 break;
410 case E_FPCR_REGNUM + 2:
411 /* The gregset struct has noplace to put this: do nothing. */
412 break;
413 default: /* An error, obviously, but should we error out? */
414 break;
415 case -1:
416 for (i = 0; i < MN10300_ELF_NGREG; i++)
417 am33_collect_gregset_method (regset, regcache, i, gregs, len);
418 break;
419 }
420 return;
421}
422
423/* Copy fp register values from regcache to regset. */
424
425static void
426am33_collect_fpregset_method (const struct regset *regset,
427 const struct regcache *regcache,
428 int regnum, void *fpregs, size_t len)
429{
430 mn10300_elf_fpregset_t *fpregset = fpregs;
431
432 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
433
434 if (regnum == -1)
435 {
436 int i;
437 for (i = 0; i < MN10300_ELF_NFPREG; i++)
438 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
439 fpregs, len);
440 am33_collect_fpregset_method (regset, regcache,
441 E_FPCR_REGNUM, fpregs, len);
442 }
443 else if (regnum == E_FPCR_REGNUM)
9c9acae0 444 regcache_raw_collect (regcache, E_FPCR_REGNUM,
611889b1
KB		 445 &fpregset->fpcr);
446 else if (E_FS0_REGNUM <= regnum
447 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 448 regcache_raw_collect (regcache, regnum,
611889b1
KB		 449 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
450
451 return;
452}
453
24534243
AA		 454static const struct regset am33_gregset =
455 {
456 NULL, am33_supply_gregset_method, am33_collect_gregset_method
457 };
458
459static const struct regset am33_fpregset =
460 {
461 NULL, am33_supply_fpregset_method, am33_collect_fpregset_method
462 };
463
611889b1
KB		 464/* Create a struct regset from a corefile register section. */
465
466static const struct regset *
467am33_regset_from_core_section (struct gdbarch *gdbarch,
468 const char *sect_name,
469 size_t sect_size)
470{
611889b1 471 if (sect_size == sizeof (mn10300_elf_fpregset_t))
24534243 472 return &am33_fpregset;
611889b1 473 else
24534243 474 return &am33_gregset;
611889b1 475}
f9ec92b6
KB		 476\f
477static void
478am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 479 struct frame_info *this_frame,
f9ec92b6
KB		 480 struct trad_frame_cache *this_cache,
481 CORE_ADDR func);
482
483static const struct tramp_frame am33_linux_sigframe = {
484 SIGTRAMP_FRAME,
485 1,
486 {
487 /* mov 119,d0 */
488 { 0x2c, -1 },
489 { 0x77, -1 },
490 { 0x00, -1 },
491 /* syscall 0 */
492 { 0xf0, -1 },
493 { 0xe0, -1 },
494 { TRAMP_SENTINEL_INSN, -1 }
495 },
496 am33_linux_sigframe_cache_init
497};
498
499static const struct tramp_frame am33_linux_rt_sigframe = {
500 SIGTRAMP_FRAME,
501 1,
502 {
503 /* mov 173,d0 */
504 { 0x2c, -1 },
505 { 0xad, -1 },
506 { 0x00, -1 },
507 /* syscall 0 */
508 { 0xf0, -1 },
509 { 0xe0, -1 },
510 { TRAMP_SENTINEL_INSN, -1 }
511 },
512 am33_linux_sigframe_cache_init
513};
514
515/* Relevant struct definitions for signal handling...
516
517From arch/mn10300/kernel/sigframe.h:
518
519struct sigframe
520{
521 void (*pretcode)(void);
522 int sig;
e84605cd 523 struct sigcontext *psc;
f9ec92b6
KB		 524 struct sigcontext sc;
525 struct fpucontext fpuctx;
526 unsigned long extramask[_NSIG_WORDS-1];
527 char retcode[8];
528};
529
530struct rt_sigframe
531{
532 void (*pretcode)(void);
533 int sig;
534 struct siginfo *pinfo;
535 void *puc;
536 struct siginfo info;
537 struct ucontext uc;
538 struct fpucontext fpuctx;
539 char retcode[8];
540};
541
542From include/asm-mn10300/ucontext.h:
543
544struct ucontext {
545 unsigned long uc_flags;
546 struct ucontext *uc_link;
547 stack_t uc_stack;
548 struct sigcontext uc_mcontext;
549 sigset_t uc_sigmask;
550};
551
552From include/asm-mn10300/sigcontext.h:
553
554struct fpucontext {
555 unsigned long fs[32];
556 unsigned long fpcr;
557};
558
559struct sigcontext {
560 unsigned long d0;
561 unsigned long d1;
562 unsigned long d2;
563 unsigned long d3;
564 unsigned long a0;
565 unsigned long a1;
566 unsigned long a2;
567 unsigned long a3;
568 unsigned long e0;
569 unsigned long e1;
570 unsigned long e2;
571 unsigned long e3;
572 unsigned long e4;
573 unsigned long e5;
574 unsigned long e6;
575 unsigned long e7;
576 unsigned long lar;
577 unsigned long lir;
578 unsigned long mdr;
579 unsigned long mcvf;
580 unsigned long mcrl;
581 unsigned long mcrh;
582 unsigned long mdrq;
583 unsigned long sp;
584 unsigned long epsw;
585 unsigned long pc;
586 struct fpucontext *fpucontext;
587 unsigned long oldmask;
588}; */
589
590
591#define AM33_SIGCONTEXT_D0 0
592#define AM33_SIGCONTEXT_D1 4
593#define AM33_SIGCONTEXT_D2 8
594#define AM33_SIGCONTEXT_D3 12
595#define AM33_SIGCONTEXT_A0 16
596#define AM33_SIGCONTEXT_A1 20
597#define AM33_SIGCONTEXT_A2 24
598#define AM33_SIGCONTEXT_A3 28
599#define AM33_SIGCONTEXT_E0 32
600#define AM33_SIGCONTEXT_E1 36
601#define AM33_SIGCONTEXT_E2 40
602#define AM33_SIGCONTEXT_E3 44
603#define AM33_SIGCONTEXT_E4 48
604#define AM33_SIGCONTEXT_E5 52
605#define AM33_SIGCONTEXT_E6 56
606#define AM33_SIGCONTEXT_E7 60
607#define AM33_SIGCONTEXT_LAR 64
608#define AM33_SIGCONTEXT_LIR 68
609#define AM33_SIGCONTEXT_MDR 72
610#define AM33_SIGCONTEXT_MCVF 76
611#define AM33_SIGCONTEXT_MCRL 80
612#define AM33_SIGCONTEXT_MCRH 84
613#define AM33_SIGCONTEXT_MDRQ 88
614#define AM33_SIGCONTEXT_SP 92
615#define AM33_SIGCONTEXT_EPSW 96
616#define AM33_SIGCONTEXT_PC 100
617#define AM33_SIGCONTEXT_FPUCONTEXT 104
618
619
620static void
621am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 622 struct frame_info *this_frame,
f9ec92b6
KB		 623 struct trad_frame_cache *this_cache,
624 CORE_ADDR func)
625{
626 CORE_ADDR sc_base, fpubase;
627 int i;
611889b1 628
5366653e 629 sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
f9ec92b6
KB		 630 if (self == &am33_linux_sigframe)
631 {
632 sc_base += 8;
5366653e 633 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 634 }
635 else
636 {
637 sc_base += 12;
5366653e 638 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 639 sc_base += 20;
640 }
641
642 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
643 sc_base + AM33_SIGCONTEXT_D0);
644 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
645 sc_base + AM33_SIGCONTEXT_D1);
646 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
647 sc_base + AM33_SIGCONTEXT_D2);
648 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
649 sc_base + AM33_SIGCONTEXT_D3);
650
651 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
652 sc_base + AM33_SIGCONTEXT_A0);
653 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
654 sc_base + AM33_SIGCONTEXT_A1);
655 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
656 sc_base + AM33_SIGCONTEXT_A2);
657 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
658 sc_base + AM33_SIGCONTEXT_A3);
659
660 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
661 sc_base + AM33_SIGCONTEXT_E0);
662 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
663 sc_base + AM33_SIGCONTEXT_E1);
664 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
665 sc_base + AM33_SIGCONTEXT_E2);
666 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
667 sc_base + AM33_SIGCONTEXT_E3);
668 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
669 sc_base + AM33_SIGCONTEXT_E4);
670 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
671 sc_base + AM33_SIGCONTEXT_E5);
672 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
673 sc_base + AM33_SIGCONTEXT_E6);
674 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
675 sc_base + AM33_SIGCONTEXT_E7);
676
677 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
678 sc_base + AM33_SIGCONTEXT_LAR);
679 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
680 sc_base + AM33_SIGCONTEXT_LIR);
681 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
682 sc_base + AM33_SIGCONTEXT_MDR);
683 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
684 sc_base + AM33_SIGCONTEXT_MCVF);
685 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
686 sc_base + AM33_SIGCONTEXT_MCRL);
687 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
688 sc_base + AM33_SIGCONTEXT_MDRQ);
689
690 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
691 sc_base + AM33_SIGCONTEXT_SP);
692 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
693 sc_base + AM33_SIGCONTEXT_EPSW);
694 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
695 sc_base + AM33_SIGCONTEXT_PC);
696
5366653e 697 fpubase = get_frame_memory_unsigned (this_frame,
025bb325
MS		 698 sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
699 4);
f9ec92b6
KB		 700 if (fpubase)
701 {
702 for (i = 0; i < 32; i++)
703 {
704 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
705 fpubase + 4 * i);
706 }
707 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
708 }
709
710 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
711}
712\f
155bd5d1 713/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 714 Now's our chance to register our corefile handling. */
715
716static void
a5ee0f0c 717am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
611889b1 718{
a5ee0f0c
PA		 719 linux_init_abi (info, gdbarch);
720
611889b1
KB		 721 set_gdbarch_regset_from_core_section (gdbarch,
722 am33_regset_from_core_section);
696cc4a6 723 set_solib_svr4_fetch_link_map_offsets
cf1f553f 724 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 725
726 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
727 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 728}
729
63807e1d
PA		 730/* Provide a prototype to silence -Wmissing-prototypes. */
731extern initialize_file_ftype _initialize_mn10300_linux_tdep;
732
611889b1
KB		 733void
734_initialize_mn10300_linux_tdep (void)
735{
736 gdbarch_register_osabi (bfd_arch_mn10300, 0,
737 GDB_OSABI_LINUX, am33_linux_init_osabi);
738}
739
GDB Binutils - Deliverables
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