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* buildsym.c (start_subfile): Handle producer.
[deliverable/binutils-gdb.git] / gdb / mn10300-linux-tdep.c
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611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1
AC		 2
3 Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
611889b1
KB		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
197e01b6
EZ		 19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
611889b1
KB		 21
22#include "defs.h"
23#include "gdbcore.h"
24#include "gdb_string.h"
25#include "regcache.h"
26#include "mn10300-tdep.h"
27#include "gdb_assert.h"
28#include "bfd.h"
29#include "elf-bfd.h"
30#include "osabi.h"
31#include "regset.h"
696cc4a6 32#include "solib-svr4.h"
f9ec92b6
KB		 33#include "frame.h"
34#include "trad-frame.h"
35#include "tramp-frame.h"
611889b1
KB		 36
37#include <stdlib.h>
38
39/* Transliterated from <asm-mn10300/elf.h>... */
40#define MN10300_ELF_NGREG 28
41#define MN10300_ELF_NFPREG 32
42
43typedef gdb_byte mn10300_elf_greg_t[4];
44typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
45
46typedef gdb_byte mn10300_elf_fpreg_t[4];
47typedef struct
48{
49 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
50 gdb_byte fpcr[4];
51} mn10300_elf_fpregset_t;
52
53/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
54#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
55#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
56#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
57#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
58#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
59#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
60#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
61#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
65#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
66#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
67#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
68#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
69#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
70#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
71#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
72#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
73#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
74#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
75#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
76#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
77#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
78#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
79#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
80#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
81
82/* New gdbarch API for corefile registers.
83 Given a section name and size, create a struct reg object
84 with a supply_register and a collect_register method. */
85
86/* Copy register value of REGNUM from regset to regcache.
87 If REGNUM is -1, do this for all gp registers in regset. */
88
89static void
90am33_supply_gregset_method (const struct regset *regset,
91 struct regcache *regcache,
92 int regnum, const void *gregs, size_t len)
93{
94 char zerobuf[MAX_REGISTER_SIZE];
95 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
96 int i;
97
98 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
99
100 switch (regnum) {
101 case E_D0_REGNUM:
102 regcache_raw_supply (regcache, E_D0_REGNUM,
103 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
104 break;
105 case E_D1_REGNUM:
106 regcache_raw_supply (regcache, E_D1_REGNUM,
107 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
108 break;
109 case E_D2_REGNUM:
110 regcache_raw_supply (regcache, E_D2_REGNUM,
111 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
112 break;
113 case E_D3_REGNUM:
114 regcache_raw_supply (regcache, E_D3_REGNUM,
115 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
116 break;
117 case E_A0_REGNUM:
118 regcache_raw_supply (regcache, E_A0_REGNUM,
119 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
120 break;
121 case E_A1_REGNUM:
122 regcache_raw_supply (regcache, E_A1_REGNUM,
123 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
124 break;
125 case E_A2_REGNUM:
126 regcache_raw_supply (regcache, E_A2_REGNUM,
127 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
128 break;
129 case E_A3_REGNUM:
130 regcache_raw_supply (regcache, E_A3_REGNUM,
131 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
132 break;
133 case E_SP_REGNUM:
134 regcache_raw_supply (regcache, E_SP_REGNUM,
135 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
136 break;
137 case E_PC_REGNUM:
138 regcache_raw_supply (regcache, E_PC_REGNUM,
139 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
140 break;
141 case E_MDR_REGNUM:
142 regcache_raw_supply (regcache, E_MDR_REGNUM,
143 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
144 break;
145 case E_PSW_REGNUM:
146 regcache_raw_supply (regcache, E_PSW_REGNUM,
147 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
148 break;
149 case E_LIR_REGNUM:
150 regcache_raw_supply (regcache, E_LIR_REGNUM,
151 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
152 break;
153 case E_LAR_REGNUM:
154 regcache_raw_supply (regcache, E_LAR_REGNUM,
155 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
156 break;
157 case E_MDRQ_REGNUM:
158 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
159 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
160 break;
161 case E_E0_REGNUM:
162 regcache_raw_supply (regcache, E_E0_REGNUM,
163 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
164 break;
165 case E_E1_REGNUM:
166 regcache_raw_supply (regcache, E_E1_REGNUM,
167 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
168 break;
169 case E_E2_REGNUM:
170 regcache_raw_supply (regcache, E_E2_REGNUM,
171 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
172 break;
173 case E_E3_REGNUM:
174 regcache_raw_supply (regcache, E_E3_REGNUM,
175 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
176 break;
177 case E_E4_REGNUM:
178 regcache_raw_supply (regcache, E_E4_REGNUM,
179 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
180 break;
181 case E_E5_REGNUM:
182 regcache_raw_supply (regcache, E_E5_REGNUM,
183 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
184 break;
185 case E_E6_REGNUM:
186 regcache_raw_supply (regcache, E_E6_REGNUM,
187 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
188 break;
189 case E_E7_REGNUM:
190 regcache_raw_supply (regcache, E_E7_REGNUM,
191 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
192 break;
193
194 /* ssp, msp, and usp are inaccessible. */
195 case E_E8_REGNUM:
196 memset (zerobuf, 0, MAX_REGISTER_SIZE);
197 regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
198 break;
199 case E_E9_REGNUM:
200 memset (zerobuf, 0, MAX_REGISTER_SIZE);
201 regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
202 break;
203 case E_E10_REGNUM:
204 memset (zerobuf, 0, MAX_REGISTER_SIZE);
205 regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
206
207 break;
208 case E_MCRH_REGNUM:
209 regcache_raw_supply (regcache, E_MCRH_REGNUM,
210 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
211 break;
212 case E_MCRL_REGNUM:
213 regcache_raw_supply (regcache, E_MCRL_REGNUM,
214 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
215 break;
216 case E_MCVF_REGNUM:
217 regcache_raw_supply (regcache, E_MCVF_REGNUM,
218 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
219 break;
220 case E_FPCR_REGNUM:
221 /* FPCR is numbered among the GP regs, but handled as an FP reg.
222 Do nothing. */
223 break;
224 case E_FPCR_REGNUM + 1:
225 /* The two unused registers beyond fpcr are inaccessible. */
226 memset (zerobuf, 0, MAX_REGISTER_SIZE);
227 regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
228 break;
229 case E_FPCR_REGNUM + 2:
230 memset (zerobuf, 0, MAX_REGISTER_SIZE);
231 regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
232 break;
233 default: /* An error, obviously, but should we error out? */
234 break;
235 case -1:
236 for (i = 0; i < MN10300_ELF_NGREG; i++)
237 am33_supply_gregset_method (regset, regcache, i, gregs, len);
238 break;
239 }
240 return;
241}
242
243/* Copy fp register value of REGNUM from regset to regcache.
244 If REGNUM is -1, do this for all fp registers in regset. */
245
246static void
247am33_supply_fpregset_method (const struct regset *regset,
248 struct regcache *regcache,
249 int regnum, const void *fpregs, size_t len)
250{
251 const mn10300_elf_fpregset_t *fpregset = fpregs;
252
253 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
254
255 if (regnum == -1)
256 {
257 int i;
258
259 for (i = 0; i < MN10300_ELF_NFPREG; i++)
260 am33_supply_fpregset_method (regset, regcache,
261 E_FS0_REGNUM + i, fpregs, len);
262 am33_supply_fpregset_method (regset, regcache,
263 E_FPCR_REGNUM, fpregs, len);
264 }
265 else if (regnum == E_FPCR_REGNUM)
266 regcache_raw_supply (current_regcache, E_FPCR_REGNUM,
267 &fpregset->fpcr);
268 else if (E_FS0_REGNUM <= regnum && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
269 regcache_raw_supply (current_regcache, regnum,
270 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
271
272 return;
273}
274
275/* Copy register values from regcache to regset. */
276
277static void
278am33_collect_gregset_method (const struct regset *regset,
279 const struct regcache *regcache,
280 int regnum, void *gregs, size_t len)
281{
282 mn10300_elf_gregset_t *regp = gregs;
283 int i;
284
285 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
286
287 switch (regnum) {
288 case E_D0_REGNUM:
289 regcache_raw_collect (regcache, E_D0_REGNUM,
290 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
291 break;
292 case E_D1_REGNUM:
293 regcache_raw_collect (regcache, E_D1_REGNUM,
294 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
295 break;
296 case E_D2_REGNUM:
297 regcache_raw_collect (regcache, E_D2_REGNUM,
298 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
299 break;
300 case E_D3_REGNUM:
301 regcache_raw_collect (regcache, E_D3_REGNUM,
302 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
303 break;
304 case E_A0_REGNUM:
305 regcache_raw_collect (regcache, E_A0_REGNUM,
306 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
307 break;
308 case E_A1_REGNUM:
309 regcache_raw_collect (regcache, E_A1_REGNUM,
310 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
311 break;
312 case E_A2_REGNUM:
313 regcache_raw_collect (regcache, E_A2_REGNUM,
314 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
315 break;
316 case E_A3_REGNUM:
317 regcache_raw_collect (regcache, E_A3_REGNUM,
318 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
319 break;
320 case E_SP_REGNUM:
321 regcache_raw_collect (regcache, E_SP_REGNUM,
322 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
323 break;
324 case E_PC_REGNUM:
325 regcache_raw_collect (regcache, E_PC_REGNUM,
326 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
327 break;
328 case E_MDR_REGNUM:
329 regcache_raw_collect (regcache, E_MDR_REGNUM,
330 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
331 break;
332 case E_PSW_REGNUM:
333 regcache_raw_collect (regcache, E_PSW_REGNUM,
334 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
335 break;
336 case E_LIR_REGNUM:
337 regcache_raw_collect (regcache, E_LIR_REGNUM,
338 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
339 break;
340 case E_LAR_REGNUM:
341 regcache_raw_collect (regcache, E_LAR_REGNUM,
342 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
343 break;
344 case E_MDRQ_REGNUM:
345 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
346 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
347 break;
348 case E_E0_REGNUM:
349 regcache_raw_collect (regcache, E_E0_REGNUM,
350 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
351 break;
352 case E_E1_REGNUM:
353 regcache_raw_collect (regcache, E_E1_REGNUM,
354 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
355 break;
356 case E_E2_REGNUM:
357 regcache_raw_collect (regcache, E_E2_REGNUM,
358 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
359 break;
360 case E_E3_REGNUM:
361 regcache_raw_collect (regcache, E_E3_REGNUM,
362 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
363 break;
364 case E_E4_REGNUM:
365 regcache_raw_collect (regcache, E_E4_REGNUM,
366 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
367 break;
368 case E_E5_REGNUM:
369 regcache_raw_collect (regcache, E_E5_REGNUM,
370 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
371 break;
372 case E_E6_REGNUM:
373 regcache_raw_collect (regcache, E_E6_REGNUM,
374 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
375 break;
376 case E_E7_REGNUM:
377 regcache_raw_collect (regcache, E_E7_REGNUM,
378 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
379 break;
380
381 /* ssp, msp, and usp are inaccessible. */
382 case E_E8_REGNUM:
383 /* The gregset struct has noplace to put this: do nothing. */
384 break;
385 case E_E9_REGNUM:
386 /* The gregset struct has noplace to put this: do nothing. */
387 break;
388 case E_E10_REGNUM:
389 /* The gregset struct has noplace to put this: do nothing. */
390 break;
391 case E_MCRH_REGNUM:
392 regcache_raw_collect (regcache, E_MCRH_REGNUM,
393 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
394 break;
395 case E_MCRL_REGNUM:
396 regcache_raw_collect (regcache, E_MCRL_REGNUM,
397 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
398 break;
399 case E_MCVF_REGNUM:
400 regcache_raw_collect (regcache, E_MCVF_REGNUM,
401 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
402 break;
403 case E_FPCR_REGNUM:
404 /* FPCR is numbered among the GP regs, but handled as an FP reg.
405 Do nothing. */
406 break;
407 case E_FPCR_REGNUM + 1:
408 /* The gregset struct has noplace to put this: do nothing. */
409 break;
410 case E_FPCR_REGNUM + 2:
411 /* The gregset struct has noplace to put this: do nothing. */
412 break;
413 default: /* An error, obviously, but should we error out? */
414 break;
415 case -1:
416 for (i = 0; i < MN10300_ELF_NGREG; i++)
417 am33_collect_gregset_method (regset, regcache, i, gregs, len);
418 break;
419 }
420 return;
421}
422
423/* Copy fp register values from regcache to regset. */
424
425static void
426am33_collect_fpregset_method (const struct regset *regset,
427 const struct regcache *regcache,
428 int regnum, void *fpregs, size_t len)
429{
430 mn10300_elf_fpregset_t *fpregset = fpregs;
431
432 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
433
434 if (regnum == -1)
435 {
436 int i;
437 for (i = 0; i < MN10300_ELF_NFPREG; i++)
438 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
439 fpregs, len);
440 am33_collect_fpregset_method (regset, regcache,
441 E_FPCR_REGNUM, fpregs, len);
442 }
443 else if (regnum == E_FPCR_REGNUM)
444 regcache_raw_collect (current_regcache, E_FPCR_REGNUM,
445 &fpregset->fpcr);
446 else if (E_FS0_REGNUM <= regnum
447 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
448 regcache_raw_collect (current_regcache, regnum,
449 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
450
451 return;
452}
453
454/* Create a struct regset from a corefile register section. */
455
456static const struct regset *
457am33_regset_from_core_section (struct gdbarch *gdbarch,
458 const char *sect_name,
459 size_t sect_size)
460{
461 /* We will call regset_alloc, and pass the names of the supply and
462 collect methods. */
463
464 if (sect_size == sizeof (mn10300_elf_fpregset_t))
465 return regset_alloc (gdbarch,
466 am33_supply_fpregset_method,
467 am33_collect_fpregset_method);
468 else
469 return regset_alloc (gdbarch,
470 am33_supply_gregset_method,
471 am33_collect_gregset_method);
472}
f9ec92b6
KB		 473\f
474static void
475am33_linux_sigframe_cache_init (const struct tramp_frame *self,
476 struct frame_info *next_frame,
477 struct trad_frame_cache *this_cache,
478 CORE_ADDR func);
479
480static const struct tramp_frame am33_linux_sigframe = {
481 SIGTRAMP_FRAME,
482 1,
483 {
484 /* mov 119,d0 */
485 { 0x2c, -1 },
486 { 0x77, -1 },
487 { 0x00, -1 },
488 /* syscall 0 */
489 { 0xf0, -1 },
490 { 0xe0, -1 },
491 { TRAMP_SENTINEL_INSN, -1 }
492 },
493 am33_linux_sigframe_cache_init
494};
495
496static const struct tramp_frame am33_linux_rt_sigframe = {
497 SIGTRAMP_FRAME,
498 1,
499 {
500 /* mov 173,d0 */
501 { 0x2c, -1 },
502 { 0xad, -1 },
503 { 0x00, -1 },
504 /* syscall 0 */
505 { 0xf0, -1 },
506 { 0xe0, -1 },
507 { TRAMP_SENTINEL_INSN, -1 }
508 },
509 am33_linux_sigframe_cache_init
510};
511
512/* Relevant struct definitions for signal handling...
513
514From arch/mn10300/kernel/sigframe.h:
515
516struct sigframe
517{
518 void (*pretcode)(void);
519 int sig;
520 struct sigcontext sc;
521 struct fpucontext fpuctx;
522 unsigned long extramask[_NSIG_WORDS-1];
523 char retcode[8];
524};
525
526struct rt_sigframe
527{
528 void (*pretcode)(void);
529 int sig;
530 struct siginfo *pinfo;
531 void *puc;
532 struct siginfo info;
533 struct ucontext uc;
534 struct fpucontext fpuctx;
535 char retcode[8];
536};
537
538From include/asm-mn10300/ucontext.h:
539
540struct ucontext {
541 unsigned long uc_flags;
542 struct ucontext *uc_link;
543 stack_t uc_stack;
544 struct sigcontext uc_mcontext;
545 sigset_t uc_sigmask;
546};
547
548From include/asm-mn10300/sigcontext.h:
549
550struct fpucontext {
551 unsigned long fs[32];
552 unsigned long fpcr;
553};
554
555struct sigcontext {
556 unsigned long d0;
557 unsigned long d1;
558 unsigned long d2;
559 unsigned long d3;
560 unsigned long a0;
561 unsigned long a1;
562 unsigned long a2;
563 unsigned long a3;
564 unsigned long e0;
565 unsigned long e1;
566 unsigned long e2;
567 unsigned long e3;
568 unsigned long e4;
569 unsigned long e5;
570 unsigned long e6;
571 unsigned long e7;
572 unsigned long lar;
573 unsigned long lir;
574 unsigned long mdr;
575 unsigned long mcvf;
576 unsigned long mcrl;
577 unsigned long mcrh;
578 unsigned long mdrq;
579 unsigned long sp;
580 unsigned long epsw;
581 unsigned long pc;
582 struct fpucontext *fpucontext;
583 unsigned long oldmask;
584}; */
585
586
587#define AM33_SIGCONTEXT_D0 0
588#define AM33_SIGCONTEXT_D1 4
589#define AM33_SIGCONTEXT_D2 8
590#define AM33_SIGCONTEXT_D3 12
591#define AM33_SIGCONTEXT_A0 16
592#define AM33_SIGCONTEXT_A1 20
593#define AM33_SIGCONTEXT_A2 24
594#define AM33_SIGCONTEXT_A3 28
595#define AM33_SIGCONTEXT_E0 32
596#define AM33_SIGCONTEXT_E1 36
597#define AM33_SIGCONTEXT_E2 40
598#define AM33_SIGCONTEXT_E3 44
599#define AM33_SIGCONTEXT_E4 48
600#define AM33_SIGCONTEXT_E5 52
601#define AM33_SIGCONTEXT_E6 56
602#define AM33_SIGCONTEXT_E7 60
603#define AM33_SIGCONTEXT_LAR 64
604#define AM33_SIGCONTEXT_LIR 68
605#define AM33_SIGCONTEXT_MDR 72
606#define AM33_SIGCONTEXT_MCVF 76
607#define AM33_SIGCONTEXT_MCRL 80
608#define AM33_SIGCONTEXT_MCRH 84
609#define AM33_SIGCONTEXT_MDRQ 88
610#define AM33_SIGCONTEXT_SP 92
611#define AM33_SIGCONTEXT_EPSW 96
612#define AM33_SIGCONTEXT_PC 100
613#define AM33_SIGCONTEXT_FPUCONTEXT 104
614
615
616static void
617am33_linux_sigframe_cache_init (const struct tramp_frame *self,
618 struct frame_info *next_frame,
619 struct trad_frame_cache *this_cache,
620 CORE_ADDR func)
621{
622 CORE_ADDR sc_base, fpubase;
623 int i;
611889b1 624
f9ec92b6
KB		 625 sc_base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
626 if (self == &am33_linux_sigframe)
627 {
628 sc_base += 8;
629 }
630 else
631 {
632 sc_base += 12;
633 sc_base = get_frame_memory_unsigned (next_frame, sc_base, 4);
634 sc_base += 20;
635 }
636
637 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
638 sc_base + AM33_SIGCONTEXT_D0);
639 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
640 sc_base + AM33_SIGCONTEXT_D1);
641 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
642 sc_base + AM33_SIGCONTEXT_D2);
643 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
644 sc_base + AM33_SIGCONTEXT_D3);
645
646 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
647 sc_base + AM33_SIGCONTEXT_A0);
648 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
649 sc_base + AM33_SIGCONTEXT_A1);
650 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
651 sc_base + AM33_SIGCONTEXT_A2);
652 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
653 sc_base + AM33_SIGCONTEXT_A3);
654
655 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
656 sc_base + AM33_SIGCONTEXT_E0);
657 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
658 sc_base + AM33_SIGCONTEXT_E1);
659 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
660 sc_base + AM33_SIGCONTEXT_E2);
661 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
662 sc_base + AM33_SIGCONTEXT_E3);
663 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
664 sc_base + AM33_SIGCONTEXT_E4);
665 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
666 sc_base + AM33_SIGCONTEXT_E5);
667 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
668 sc_base + AM33_SIGCONTEXT_E6);
669 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
670 sc_base + AM33_SIGCONTEXT_E7);
671
672 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
673 sc_base + AM33_SIGCONTEXT_LAR);
674 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
675 sc_base + AM33_SIGCONTEXT_LIR);
676 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
677 sc_base + AM33_SIGCONTEXT_MDR);
678 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
679 sc_base + AM33_SIGCONTEXT_MCVF);
680 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
681 sc_base + AM33_SIGCONTEXT_MCRL);
682 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
683 sc_base + AM33_SIGCONTEXT_MDRQ);
684
685 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
686 sc_base + AM33_SIGCONTEXT_SP);
687 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
688 sc_base + AM33_SIGCONTEXT_EPSW);
689 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
690 sc_base + AM33_SIGCONTEXT_PC);
691
692 fpubase = get_frame_memory_unsigned (next_frame,
693 sc_base + AM33_SIGCONTEXT_FPUCONTEXT, 4);
694 if (fpubase)
695 {
696 for (i = 0; i < 32; i++)
697 {
698 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
699 fpubase + 4 * i);
700 }
701 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
702 }
703
704 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
705}
706\f
155bd5d1 707/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 708 Now's our chance to register our corefile handling. */
709
710static void
711am33_linux_init_osabi (struct gdbarch_info gdbinfo, struct gdbarch *gdbarch)
712{
713 set_gdbarch_regset_from_core_section (gdbarch,
714 am33_regset_from_core_section);
696cc4a6 715 set_solib_svr4_fetch_link_map_offsets
cf1f553f 716 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 717
718 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
719 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 720}
721
722void
723_initialize_mn10300_linux_tdep (void)
724{
725 gdbarch_register_osabi (bfd_arch_mn10300, 0,
726 GDB_OSABI_LINUX, am33_linux_init_osabi);
727}
728
GDB Binutils - Deliverables
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