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Include gdb_assert.h in common-defs.h
[deliverable/binutils-gdb.git] / gdb / mn10300-linux-tdep.c
CommitLineData
611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1 2
ecd75fc8 3 Copyright (C) 2003-2014 Free Software Foundation, Inc.
611889b1
KB		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
611889b1
KB		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
611889b1
KB		 19
20#include "defs.h"
21#include "gdbcore.h"
0e9f083f 22#include <string.h>
611889b1
KB		 23#include "regcache.h"
24#include "mn10300-tdep.h"
611889b1
KB		 25#include "bfd.h"
26#include "elf-bfd.h"
27#include "osabi.h"
28#include "regset.h"
696cc4a6 29#include "solib-svr4.h"
f9ec92b6
KB		 30#include "frame.h"
31#include "trad-frame.h"
32#include "tramp-frame.h"
a5ee0f0c 33#include "linux-tdep.h"
611889b1 34
611889b1
KB		 35/* Transliterated from <asm-mn10300/elf.h>... */
36#define MN10300_ELF_NGREG 28
37#define MN10300_ELF_NFPREG 32
38
39typedef gdb_byte mn10300_elf_greg_t[4];
40typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
41
42typedef gdb_byte mn10300_elf_fpreg_t[4];
43typedef struct
44{
45 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
46 gdb_byte fpcr[4];
47} mn10300_elf_fpregset_t;
48
49/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
50#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
51#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
52#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
53#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
54#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
55#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
56#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
57#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
58#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
59#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
60#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
61#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
65#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
66#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
67#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
68#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
69#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
70#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
71#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
72#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
73#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
74#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
75#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
76#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
77
78/* New gdbarch API for corefile registers.
79 Given a section name and size, create a struct reg object
80 with a supply_register and a collect_register method. */
81
025bb325 82/* Copy register value of REGNUM from regset to regcache.
611889b1
KB		 83 If REGNUM is -1, do this for all gp registers in regset. */
84
85static void
86am33_supply_gregset_method (const struct regset *regset,
87 struct regcache *regcache,
88 int regnum, const void *gregs, size_t len)
89{
90 char zerobuf[MAX_REGISTER_SIZE];
91 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
92 int i;
93
94 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
95
96 switch (regnum) {
97 case E_D0_REGNUM:
98 regcache_raw_supply (regcache, E_D0_REGNUM,
99 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
100 break;
101 case E_D1_REGNUM:
102 regcache_raw_supply (regcache, E_D1_REGNUM,
103 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
104 break;
105 case E_D2_REGNUM:
106 regcache_raw_supply (regcache, E_D2_REGNUM,
107 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
108 break;
109 case E_D3_REGNUM:
110 regcache_raw_supply (regcache, E_D3_REGNUM,
111 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
112 break;
113 case E_A0_REGNUM:
114 regcache_raw_supply (regcache, E_A0_REGNUM,
115 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
116 break;
117 case E_A1_REGNUM:
118 regcache_raw_supply (regcache, E_A1_REGNUM,
119 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
120 break;
121 case E_A2_REGNUM:
122 regcache_raw_supply (regcache, E_A2_REGNUM,
123 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
124 break;
125 case E_A3_REGNUM:
126 regcache_raw_supply (regcache, E_A3_REGNUM,
127 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
128 break;
129 case E_SP_REGNUM:
130 regcache_raw_supply (regcache, E_SP_REGNUM,
131 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
132 break;
133 case E_PC_REGNUM:
134 regcache_raw_supply (regcache, E_PC_REGNUM,
135 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
136 break;
137 case E_MDR_REGNUM:
138 regcache_raw_supply (regcache, E_MDR_REGNUM,
139 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
140 break;
141 case E_PSW_REGNUM:
142 regcache_raw_supply (regcache, E_PSW_REGNUM,
143 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
144 break;
145 case E_LIR_REGNUM:
146 regcache_raw_supply (regcache, E_LIR_REGNUM,
147 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
148 break;
149 case E_LAR_REGNUM:
150 regcache_raw_supply (regcache, E_LAR_REGNUM,
151 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
152 break;
153 case E_MDRQ_REGNUM:
154 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
155 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
156 break;
157 case E_E0_REGNUM:
158 regcache_raw_supply (regcache, E_E0_REGNUM,
159 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
160 break;
161 case E_E1_REGNUM:
162 regcache_raw_supply (regcache, E_E1_REGNUM,
163 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
164 break;
165 case E_E2_REGNUM:
166 regcache_raw_supply (regcache, E_E2_REGNUM,
167 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
168 break;
169 case E_E3_REGNUM:
170 regcache_raw_supply (regcache, E_E3_REGNUM,
171 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
172 break;
173 case E_E4_REGNUM:
174 regcache_raw_supply (regcache, E_E4_REGNUM,
175 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
176 break;
177 case E_E5_REGNUM:
178 regcache_raw_supply (regcache, E_E5_REGNUM,
179 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
180 break;
181 case E_E6_REGNUM:
182 regcache_raw_supply (regcache, E_E6_REGNUM,
183 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
184 break;
185 case E_E7_REGNUM:
186 regcache_raw_supply (regcache, E_E7_REGNUM,
187 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
188 break;
189
190 /* ssp, msp, and usp are inaccessible. */
191 case E_E8_REGNUM:
192 memset (zerobuf, 0, MAX_REGISTER_SIZE);
193 regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
194 break;
195 case E_E9_REGNUM:
196 memset (zerobuf, 0, MAX_REGISTER_SIZE);
197 regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
198 break;
199 case E_E10_REGNUM:
200 memset (zerobuf, 0, MAX_REGISTER_SIZE);
201 regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
202
203 break;
204 case E_MCRH_REGNUM:
205 regcache_raw_supply (regcache, E_MCRH_REGNUM,
206 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
207 break;
208 case E_MCRL_REGNUM:
209 regcache_raw_supply (regcache, E_MCRL_REGNUM,
210 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
211 break;
212 case E_MCVF_REGNUM:
213 regcache_raw_supply (regcache, E_MCVF_REGNUM,
214 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
215 break;
216 case E_FPCR_REGNUM:
217 /* FPCR is numbered among the GP regs, but handled as an FP reg.
218 Do nothing. */
219 break;
220 case E_FPCR_REGNUM + 1:
221 /* The two unused registers beyond fpcr are inaccessible. */
222 memset (zerobuf, 0, MAX_REGISTER_SIZE);
223 regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
224 break;
225 case E_FPCR_REGNUM + 2:
226 memset (zerobuf, 0, MAX_REGISTER_SIZE);
227 regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
228 break;
229 default: /* An error, obviously, but should we error out? */
230 break;
231 case -1:
232 for (i = 0; i < MN10300_ELF_NGREG; i++)
233 am33_supply_gregset_method (regset, regcache, i, gregs, len);
234 break;
235 }
236 return;
237}
238
025bb325
MS		 239/* Copy fp register value of REGNUM from regset to regcache.
240 If REGNUM is -1, do this for all fp registers in regset. */
611889b1
KB		 241
242static void
243am33_supply_fpregset_method (const struct regset *regset,
244 struct regcache *regcache,
245 int regnum, const void *fpregs, size_t len)
246{
247 const mn10300_elf_fpregset_t *fpregset = fpregs;
248
249 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
250
251 if (regnum == -1)
252 {
253 int i;
254
255 for (i = 0; i < MN10300_ELF_NFPREG; i++)
256 am33_supply_fpregset_method (regset, regcache,
257 E_FS0_REGNUM + i, fpregs, len);
258 am33_supply_fpregset_method (regset, regcache,
259 E_FPCR_REGNUM, fpregs, len);
260 }
261 else if (regnum == E_FPCR_REGNUM)
9c9acae0 262 regcache_raw_supply (regcache, E_FPCR_REGNUM,
611889b1 263 &fpregset->fpcr);
025bb325
MS		 264 else if (E_FS0_REGNUM <= regnum
265 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 266 regcache_raw_supply (regcache, regnum,
611889b1
KB		 267 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
268
269 return;
270}
271
272/* Copy register values from regcache to regset. */
273
274static void
275am33_collect_gregset_method (const struct regset *regset,
276 const struct regcache *regcache,
277 int regnum, void *gregs, size_t len)
278{
279 mn10300_elf_gregset_t *regp = gregs;
280 int i;
281
282 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
283
284 switch (regnum) {
285 case E_D0_REGNUM:
286 regcache_raw_collect (regcache, E_D0_REGNUM,
287 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
288 break;
289 case E_D1_REGNUM:
290 regcache_raw_collect (regcache, E_D1_REGNUM,
291 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
292 break;
293 case E_D2_REGNUM:
294 regcache_raw_collect (regcache, E_D2_REGNUM,
295 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
296 break;
297 case E_D3_REGNUM:
298 regcache_raw_collect (regcache, E_D3_REGNUM,
299 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
300 break;
301 case E_A0_REGNUM:
302 regcache_raw_collect (regcache, E_A0_REGNUM,
303 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
304 break;
305 case E_A1_REGNUM:
306 regcache_raw_collect (regcache, E_A1_REGNUM,
307 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
308 break;
309 case E_A2_REGNUM:
310 regcache_raw_collect (regcache, E_A2_REGNUM,
311 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
312 break;
313 case E_A3_REGNUM:
314 regcache_raw_collect (regcache, E_A3_REGNUM,
315 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
316 break;
317 case E_SP_REGNUM:
318 regcache_raw_collect (regcache, E_SP_REGNUM,
319 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
320 break;
321 case E_PC_REGNUM:
322 regcache_raw_collect (regcache, E_PC_REGNUM,
323 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
324 break;
325 case E_MDR_REGNUM:
326 regcache_raw_collect (regcache, E_MDR_REGNUM,
327 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
328 break;
329 case E_PSW_REGNUM:
330 regcache_raw_collect (regcache, E_PSW_REGNUM,
331 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
332 break;
333 case E_LIR_REGNUM:
334 regcache_raw_collect (regcache, E_LIR_REGNUM,
335 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
336 break;
337 case E_LAR_REGNUM:
338 regcache_raw_collect (regcache, E_LAR_REGNUM,
339 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
340 break;
341 case E_MDRQ_REGNUM:
342 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
343 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
344 break;
345 case E_E0_REGNUM:
346 regcache_raw_collect (regcache, E_E0_REGNUM,
347 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
348 break;
349 case E_E1_REGNUM:
350 regcache_raw_collect (regcache, E_E1_REGNUM,
351 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
352 break;
353 case E_E2_REGNUM:
354 regcache_raw_collect (regcache, E_E2_REGNUM,
355 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
356 break;
357 case E_E3_REGNUM:
358 regcache_raw_collect (regcache, E_E3_REGNUM,
359 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
360 break;
361 case E_E4_REGNUM:
362 regcache_raw_collect (regcache, E_E4_REGNUM,
363 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
364 break;
365 case E_E5_REGNUM:
366 regcache_raw_collect (regcache, E_E5_REGNUM,
367 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
368 break;
369 case E_E6_REGNUM:
370 regcache_raw_collect (regcache, E_E6_REGNUM,
371 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
372 break;
373 case E_E7_REGNUM:
374 regcache_raw_collect (regcache, E_E7_REGNUM,
375 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
376 break;
377
378 /* ssp, msp, and usp are inaccessible. */
379 case E_E8_REGNUM:
380 /* The gregset struct has noplace to put this: do nothing. */
381 break;
382 case E_E9_REGNUM:
383 /* The gregset struct has noplace to put this: do nothing. */
384 break;
385 case E_E10_REGNUM:
386 /* The gregset struct has noplace to put this: do nothing. */
387 break;
388 case E_MCRH_REGNUM:
389 regcache_raw_collect (regcache, E_MCRH_REGNUM,
390 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
391 break;
392 case E_MCRL_REGNUM:
393 regcache_raw_collect (regcache, E_MCRL_REGNUM,
394 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
395 break;
396 case E_MCVF_REGNUM:
397 regcache_raw_collect (regcache, E_MCVF_REGNUM,
398 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
399 break;
400 case E_FPCR_REGNUM:
401 /* FPCR is numbered among the GP regs, but handled as an FP reg.
402 Do nothing. */
403 break;
404 case E_FPCR_REGNUM + 1:
405 /* The gregset struct has noplace to put this: do nothing. */
406 break;
407 case E_FPCR_REGNUM + 2:
408 /* The gregset struct has noplace to put this: do nothing. */
409 break;
410 default: /* An error, obviously, but should we error out? */
411 break;
412 case -1:
413 for (i = 0; i < MN10300_ELF_NGREG; i++)
414 am33_collect_gregset_method (regset, regcache, i, gregs, len);
415 break;
416 }
417 return;
418}
419
420/* Copy fp register values from regcache to regset. */
421
422static void
423am33_collect_fpregset_method (const struct regset *regset,
424 const struct regcache *regcache,
425 int regnum, void *fpregs, size_t len)
426{
427 mn10300_elf_fpregset_t *fpregset = fpregs;
428
429 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
430
431 if (regnum == -1)
432 {
433 int i;
434 for (i = 0; i < MN10300_ELF_NFPREG; i++)
435 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
436 fpregs, len);
437 am33_collect_fpregset_method (regset, regcache,
438 E_FPCR_REGNUM, fpregs, len);
439 }
440 else if (regnum == E_FPCR_REGNUM)
9c9acae0 441 regcache_raw_collect (regcache, E_FPCR_REGNUM,
611889b1
KB		 442 &fpregset->fpcr);
443 else if (E_FS0_REGNUM <= regnum
444 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 445 regcache_raw_collect (regcache, regnum,
611889b1
KB		 446 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
447
448 return;
449}
450
24534243
AA		 451static const struct regset am33_gregset =
452 {
453 NULL, am33_supply_gregset_method, am33_collect_gregset_method
454 };
455
456static const struct regset am33_fpregset =
457 {
458 NULL, am33_supply_fpregset_method, am33_collect_fpregset_method
459 };
460
611889b1
KB		 461/* Create a struct regset from a corefile register section. */
462
463static const struct regset *
464am33_regset_from_core_section (struct gdbarch *gdbarch,
465 const char *sect_name,
466 size_t sect_size)
467{
611889b1 468 if (sect_size == sizeof (mn10300_elf_fpregset_t))
24534243 469 return &am33_fpregset;
611889b1 470 else
24534243 471 return &am33_gregset;
611889b1 472}
f9ec92b6
KB		 473\f
474static void
475am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 476 struct frame_info *this_frame,
f9ec92b6
KB		 477 struct trad_frame_cache *this_cache,
478 CORE_ADDR func);
479
480static const struct tramp_frame am33_linux_sigframe = {
481 SIGTRAMP_FRAME,
482 1,
483 {
484 /* mov 119,d0 */
485 { 0x2c, -1 },
486 { 0x77, -1 },
487 { 0x00, -1 },
488 /* syscall 0 */
489 { 0xf0, -1 },
490 { 0xe0, -1 },
491 { TRAMP_SENTINEL_INSN, -1 }
492 },
493 am33_linux_sigframe_cache_init
494};
495
496static const struct tramp_frame am33_linux_rt_sigframe = {
497 SIGTRAMP_FRAME,
498 1,
499 {
500 /* mov 173,d0 */
501 { 0x2c, -1 },
502 { 0xad, -1 },
503 { 0x00, -1 },
504 /* syscall 0 */
505 { 0xf0, -1 },
506 { 0xe0, -1 },
507 { TRAMP_SENTINEL_INSN, -1 }
508 },
509 am33_linux_sigframe_cache_init
510};
511
512/* Relevant struct definitions for signal handling...
513
514From arch/mn10300/kernel/sigframe.h:
515
516struct sigframe
517{
518 void (*pretcode)(void);
519 int sig;
e84605cd 520 struct sigcontext *psc;
f9ec92b6
KB		 521 struct sigcontext sc;
522 struct fpucontext fpuctx;
523 unsigned long extramask[_NSIG_WORDS-1];
524 char retcode[8];
525};
526
527struct rt_sigframe
528{
529 void (*pretcode)(void);
530 int sig;
531 struct siginfo *pinfo;
532 void *puc;
533 struct siginfo info;
534 struct ucontext uc;
535 struct fpucontext fpuctx;
536 char retcode[8];
537};
538
539From include/asm-mn10300/ucontext.h:
540
541struct ucontext {
542 unsigned long uc_flags;
543 struct ucontext *uc_link;
544 stack_t uc_stack;
545 struct sigcontext uc_mcontext;
546 sigset_t uc_sigmask;
547};
548
549From include/asm-mn10300/sigcontext.h:
550
551struct fpucontext {
552 unsigned long fs[32];
553 unsigned long fpcr;
554};
555
556struct sigcontext {
557 unsigned long d0;
558 unsigned long d1;
559 unsigned long d2;
560 unsigned long d3;
561 unsigned long a0;
562 unsigned long a1;
563 unsigned long a2;
564 unsigned long a3;
565 unsigned long e0;
566 unsigned long e1;
567 unsigned long e2;
568 unsigned long e3;
569 unsigned long e4;
570 unsigned long e5;
571 unsigned long e6;
572 unsigned long e7;
573 unsigned long lar;
574 unsigned long lir;
575 unsigned long mdr;
576 unsigned long mcvf;
577 unsigned long mcrl;
578 unsigned long mcrh;
579 unsigned long mdrq;
580 unsigned long sp;
581 unsigned long epsw;
582 unsigned long pc;
583 struct fpucontext *fpucontext;
584 unsigned long oldmask;
585}; */
586
587
588#define AM33_SIGCONTEXT_D0 0
589#define AM33_SIGCONTEXT_D1 4
590#define AM33_SIGCONTEXT_D2 8
591#define AM33_SIGCONTEXT_D3 12
592#define AM33_SIGCONTEXT_A0 16
593#define AM33_SIGCONTEXT_A1 20
594#define AM33_SIGCONTEXT_A2 24
595#define AM33_SIGCONTEXT_A3 28
596#define AM33_SIGCONTEXT_E0 32
597#define AM33_SIGCONTEXT_E1 36
598#define AM33_SIGCONTEXT_E2 40
599#define AM33_SIGCONTEXT_E3 44
600#define AM33_SIGCONTEXT_E4 48
601#define AM33_SIGCONTEXT_E5 52
602#define AM33_SIGCONTEXT_E6 56
603#define AM33_SIGCONTEXT_E7 60
604#define AM33_SIGCONTEXT_LAR 64
605#define AM33_SIGCONTEXT_LIR 68
606#define AM33_SIGCONTEXT_MDR 72
607#define AM33_SIGCONTEXT_MCVF 76
608#define AM33_SIGCONTEXT_MCRL 80
609#define AM33_SIGCONTEXT_MCRH 84
610#define AM33_SIGCONTEXT_MDRQ 88
611#define AM33_SIGCONTEXT_SP 92
612#define AM33_SIGCONTEXT_EPSW 96
613#define AM33_SIGCONTEXT_PC 100
614#define AM33_SIGCONTEXT_FPUCONTEXT 104
615
616
617static void
618am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 619 struct frame_info *this_frame,
f9ec92b6
KB		 620 struct trad_frame_cache *this_cache,
621 CORE_ADDR func)
622{
623 CORE_ADDR sc_base, fpubase;
624 int i;
611889b1 625
5366653e 626 sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
f9ec92b6
KB		 627 if (self == &am33_linux_sigframe)
628 {
629 sc_base += 8;
5366653e 630 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 631 }
632 else
633 {
634 sc_base += 12;
5366653e 635 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 636 sc_base += 20;
637 }
638
639 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
640 sc_base + AM33_SIGCONTEXT_D0);
641 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
642 sc_base + AM33_SIGCONTEXT_D1);
643 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
644 sc_base + AM33_SIGCONTEXT_D2);
645 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
646 sc_base + AM33_SIGCONTEXT_D3);
647
648 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
649 sc_base + AM33_SIGCONTEXT_A0);
650 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
651 sc_base + AM33_SIGCONTEXT_A1);
652 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
653 sc_base + AM33_SIGCONTEXT_A2);
654 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
655 sc_base + AM33_SIGCONTEXT_A3);
656
657 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
658 sc_base + AM33_SIGCONTEXT_E0);
659 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
660 sc_base + AM33_SIGCONTEXT_E1);
661 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
662 sc_base + AM33_SIGCONTEXT_E2);
663 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
664 sc_base + AM33_SIGCONTEXT_E3);
665 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
666 sc_base + AM33_SIGCONTEXT_E4);
667 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
668 sc_base + AM33_SIGCONTEXT_E5);
669 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
670 sc_base + AM33_SIGCONTEXT_E6);
671 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
672 sc_base + AM33_SIGCONTEXT_E7);
673
674 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
675 sc_base + AM33_SIGCONTEXT_LAR);
676 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
677 sc_base + AM33_SIGCONTEXT_LIR);
678 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
679 sc_base + AM33_SIGCONTEXT_MDR);
680 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
681 sc_base + AM33_SIGCONTEXT_MCVF);
682 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
683 sc_base + AM33_SIGCONTEXT_MCRL);
684 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
685 sc_base + AM33_SIGCONTEXT_MDRQ);
686
687 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
688 sc_base + AM33_SIGCONTEXT_SP);
689 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
690 sc_base + AM33_SIGCONTEXT_EPSW);
691 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
692 sc_base + AM33_SIGCONTEXT_PC);
693
5366653e 694 fpubase = get_frame_memory_unsigned (this_frame,
025bb325
MS		 695 sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
696 4);
f9ec92b6
KB		 697 if (fpubase)
698 {
699 for (i = 0; i < 32; i++)
700 {
701 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
702 fpubase + 4 * i);
703 }
704 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
705 }
706
707 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
708}
709\f
155bd5d1 710/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 711 Now's our chance to register our corefile handling. */
712
713static void
a5ee0f0c 714am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
611889b1 715{
a5ee0f0c
PA		 716 linux_init_abi (info, gdbarch);
717
611889b1
KB		 718 set_gdbarch_regset_from_core_section (gdbarch,
719 am33_regset_from_core_section);
696cc4a6 720 set_solib_svr4_fetch_link_map_offsets
cf1f553f 721 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 722
723 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
724 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 725}
726
63807e1d
PA		 727/* Provide a prototype to silence -Wmissing-prototypes. */
728extern initialize_file_ftype _initialize_mn10300_linux_tdep;
729
611889b1
KB		 730void
731_initialize_mn10300_linux_tdep (void)
732{
733 gdbarch_register_osabi (bfd_arch_mn10300, 0,
734 GDB_OSABI_LINUX, am33_linux_init_osabi);
735}
736
GDB Binutils - Deliverables
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