Commit | Line | Data |
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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
6aba47ca | 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
0fb0cc75 | 4 | 2007, 2008, 2009 Free Software Foundation, Inc. |
342ee437 MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 20 | |
342ee437 MS |
21 | #include "defs.h" |
22 | #include "arch-utils.h" | |
23 | #include "dis-asm.h" | |
24 | #include "gdbtypes.h" | |
25 | #include "regcache.h" | |
26 | #include "gdb_string.h" | |
27 | #include "gdb_assert.h" | |
28 | #include "gdbcore.h" /* for write_memory_unsigned_integer */ | |
29 | #include "value.h" | |
30 | #include "gdbtypes.h" | |
31 | #include "frame.h" | |
32 | #include "frame-unwind.h" | |
33 | #include "frame-base.h" | |
342ee437 MS |
34 | #include "symtab.h" |
35 | #include "dwarf2-frame.h" | |
697e3bc9 | 36 | #include "osabi.h" |
ee3a2f01 | 37 | #include "infcall.h" |
6c02c64c | 38 | #include "prologue-value.h" |
effa26a9 | 39 | #include "target.h" |
342ee437 MS |
40 | |
41 | #include "mn10300-tdep.h" | |
42 | ||
6c02c64c KB |
43 | |
44 | /* The am33-2 has 64 registers. */ | |
45 | #define MN10300_MAX_NUM_REGS 64 | |
46 | ||
47 | /* This structure holds the results of a prologue analysis. */ | |
48 | struct mn10300_prologue | |
49 | { | |
d80b854b UW |
50 | /* The architecture for which we generated this prologue info. */ |
51 | struct gdbarch *gdbarch; | |
52 | ||
6c02c64c KB |
53 | /* The offset from the frame base to the stack pointer --- always |
54 | zero or negative. | |
55 | ||
56 | Calling this a "size" is a bit misleading, but given that the | |
57 | stack grows downwards, using offsets for everything keeps one | |
58 | from going completely sign-crazy: you never change anything's | |
59 | sign for an ADD instruction; always change the second operand's | |
60 | sign for a SUB instruction; and everything takes care of | |
61 | itself. */ | |
62 | int frame_size; | |
63 | ||
64 | /* Non-zero if this function has initialized the frame pointer from | |
65 | the stack pointer, zero otherwise. */ | |
66 | int has_frame_ptr; | |
67 | ||
68 | /* If has_frame_ptr is non-zero, this is the offset from the frame | |
69 | base to where the frame pointer points. This is always zero or | |
70 | negative. */ | |
71 | int frame_ptr_offset; | |
72 | ||
73 | /* The address of the first instruction at which the frame has been | |
74 | set up and the arguments are where the debug info says they are | |
75 | --- as best as we can tell. */ | |
76 | CORE_ADDR prologue_end; | |
77 | ||
78 | /* reg_offset[R] is the offset from the CFA at which register R is | |
79 | saved, or 1 if register R has not been saved. (Real values are | |
80 | always zero or negative.) */ | |
81 | int reg_offset[MN10300_MAX_NUM_REGS]; | |
82 | }; | |
83 | ||
342ee437 MS |
84 | |
85 | /* Compute the alignment required by a type. */ | |
86 | ||
87 | static int | |
88 | mn10300_type_align (struct type *type) | |
89 | { | |
90 | int i, align = 1; | |
91 | ||
92 | switch (TYPE_CODE (type)) | |
93 | { | |
94 | case TYPE_CODE_INT: | |
95 | case TYPE_CODE_ENUM: | |
96 | case TYPE_CODE_SET: | |
97 | case TYPE_CODE_RANGE: | |
98 | case TYPE_CODE_CHAR: | |
99 | case TYPE_CODE_BOOL: | |
100 | case TYPE_CODE_FLT: | |
101 | case TYPE_CODE_PTR: | |
102 | case TYPE_CODE_REF: | |
103 | return TYPE_LENGTH (type); | |
104 | ||
105 | case TYPE_CODE_COMPLEX: | |
106 | return TYPE_LENGTH (type) / 2; | |
107 | ||
108 | case TYPE_CODE_STRUCT: | |
109 | case TYPE_CODE_UNION: | |
110 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
111 | { | |
112 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
113 | while (align < falign) | |
114 | align <<= 1; | |
115 | } | |
116 | return align; | |
117 | ||
118 | case TYPE_CODE_ARRAY: | |
119 | /* HACK! Structures containing arrays, even small ones, are not | |
120 | elligible for returning in registers. */ | |
121 | return 256; | |
122 | ||
123 | case TYPE_CODE_TYPEDEF: | |
124 | return mn10300_type_align (check_typedef (type)); | |
125 | ||
126 | default: | |
127 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
128 | } | |
129 | } | |
130 | ||
342ee437 | 131 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 132 | static int |
99fe5f9d | 133 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
134 | { |
135 | /* Structures bigger than a pair of words can't be returned in | |
136 | registers. */ | |
137 | if (TYPE_LENGTH (type) > 8) | |
138 | return 1; | |
139 | ||
140 | switch (TYPE_CODE (type)) | |
141 | { | |
142 | case TYPE_CODE_STRUCT: | |
143 | case TYPE_CODE_UNION: | |
144 | /* Structures with a single field are handled as the field | |
145 | itself. */ | |
146 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 147 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
148 | |
149 | /* Structures with word or double-word size are passed in memory, as | |
150 | long as they require at least word alignment. */ | |
151 | if (mn10300_type_align (type) >= 4) | |
152 | return 0; | |
153 | ||
154 | return 1; | |
155 | ||
156 | /* Arrays are addressable, so they're never returned in | |
157 | registers. This condition can only hold when the array is | |
158 | the only field of a struct or union. */ | |
159 | case TYPE_CODE_ARRAY: | |
160 | return 1; | |
161 | ||
162 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 163 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
164 | |
165 | default: | |
166 | return 0; | |
167 | } | |
168 | } | |
169 | ||
342ee437 | 170 | static void |
99fe5f9d | 171 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
172 | struct regcache *regcache, const void *valbuf) |
173 | { | |
342ee437 MS |
174 | int len = TYPE_LENGTH (type); |
175 | int reg, regsz; | |
176 | ||
177 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
178 | reg = 4; | |
179 | else | |
180 | reg = 0; | |
181 | ||
182 | regsz = register_size (gdbarch, reg); | |
183 | ||
184 | if (len <= regsz) | |
185 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
186 | else if (len <= 2 * regsz) | |
187 | { | |
188 | regcache_raw_write (regcache, reg, valbuf); | |
189 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
190 | regcache_raw_write_part (regcache, reg+1, 0, | |
191 | len - regsz, (char *) valbuf + regsz); | |
192 | } | |
193 | else | |
194 | internal_error (__FILE__, __LINE__, | |
195 | _("Cannot store return value %d bytes long."), len); | |
196 | } | |
197 | ||
342ee437 | 198 | static void |
99fe5f9d | 199 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
200 | struct regcache *regcache, void *valbuf) |
201 | { | |
342ee437 MS |
202 | char buf[MAX_REGISTER_SIZE]; |
203 | int len = TYPE_LENGTH (type); | |
204 | int reg, regsz; | |
205 | ||
206 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
207 | reg = 4; | |
208 | else | |
209 | reg = 0; | |
210 | ||
211 | regsz = register_size (gdbarch, reg); | |
212 | if (len <= regsz) | |
213 | { | |
214 | regcache_raw_read (regcache, reg, buf); | |
215 | memcpy (valbuf, buf, len); | |
216 | } | |
217 | else if (len <= 2 * regsz) | |
218 | { | |
219 | regcache_raw_read (regcache, reg, buf); | |
220 | memcpy (valbuf, buf, regsz); | |
221 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
222 | regcache_raw_read (regcache, reg + 1, buf); | |
223 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
224 | } | |
225 | else | |
226 | internal_error (__FILE__, __LINE__, | |
227 | _("Cannot extract return value %d bytes long."), len); | |
228 | } | |
229 | ||
99fe5f9d KB |
230 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
231 | should be returned. If it is supposed to be returned in registers, | |
232 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
233 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
234 | from WRITEBUF into REGCACHE. */ | |
235 | ||
236 | static enum return_value_convention | |
c055b101 CV |
237 | mn10300_return_value (struct gdbarch *gdbarch, struct type *func_type, |
238 | struct type *type, struct regcache *regcache, | |
239 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
99fe5f9d KB |
240 | { |
241 | if (mn10300_use_struct_convention (type)) | |
242 | return RETURN_VALUE_STRUCT_CONVENTION; | |
243 | ||
244 | if (readbuf) | |
245 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
246 | if (writebuf) | |
247 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
248 | ||
249 | return RETURN_VALUE_REGISTER_CONVENTION; | |
250 | } | |
251 | ||
342ee437 MS |
252 | static char * |
253 | register_name (int reg, char **regs, long sizeof_regs) | |
254 | { | |
255 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
256 | return NULL; | |
257 | else | |
258 | return regs[reg]; | |
259 | } | |
260 | ||
261 | static const char * | |
d93859e2 | 262 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
263 | { |
264 | static char *regs[] = | |
265 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
266 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
267 | "", "", "", "", "", "", "", "", | |
268 | "", "", "", "", "", "", "", "fp" | |
269 | }; | |
270 | return register_name (reg, regs, sizeof regs); | |
271 | } | |
272 | ||
273 | ||
274 | static const char * | |
d93859e2 | 275 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
276 | { |
277 | static char *regs[] = | |
278 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
279 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
280 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
281 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
282 | }; | |
283 | return register_name (reg, regs, sizeof regs); | |
284 | } | |
285 | ||
4640dd91 | 286 | static const char * |
d93859e2 | 287 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 KB |
288 | { |
289 | static char *regs[] = | |
290 | { | |
291 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
292 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
293 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
294 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
295 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
296 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
297 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
298 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
299 | }; | |
300 | return register_name (reg, regs, sizeof regs); | |
301 | } | |
342ee437 MS |
302 | |
303 | static struct type * | |
304 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
305 | { | |
0dfff4cb | 306 | return builtin_type (gdbarch)->builtin_int; |
342ee437 MS |
307 | } |
308 | ||
309 | static CORE_ADDR | |
61a1198a | 310 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 311 | { |
61a1198a UW |
312 | ULONGEST val; |
313 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
314 | return val; | |
342ee437 MS |
315 | } |
316 | ||
317 | static void | |
61a1198a | 318 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 319 | { |
61a1198a | 320 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
321 | } |
322 | ||
323 | /* The breakpoint instruction must be the same size as the smallest | |
324 | instruction in the instruction set. | |
325 | ||
326 | The Matsushita mn10x00 processors have single byte instructions | |
327 | so we need a single byte breakpoint. Matsushita hasn't defined | |
328 | one, so we defined it ourselves. */ | |
329 | ||
330 | const static unsigned char * | |
67d57894 MD |
331 | mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, |
332 | int *bp_size) | |
342ee437 MS |
333 | { |
334 | static char breakpoint[] = {0xff}; | |
335 | *bp_size = 1; | |
336 | return breakpoint; | |
337 | } | |
338 | ||
6c02c64c KB |
339 | /* Model the semantics of pushing a register onto the stack. This |
340 | is a helper function for mn10300_analyze_prologue, below. */ | |
341 | static void | |
342 | push_reg (pv_t *regs, struct pv_area *stack, int regnum) | |
343 | { | |
344 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
345 | pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]); | |
346 | } | |
347 | ||
348 | /* Translate an "r" register number extracted from an instruction encoding | |
349 | into a GDB register number. Adapted from a simulator function | |
350 | of the same name; see am33.igen. */ | |
351 | static int | |
352 | translate_rreg (int rreg) | |
353 | { | |
354 | /* The higher register numbers actually correspond to the | |
355 | basic machine's address and data registers. */ | |
356 | if (rreg > 7 && rreg < 12) | |
357 | return E_A0_REGNUM + rreg - 8; | |
358 | else if (rreg > 11 && rreg < 16) | |
359 | return E_D0_REGNUM + rreg - 12; | |
360 | else | |
361 | return E_E0_REGNUM + rreg; | |
362 | } | |
363 | ||
364 | /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan. | |
9cacebf5 | 365 | |
6c02c64c KB |
366 | If VALUE is a saved register, ADDR says it was saved at a constant |
367 | offset from the frame base, and SIZE indicates that the whole | |
368 | register was saved, record its offset in RESULT_UNTYPED. */ | |
9cacebf5 | 369 | static void |
6c02c64c | 370 | check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) |
9cacebf5 | 371 | { |
6c02c64c | 372 | struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped; |
9cacebf5 | 373 | |
6c02c64c KB |
374 | if (value.kind == pvk_register |
375 | && value.k == 0 | |
376 | && pv_is_register (addr, E_SP_REGNUM) | |
d80b854b | 377 | && size == register_size (result->gdbarch, value.reg)) |
6c02c64c KB |
378 | result->reg_offset[value.reg] = addr.k; |
379 | } | |
9cacebf5 | 380 | |
6c02c64c KB |
381 | /* Analyze the prologue to determine where registers are saved, |
382 | the end of the prologue, etc. The result of this analysis is | |
383 | returned in RESULT. See struct mn10300_prologue above for more | |
384 | information. */ | |
385 | static void | |
386 | mn10300_analyze_prologue (struct gdbarch *gdbarch, | |
387 | CORE_ADDR start_pc, CORE_ADDR limit_pc, | |
388 | struct mn10300_prologue *result) | |
389 | { | |
390 | CORE_ADDR pc, next_pc; | |
391 | int rn; | |
392 | pv_t regs[MN10300_MAX_NUM_REGS]; | |
393 | struct pv_area *stack; | |
394 | struct cleanup *back_to; | |
395 | CORE_ADDR after_last_frame_setup_insn = start_pc; | |
396 | int am33_mode = AM33_MODE (gdbarch); | |
397 | ||
398 | memset (result, 0, sizeof (*result)); | |
d80b854b | 399 | result->gdbarch = gdbarch; |
9cacebf5 | 400 | |
6c02c64c | 401 | for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++) |
4640dd91 | 402 | { |
6c02c64c KB |
403 | regs[rn] = pv_register (rn, 0); |
404 | result->reg_offset[rn] = 1; | |
4640dd91 | 405 | } |
55f960e1 | 406 | stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
6c02c64c KB |
407 | back_to = make_cleanup_free_pv_area (stack); |
408 | ||
409 | /* The typical call instruction will have saved the return address on the | |
410 | stack. Space for the return address has already been preallocated in | |
411 | the caller's frame. It's possible, such as when using -mrelax with gcc | |
412 | that other registers were saved as well. If this happens, we really | |
413 | have no chance of deciphering the frame. DWARF info can save the day | |
414 | when this happens. */ | |
415 | pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]); | |
416 | ||
417 | pc = start_pc; | |
418 | while (pc < limit_pc) | |
4640dd91 | 419 | { |
6c02c64c KB |
420 | int status; |
421 | gdb_byte instr[2]; | |
4640dd91 | 422 | |
6c02c64c KB |
423 | /* Instructions can be as small as one byte; however, we usually |
424 | need at least two bytes to do the decoding, so fetch that many | |
425 | to begin with. */ | |
426 | status = target_read_memory (pc, instr, 2); | |
427 | if (status != 0) | |
428 | break; | |
4640dd91 | 429 | |
6c02c64c KB |
430 | /* movm [regs], sp */ |
431 | if (instr[0] == 0xcf) | |
4640dd91 | 432 | { |
6c02c64c KB |
433 | gdb_byte save_mask; |
434 | ||
435 | save_mask = instr[1]; | |
436 | ||
437 | if ((save_mask & movm_exreg0_bit) && am33_mode) | |
438 | { | |
439 | push_reg (regs, stack, E_E2_REGNUM); | |
440 | push_reg (regs, stack, E_E3_REGNUM); | |
441 | } | |
442 | if ((save_mask & movm_exreg1_bit) && am33_mode) | |
4640dd91 | 443 | { |
6c02c64c KB |
444 | push_reg (regs, stack, E_E4_REGNUM); |
445 | push_reg (regs, stack, E_E5_REGNUM); | |
446 | push_reg (regs, stack, E_E6_REGNUM); | |
447 | push_reg (regs, stack, E_E7_REGNUM); | |
4640dd91 | 448 | } |
6c02c64c KB |
449 | if ((save_mask & movm_exother_bit) && am33_mode) |
450 | { | |
451 | push_reg (regs, stack, E_E0_REGNUM); | |
452 | push_reg (regs, stack, E_E1_REGNUM); | |
453 | push_reg (regs, stack, E_MDRQ_REGNUM); | |
454 | push_reg (regs, stack, E_MCRH_REGNUM); | |
455 | push_reg (regs, stack, E_MCRL_REGNUM); | |
456 | push_reg (regs, stack, E_MCVF_REGNUM); | |
457 | } | |
458 | if (save_mask & movm_d2_bit) | |
459 | push_reg (regs, stack, E_D2_REGNUM); | |
460 | if (save_mask & movm_d3_bit) | |
461 | push_reg (regs, stack, E_D3_REGNUM); | |
462 | if (save_mask & movm_a2_bit) | |
463 | push_reg (regs, stack, E_A2_REGNUM); | |
464 | if (save_mask & movm_a3_bit) | |
465 | push_reg (regs, stack, E_A3_REGNUM); | |
466 | if (save_mask & movm_other_bit) | |
467 | { | |
468 | push_reg (regs, stack, E_D0_REGNUM); | |
469 | push_reg (regs, stack, E_D1_REGNUM); | |
470 | push_reg (regs, stack, E_A0_REGNUM); | |
471 | push_reg (regs, stack, E_A1_REGNUM); | |
472 | push_reg (regs, stack, E_MDR_REGNUM); | |
473 | push_reg (regs, stack, E_LIR_REGNUM); | |
474 | push_reg (regs, stack, E_LAR_REGNUM); | |
475 | /* The `other' bit leaves a blank area of four bytes at | |
476 | the beginning of its block of saved registers, making | |
477 | it 32 bytes long in total. */ | |
478 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
479 | } | |
480 | ||
481 | pc += 2; | |
482 | after_last_frame_setup_insn = pc; | |
4640dd91 | 483 | } |
6c02c64c KB |
484 | /* mov sp, aN */ |
485 | else if ((instr[0] & 0xfc) == 0x3c) | |
486 | { | |
487 | int aN = instr[0] & 0x03; | |
4640dd91 | 488 | |
6c02c64c | 489 | regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM]; |
4640dd91 | 490 | |
6c02c64c KB |
491 | pc += 1; |
492 | if (aN == 3) | |
493 | after_last_frame_setup_insn = pc; | |
494 | } | |
495 | /* mov aM, aN */ | |
496 | else if ((instr[0] & 0xf0) == 0x90 | |
497 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
498 | { | |
499 | int aN = instr[0] & 0x03; | |
500 | int aM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 501 | |
6c02c64c | 502 | regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 503 | |
6c02c64c KB |
504 | pc += 1; |
505 | } | |
506 | /* mov dM, dN */ | |
507 | else if ((instr[0] & 0xf0) == 0x80 | |
508 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
509 | { | |
510 | int dN = instr[0] & 0x03; | |
511 | int dM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 512 | |
6c02c64c | 513 | regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 514 | |
6c02c64c KB |
515 | pc += 1; |
516 | } | |
517 | /* mov aM, dN */ | |
518 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0) | |
519 | { | |
520 | int dN = instr[1] & 0x03; | |
521 | int aM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 522 | |
6c02c64c | 523 | regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 524 | |
6c02c64c KB |
525 | pc += 2; |
526 | } | |
527 | /* mov dM, aN */ | |
528 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0) | |
529 | { | |
530 | int aN = instr[1] & 0x03; | |
531 | int dM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 532 | |
6c02c64c | 533 | regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 534 | |
6c02c64c KB |
535 | pc += 2; |
536 | } | |
537 | /* add imm8, SP */ | |
538 | else if (instr[0] == 0xf8 && instr[1] == 0xfe) | |
539 | { | |
540 | gdb_byte buf[1]; | |
541 | LONGEST imm8; | |
9cacebf5 | 542 | |
9cacebf5 | 543 | |
6c02c64c KB |
544 | status = target_read_memory (pc + 2, buf, 1); |
545 | if (status != 0) | |
546 | break; | |
9cacebf5 | 547 | |
6c02c64c KB |
548 | imm8 = extract_signed_integer (buf, 1); |
549 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8); | |
9cacebf5 | 550 | |
6c02c64c KB |
551 | pc += 3; |
552 | /* Stack pointer adjustments are frame related. */ | |
553 | after_last_frame_setup_insn = pc; | |
554 | } | |
555 | /* add imm16, SP */ | |
556 | else if (instr[0] == 0xfa && instr[1] == 0xfe) | |
557 | { | |
558 | gdb_byte buf[2]; | |
559 | LONGEST imm16; | |
9cacebf5 | 560 | |
6c02c64c KB |
561 | status = target_read_memory (pc + 2, buf, 2); |
562 | if (status != 0) | |
563 | break; | |
9cacebf5 | 564 | |
6c02c64c KB |
565 | imm16 = extract_signed_integer (buf, 2); |
566 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16); | |
9cacebf5 | 567 | |
6c02c64c KB |
568 | pc += 4; |
569 | /* Stack pointer adjustments are frame related. */ | |
570 | after_last_frame_setup_insn = pc; | |
571 | } | |
572 | /* add imm32, SP */ | |
573 | else if (instr[0] == 0xfc && instr[1] == 0xfe) | |
574 | { | |
575 | gdb_byte buf[4]; | |
576 | LONGEST imm32; | |
9cacebf5 | 577 | |
6c02c64c KB |
578 | status = target_read_memory (pc + 2, buf, 4); |
579 | if (status != 0) | |
580 | break; | |
9cacebf5 | 581 | |
9cacebf5 | 582 | |
6c02c64c KB |
583 | imm32 = extract_signed_integer (buf, 4); |
584 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32); | |
9cacebf5 | 585 | |
6c02c64c KB |
586 | pc += 6; |
587 | /* Stack pointer adjustments are frame related. */ | |
588 | after_last_frame_setup_insn = pc; | |
589 | } | |
590 | /* add imm8, aN */ | |
591 | else if ((instr[0] & 0xfc) == 0x20) | |
592 | { | |
593 | int aN; | |
594 | LONGEST imm8; | |
9cacebf5 | 595 | |
6c02c64c KB |
596 | aN = instr[0] & 0x03; |
597 | imm8 = extract_signed_integer (&instr[1], 1); | |
9cacebf5 | 598 | |
6c02c64c KB |
599 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
600 | imm8); | |
9cacebf5 | 601 | |
6c02c64c KB |
602 | pc += 2; |
603 | } | |
604 | /* add imm16, aN */ | |
605 | else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0) | |
606 | { | |
607 | int aN; | |
608 | LONGEST imm16; | |
609 | gdb_byte buf[2]; | |
9cacebf5 | 610 | |
6c02c64c | 611 | aN = instr[1] & 0x03; |
9cacebf5 | 612 | |
6c02c64c KB |
613 | status = target_read_memory (pc + 2, buf, 2); |
614 | if (status != 0) | |
615 | break; | |
9cacebf5 | 616 | |
9cacebf5 | 617 | |
6c02c64c | 618 | imm16 = extract_signed_integer (buf, 2); |
9cacebf5 | 619 | |
6c02c64c KB |
620 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
621 | imm16); | |
9cacebf5 | 622 | |
6c02c64c KB |
623 | pc += 4; |
624 | } | |
625 | /* add imm32, aN */ | |
626 | else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0) | |
627 | { | |
628 | int aN; | |
629 | LONGEST imm32; | |
630 | gdb_byte buf[4]; | |
9cacebf5 | 631 | |
6c02c64c | 632 | aN = instr[1] & 0x03; |
9cacebf5 | 633 | |
6c02c64c KB |
634 | status = target_read_memory (pc + 2, buf, 4); |
635 | if (status != 0) | |
636 | break; | |
9cacebf5 | 637 | |
6c02c64c | 638 | imm32 = extract_signed_integer (buf, 2); |
9cacebf5 | 639 | |
6c02c64c KB |
640 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
641 | imm32); | |
642 | pc += 6; | |
643 | } | |
644 | /* fmov fsM, (rN) */ | |
645 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30) | |
646 | { | |
647 | int fsM, sM, Y, rN; | |
648 | gdb_byte buf[1]; | |
9cacebf5 | 649 | |
6c02c64c | 650 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 651 | |
6c02c64c KB |
652 | status = target_read_memory (pc + 2, buf, 1); |
653 | if (status != 0) | |
654 | break; | |
9cacebf5 | 655 | |
6c02c64c KB |
656 | sM = (buf[0] & 0xf0) >> 4; |
657 | rN = buf[0] & 0x0f; | |
658 | fsM = (Y << 4) | sM; | |
9cacebf5 | 659 | |
6c02c64c KB |
660 | pv_area_store (stack, regs[translate_rreg (rN)], 4, |
661 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 662 | |
6c02c64c KB |
663 | pc += 3; |
664 | } | |
665 | /* fmov fsM, (sp) */ | |
666 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34) | |
667 | { | |
668 | int fsM, sM, Y; | |
669 | gdb_byte buf[1]; | |
9cacebf5 | 670 | |
6c02c64c | 671 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 672 | |
6c02c64c KB |
673 | status = target_read_memory (pc + 2, buf, 1); |
674 | if (status != 0) | |
675 | break; | |
9cacebf5 | 676 | |
6c02c64c KB |
677 | sM = (buf[0] & 0xf0) >> 4; |
678 | fsM = (Y << 4) | sM; | |
9cacebf5 | 679 | |
6c02c64c KB |
680 | pv_area_store (stack, regs[E_SP_REGNUM], 4, |
681 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 682 | |
6c02c64c KB |
683 | pc += 3; |
684 | } | |
685 | /* fmov fsM, (rN, rI) */ | |
686 | else if (instr[0] == 0xfb && instr[1] == 0x37) | |
687 | { | |
688 | int fsM, sM, Z, rN, rI; | |
689 | gdb_byte buf[2]; | |
9cacebf5 | 690 | |
9cacebf5 | 691 | |
6c02c64c KB |
692 | status = target_read_memory (pc + 2, buf, 2); |
693 | if (status != 0) | |
694 | break; | |
83845630 | 695 | |
6c02c64c KB |
696 | rI = (buf[0] & 0xf0) >> 4; |
697 | rN = buf[0] & 0x0f; | |
698 | sM = (buf[1] & 0xf0) >> 4; | |
699 | Z = (buf[1] & 0x02) >> 1; | |
700 | fsM = (Z << 4) | sM; | |
83845630 | 701 | |
6c02c64c KB |
702 | pv_area_store (stack, |
703 | pv_add (regs[translate_rreg (rN)], | |
704 | regs[translate_rreg (rI)]), | |
705 | 4, regs[E_FS0_REGNUM + fsM]); | |
83845630 | 706 | |
6c02c64c KB |
707 | pc += 4; |
708 | } | |
709 | /* fmov fsM, (d8, rN) */ | |
710 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30) | |
4640dd91 | 711 | { |
6c02c64c KB |
712 | int fsM, sM, Y, rN; |
713 | LONGEST d8; | |
714 | gdb_byte buf[2]; | |
715 | ||
716 | Y = (instr[1] & 0x02) >> 1; | |
717 | ||
718 | status = target_read_memory (pc + 2, buf, 2); | |
719 | if (status != 0) | |
720 | break; | |
721 | ||
722 | sM = (buf[0] & 0xf0) >> 4; | |
723 | rN = buf[0] & 0x0f; | |
724 | fsM = (Y << 4) | sM; | |
725 | d8 = extract_signed_integer (&buf[1], 1); | |
726 | ||
727 | pv_area_store (stack, | |
728 | pv_add_constant (regs[translate_rreg (rN)], d8), | |
729 | 4, regs[E_FS0_REGNUM + fsM]); | |
730 | ||
731 | pc += 4; | |
4640dd91 | 732 | } |
6c02c64c KB |
733 | /* fmov fsM, (d24, rN) */ |
734 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30) | |
83845630 | 735 | { |
6c02c64c KB |
736 | int fsM, sM, Y, rN; |
737 | LONGEST d24; | |
738 | gdb_byte buf[4]; | |
739 | ||
740 | Y = (instr[1] & 0x02) >> 1; | |
741 | ||
742 | status = target_read_memory (pc + 2, buf, 4); | |
83845630 | 743 | if (status != 0) |
6c02c64c KB |
744 | break; |
745 | ||
746 | sM = (buf[0] & 0xf0) >> 4; | |
747 | rN = buf[0] & 0x0f; | |
748 | fsM = (Y << 4) | sM; | |
749 | d24 = extract_signed_integer (&buf[1], 3); | |
750 | ||
751 | pv_area_store (stack, | |
752 | pv_add_constant (regs[translate_rreg (rN)], d24), | |
753 | 4, regs[E_FS0_REGNUM + fsM]); | |
754 | ||
755 | pc += 6; | |
83845630 | 756 | } |
6c02c64c KB |
757 | /* fmov fsM, (d32, rN) */ |
758 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30) | |
759 | { | |
760 | int fsM, sM, Y, rN; | |
761 | LONGEST d32; | |
762 | gdb_byte buf[5]; | |
4640dd91 | 763 | |
6c02c64c KB |
764 | Y = (instr[1] & 0x02) >> 1; |
765 | ||
766 | status = target_read_memory (pc + 2, buf, 5); | |
767 | if (status != 0) | |
768 | break; | |
769 | ||
770 | sM = (buf[0] & 0xf0) >> 4; | |
771 | rN = buf[0] & 0x0f; | |
772 | fsM = (Y << 4) | sM; | |
773 | d32 = extract_signed_integer (&buf[1], 4); | |
9cacebf5 | 774 | |
6c02c64c KB |
775 | pv_area_store (stack, |
776 | pv_add_constant (regs[translate_rreg (rN)], d32), | |
777 | 4, regs[E_FS0_REGNUM + fsM]); | |
778 | ||
779 | pc += 7; | |
780 | } | |
781 | /* fmov fsM, (d8, SP) */ | |
782 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34) | |
9cacebf5 | 783 | { |
6c02c64c KB |
784 | int fsM, sM, Y; |
785 | LONGEST d8; | |
786 | gdb_byte buf[2]; | |
787 | ||
788 | Y = (instr[1] & 0x02) >> 1; | |
789 | ||
790 | status = target_read_memory (pc + 2, buf, 2); | |
791 | if (status != 0) | |
792 | break; | |
793 | ||
794 | sM = (buf[0] & 0xf0) >> 4; | |
795 | fsM = (Y << 4) | sM; | |
796 | d8 = extract_signed_integer (&buf[1], 1); | |
797 | ||
798 | pv_area_store (stack, | |
799 | pv_add_constant (regs[E_SP_REGNUM], d8), | |
800 | 4, regs[E_FS0_REGNUM + fsM]); | |
801 | ||
802 | pc += 4; | |
9cacebf5 | 803 | } |
6c02c64c KB |
804 | /* fmov fsM, (d24, SP) */ |
805 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34) | |
806 | { | |
807 | int fsM, sM, Y; | |
808 | LONGEST d24; | |
809 | gdb_byte buf[4]; | |
9cacebf5 | 810 | |
6c02c64c | 811 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 812 | |
6c02c64c KB |
813 | status = target_read_memory (pc + 2, buf, 4); |
814 | if (status != 0) | |
815 | break; | |
9cacebf5 | 816 | |
6c02c64c KB |
817 | sM = (buf[0] & 0xf0) >> 4; |
818 | fsM = (Y << 4) | sM; | |
819 | d24 = extract_signed_integer (&buf[1], 3); | |
9cacebf5 | 820 | |
6c02c64c KB |
821 | pv_area_store (stack, |
822 | pv_add_constant (regs[E_SP_REGNUM], d24), | |
823 | 4, regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 824 | |
6c02c64c KB |
825 | pc += 6; |
826 | } | |
827 | /* fmov fsM, (d32, SP) */ | |
828 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34) | |
829 | { | |
830 | int fsM, sM, Y; | |
831 | LONGEST d32; | |
832 | gdb_byte buf[5]; | |
9cacebf5 | 833 | |
6c02c64c | 834 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 835 | |
6c02c64c KB |
836 | status = target_read_memory (pc + 2, buf, 5); |
837 | if (status != 0) | |
838 | break; | |
839 | ||
840 | sM = (buf[0] & 0xf0) >> 4; | |
841 | fsM = (Y << 4) | sM; | |
842 | d32 = extract_signed_integer (&buf[1], 4); | |
843 | ||
844 | pv_area_store (stack, | |
845 | pv_add_constant (regs[E_SP_REGNUM], d32), | |
846 | 4, regs[E_FS0_REGNUM + fsM]); | |
847 | ||
848 | pc += 7; | |
849 | } | |
850 | /* fmov fsM, (rN+) */ | |
851 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31) | |
852 | { | |
853 | int fsM, sM, Y, rN, rN_regnum; | |
854 | gdb_byte buf[1]; | |
855 | ||
856 | Y = (instr[1] & 0x02) >> 1; | |
857 | ||
858 | status = target_read_memory (pc + 2, buf, 1); | |
859 | if (status != 0) | |
860 | break; | |
861 | ||
862 | sM = (buf[0] & 0xf0) >> 4; | |
863 | rN = buf[0] & 0x0f; | |
864 | fsM = (Y << 4) | sM; | |
865 | ||
866 | rN_regnum = translate_rreg (rN); | |
867 | ||
868 | pv_area_store (stack, regs[rN_regnum], 4, | |
869 | regs[E_FS0_REGNUM + fsM]); | |
870 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4); | |
871 | ||
872 | pc += 3; | |
873 | } | |
874 | /* fmov fsM, (rN+, imm8) */ | |
875 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31) | |
876 | { | |
877 | int fsM, sM, Y, rN, rN_regnum; | |
878 | LONGEST imm8; | |
879 | gdb_byte buf[2]; | |
880 | ||
881 | Y = (instr[1] & 0x02) >> 1; | |
882 | ||
883 | status = target_read_memory (pc + 2, buf, 2); | |
884 | if (status != 0) | |
885 | break; | |
886 | ||
887 | sM = (buf[0] & 0xf0) >> 4; | |
888 | rN = buf[0] & 0x0f; | |
889 | fsM = (Y << 4) | sM; | |
890 | imm8 = extract_signed_integer (&buf[1], 1); | |
891 | ||
892 | rN_regnum = translate_rreg (rN); | |
893 | ||
894 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
895 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8); | |
896 | ||
897 | pc += 4; | |
898 | } | |
899 | /* fmov fsM, (rN+, imm24) */ | |
900 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31) | |
901 | { | |
902 | int fsM, sM, Y, rN, rN_regnum; | |
903 | LONGEST imm24; | |
904 | gdb_byte buf[4]; | |
905 | ||
906 | Y = (instr[1] & 0x02) >> 1; | |
907 | ||
908 | status = target_read_memory (pc + 2, buf, 4); | |
909 | if (status != 0) | |
910 | break; | |
911 | ||
912 | sM = (buf[0] & 0xf0) >> 4; | |
913 | rN = buf[0] & 0x0f; | |
914 | fsM = (Y << 4) | sM; | |
915 | imm24 = extract_signed_integer (&buf[1], 3); | |
916 | ||
917 | rN_regnum = translate_rreg (rN); | |
918 | ||
919 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
920 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24); | |
921 | ||
922 | pc += 6; | |
923 | } | |
924 | /* fmov fsM, (rN+, imm32) */ | |
925 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31) | |
926 | { | |
927 | int fsM, sM, Y, rN, rN_regnum; | |
928 | LONGEST imm32; | |
929 | gdb_byte buf[5]; | |
930 | ||
931 | Y = (instr[1] & 0x02) >> 1; | |
932 | ||
933 | status = target_read_memory (pc + 2, buf, 5); | |
934 | if (status != 0) | |
935 | break; | |
936 | ||
937 | sM = (buf[0] & 0xf0) >> 4; | |
938 | rN = buf[0] & 0x0f; | |
939 | fsM = (Y << 4) | sM; | |
940 | imm32 = extract_signed_integer (&buf[1], 4); | |
941 | ||
942 | rN_regnum = translate_rreg (rN); | |
943 | ||
944 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
945 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32); | |
946 | ||
947 | pc += 7; | |
948 | } | |
949 | /* mov imm8, aN */ | |
950 | else if ((instr[0] & 0xf0) == 0x90) | |
951 | { | |
952 | int aN = instr[0] & 0x03; | |
953 | LONGEST imm8; | |
9cacebf5 | 954 | |
6c02c64c | 955 | imm8 = extract_signed_integer (&instr[1], 1); |
9cacebf5 | 956 | |
6c02c64c KB |
957 | regs[E_A0_REGNUM + aN] = pv_constant (imm8); |
958 | pc += 2; | |
959 | } | |
960 | /* mov imm16, aN */ | |
961 | else if ((instr[0] & 0xfc) == 0x24) | |
962 | { | |
963 | int aN = instr[0] & 0x03; | |
964 | gdb_byte buf[2]; | |
965 | LONGEST imm16; | |
966 | ||
967 | status = target_read_memory (pc + 1, buf, 2); | |
968 | if (status != 0) | |
969 | break; | |
970 | ||
971 | imm16 = extract_signed_integer (buf, 2); | |
972 | regs[E_A0_REGNUM + aN] = pv_constant (imm16); | |
973 | pc += 3; | |
974 | } | |
975 | /* mov imm32, aN */ | |
976 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc)) | |
977 | { | |
978 | int aN = instr[1] & 0x03; | |
979 | gdb_byte buf[4]; | |
980 | LONGEST imm32; | |
981 | ||
982 | status = target_read_memory (pc + 2, buf, 4); | |
983 | if (status != 0) | |
984 | break; | |
985 | ||
986 | imm32 = extract_signed_integer (buf, 4); | |
987 | regs[E_A0_REGNUM + aN] = pv_constant (imm32); | |
988 | pc += 6; | |
989 | } | |
990 | /* mov imm8, dN */ | |
991 | else if ((instr[0] & 0xf0) == 0x80) | |
992 | { | |
993 | int dN = instr[0] & 0x03; | |
994 | LONGEST imm8; | |
995 | ||
996 | imm8 = extract_signed_integer (&instr[1], 1); | |
997 | ||
998 | regs[E_D0_REGNUM + dN] = pv_constant (imm8); | |
999 | pc += 2; | |
1000 | } | |
1001 | /* mov imm16, dN */ | |
1002 | else if ((instr[0] & 0xfc) == 0x2c) | |
1003 | { | |
1004 | int dN = instr[0] & 0x03; | |
1005 | gdb_byte buf[2]; | |
1006 | LONGEST imm16; | |
1007 | ||
1008 | status = target_read_memory (pc + 1, buf, 2); | |
1009 | if (status != 0) | |
1010 | break; | |
1011 | ||
1012 | imm16 = extract_signed_integer (buf, 2); | |
1013 | regs[E_D0_REGNUM + dN] = pv_constant (imm16); | |
1014 | pc += 3; | |
1015 | } | |
1016 | /* mov imm32, dN */ | |
1017 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc)) | |
1018 | { | |
1019 | int dN = instr[1] & 0x03; | |
1020 | gdb_byte buf[4]; | |
1021 | LONGEST imm32; | |
1022 | ||
1023 | status = target_read_memory (pc + 2, buf, 4); | |
1024 | if (status != 0) | |
1025 | break; | |
1026 | ||
1027 | imm32 = extract_signed_integer (buf, 4); | |
1028 | regs[E_D0_REGNUM + dN] = pv_constant (imm32); | |
1029 | pc += 6; | |
1030 | } | |
1031 | else | |
1032 | { | |
1033 | /* We've hit some instruction that we don't recognize. Hopefully, | |
1034 | we have enough to do prologue analysis. */ | |
1035 | break; | |
1036 | } | |
1037 | } | |
1038 | ||
1039 | /* Is the frame size (offset, really) a known constant? */ | |
1040 | if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM)) | |
1041 | result->frame_size = regs[E_SP_REGNUM].k; | |
9cacebf5 | 1042 | |
6c02c64c KB |
1043 | /* Was the frame pointer initialized? */ |
1044 | if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM)) | |
1045 | { | |
1046 | result->has_frame_ptr = 1; | |
1047 | result->frame_ptr_offset = regs[E_A3_REGNUM].k; | |
9cacebf5 | 1048 | } |
6c02c64c KB |
1049 | |
1050 | /* Record where all the registers were saved. */ | |
1051 | pv_area_scan (stack, check_for_saved, (void *) result); | |
1052 | ||
1053 | result->prologue_end = after_last_frame_setup_insn; | |
1054 | ||
1055 | do_cleanups (back_to); | |
9cacebf5 MS |
1056 | } |
1057 | ||
342ee437 MS |
1058 | /* Function: skip_prologue |
1059 | Return the address of the first inst past the prologue of the function. */ | |
1060 | ||
1061 | static CORE_ADDR | |
6093d2eb | 1062 | mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
342ee437 | 1063 | { |
6c02c64c KB |
1064 | char *name; |
1065 | CORE_ADDR func_addr, func_end; | |
1066 | struct mn10300_prologue p; | |
1067 | ||
1068 | /* Try to find the extent of the function that contains PC. */ | |
1069 | if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) | |
1070 | return pc; | |
1071 | ||
1072 | mn10300_analyze_prologue (gdbarch, pc, func_end, &p); | |
1073 | return p.prologue_end; | |
342ee437 MS |
1074 | } |
1075 | ||
6c02c64c KB |
1076 | /* Wrapper for mn10300_analyze_prologue: find the function start; |
1077 | use the current frame PC as the limit, then | |
1078 | invoke mn10300_analyze_prologue and return its result. */ | |
1079 | static struct mn10300_prologue * | |
1080 | mn10300_analyze_frame_prologue (struct frame_info *this_frame, | |
1081 | void **this_prologue_cache) | |
342ee437 | 1082 | { |
6c02c64c | 1083 | if (!*this_prologue_cache) |
93d42b30 | 1084 | { |
6c02c64c KB |
1085 | CORE_ADDR func_start, stop_addr; |
1086 | ||
1087 | *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue); | |
1088 | ||
1089 | func_start = get_frame_func (this_frame); | |
1090 | stop_addr = get_frame_pc (this_frame); | |
1091 | ||
1092 | /* If we couldn't find any function containing the PC, then | |
1093 | just initialize the prologue cache, but don't do anything. */ | |
1094 | if (!func_start) | |
1095 | stop_addr = func_start; | |
1096 | ||
1097 | mn10300_analyze_prologue (get_frame_arch (this_frame), | |
1098 | func_start, stop_addr, *this_prologue_cache); | |
93d42b30 | 1099 | } |
342ee437 | 1100 | |
6c02c64c KB |
1101 | return *this_prologue_cache; |
1102 | } | |
1103 | ||
1104 | /* Given the next frame and a prologue cache, return this frame's | |
1105 | base. */ | |
1106 | static CORE_ADDR | |
1107 | mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache) | |
1108 | { | |
1109 | struct mn10300_prologue *p | |
1110 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1111 | ||
1112 | /* In functions that use alloca, the distance between the stack | |
1113 | pointer and the frame base varies dynamically, so we can't use | |
1114 | the SP plus static information like prologue analysis to find the | |
1115 | frame base. However, such functions must have a frame pointer, | |
1116 | to be able to restore the SP on exit. So whenever we do have a | |
1117 | frame pointer, use that to find the base. */ | |
1118 | if (p->has_frame_ptr) | |
1119 | { | |
1120 | CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM); | |
1121 | return fp - p->frame_ptr_offset; | |
1122 | } | |
1123 | else | |
1124 | { | |
1125 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); | |
1126 | return sp - p->frame_size; | |
1127 | } | |
342ee437 MS |
1128 | } |
1129 | ||
1130 | /* Here is a dummy implementation. */ | |
1131 | static struct frame_id | |
94afd7a6 | 1132 | mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 | 1133 | { |
94afd7a6 UW |
1134 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
1135 | CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); | |
1136 | return frame_id_build (sp, pc); | |
342ee437 MS |
1137 | } |
1138 | ||
342ee437 | 1139 | static void |
94afd7a6 | 1140 | mn10300_frame_this_id (struct frame_info *this_frame, |
342ee437 MS |
1141 | void **this_prologue_cache, |
1142 | struct frame_id *this_id) | |
1143 | { | |
6c02c64c KB |
1144 | *this_id = frame_id_build (mn10300_frame_base (this_frame, this_prologue_cache), |
1145 | get_frame_func (this_frame)); | |
342ee437 | 1146 | |
342ee437 MS |
1147 | } |
1148 | ||
94afd7a6 UW |
1149 | static struct value * |
1150 | mn10300_frame_prev_register (struct frame_info *this_frame, | |
6c02c64c | 1151 | void **this_prologue_cache, int regnum) |
342ee437 | 1152 | { |
6c02c64c KB |
1153 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame)); |
1154 | struct mn10300_prologue *p | |
1155 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1156 | CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache); | |
1157 | int reg_size = register_size (get_frame_arch (this_frame), regnum); | |
1158 | ||
1159 | if (regnum == E_SP_REGNUM) | |
1160 | return frame_unwind_got_constant (this_frame, regnum, frame_base); | |
1161 | ||
1162 | /* If prologue analysis says we saved this register somewhere, | |
1163 | return a description of the stack slot holding it. */ | |
1164 | if (p->reg_offset[regnum] != 1) | |
1165 | return frame_unwind_got_memory (this_frame, regnum, | |
1166 | frame_base + p->reg_offset[regnum]); | |
1167 | ||
1168 | /* Otherwise, presume we haven't changed the value of this | |
1169 | register, and get it from the next frame. */ | |
1170 | return frame_unwind_got_register (this_frame, regnum, regnum); | |
342ee437 MS |
1171 | } |
1172 | ||
1173 | static const struct frame_unwind mn10300_frame_unwind = { | |
1174 | NORMAL_FRAME, | |
1175 | mn10300_frame_this_id, | |
94afd7a6 UW |
1176 | mn10300_frame_prev_register, |
1177 | NULL, | |
1178 | default_frame_sniffer | |
342ee437 MS |
1179 | }; |
1180 | ||
1181 | static CORE_ADDR | |
6c02c64c | 1182 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1183 | { |
1184 | ULONGEST pc; | |
1185 | ||
6c02c64c | 1186 | pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM); |
342ee437 MS |
1187 | return pc; |
1188 | } | |
1189 | ||
1190 | static CORE_ADDR | |
6c02c64c | 1191 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1192 | { |
1193 | ULONGEST sp; | |
1194 | ||
6c02c64c | 1195 | sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM); |
342ee437 MS |
1196 | return sp; |
1197 | } | |
1198 | ||
1199 | static void | |
1200 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
1201 | { | |
94afd7a6 UW |
1202 | dwarf2_append_unwinders (gdbarch); |
1203 | frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); | |
94afd7a6 | 1204 | set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id); |
342ee437 MS |
1205 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); |
1206 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
1207 | } | |
1208 | ||
1209 | /* Function: push_dummy_call | |
1210 | * | |
1211 | * Set up machine state for a target call, including | |
1212 | * function arguments, stack, return address, etc. | |
1213 | * | |
1214 | */ | |
1215 | ||
1216 | static CORE_ADDR | |
1217 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
1218 | struct value *target_func, | |
1219 | struct regcache *regcache, | |
1220 | CORE_ADDR bp_addr, | |
1221 | int nargs, struct value **args, | |
1222 | CORE_ADDR sp, | |
1223 | int struct_return, | |
1224 | CORE_ADDR struct_addr) | |
1225 | { | |
1226 | const int push_size = register_size (gdbarch, E_PC_REGNUM); | |
1fb1ca27 | 1227 | int regs_used; |
342ee437 MS |
1228 | int len, arg_len; |
1229 | int stack_offset = 0; | |
1230 | int argnum; | |
1fb1ca27 | 1231 | char *val, valbuf[MAX_REGISTER_SIZE]; |
342ee437 | 1232 | |
342ee437 MS |
1233 | /* This should be a nop, but align the stack just in case something |
1234 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
1235 | sp &= ~3; | |
1236 | ||
1237 | /* Now make space on the stack for the args. | |
1238 | ||
1239 | XXX This doesn't appear to handle pass-by-invisible reference | |
1240 | arguments. */ | |
1fb1ca27 | 1241 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
1242 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
1243 | { | |
1244 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1245 | while (regs_used < 2 && arg_len > 0) |
1246 | { | |
1247 | regs_used++; | |
1248 | arg_len -= push_size; | |
1249 | } | |
1250 | len += arg_len; | |
1251 | } | |
1252 | ||
1253 | /* Allocate stack space. */ | |
1254 | sp -= len; | |
1255 | ||
1fb1ca27 MS |
1256 | if (struct_return) |
1257 | { | |
1258 | regs_used = 1; | |
9c9acae0 | 1259 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1260 | } |
1261 | else | |
1262 | regs_used = 0; | |
1263 | ||
342ee437 MS |
1264 | /* Push all arguments onto the stack. */ |
1265 | for (argnum = 0; argnum < nargs; argnum++) | |
1266 | { | |
1fb1ca27 MS |
1267 | /* FIXME what about structs? Unions? */ |
1268 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1269 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1270 | { | |
1271 | /* Change to pointer-to-type. */ | |
1272 | arg_len = push_size; | |
1273 | store_unsigned_integer (valbuf, push_size, | |
42ae5230 | 1274 | value_address (*args)); |
1fb1ca27 MS |
1275 | val = &valbuf[0]; |
1276 | } | |
1277 | else | |
1278 | { | |
1279 | arg_len = TYPE_LENGTH (value_type (*args)); | |
1280 | val = (char *) value_contents (*args); | |
1281 | } | |
342ee437 MS |
1282 | |
1283 | while (regs_used < 2 && arg_len > 0) | |
1284 | { | |
9c9acae0 UW |
1285 | regcache_cooked_write_unsigned (regcache, regs_used, |
1286 | extract_unsigned_integer (val, push_size)); | |
342ee437 MS |
1287 | val += push_size; |
1288 | arg_len -= push_size; | |
1289 | regs_used++; | |
1290 | } | |
1291 | ||
1292 | while (arg_len > 0) | |
1293 | { | |
1294 | write_memory (sp + stack_offset, val, push_size); | |
1295 | arg_len -= push_size; | |
1296 | val += push_size; | |
1297 | stack_offset += push_size; | |
1298 | } | |
1299 | ||
1300 | args++; | |
1301 | } | |
1302 | ||
1303 | /* Make space for the flushback area. */ | |
1304 | sp -= 8; | |
1305 | ||
1306 | /* Push the return address that contains the magic breakpoint. */ | |
1307 | sp -= 4; | |
1308 | write_memory_unsigned_integer (sp, push_size, bp_addr); | |
a64ae7e0 CV |
1309 | |
1310 | /* The CPU also writes the return address always into the | |
1311 | MDR register on "call". */ | |
1312 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1313 | ||
342ee437 MS |
1314 | /* Update $sp. */ |
1315 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
ee3a2f01 KB |
1316 | |
1317 | /* On the mn10300, it's possible to move some of the stack adjustment | |
1318 | and saving of the caller-save registers out of the prologue and | |
1319 | into the call sites. (When using gcc, this optimization can | |
1320 | occur when using the -mrelax switch.) If this occurs, the dwarf2 | |
1321 | info will reflect this fact. We can test to see if this is the | |
1322 | case by creating a new frame using the current stack pointer and | |
1323 | the address of the function that we're about to call. We then | |
1324 | unwind SP and see if it's different than the SP of our newly | |
1325 | created frame. If the SP values are the same, the caller is not | |
1326 | expected to allocate any additional stack. On the other hand, if | |
1327 | the SP values are different, the difference determines the | |
1328 | additional stack that must be allocated. | |
1329 | ||
1330 | Note that we don't update the return value though because that's | |
1331 | the value of the stack just after pushing the arguments, but prior | |
1332 | to performing the call. This value is needed in order to | |
1333 | construct the frame ID of the dummy call. */ | |
1334 | { | |
1335 | CORE_ADDR func_addr = find_function_addr (target_func, NULL); | |
1336 | CORE_ADDR unwound_sp | |
1337 | = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); | |
1338 | if (sp != unwound_sp) | |
1339 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, | |
1340 | sp - (unwound_sp - sp)); | |
1341 | } | |
1342 | ||
342ee437 MS |
1343 | return sp; |
1344 | } | |
1345 | ||
336c28c5 KB |
1346 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1347 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1348 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1349 | Who knows? But since people have object files lying around with | |
1350 | the existing Dwarf2 numbering, and other people have written stubs | |
1351 | to work with the existing GDB, neither of them can change. So we | |
1352 | just have to cope. */ | |
1353 | static int | |
be8626e0 | 1354 | mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) |
336c28c5 | 1355 | { |
c9f4d572 | 1356 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1357 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1358 | appear in GCC's numbering, but have no counterpart in GDB's | |
1359 | world, are marked with a -1. */ | |
1360 | static int dwarf2_to_gdb[] = { | |
1361 | 0, 1, 2, 3, 4, 5, 6, 7, -1, 8, | |
1362 | 15, 16, 17, 18, 19, 20, 21, 22, | |
1363 | 32, 33, 34, 35, 36, 37, 38, 39, | |
1364 | 40, 41, 42, 43, 44, 45, 46, 47, | |
1365 | 48, 49, 50, 51, 52, 53, 54, 55, | |
bbc1a784 | 1366 | 56, 57, 58, 59, 60, 61, 62, 63, |
6c02c64c | 1367 | 9, 11 |
336c28c5 KB |
1368 | }; |
1369 | ||
1370 | if (dwarf2 < 0 | |
bbc1a784 | 1371 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
154b82dc KB |
1372 | { |
1373 | warning (_("Bogus register number in debug info: %d"), dwarf2); | |
bbc1a784 | 1374 | return -1; |
154b82dc | 1375 | } |
336c28c5 KB |
1376 | |
1377 | return dwarf2_to_gdb[dwarf2]; | |
1378 | } | |
342ee437 MS |
1379 | |
1380 | static struct gdbarch * | |
1381 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1382 | struct gdbarch_list *arches) | |
1383 | { | |
1384 | struct gdbarch *gdbarch; | |
1385 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1386 | int num_regs; |
342ee437 MS |
1387 | |
1388 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1389 | if (arches != NULL) | |
1390 | return arches->gdbarch; | |
1391 | ||
1392 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1393 | gdbarch = gdbarch_alloc (&info, tdep); | |
1394 | ||
1395 | switch (info.bfd_arch_info->mach) | |
1396 | { | |
1397 | case 0: | |
1398 | case bfd_mach_mn10300: | |
1399 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1400 | tdep->am33_mode = 0; | |
4640dd91 | 1401 | num_regs = 32; |
342ee437 MS |
1402 | break; |
1403 | case bfd_mach_am33: | |
1404 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1405 | tdep->am33_mode = 1; | |
4640dd91 KB |
1406 | num_regs = 32; |
1407 | break; | |
1408 | case bfd_mach_am33_2: | |
1409 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1410 | tdep->am33_mode = 2; | |
1411 | num_regs = 64; | |
1412 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1413 | break; |
1414 | default: | |
1415 | internal_error (__FILE__, __LINE__, | |
1416 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1417 | break; | |
1418 | } | |
1419 | ||
1b31f75d KB |
1420 | /* By default, chars are unsigned. */ |
1421 | set_gdbarch_char_signed (gdbarch, 0); | |
1422 | ||
342ee437 | 1423 | /* Registers. */ |
4640dd91 | 1424 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1425 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1426 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1427 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1428 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1429 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1430 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1431 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1432 | |
1433 | /* Stack unwinding. */ | |
1434 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1435 | /* Breakpoints. */ | |
1436 | set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); | |
1437 | /* decr_pc_after_break? */ | |
1438 | /* Disassembly. */ | |
1439 | set_gdbarch_print_insn (gdbarch, print_insn_mn10300); | |
1440 | ||
1441 | /* Stage 2 */ | |
99fe5f9d | 1442 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1443 | |
1444 | /* Stage 3 -- get target calls working. */ | |
1445 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1446 | /* set_gdbarch_return_value (store, extract) */ | |
1447 | ||
1448 | ||
1449 | mn10300_frame_unwind_init (gdbarch); | |
1450 | ||
697e3bc9 KB |
1451 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1452 | gdbarch_init_osabi (info, gdbarch); | |
1453 | ||
342ee437 MS |
1454 | return gdbarch; |
1455 | } | |
1456 | ||
1457 | /* Dump out the mn10300 specific architecture information. */ | |
1458 | ||
1459 | static void | |
d93859e2 | 1460 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1461 | { |
d93859e2 | 1462 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1463 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1464 | tdep->am33_mode); | |
1465 | } | |
1466 | ||
63807e1d PA |
1467 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1468 | extern initialize_file_ftype _initialize_mn10300_tdep; | |
1469 | ||
342ee437 MS |
1470 | void |
1471 | _initialize_mn10300_tdep (void) | |
1472 | { | |
1473 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1474 | } | |
1475 |