* NEWS (New native configurations): Mention NetBSD/vax.
[deliverable/binutils-gdb.git] / gdb / ppc-linux-nat.c
CommitLineData
9abe5450 1/* PPC GNU/Linux native support.
2555fe1a
AC
2
3 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003 Free Software Foundation, Inc.
c877c8e6
KB
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
05f13b9c
EZ
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c877c8e6
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22
23#include "defs.h"
e162d11b 24#include "gdb_string.h"
c877c8e6
KB
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
4e052eda 28#include "regcache.h"
c877c8e6
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29
30#include <sys/types.h>
31#include <sys/param.h>
32#include <signal.h>
33#include <sys/user.h>
34#include <sys/ioctl.h>
2555fe1a 35#include "gdb_wait.h"
c877c8e6
KB
36#include <fcntl.h>
37#include <sys/procfs.h>
45229ea4 38#include <sys/ptrace.h>
c877c8e6 39
c60c0f5f
MS
40/* Prototypes for supply_gregset etc. */
41#include "gregset.h"
16333c4f 42#include "ppc-tdep.h"
c60c0f5f 43
45229ea4
EZ
44#ifndef PT_READ_U
45#define PT_READ_U PTRACE_PEEKUSR
46#endif
47#ifndef PT_WRITE_U
48#define PT_WRITE_U PTRACE_POKEUSR
49#endif
50
51/* Default the type of the ptrace transfer to int. */
52#ifndef PTRACE_XFER_TYPE
53#define PTRACE_XFER_TYPE int
54#endif
55
9abe5450
EZ
56/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
57 configure time check. Some older glibc's (for instance 2.2.1)
58 don't have a specific powerpc version of ptrace.h, and fall back on
59 a generic one. In such cases, sys/ptrace.h defines
60 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
61 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
62 PTRACE_SETVRREGS to be. This also makes a configury check pretty
63 much useless. */
64
65/* These definitions should really come from the glibc header files,
66 but Glibc doesn't know about the vrregs yet. */
67#ifndef PTRACE_GETVRREGS
68#define PTRACE_GETVRREGS 18
69#define PTRACE_SETVRREGS 19
70#endif
71
72/* This oddity is because the Linux kernel defines elf_vrregset_t as
73 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
74 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
75 the vrsave as an extra 4 bytes at the end. I opted for creating a
76 flat array of chars, so that it is easier to manipulate for gdb.
77
78 There are 32 vector registers 16 bytes longs, plus a VSCR register
79 which is only 4 bytes long, but is fetched as a 16 bytes
80 quantity. Up to here we have the elf_vrregset_t structure.
81 Appended to this there is space for the VRSAVE register: 4 bytes.
82 Even though this vrsave register is not included in the regset
83 typedef, it is handled by the ptrace requests.
84
85 Note that GNU/Linux doesn't support little endian PPC hardware,
86 therefore the offset at which the real value of the VSCR register
87 is located will be always 12 bytes.
88
89 The layout is like this (where x is the actual value of the vscr reg): */
90
91/* *INDENT-OFF* */
92/*
93 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
94 <-------> <-------><-------><->
95 VR0 VR31 VSCR VRSAVE
96*/
97/* *INDENT-ON* */
98
99#define SIZEOF_VRREGS 33*16+4
100
101typedef char gdb_vrregset_t[SIZEOF_VRREGS];
102
103/* For runtime check of ptrace support for VRREGS. */
104int have_ptrace_getvrregs = 1;
105
c877c8e6 106int
fba45db2 107kernel_u_size (void)
c877c8e6
KB
108{
109 return (sizeof (struct user));
110}
111
16333c4f
EZ
112/* *INDENT-OFF* */
113/* registers layout, as presented by the ptrace interface:
114PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
115PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
116PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
117PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
118PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
119PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
120PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
121PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
122PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
123/* *INDENT_ON * */
c877c8e6 124
45229ea4
EZ
125static int
126ppc_register_u_addr (int regno)
c877c8e6 127{
16333c4f 128 int u_addr = -1;
dc5cfeb6 129 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
56d0d96a
AC
130 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
131 interface, and not the wordsize of the program's ABI. */
132 int wordsize = sizeof (PTRACE_XFER_TYPE);
16333c4f
EZ
133
134 /* General purpose registers occupy 1 slot each in the buffer */
dc5cfeb6 135 if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
49ff75ad 136 u_addr = ((PT_R0 + regno) * wordsize);
16333c4f 137
49ff75ad
JB
138 /* Floating point regs: eight bytes each in both 32- and 64-bit
139 ptrace interfaces. Thus, two slots each in 32-bit interface, one
140 slot each in 64-bit interface. */
16333c4f 141 if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
49ff75ad 142 u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8);
16333c4f
EZ
143
144 /* UISA special purpose registers: 1 slot each */
145 if (regno == PC_REGNUM)
49ff75ad 146 u_addr = PT_NIP * wordsize;
dc5cfeb6 147 if (regno == tdep->ppc_lr_regnum)
49ff75ad 148 u_addr = PT_LNK * wordsize;
dc5cfeb6 149 if (regno == tdep->ppc_cr_regnum)
49ff75ad 150 u_addr = PT_CCR * wordsize;
dc5cfeb6 151 if (regno == tdep->ppc_xer_regnum)
49ff75ad 152 u_addr = PT_XER * wordsize;
dc5cfeb6 153 if (regno == tdep->ppc_ctr_regnum)
49ff75ad 154 u_addr = PT_CTR * wordsize;
f8c59253 155#ifdef PT_MQ
dc5cfeb6 156 if (regno == tdep->ppc_mq_regnum)
49ff75ad 157 u_addr = PT_MQ * wordsize;
f8c59253 158#endif
dc5cfeb6 159 if (regno == tdep->ppc_ps_regnum)
49ff75ad 160 u_addr = PT_MSR * wordsize;
e3f36dbd 161 if (regno == tdep->ppc_fpscr_regnum)
49ff75ad 162 u_addr = PT_FPSCR * wordsize;
16333c4f
EZ
163
164 return u_addr;
c877c8e6
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165}
166
9abe5450
EZ
167/* The Linux kernel ptrace interface for AltiVec registers uses the
168 registers set mechanism, as opposed to the interface for all the
169 other registers, that stores/fetches each register individually. */
170static void
171fetch_altivec_register (int tid, int regno)
172{
173 int ret;
174 int offset = 0;
175 gdb_vrregset_t regs;
176 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
12c266ea 177 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
9abe5450
EZ
178
179 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
180 if (ret < 0)
181 {
182 if (errno == EIO)
183 {
184 have_ptrace_getvrregs = 0;
185 return;
186 }
187 perror_with_name ("Unable to fetch AltiVec register");
188 }
189
190 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
191 long on the hardware. We deal only with the lower 4 bytes of the
192 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
193 there is no need to define an offset for it. */
194 if (regno == (tdep->ppc_vrsave_regnum - 1))
12c266ea 195 offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
196
197 supply_register (regno,
198 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
199}
200
45229ea4 201static void
05f13b9c 202fetch_register (int tid, int regno)
45229ea4
EZ
203{
204 /* This isn't really an address. But ptrace thinks of it as one. */
205 char mess[128]; /* For messages */
52f0bd74 206 int i;
45229ea4 207 unsigned int offset; /* Offset of registers within the u area. */
d9d9c31f 208 char buf[MAX_REGISTER_SIZE];
45229ea4
EZ
209 CORE_ADDR regaddr = ppc_register_u_addr (regno);
210
9abe5450
EZ
211 if (altivec_register_p (regno))
212 {
213 /* If this is the first time through, or if it is not the first
214 time through, and we have comfirmed that there is kernel
215 support for such a ptrace request, then go and fetch the
216 register. */
217 if (have_ptrace_getvrregs)
218 {
219 fetch_altivec_register (tid, regno);
220 return;
221 }
222 /* If we have discovered that there is no ptrace support for
223 AltiVec registers, fall through and return zeroes, because
224 regaddr will be -1 in this case. */
225 }
226
45229ea4
EZ
227 if (regaddr == -1)
228 {
12c266ea 229 memset (buf, '\0', DEPRECATED_REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
45229ea4
EZ
230 supply_register (regno, buf);
231 return;
232 }
233
56d0d96a
AC
234 /* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
235 32-bit platform, 64-bit floating-point registers will require two
236 transfers. */
12c266ea 237 for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
45229ea4
EZ
238 {
239 errno = 0;
240 *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
241 (PTRACE_ARG3_TYPE) regaddr, 0);
242 regaddr += sizeof (PTRACE_XFER_TYPE);
243 if (errno != 0)
244 {
245 sprintf (mess, "reading register %s (#%d)",
246 REGISTER_NAME (regno), regno);
247 perror_with_name (mess);
248 }
249 }
56d0d96a
AC
250
251 /* Now supply the register. Be careful to map between ptrace's and
252 the current_regcache's idea of the current wordsize. */
253 if ((regno >= FP0_REGNUM && regno < FP0_REGNUM +32)
254 || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
255 /* FPs are always 64 bits. Little endian values are always found
256 at the left-hand end of the register. */
257 regcache_raw_supply (current_regcache, regno, buf);
258 else
259 /* Big endian register, need to fetch the right-hand end. */
260 regcache_raw_supply (current_regcache, regno,
261 (buf + sizeof (PTRACE_XFER_TYPE)
262 - register_size (current_gdbarch, regno)));
45229ea4
EZ
263}
264
9abe5450
EZ
265static void
266supply_vrregset (gdb_vrregset_t *vrregsetp)
267{
268 int i;
269 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
270 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
12c266ea
AC
271 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
272 int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
273
274 for (i = 0; i < num_of_vrregs; i++)
275 {
276 /* The last 2 registers of this set are only 32 bit long, not
277 128. However an offset is necessary only for VSCR because it
278 occupies a whole vector, while VRSAVE occupies a full 4 bytes
279 slot. */
280 if (i == (num_of_vrregs - 2))
281 supply_register (tdep->ppc_vr0_regnum + i,
282 *vrregsetp + i * vrregsize + offset);
283 else
284 supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
285 }
286}
287
288static void
289fetch_altivec_registers (int tid)
290{
291 int ret;
292 gdb_vrregset_t regs;
293
294 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
295 if (ret < 0)
296 {
297 if (errno == EIO)
298 {
299 have_ptrace_getvrregs = 0;
300 return;
301 }
302 perror_with_name ("Unable to fetch AltiVec registers");
303 }
304 supply_vrregset (&regs);
305}
306
45229ea4 307static void
05f13b9c 308fetch_ppc_registers (int tid)
45229ea4
EZ
309{
310 int i;
9abe5450
EZ
311 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
312
e3f36dbd 313 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
05f13b9c 314 fetch_register (tid, i);
e3f36dbd
KB
315 if (tdep->ppc_mq_regnum != -1)
316 fetch_register (tid, tdep->ppc_mq_regnum);
9abe5450
EZ
317 if (have_ptrace_getvrregs)
318 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
319 fetch_altivec_registers (tid);
45229ea4
EZ
320}
321
322/* Fetch registers from the child process. Fetch all registers if
323 regno == -1, otherwise fetch all general registers or all floating
324 point registers depending upon the value of regno. */
325void
326fetch_inferior_registers (int regno)
327{
9abe5450 328 /* Overload thread id onto process id */
05f13b9c
EZ
329 int tid = TIDGET (inferior_ptid);
330
331 /* No thread id, just use process id */
332 if (tid == 0)
333 tid = PIDGET (inferior_ptid);
334
9abe5450 335 if (regno == -1)
05f13b9c 336 fetch_ppc_registers (tid);
45229ea4 337 else
05f13b9c 338 fetch_register (tid, regno);
45229ea4
EZ
339}
340
341/* Store one register. */
9abe5450
EZ
342static void
343store_altivec_register (int tid, int regno)
344{
345 int ret;
346 int offset = 0;
347 gdb_vrregset_t regs;
348 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
12c266ea 349 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
9abe5450
EZ
350
351 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
352 if (ret < 0)
353 {
354 if (errno == EIO)
355 {
356 have_ptrace_getvrregs = 0;
357 return;
358 }
359 perror_with_name ("Unable to fetch AltiVec register");
360 }
361
362 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
363 long on the hardware. */
364 if (regno == (tdep->ppc_vrsave_regnum - 1))
12c266ea 365 offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
366
367 regcache_collect (regno,
368 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
369
370 ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
371 if (ret < 0)
372 perror_with_name ("Unable to store AltiVec register");
373}
374
45229ea4 375static void
05f13b9c 376store_register (int tid, int regno)
45229ea4
EZ
377{
378 /* This isn't really an address. But ptrace thinks of it as one. */
379 CORE_ADDR regaddr = ppc_register_u_addr (regno);
380 char mess[128]; /* For messages */
52f0bd74 381 int i;
45229ea4 382 unsigned int offset; /* Offset of registers within the u area. */
d9d9c31f 383 char buf[MAX_REGISTER_SIZE];
45229ea4 384
9abe5450 385 if (altivec_register_p (regno))
45229ea4 386 {
9abe5450 387 store_altivec_register (tid, regno);
45229ea4
EZ
388 return;
389 }
390
9abe5450
EZ
391 if (regaddr == -1)
392 return;
393
56d0d96a
AC
394 /* First collect the register value from the regcache. Be careful
395 to to convert the regcache's wordsize into ptrace's wordsize. */
396 memset (buf, 0, sizeof buf);
397 if ((regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
398 || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
399 /* Floats are always 64-bit. Little endian registers are always
400 at the left-hand end of the register cache. */
401 regcache_raw_collect (current_regcache, regno, buf);
402 else
403 /* Big-endian registers belong at the right-hand end of the
404 buffer. */
405 regcache_raw_collect (current_regcache, regno,
406 (buf + sizeof (PTRACE_XFER_TYPE)
407 - register_size (current_gdbarch, regno)));
408
12c266ea 409 for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
45229ea4
EZ
410 {
411 errno = 0;
412 ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
413 *(PTRACE_XFER_TYPE *) & buf[i]);
414 regaddr += sizeof (PTRACE_XFER_TYPE);
e3f36dbd
KB
415
416 if (errno == EIO
417 && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
418 {
419 /* Some older kernel versions don't allow fpscr to be written. */
420 continue;
421 }
422
45229ea4
EZ
423 if (errno != 0)
424 {
425 sprintf (mess, "writing register %s (#%d)",
426 REGISTER_NAME (regno), regno);
427 perror_with_name (mess);
428 }
429 }
430}
431
9abe5450
EZ
432static void
433fill_vrregset (gdb_vrregset_t *vrregsetp)
434{
435 int i;
436 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
437 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
12c266ea
AC
438 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
439 int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
440
441 for (i = 0; i < num_of_vrregs; i++)
442 {
443 /* The last 2 registers of this set are only 32 bit long, not
444 128, but only VSCR is fetched as a 16 bytes quantity. */
445 if (i == (num_of_vrregs - 2))
446 regcache_collect (tdep->ppc_vr0_regnum + i,
447 *vrregsetp + i * vrregsize + offset);
448 else
449 regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
450 }
451}
452
453static void
454store_altivec_registers (int tid)
455{
456 int ret;
457 gdb_vrregset_t regs;
458
0897f59b 459 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
9abe5450
EZ
460 if (ret < 0)
461 {
462 if (errno == EIO)
463 {
464 have_ptrace_getvrregs = 0;
465 return;
466 }
467 perror_with_name ("Couldn't get AltiVec registers");
468 }
469
470 fill_vrregset (&regs);
471
0897f59b 472 if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
9abe5450
EZ
473 perror_with_name ("Couldn't write AltiVec registers");
474}
475
45229ea4 476static void
05f13b9c 477store_ppc_registers (int tid)
45229ea4
EZ
478{
479 int i;
9abe5450 480 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
45229ea4 481
e3f36dbd 482 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
05f13b9c 483 store_register (tid, i);
e3f36dbd
KB
484 if (tdep->ppc_mq_regnum != -1)
485 store_register (tid, tdep->ppc_mq_regnum);
9abe5450
EZ
486 if (have_ptrace_getvrregs)
487 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
488 store_altivec_registers (tid);
45229ea4
EZ
489}
490
491void
492store_inferior_registers (int regno)
493{
05f13b9c
EZ
494 /* Overload thread id onto process id */
495 int tid = TIDGET (inferior_ptid);
496
497 /* No thread id, just use process id */
498 if (tid == 0)
499 tid = PIDGET (inferior_ptid);
500
45229ea4 501 if (regno >= 0)
05f13b9c 502 store_register (tid, regno);
45229ea4 503 else
05f13b9c 504 store_ppc_registers (tid);
45229ea4
EZ
505}
506
50c9bd31 507void
8ae45c11 508supply_gregset (gdb_gregset_t *gregsetp)
c877c8e6 509{
f9be684a
AC
510 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
511 interface, and not the wordsize of the program's ABI. */
512 int wordsize = sizeof (PTRACE_XFER_TYPE);
513 ppc_linux_supply_gregset (current_regcache, -1, gregsetp,
514 sizeof (gdb_gregset_t), wordsize);
515}
516
517static void
518right_fill_reg (int regnum, void *reg)
519{
520 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
521 interface, and not the wordsize of the program's ABI. */
522 int wordsize = sizeof (PTRACE_XFER_TYPE);
523 /* Right fill the register. */
524 regcache_raw_collect (current_regcache, regnum,
525 ((bfd_byte *) reg
526 + wordsize
527 - register_size (current_gdbarch, regnum)));
c877c8e6
KB
528}
529
fdb28ac4 530void
8ae45c11 531fill_gregset (gdb_gregset_t *gregsetp, int regno)
fdb28ac4
KB
532{
533 int regi;
2ac44c70 534 elf_greg_t *regp = (elf_greg_t *) gregsetp;
dc5cfeb6 535 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
f9be684a
AC
536 const int elf_ngreg = 48;
537
538
539 /* Start with zeros. */
540 memset (regp, 0, elf_ngreg * sizeof (*regp));
fdb28ac4 541
fdb28ac4
KB
542 for (regi = 0; regi < 32; regi++)
543 {
16333c4f 544 if ((regno == -1) || regno == regi)
f9be684a 545 right_fill_reg (regi, (regp + PT_R0 + regi));
fdb28ac4
KB
546 }
547
16333c4f 548 if ((regno == -1) || regno == PC_REGNUM)
f9be684a 549 right_fill_reg (PC_REGNUM, regp + PT_NIP);
05f13b9c 550 if ((regno == -1) || regno == tdep->ppc_lr_regnum)
f9be684a 551 right_fill_reg (tdep->ppc_lr_regnum, regp + PT_LNK);
05f13b9c 552 if ((regno == -1) || regno == tdep->ppc_cr_regnum)
dc5cfeb6 553 regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
05f13b9c 554 if ((regno == -1) || regno == tdep->ppc_xer_regnum)
dc5cfeb6 555 regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
05f13b9c 556 if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
f9be684a 557 right_fill_reg (tdep->ppc_ctr_regnum, regp + PT_CTR);
f8c59253 558#ifdef PT_MQ
e3f36dbd
KB
559 if (((regno == -1) || regno == tdep->ppc_mq_regnum)
560 && (tdep->ppc_mq_regnum != -1))
f9be684a 561 right_fill_reg (tdep->ppc_mq_regnum, regp + PT_MQ);
f8c59253 562#endif
05f13b9c 563 if ((regno == -1) || regno == tdep->ppc_ps_regnum)
f9be684a 564 right_fill_reg (tdep->ppc_ps_regnum, regp + PT_MSR);
fdb28ac4
KB
565}
566
50c9bd31 567void
8ae45c11 568supply_fpregset (gdb_fpregset_t * fpregsetp)
c877c8e6 569{
f9be684a
AC
570 ppc_linux_supply_fpregset (NULL, current_regcache, -1, fpregsetp,
571 sizeof (gdb_fpregset_t));
c877c8e6 572}
fdb28ac4 573
9abe5450
EZ
574/* Given a pointer to a floating point register set in /proc format
575 (fpregset_t *), update the register specified by REGNO from gdb's
576 idea of the current floating point register set. If REGNO is -1,
577 update them all. */
fdb28ac4 578void
8ae45c11 579fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
fdb28ac4
KB
580{
581 int regi;
e3f36dbd 582 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
f9be684a 583 bfd_byte *fpp = (void *) fpregsetp;
fdb28ac4
KB
584
585 for (regi = 0; regi < 32; regi++)
586 {
587 if ((regno == -1) || (regno == FP0_REGNUM + regi))
f9be684a 588 regcache_collect (FP0_REGNUM + regi, fpp + 8 * regi);
fdb28ac4 589 }
e3f36dbd 590 if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
f9be684a 591 right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32));
fdb28ac4 592}
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