* config/ppc-tdep.h (struct gdbarch_tdep): Delete
[deliverable/binutils-gdb.git] / gdb / ppc-linux-nat.c
CommitLineData
9abe5450 1/* PPC GNU/Linux native support.
2555fe1a
AC
2
3 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003 Free Software Foundation, Inc.
c877c8e6
KB
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
05f13b9c
EZ
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c877c8e6
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22
23#include "defs.h"
e162d11b 24#include "gdb_string.h"
c877c8e6
KB
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
4e052eda 28#include "regcache.h"
c877c8e6
KB
29
30#include <sys/types.h>
31#include <sys/param.h>
32#include <signal.h>
33#include <sys/user.h>
34#include <sys/ioctl.h>
2555fe1a 35#include "gdb_wait.h"
c877c8e6
KB
36#include <fcntl.h>
37#include <sys/procfs.h>
45229ea4 38#include <sys/ptrace.h>
c877c8e6 39
c60c0f5f
MS
40/* Prototypes for supply_gregset etc. */
41#include "gregset.h"
16333c4f 42#include "ppc-tdep.h"
c60c0f5f 43
45229ea4
EZ
44#ifndef PT_READ_U
45#define PT_READ_U PTRACE_PEEKUSR
46#endif
47#ifndef PT_WRITE_U
48#define PT_WRITE_U PTRACE_POKEUSR
49#endif
50
51/* Default the type of the ptrace transfer to int. */
52#ifndef PTRACE_XFER_TYPE
53#define PTRACE_XFER_TYPE int
54#endif
55
9abe5450
EZ
56/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
57 configure time check. Some older glibc's (for instance 2.2.1)
58 don't have a specific powerpc version of ptrace.h, and fall back on
59 a generic one. In such cases, sys/ptrace.h defines
60 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
61 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
62 PTRACE_SETVRREGS to be. This also makes a configury check pretty
63 much useless. */
64
65/* These definitions should really come from the glibc header files,
66 but Glibc doesn't know about the vrregs yet. */
67#ifndef PTRACE_GETVRREGS
68#define PTRACE_GETVRREGS 18
69#define PTRACE_SETVRREGS 19
70#endif
71
72/* This oddity is because the Linux kernel defines elf_vrregset_t as
73 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
74 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
75 the vrsave as an extra 4 bytes at the end. I opted for creating a
76 flat array of chars, so that it is easier to manipulate for gdb.
77
78 There are 32 vector registers 16 bytes longs, plus a VSCR register
79 which is only 4 bytes long, but is fetched as a 16 bytes
80 quantity. Up to here we have the elf_vrregset_t structure.
81 Appended to this there is space for the VRSAVE register: 4 bytes.
82 Even though this vrsave register is not included in the regset
83 typedef, it is handled by the ptrace requests.
84
85 Note that GNU/Linux doesn't support little endian PPC hardware,
86 therefore the offset at which the real value of the VSCR register
87 is located will be always 12 bytes.
88
89 The layout is like this (where x is the actual value of the vscr reg): */
90
91/* *INDENT-OFF* */
92/*
93 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
94 <-------> <-------><-------><->
95 VR0 VR31 VSCR VRSAVE
96*/
97/* *INDENT-ON* */
98
99#define SIZEOF_VRREGS 33*16+4
100
101typedef char gdb_vrregset_t[SIZEOF_VRREGS];
102
103/* For runtime check of ptrace support for VRREGS. */
104int have_ptrace_getvrregs = 1;
105
c877c8e6 106int
fba45db2 107kernel_u_size (void)
c877c8e6
KB
108{
109 return (sizeof (struct user));
110}
111
16333c4f
EZ
112/* *INDENT-OFF* */
113/* registers layout, as presented by the ptrace interface:
114PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
115PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
116PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
117PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
118PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
119PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
120PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
121PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
122PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
123/* *INDENT_ON * */
c877c8e6 124
45229ea4
EZ
125static int
126ppc_register_u_addr (int regno)
c877c8e6 127{
16333c4f 128 int u_addr = -1;
dc5cfeb6 129 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
56d0d96a
AC
130 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
131 interface, and not the wordsize of the program's ABI. */
132 int wordsize = sizeof (PTRACE_XFER_TYPE);
16333c4f
EZ
133
134 /* General purpose registers occupy 1 slot each in the buffer */
8bf659e8
JB
135 if (regno >= tdep->ppc_gp0_regnum
136 && regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
26e75e5c 137 u_addr = ((regno - tdep->ppc_gp0_regnum + PT_R0) * wordsize);
16333c4f 138
49ff75ad
JB
139 /* Floating point regs: eight bytes each in both 32- and 64-bit
140 ptrace interfaces. Thus, two slots each in 32-bit interface, one
141 slot each in 64-bit interface. */
b967e06f 142 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + ppc_num_fprs)
49ff75ad 143 u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8);
16333c4f
EZ
144
145 /* UISA special purpose registers: 1 slot each */
146 if (regno == PC_REGNUM)
49ff75ad 147 u_addr = PT_NIP * wordsize;
dc5cfeb6 148 if (regno == tdep->ppc_lr_regnum)
49ff75ad 149 u_addr = PT_LNK * wordsize;
dc5cfeb6 150 if (regno == tdep->ppc_cr_regnum)
49ff75ad 151 u_addr = PT_CCR * wordsize;
dc5cfeb6 152 if (regno == tdep->ppc_xer_regnum)
49ff75ad 153 u_addr = PT_XER * wordsize;
dc5cfeb6 154 if (regno == tdep->ppc_ctr_regnum)
49ff75ad 155 u_addr = PT_CTR * wordsize;
f8c59253 156#ifdef PT_MQ
dc5cfeb6 157 if (regno == tdep->ppc_mq_regnum)
49ff75ad 158 u_addr = PT_MQ * wordsize;
f8c59253 159#endif
dc5cfeb6 160 if (regno == tdep->ppc_ps_regnum)
49ff75ad 161 u_addr = PT_MSR * wordsize;
e3f36dbd 162 if (regno == tdep->ppc_fpscr_regnum)
49ff75ad 163 u_addr = PT_FPSCR * wordsize;
16333c4f
EZ
164
165 return u_addr;
c877c8e6
KB
166}
167
9abe5450
EZ
168/* The Linux kernel ptrace interface for AltiVec registers uses the
169 registers set mechanism, as opposed to the interface for all the
170 other registers, that stores/fetches each register individually. */
171static void
172fetch_altivec_register (int tid, int regno)
173{
174 int ret;
175 int offset = 0;
176 gdb_vrregset_t regs;
177 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
12c266ea 178 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
9abe5450
EZ
179
180 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
181 if (ret < 0)
182 {
183 if (errno == EIO)
184 {
185 have_ptrace_getvrregs = 0;
186 return;
187 }
188 perror_with_name ("Unable to fetch AltiVec register");
189 }
190
191 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
192 long on the hardware. We deal only with the lower 4 bytes of the
193 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
194 there is no need to define an offset for it. */
195 if (regno == (tdep->ppc_vrsave_regnum - 1))
12c266ea 196 offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
197
198 supply_register (regno,
199 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
200}
201
45229ea4 202static void
05f13b9c 203fetch_register (int tid, int regno)
45229ea4
EZ
204{
205 /* This isn't really an address. But ptrace thinks of it as one. */
206 char mess[128]; /* For messages */
52f0bd74 207 int i;
45229ea4 208 unsigned int offset; /* Offset of registers within the u area. */
d9d9c31f 209 char buf[MAX_REGISTER_SIZE];
45229ea4
EZ
210 CORE_ADDR regaddr = ppc_register_u_addr (regno);
211
9abe5450
EZ
212 if (altivec_register_p (regno))
213 {
214 /* If this is the first time through, or if it is not the first
215 time through, and we have comfirmed that there is kernel
216 support for such a ptrace request, then go and fetch the
217 register. */
218 if (have_ptrace_getvrregs)
219 {
220 fetch_altivec_register (tid, regno);
221 return;
222 }
223 /* If we have discovered that there is no ptrace support for
224 AltiVec registers, fall through and return zeroes, because
225 regaddr will be -1 in this case. */
226 }
227
45229ea4
EZ
228 if (regaddr == -1)
229 {
12c266ea 230 memset (buf, '\0', DEPRECATED_REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
45229ea4
EZ
231 supply_register (regno, buf);
232 return;
233 }
234
56d0d96a
AC
235 /* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
236 32-bit platform, 64-bit floating-point registers will require two
237 transfers. */
12c266ea 238 for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
45229ea4
EZ
239 {
240 errno = 0;
241 *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
242 (PTRACE_ARG3_TYPE) regaddr, 0);
243 regaddr += sizeof (PTRACE_XFER_TYPE);
244 if (errno != 0)
245 {
246 sprintf (mess, "reading register %s (#%d)",
247 REGISTER_NAME (regno), regno);
248 perror_with_name (mess);
249 }
250 }
56d0d96a
AC
251
252 /* Now supply the register. Be careful to map between ptrace's and
253 the current_regcache's idea of the current wordsize. */
254 if ((regno >= FP0_REGNUM && regno < FP0_REGNUM +32)
255 || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
256 /* FPs are always 64 bits. Little endian values are always found
257 at the left-hand end of the register. */
258 regcache_raw_supply (current_regcache, regno, buf);
259 else
260 /* Big endian register, need to fetch the right-hand end. */
261 regcache_raw_supply (current_regcache, regno,
262 (buf + sizeof (PTRACE_XFER_TYPE)
263 - register_size (current_gdbarch, regno)));
45229ea4
EZ
264}
265
9abe5450
EZ
266static void
267supply_vrregset (gdb_vrregset_t *vrregsetp)
268{
269 int i;
270 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
271 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
12c266ea
AC
272 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
273 int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
274
275 for (i = 0; i < num_of_vrregs; i++)
276 {
277 /* The last 2 registers of this set are only 32 bit long, not
278 128. However an offset is necessary only for VSCR because it
279 occupies a whole vector, while VRSAVE occupies a full 4 bytes
280 slot. */
281 if (i == (num_of_vrregs - 2))
282 supply_register (tdep->ppc_vr0_regnum + i,
283 *vrregsetp + i * vrregsize + offset);
284 else
285 supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
286 }
287}
288
289static void
290fetch_altivec_registers (int tid)
291{
292 int ret;
293 gdb_vrregset_t regs;
294
295 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
296 if (ret < 0)
297 {
298 if (errno == EIO)
299 {
300 have_ptrace_getvrregs = 0;
301 return;
302 }
303 perror_with_name ("Unable to fetch AltiVec registers");
304 }
305 supply_vrregset (&regs);
306}
307
45229ea4 308static void
05f13b9c 309fetch_ppc_registers (int tid)
45229ea4
EZ
310{
311 int i;
9abe5450
EZ
312 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
313
e3f36dbd 314 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
05f13b9c 315 fetch_register (tid, i);
e3f36dbd
KB
316 if (tdep->ppc_mq_regnum != -1)
317 fetch_register (tid, tdep->ppc_mq_regnum);
9abe5450
EZ
318 if (have_ptrace_getvrregs)
319 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
320 fetch_altivec_registers (tid);
45229ea4
EZ
321}
322
323/* Fetch registers from the child process. Fetch all registers if
324 regno == -1, otherwise fetch all general registers or all floating
325 point registers depending upon the value of regno. */
326void
327fetch_inferior_registers (int regno)
328{
9abe5450 329 /* Overload thread id onto process id */
05f13b9c
EZ
330 int tid = TIDGET (inferior_ptid);
331
332 /* No thread id, just use process id */
333 if (tid == 0)
334 tid = PIDGET (inferior_ptid);
335
9abe5450 336 if (regno == -1)
05f13b9c 337 fetch_ppc_registers (tid);
45229ea4 338 else
05f13b9c 339 fetch_register (tid, regno);
45229ea4
EZ
340}
341
342/* Store one register. */
9abe5450
EZ
343static void
344store_altivec_register (int tid, int regno)
345{
346 int ret;
347 int offset = 0;
348 gdb_vrregset_t regs;
349 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
12c266ea 350 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
9abe5450
EZ
351
352 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
353 if (ret < 0)
354 {
355 if (errno == EIO)
356 {
357 have_ptrace_getvrregs = 0;
358 return;
359 }
360 perror_with_name ("Unable to fetch AltiVec register");
361 }
362
363 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
364 long on the hardware. */
365 if (regno == (tdep->ppc_vrsave_regnum - 1))
12c266ea 366 offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
367
368 regcache_collect (regno,
369 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
370
371 ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
372 if (ret < 0)
373 perror_with_name ("Unable to store AltiVec register");
374}
375
45229ea4 376static void
05f13b9c 377store_register (int tid, int regno)
45229ea4
EZ
378{
379 /* This isn't really an address. But ptrace thinks of it as one. */
380 CORE_ADDR regaddr = ppc_register_u_addr (regno);
381 char mess[128]; /* For messages */
52f0bd74 382 int i;
45229ea4 383 unsigned int offset; /* Offset of registers within the u area. */
d9d9c31f 384 char buf[MAX_REGISTER_SIZE];
45229ea4 385
9abe5450 386 if (altivec_register_p (regno))
45229ea4 387 {
9abe5450 388 store_altivec_register (tid, regno);
45229ea4
EZ
389 return;
390 }
391
9abe5450
EZ
392 if (regaddr == -1)
393 return;
394
56d0d96a
AC
395 /* First collect the register value from the regcache. Be careful
396 to to convert the regcache's wordsize into ptrace's wordsize. */
397 memset (buf, 0, sizeof buf);
398 if ((regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
399 || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
400 /* Floats are always 64-bit. Little endian registers are always
401 at the left-hand end of the register cache. */
402 regcache_raw_collect (current_regcache, regno, buf);
403 else
404 /* Big-endian registers belong at the right-hand end of the
405 buffer. */
406 regcache_raw_collect (current_regcache, regno,
407 (buf + sizeof (PTRACE_XFER_TYPE)
408 - register_size (current_gdbarch, regno)));
409
12c266ea 410 for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
45229ea4
EZ
411 {
412 errno = 0;
413 ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
414 *(PTRACE_XFER_TYPE *) & buf[i]);
415 regaddr += sizeof (PTRACE_XFER_TYPE);
e3f36dbd
KB
416
417 if (errno == EIO
418 && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
419 {
420 /* Some older kernel versions don't allow fpscr to be written. */
421 continue;
422 }
423
45229ea4
EZ
424 if (errno != 0)
425 {
426 sprintf (mess, "writing register %s (#%d)",
427 REGISTER_NAME (regno), regno);
428 perror_with_name (mess);
429 }
430 }
431}
432
9abe5450
EZ
433static void
434fill_vrregset (gdb_vrregset_t *vrregsetp)
435{
436 int i;
437 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
438 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
12c266ea
AC
439 int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
440 int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
9abe5450
EZ
441
442 for (i = 0; i < num_of_vrregs; i++)
443 {
444 /* The last 2 registers of this set are only 32 bit long, not
445 128, but only VSCR is fetched as a 16 bytes quantity. */
446 if (i == (num_of_vrregs - 2))
447 regcache_collect (tdep->ppc_vr0_regnum + i,
448 *vrregsetp + i * vrregsize + offset);
449 else
450 regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
451 }
452}
453
454static void
455store_altivec_registers (int tid)
456{
457 int ret;
458 gdb_vrregset_t regs;
459
0897f59b 460 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
9abe5450
EZ
461 if (ret < 0)
462 {
463 if (errno == EIO)
464 {
465 have_ptrace_getvrregs = 0;
466 return;
467 }
468 perror_with_name ("Couldn't get AltiVec registers");
469 }
470
471 fill_vrregset (&regs);
472
0897f59b 473 if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
9abe5450
EZ
474 perror_with_name ("Couldn't write AltiVec registers");
475}
476
45229ea4 477static void
05f13b9c 478store_ppc_registers (int tid)
45229ea4
EZ
479{
480 int i;
9abe5450 481 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
45229ea4 482
e3f36dbd 483 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
05f13b9c 484 store_register (tid, i);
e3f36dbd
KB
485 if (tdep->ppc_mq_regnum != -1)
486 store_register (tid, tdep->ppc_mq_regnum);
9abe5450
EZ
487 if (have_ptrace_getvrregs)
488 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
489 store_altivec_registers (tid);
45229ea4
EZ
490}
491
492void
493store_inferior_registers (int regno)
494{
05f13b9c
EZ
495 /* Overload thread id onto process id */
496 int tid = TIDGET (inferior_ptid);
497
498 /* No thread id, just use process id */
499 if (tid == 0)
500 tid = PIDGET (inferior_ptid);
501
45229ea4 502 if (regno >= 0)
05f13b9c 503 store_register (tid, regno);
45229ea4 504 else
05f13b9c 505 store_ppc_registers (tid);
45229ea4
EZ
506}
507
50c9bd31 508void
8ae45c11 509supply_gregset (gdb_gregset_t *gregsetp)
c877c8e6 510{
f9be684a
AC
511 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
512 interface, and not the wordsize of the program's ABI. */
513 int wordsize = sizeof (PTRACE_XFER_TYPE);
514 ppc_linux_supply_gregset (current_regcache, -1, gregsetp,
515 sizeof (gdb_gregset_t), wordsize);
516}
517
518static void
519right_fill_reg (int regnum, void *reg)
520{
521 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
522 interface, and not the wordsize of the program's ABI. */
523 int wordsize = sizeof (PTRACE_XFER_TYPE);
524 /* Right fill the register. */
525 regcache_raw_collect (current_regcache, regnum,
526 ((bfd_byte *) reg
527 + wordsize
528 - register_size (current_gdbarch, regnum)));
c877c8e6
KB
529}
530
fdb28ac4 531void
8ae45c11 532fill_gregset (gdb_gregset_t *gregsetp, int regno)
fdb28ac4
KB
533{
534 int regi;
2ac44c70 535 elf_greg_t *regp = (elf_greg_t *) gregsetp;
dc5cfeb6 536 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
f9be684a
AC
537 const int elf_ngreg = 48;
538
539
540 /* Start with zeros. */
541 memset (regp, 0, elf_ngreg * sizeof (*regp));
fdb28ac4 542
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KB
543 for (regi = 0; regi < 32; regi++)
544 {
16333c4f 545 if ((regno == -1) || regno == regi)
f9be684a 546 right_fill_reg (regi, (regp + PT_R0 + regi));
fdb28ac4
KB
547 }
548
16333c4f 549 if ((regno == -1) || regno == PC_REGNUM)
f9be684a 550 right_fill_reg (PC_REGNUM, regp + PT_NIP);
05f13b9c 551 if ((regno == -1) || regno == tdep->ppc_lr_regnum)
f9be684a 552 right_fill_reg (tdep->ppc_lr_regnum, regp + PT_LNK);
05f13b9c 553 if ((regno == -1) || regno == tdep->ppc_cr_regnum)
dc5cfeb6 554 regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
05f13b9c 555 if ((regno == -1) || regno == tdep->ppc_xer_regnum)
dc5cfeb6 556 regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
05f13b9c 557 if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
f9be684a 558 right_fill_reg (tdep->ppc_ctr_regnum, regp + PT_CTR);
f8c59253 559#ifdef PT_MQ
e3f36dbd
KB
560 if (((regno == -1) || regno == tdep->ppc_mq_regnum)
561 && (tdep->ppc_mq_regnum != -1))
f9be684a 562 right_fill_reg (tdep->ppc_mq_regnum, regp + PT_MQ);
f8c59253 563#endif
05f13b9c 564 if ((regno == -1) || regno == tdep->ppc_ps_regnum)
f9be684a 565 right_fill_reg (tdep->ppc_ps_regnum, regp + PT_MSR);
fdb28ac4
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566}
567
50c9bd31 568void
8ae45c11 569supply_fpregset (gdb_fpregset_t * fpregsetp)
c877c8e6 570{
f9be684a
AC
571 ppc_linux_supply_fpregset (NULL, current_regcache, -1, fpregsetp,
572 sizeof (gdb_fpregset_t));
c877c8e6 573}
fdb28ac4 574
9abe5450
EZ
575/* Given a pointer to a floating point register set in /proc format
576 (fpregset_t *), update the register specified by REGNO from gdb's
577 idea of the current floating point register set. If REGNO is -1,
578 update them all. */
fdb28ac4 579void
8ae45c11 580fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
fdb28ac4
KB
581{
582 int regi;
e3f36dbd 583 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
f9be684a 584 bfd_byte *fpp = (void *) fpregsetp;
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585
586 for (regi = 0; regi < 32; regi++)
587 {
588 if ((regno == -1) || (regno == FP0_REGNUM + regi))
f9be684a 589 regcache_collect (FP0_REGNUM + regi, fpp + 8 * regi);
fdb28ac4 590 }
e3f36dbd 591 if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
f9be684a 592 right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32));
fdb28ac4 593}
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