* gdb.texinfo (Target Commands): Fix typo.
[deliverable/binutils-gdb.git] / gdb / ppc-linux-tdep.c
CommitLineData
c877c8e6 1/* Target-dependent code for GDB, the GNU debugger.
4e052eda 2
28e7fd62 3 Copyright (C) 1986-2013 Free Software Foundation, Inc.
c877c8e6
KB
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
c877c8e6
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c877c8e6
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19
20#include "defs.h"
21#include "frame.h"
22#include "inferior.h"
23#include "symtab.h"
24#include "target.h"
25#include "gdbcore.h"
26#include "gdbcmd.h"
27#include "symfile.h"
28#include "objfiles.h"
4e052eda 29#include "regcache.h"
fd0407d6 30#include "value.h"
4be87837 31#include "osabi.h"
f9be684a 32#include "regset.h"
6ded7999 33#include "solib-svr4.h"
85e747d2 34#include "solib-spu.h"
cc5f0d61
UW
35#include "solib.h"
36#include "solist.h"
9aa1e687 37#include "ppc-tdep.h"
7284e1be 38#include "ppc-linux-tdep.h"
5d853008 39#include "glibc-tdep.h"
61a65099
KB
40#include "trad-frame.h"
41#include "frame-unwind.h"
a8f60bfc 42#include "tramp-frame.h"
85e747d2
UW
43#include "observer.h"
44#include "auxv.h"
45#include "elf/common.h"
cc5f0d61
UW
46#include "exceptions.h"
47#include "arch-utils.h"
48#include "spu-tdep.h"
a96d9b2e 49#include "xml-syscall.h"
a5ee0f0c 50#include "linux-tdep.h"
9aa1e687 51
55aa24fb
SDJ
52#include "stap-probe.h"
53#include "ax.h"
54#include "ax-gdb.h"
55#include "cli/cli-utils.h"
56#include "parser-defs.h"
57#include "user-regs.h"
58#include <ctype.h>
59
7284e1be
UW
60#include "features/rs6000/powerpc-32l.c"
61#include "features/rs6000/powerpc-altivec32l.c"
f4d9bade 62#include "features/rs6000/powerpc-cell32l.c"
604c2f83 63#include "features/rs6000/powerpc-vsx32l.c"
69abc51c
TJB
64#include "features/rs6000/powerpc-isa205-32l.c"
65#include "features/rs6000/powerpc-isa205-altivec32l.c"
66#include "features/rs6000/powerpc-isa205-vsx32l.c"
7284e1be
UW
67#include "features/rs6000/powerpc-64l.c"
68#include "features/rs6000/powerpc-altivec64l.c"
f4d9bade 69#include "features/rs6000/powerpc-cell64l.c"
604c2f83 70#include "features/rs6000/powerpc-vsx64l.c"
69abc51c
TJB
71#include "features/rs6000/powerpc-isa205-64l.c"
72#include "features/rs6000/powerpc-isa205-altivec64l.c"
73#include "features/rs6000/powerpc-isa205-vsx64l.c"
7284e1be
UW
74#include "features/rs6000/powerpc-e500l.c"
75
5d853008
ME
76/* Shared library operations for PowerPC-Linux. */
77static struct target_so_ops powerpc_so_ops;
78
a96d9b2e
SDJ
79/* The syscall's XML filename for PPC and PPC64. */
80#define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml"
81#define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml"
c877c8e6 82
122a33de
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83/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
84 in much the same fashion as memory_remove_breakpoint in mem-break.c,
85 but is careful not to write back the previous contents if the code
86 in question has changed in between inserting the breakpoint and
87 removing it.
88
89 Here is the problem that we're trying to solve...
90
91 Once upon a time, before introducing this function to remove
92 breakpoints from the inferior, setting a breakpoint on a shared
93 library function prior to running the program would not work
94 properly. In order to understand the problem, it is first
95 necessary to understand a little bit about dynamic linking on
96 this platform.
97
98 A call to a shared library function is accomplished via a bl
99 (branch-and-link) instruction whose branch target is an entry
100 in the procedure linkage table (PLT). The PLT in the object
101 file is uninitialized. To gdb, prior to running the program, the
102 entries in the PLT are all zeros.
103
104 Once the program starts running, the shared libraries are loaded
105 and the procedure linkage table is initialized, but the entries in
106 the table are not (necessarily) resolved. Once a function is
107 actually called, the code in the PLT is hit and the function is
108 resolved. In order to better illustrate this, an example is in
109 order; the following example is from the gdb testsuite.
110
111 We start the program shmain.
112
113 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
114 [...]
115
116 We place two breakpoints, one on shr1 and the other on main.
117
118 (gdb) b shr1
119 Breakpoint 1 at 0x100409d4
120 (gdb) b main
121 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
122
123 Examine the instruction (and the immediatly following instruction)
124 upon which the breakpoint was placed. Note that the PLT entry
125 for shr1 contains zeros.
126
127 (gdb) x/2i 0x100409d4
128 0x100409d4 <shr1>: .long 0x0
129 0x100409d8 <shr1+4>: .long 0x0
130
131 Now run 'til main.
132
133 (gdb) r
134 Starting program: gdb.base/shmain
135 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
136
137 Breakpoint 2, main ()
138 at gdb.base/shmain.c:44
139 44 g = 1;
140
141 Examine the PLT again. Note that the loading of the shared
142 library has initialized the PLT to code which loads a constant
143 (which I think is an index into the GOT) into r11 and then
144 branchs a short distance to the code which actually does the
145 resolving.
146
147 (gdb) x/2i 0x100409d4
148 0x100409d4 <shr1>: li r11,4
149 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
150 (gdb) c
151 Continuing.
152
153 Breakpoint 1, shr1 (x=1)
154 at gdb.base/shr1.c:19
155 19 l = 1;
156
157 Now we've hit the breakpoint at shr1. (The breakpoint was
158 reset from the PLT entry to the actual shr1 function after the
159 shared library was loaded.) Note that the PLT entry has been
0df8b418 160 resolved to contain a branch that takes us directly to shr1.
122a33de
KB
161 (The real one, not the PLT entry.)
162
163 (gdb) x/2i 0x100409d4
164 0x100409d4 <shr1>: b 0xffaf76c <shr1>
165 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
166
167 The thing to note here is that the PLT entry for shr1 has been
168 changed twice.
169
170 Now the problem should be obvious. GDB places a breakpoint (a
0df8b418 171 trap instruction) on the zero value of the PLT entry for shr1.
122a33de
KB
172 Later on, after the shared library had been loaded and the PLT
173 initialized, GDB gets a signal indicating this fact and attempts
174 (as it always does when it stops) to remove all the breakpoints.
175
176 The breakpoint removal was causing the former contents (a zero
177 word) to be written back to the now initialized PLT entry thus
178 destroying a portion of the initialization that had occurred only a
179 short time ago. When execution continued, the zero word would be
766062f6 180 executed as an instruction an illegal instruction trap was
122a33de
KB
181 generated instead. (0 is not a legal instruction.)
182
183 The fix for this problem was fairly straightforward. The function
184 memory_remove_breakpoint from mem-break.c was copied to this file,
185 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
186 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
187 function.
188
189 The differences between ppc_linux_memory_remove_breakpoint () and
190 memory_remove_breakpoint () are minor. All that the former does
191 that the latter does not is check to make sure that the breakpoint
192 location actually contains a breakpoint (trap instruction) prior
193 to attempting to write back the old contents. If it does contain
0df8b418 194 a trap instruction, we allow the old contents to be written back.
122a33de
KB
195 Otherwise, we silently do nothing.
196
197 The big question is whether memory_remove_breakpoint () should be
198 changed to have the same functionality. The downside is that more
199 traffic is generated for remote targets since we'll have an extra
200 fetch of a memory word each time a breakpoint is removed.
201
202 For the time being, we'll leave this self-modifying-code-friendly
203 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
204 else in the event that some other platform has similar needs with
205 regard to removing breakpoints in some potentially self modifying
206 code. */
63807e1d 207static int
ae4b2284
MD
208ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
209 struct bp_target_info *bp_tgt)
482ca3f5 210{
8181d85f 211 CORE_ADDR addr = bp_tgt->placed_address;
f4f9705a 212 const unsigned char *bp;
482ca3f5
KB
213 int val;
214 int bplen;
50fd1280 215 gdb_byte old_contents[BREAKPOINT_MAX];
8defab1a 216 struct cleanup *cleanup;
482ca3f5
KB
217
218 /* Determine appropriate breakpoint contents and size for this address. */
ae4b2284 219 bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
482ca3f5 220 if (bp == NULL)
8a3fe4f8 221 error (_("Software breakpoints not implemented for this target."));
482ca3f5 222
8defab1a
DJ
223 /* Make sure we see the memory breakpoints. */
224 cleanup = make_show_memory_breakpoints_cleanup (1);
482ca3f5
KB
225 val = target_read_memory (addr, old_contents, bplen);
226
227 /* If our breakpoint is no longer at the address, this means that the
228 program modified the code on us, so it is wrong to put back the
0df8b418 229 old value. */
482ca3f5 230 if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
dd110abf 231 val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
482ca3f5 232
8defab1a 233 do_cleanups (cleanup);
482ca3f5
KB
234 return val;
235}
6ded7999 236
b9ff3018
AC
237/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
238 than the 32 bit SYSV R4 ABI structure return convention - all
239 structures, no matter their size, are put in memory. Vectors,
240 which were added later, do get returned in a register though. */
241
05580c65 242static enum return_value_convention
6a3a010b 243ppc_linux_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
244 struct type *valtype, struct regcache *regcache,
245 gdb_byte *readbuf, const gdb_byte *writebuf)
b9ff3018 246{
05580c65
AC
247 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
248 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
249 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
250 && TYPE_VECTOR (valtype)))
251 return RETURN_VALUE_STRUCT_CONVENTION;
252 else
6a3a010b 253 return ppc_sysv_abi_return_value (gdbarch, function, valtype, regcache,
c055b101 254 readbuf, writebuf);
b9ff3018
AC
255}
256
f470a70a
JB
257/* Macros for matching instructions. Note that, since all the
258 operands are masked off before they're or-ed into the instruction,
259 you can use -1 to make masks. */
260
261#define insn_d(opcd, rts, ra, d) \
262 ((((opcd) & 0x3f) << 26) \
263 | (((rts) & 0x1f) << 21) \
264 | (((ra) & 0x1f) << 16) \
265 | ((d) & 0xffff))
266
267#define insn_ds(opcd, rts, ra, d, xo) \
268 ((((opcd) & 0x3f) << 26) \
269 | (((rts) & 0x1f) << 21) \
270 | (((ra) & 0x1f) << 16) \
271 | ((d) & 0xfffc) \
272 | ((xo) & 0x3))
273
274#define insn_xfx(opcd, rts, spr, xo) \
275 ((((opcd) & 0x3f) << 26) \
276 | (((rts) & 0x1f) << 21) \
277 | (((spr) & 0x1f) << 16) \
278 | (((spr) & 0x3e0) << 6) \
279 | (((xo) & 0x3ff) << 1))
280
281/* Read a PPC instruction from memory. PPC instructions are always
282 big-endian, no matter what endianness the program is running in, so
283 we can't use read_memory_integer or one of its friends here. */
284static unsigned int
285read_insn (CORE_ADDR pc)
286{
287 unsigned char buf[4];
288
289 read_memory (pc, buf, 4);
290 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
291}
292
293
294/* An instruction to match. */
295struct insn_pattern
296{
0df8b418
MS
297 unsigned int mask; /* mask the insn with this... */
298 unsigned int data; /* ...and see if it matches this. */
f470a70a
JB
299 int optional; /* If non-zero, this insn may be absent. */
300};
301
302/* Return non-zero if the instructions at PC match the series
303 described in PATTERN, or zero otherwise. PATTERN is an array of
304 'struct insn_pattern' objects, terminated by an entry whose mask is
305 zero.
306
307 When the match is successful, fill INSN[i] with what PATTERN[i]
308 matched. If PATTERN[i] is optional, and the instruction wasn't
309 present, set INSN[i] to 0 (which is not a valid PPC instruction).
310 INSN should have as many elements as PATTERN. Note that, if
311 PATTERN contains optional instructions which aren't present in
312 memory, then INSN will have holes, so INSN[i] isn't necessarily the
313 i'th instruction in memory. */
314static int
315insns_match_pattern (CORE_ADDR pc,
316 struct insn_pattern *pattern,
317 unsigned int *insn)
318{
319 int i;
320
321 for (i = 0; pattern[i].mask; i++)
322 {
323 insn[i] = read_insn (pc);
324 if ((insn[i] & pattern[i].mask) == pattern[i].data)
325 pc += 4;
326 else if (pattern[i].optional)
327 insn[i] = 0;
328 else
329 return 0;
330 }
331
332 return 1;
333}
334
335
336/* Return the 'd' field of the d-form instruction INSN, properly
337 sign-extended. */
338static CORE_ADDR
339insn_d_field (unsigned int insn)
340{
341 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
342}
343
344
345/* Return the 'ds' field of the ds-form instruction INSN, with the two
346 zero bits concatenated at the right, and properly
347 sign-extended. */
348static CORE_ADDR
349insn_ds_field (unsigned int insn)
350{
351 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
352}
353
354
e538d2d7 355/* If DESC is the address of a 64-bit PowerPC GNU/Linux function
d64558a5
JB
356 descriptor, return the descriptor's entry point. */
357static CORE_ADDR
e17a4113 358ppc64_desc_entry_point (struct gdbarch *gdbarch, CORE_ADDR desc)
d64558a5 359{
e17a4113 360 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d64558a5 361 /* The first word of the descriptor is the entry point. */
e17a4113 362 return (CORE_ADDR) read_memory_unsigned_integer (desc, 8, byte_order);
d64558a5
JB
363}
364
365
f470a70a
JB
366/* Pattern for the standard linkage function. These are built by
367 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
368 zero. */
42848c96 369static struct insn_pattern ppc64_standard_linkage1[] =
f470a70a
JB
370 {
371 /* addis r12, r2, <any> */
372 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
373
374 /* std r2, 40(r1) */
375 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
376
377 /* ld r11, <any>(r12) */
378 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
379
380 /* addis r12, r12, 1 <optional> */
42848c96 381 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
f470a70a
JB
382
383 /* ld r2, <any>(r12) */
384 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
385
386 /* addis r12, r12, 1 <optional> */
42848c96 387 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
f470a70a
JB
388
389 /* mtctr r11 */
42848c96 390 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
f470a70a 391
2834ab42
EBM
392 /* ld r11, <any>(r12) <optional> */
393 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 1 },
f470a70a
JB
394
395 /* bctr */
396 { -1, 0x4e800420, 0 },
397
398 { 0, 0, 0 }
399 };
42848c96
UW
400#define PPC64_STANDARD_LINKAGE1_LEN \
401 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
402
403static struct insn_pattern ppc64_standard_linkage2[] =
404 {
405 /* addis r12, r2, <any> */
406 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
407
408 /* std r2, 40(r1) */
409 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
410
411 /* ld r11, <any>(r12) */
412 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
413
414 /* addi r12, r12, <any> <optional> */
415 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
416
417 /* mtctr r11 */
418 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
419
420 /* ld r2, <any>(r12) */
421 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
422
2834ab42
EBM
423 /* ld r11, <any>(r12) <optional> */
424 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 1 },
42848c96
UW
425
426 /* bctr */
427 { -1, 0x4e800420, 0 },
428
429 { 0, 0, 0 }
430 };
431#define PPC64_STANDARD_LINKAGE2_LEN \
432 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
433
434static struct insn_pattern ppc64_standard_linkage3[] =
435 {
436 /* std r2, 40(r1) */
437 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
438
439 /* ld r11, <any>(r2) */
440 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
441
442 /* addi r2, r2, <any> <optional> */
443 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
444
445 /* mtctr r11 */
446 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
447
2834ab42
EBM
448 /* ld r11, <any>(r2) <optional> */
449 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 1 },
42848c96
UW
450
451 /* ld r2, <any>(r2) */
452 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
453
454 /* bctr */
455 { -1, 0x4e800420, 0 },
456
457 { 0, 0, 0 }
458 };
459#define PPC64_STANDARD_LINKAGE3_LEN \
460 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
461
f470a70a 462
f470a70a
JB
463/* When the dynamic linker is doing lazy symbol resolution, the first
464 call to a function in another object will go like this:
465
466 - The user's function calls the linkage function:
467
468 100007c4: 4b ff fc d5 bl 10000498
469 100007c8: e8 41 00 28 ld r2,40(r1)
470
471 - The linkage function loads the entry point (and other stuff) from
472 the function descriptor in the PLT, and jumps to it:
473
474 10000498: 3d 82 00 00 addis r12,r2,0
475 1000049c: f8 41 00 28 std r2,40(r1)
476 100004a0: e9 6c 80 98 ld r11,-32616(r12)
477 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
478 100004a8: 7d 69 03 a6 mtctr r11
479 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
480 100004b0: 4e 80 04 20 bctr
481
482 - But since this is the first time that PLT entry has been used, it
483 sends control to its glink entry. That loads the number of the
484 PLT entry and jumps to the common glink0 code:
485
486 10000c98: 38 00 00 00 li r0,0
487 10000c9c: 4b ff ff dc b 10000c78
488
489 - The common glink0 code then transfers control to the dynamic
490 linker's fixup code:
491
492 10000c78: e8 41 00 28 ld r2,40(r1)
493 10000c7c: 3d 82 00 00 addis r12,r2,0
494 10000c80: e9 6c 80 80 ld r11,-32640(r12)
495 10000c84: e8 4c 80 88 ld r2,-32632(r12)
496 10000c88: 7d 69 03 a6 mtctr r11
497 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
498 10000c90: 4e 80 04 20 bctr
499
500 Eventually, this code will figure out how to skip all of this,
501 including the dynamic linker. At the moment, we just get through
502 the linkage function. */
503
504/* If the current thread is about to execute a series of instructions
505 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
506 from that pattern match, return the code address to which the
507 standard linkage function will send them. (This doesn't deal with
508 dynamic linker lazy symbol resolution stubs.) */
509static CORE_ADDR
42848c96
UW
510ppc64_standard_linkage1_target (struct frame_info *frame,
511 CORE_ADDR pc, unsigned int *insn)
f470a70a 512{
e17a4113
UW
513 struct gdbarch *gdbarch = get_frame_arch (frame);
514 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
f470a70a
JB
515
516 /* The address of the function descriptor this linkage function
517 references. */
518 CORE_ADDR desc
52f729a7
UW
519 = ((CORE_ADDR) get_frame_register_unsigned (frame,
520 tdep->ppc_gp0_regnum + 2)
f470a70a
JB
521 + (insn_d_field (insn[0]) << 16)
522 + insn_ds_field (insn[2]));
523
524 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 525 return ppc64_desc_entry_point (gdbarch, desc);
f470a70a
JB
526}
527
6207416c 528static struct core_regset_section ppc_linux_vsx_regset_sections[] =
17ea7499 529{
2f2241f1 530 { ".reg", 48 * 4, "general-purpose" },
1b1818e4
UW
531 { ".reg2", 264, "floating-point" },
532 { ".reg-ppc-vmx", 544, "ppc Altivec" },
533 { ".reg-ppc-vsx", 256, "POWER7 VSX" },
17ea7499
CES
534 { NULL, 0}
535};
536
6207416c
LM
537static struct core_regset_section ppc_linux_vmx_regset_sections[] =
538{
2f2241f1 539 { ".reg", 48 * 4, "general-purpose" },
1b1818e4
UW
540 { ".reg2", 264, "floating-point" },
541 { ".reg-ppc-vmx", 544, "ppc Altivec" },
6207416c
LM
542 { NULL, 0}
543};
544
545static struct core_regset_section ppc_linux_fp_regset_sections[] =
546{
2f2241f1
UW
547 { ".reg", 48 * 4, "general-purpose" },
548 { ".reg2", 264, "floating-point" },
549 { NULL, 0}
550};
551
552static struct core_regset_section ppc64_linux_vsx_regset_sections[] =
553{
554 { ".reg", 48 * 8, "general-purpose" },
555 { ".reg2", 264, "floating-point" },
556 { ".reg-ppc-vmx", 544, "ppc Altivec" },
557 { ".reg-ppc-vsx", 256, "POWER7 VSX" },
558 { NULL, 0}
559};
560
561static struct core_regset_section ppc64_linux_vmx_regset_sections[] =
562{
563 { ".reg", 48 * 8, "general-purpose" },
564 { ".reg2", 264, "floating-point" },
565 { ".reg-ppc-vmx", 544, "ppc Altivec" },
566 { NULL, 0}
567};
568
569static struct core_regset_section ppc64_linux_fp_regset_sections[] =
570{
571 { ".reg", 48 * 8, "general-purpose" },
1b1818e4 572 { ".reg2", 264, "floating-point" },
6207416c
LM
573 { NULL, 0}
574};
575
42848c96
UW
576static CORE_ADDR
577ppc64_standard_linkage2_target (struct frame_info *frame,
578 CORE_ADDR pc, unsigned int *insn)
579{
e17a4113
UW
580 struct gdbarch *gdbarch = get_frame_arch (frame);
581 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
42848c96
UW
582
583 /* The address of the function descriptor this linkage function
584 references. */
585 CORE_ADDR desc
586 = ((CORE_ADDR) get_frame_register_unsigned (frame,
587 tdep->ppc_gp0_regnum + 2)
588 + (insn_d_field (insn[0]) << 16)
589 + insn_ds_field (insn[2]));
590
591 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 592 return ppc64_desc_entry_point (gdbarch, desc);
42848c96
UW
593}
594
595static CORE_ADDR
596ppc64_standard_linkage3_target (struct frame_info *frame,
597 CORE_ADDR pc, unsigned int *insn)
598{
e17a4113
UW
599 struct gdbarch *gdbarch = get_frame_arch (frame);
600 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
42848c96
UW
601
602 /* The address of the function descriptor this linkage function
603 references. */
604 CORE_ADDR desc
605 = ((CORE_ADDR) get_frame_register_unsigned (frame,
606 tdep->ppc_gp0_regnum + 2)
607 + insn_ds_field (insn[1]));
608
609 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 610 return ppc64_desc_entry_point (gdbarch, desc);
42848c96
UW
611}
612
5d853008
ME
613/* PLT stub in executable. */
614static struct insn_pattern powerpc32_plt_stub[] =
615 {
616 { 0xffff0000, 0x3d600000, 0 }, /* lis r11, xxxx */
617 { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */
618 { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
619 { 0xffffffff, 0x4e800420, 0 }, /* bctr */
620 { 0, 0, 0 }
621 };
622
623/* PLT stub in shared library. */
624static struct insn_pattern powerpc32_plt_stub_so[] =
625 {
626 { 0xffff0000, 0x817e0000, 0 }, /* lwz r11, xxxx(r30) */
627 { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
628 { 0xffffffff, 0x4e800420, 0 }, /* bctr */
629 { 0xffffffff, 0x60000000, 0 }, /* nop */
630 { 0, 0, 0 }
631 };
632#define POWERPC32_PLT_STUB_LEN ARRAY_SIZE (powerpc32_plt_stub)
633
634/* Check if PC is in PLT stub. For non-secure PLT, stub is in .plt
635 section. For secure PLT, stub is in .text and we need to check
636 instruction patterns. */
637
638static int
639powerpc_linux_in_dynsym_resolve_code (CORE_ADDR pc)
640{
5d853008
ME
641 struct minimal_symbol *sym;
642
643 /* Check whether PC is in the dynamic linker. This also checks
644 whether it is in the .plt section, used by non-PIC executables. */
645 if (svr4_in_dynsym_resolve_code (pc))
646 return 1;
647
648 /* Check if we are in the resolver. */
649 sym = lookup_minimal_symbol_by_pc (pc);
2e24f4aa
JK
650 if (sym != NULL
651 && (strcmp (SYMBOL_LINKAGE_NAME (sym), "__glink") == 0
652 || strcmp (SYMBOL_LINKAGE_NAME (sym), "__glink_PLTresolve") == 0))
5d853008
ME
653 return 1;
654
655 return 0;
656}
657
658/* Follow PLT stub to actual routine. */
659
660static CORE_ADDR
661ppc_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
662{
663 int insnbuf[POWERPC32_PLT_STUB_LEN];
664 struct gdbarch *gdbarch = get_frame_arch (frame);
665 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
666 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
667 CORE_ADDR target = 0;
668
669 if (insns_match_pattern (pc, powerpc32_plt_stub, insnbuf))
670 {
671 /* Insn pattern is
672 lis r11, xxxx
673 lwz r11, xxxx(r11)
674 Branch target is in r11. */
675
676 target = (insn_d_field (insnbuf[0]) << 16) | insn_d_field (insnbuf[1]);
677 target = read_memory_unsigned_integer (target, 4, byte_order);
678 }
679
680 if (insns_match_pattern (pc, powerpc32_plt_stub_so, insnbuf))
681 {
682 /* Insn pattern is
683 lwz r11, xxxx(r30)
684 Branch target is in r11. */
685
686 target = get_frame_register_unsigned (frame, tdep->ppc_gp0_regnum + 30)
687 + insn_d_field (insnbuf[0]);
688 target = read_memory_unsigned_integer (target, 4, byte_order);
689 }
690
691 return target;
692}
f470a70a
JB
693
694/* Given that we've begun executing a call trampoline at PC, return
695 the entry point of the function the trampoline will go to. */
696static CORE_ADDR
52f729a7 697ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
f470a70a 698{
42848c96
UW
699 unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
700 unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
701 unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
702 CORE_ADDR target;
703
704 if (insns_match_pattern (pc, ppc64_standard_linkage1,
705 ppc64_standard_linkage1_insn))
706 pc = ppc64_standard_linkage1_target (frame, pc,
707 ppc64_standard_linkage1_insn);
708 else if (insns_match_pattern (pc, ppc64_standard_linkage2,
709 ppc64_standard_linkage2_insn))
710 pc = ppc64_standard_linkage2_target (frame, pc,
711 ppc64_standard_linkage2_insn);
712 else if (insns_match_pattern (pc, ppc64_standard_linkage3,
713 ppc64_standard_linkage3_insn))
714 pc = ppc64_standard_linkage3_target (frame, pc,
715 ppc64_standard_linkage3_insn);
f470a70a
JB
716 else
717 return 0;
42848c96
UW
718
719 /* The PLT descriptor will either point to the already resolved target
720 address, or else to a glink stub. As the latter carry synthetic @plt
721 symbols, find_solib_trampoline_target should be able to resolve them. */
722 target = find_solib_trampoline_target (frame, pc);
723 return target? target : pc;
f470a70a
JB
724}
725
726
00d5f93a 727/* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
e2d0e7eb 728 GNU/Linux.
02631ec0
JB
729
730 Usually a function pointer's representation is simply the address
2bbe3cc1
DJ
731 of the function. On GNU/Linux on the PowerPC however, a function
732 pointer may be a pointer to a function descriptor.
733
734 For PPC64, a function descriptor is a TOC entry, in a data section,
735 which contains three words: the first word is the address of the
736 function, the second word is the TOC pointer (r2), and the third word
737 is the static chain value.
738
2bbe3cc1
DJ
739 Throughout GDB it is currently assumed that a function pointer contains
740 the address of the function, which is not easy to fix. In addition, the
e538d2d7
JB
741 conversion of a function address to a function pointer would
742 require allocation of a TOC entry in the inferior's memory space,
743 with all its drawbacks. To be able to call C++ virtual methods in
744 the inferior (which are called via function pointers),
745 find_function_addr uses this function to get the function address
2bbe3cc1 746 from a function pointer.
02631ec0 747
2bbe3cc1
DJ
748 If ADDR points at what is clearly a function descriptor, transform
749 it into the address of the corresponding function, if needed. Be
750 conservative, otherwise GDB will do the transformation on any
751 random addresses such as occur when there is no symbol table. */
02631ec0
JB
752
753static CORE_ADDR
00d5f93a
UW
754ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
755 CORE_ADDR addr,
756 struct target_ops *targ)
02631ec0 757{
e17a4113 758 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0542c86d 759 struct target_section *s = target_section_by_addr (targ, addr);
02631ec0 760
9b540880 761 /* Check if ADDR points to a function descriptor. */
00d5f93a 762 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
e84ee240
UW
763 {
764 /* There may be relocations that need to be applied to the .opd
765 section. Unfortunately, this function may be called at a time
766 where these relocations have not yet been performed -- this can
767 happen for example shortly after a library has been loaded with
768 dlopen, but ld.so has not yet applied the relocations.
769
770 To cope with both the case where the relocation has been applied,
771 and the case where it has not yet been applied, we do *not* read
772 the (maybe) relocated value from target memory, but we instead
773 read the non-relocated value from the BFD, and apply the relocation
774 offset manually.
775
776 This makes the assumption that all .opd entries are always relocated
777 by the same offset the section itself was relocated. This should
778 always be the case for GNU/Linux executables and shared libraries.
779 Note that other kind of object files (e.g. those added via
780 add-symbol-files) will currently never end up here anyway, as this
781 function accesses *target* sections only; only the main exec and
782 shared libraries are ever added to the target. */
783
784 gdb_byte buf[8];
785 int res;
786
787 res = bfd_get_section_contents (s->bfd, s->the_bfd_section,
788 &buf, addr - s->addr, 8);
789 if (res != 0)
e17a4113 790 return extract_unsigned_integer (buf, 8, byte_order)
e84ee240
UW
791 - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr;
792 }
9b540880
AC
793
794 return addr;
02631ec0
JB
795}
796
7284e1be
UW
797/* Wrappers to handle Linux-only registers. */
798
799static void
800ppc_linux_supply_gregset (const struct regset *regset,
801 struct regcache *regcache,
802 int regnum, const void *gregs, size_t len)
803{
804 const struct ppc_reg_offsets *offsets = regset->descr;
805
806 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
807
808 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
809 {
810 /* "orig_r3" is stored 2 slots after "pc". */
811 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
812 ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
813 offsets->pc_offset + 2 * offsets->gpr_size,
814 offsets->gpr_size);
815
816 /* "trap" is stored 8 slots after "pc". */
817 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
818 ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs,
819 offsets->pc_offset + 8 * offsets->gpr_size,
820 offsets->gpr_size);
821 }
822}
f2db237a 823
f9be684a 824static void
f2db237a
AM
825ppc_linux_collect_gregset (const struct regset *regset,
826 const struct regcache *regcache,
827 int regnum, void *gregs, size_t len)
f9be684a 828{
7284e1be
UW
829 const struct ppc_reg_offsets *offsets = regset->descr;
830
831 /* Clear areas in the linux gregset not written elsewhere. */
f2db237a
AM
832 if (regnum == -1)
833 memset (gregs, 0, len);
7284e1be 834
f2db237a 835 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
7284e1be
UW
836
837 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
838 {
839 /* "orig_r3" is stored 2 slots after "pc". */
840 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
841 ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
842 offsets->pc_offset + 2 * offsets->gpr_size,
843 offsets->gpr_size);
844
845 /* "trap" is stored 8 slots after "pc". */
846 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
847 ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs,
848 offsets->pc_offset + 8 * offsets->gpr_size,
849 offsets->gpr_size);
850 }
f9be684a
AC
851}
852
f2db237a
AM
853/* Regset descriptions. */
854static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
855 {
856 /* General-purpose registers. */
857 /* .r0_offset = */ 0,
858 /* .gpr_size = */ 4,
859 /* .xr_size = */ 4,
860 /* .pc_offset = */ 128,
861 /* .ps_offset = */ 132,
862 /* .cr_offset = */ 152,
863 /* .lr_offset = */ 144,
864 /* .ctr_offset = */ 140,
865 /* .xer_offset = */ 148,
866 /* .mq_offset = */ 156,
867
868 /* Floating-point registers. */
869 /* .f0_offset = */ 0,
870 /* .fpscr_offset = */ 256,
871 /* .fpscr_size = */ 8,
872
873 /* AltiVec registers. */
874 /* .vr0_offset = */ 0,
06caf7d2
CES
875 /* .vscr_offset = */ 512 + 12,
876 /* .vrsave_offset = */ 528
f2db237a 877 };
f9be684a 878
f2db237a
AM
879static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
880 {
881 /* General-purpose registers. */
882 /* .r0_offset = */ 0,
883 /* .gpr_size = */ 8,
884 /* .xr_size = */ 8,
885 /* .pc_offset = */ 256,
886 /* .ps_offset = */ 264,
887 /* .cr_offset = */ 304,
888 /* .lr_offset = */ 288,
889 /* .ctr_offset = */ 280,
890 /* .xer_offset = */ 296,
891 /* .mq_offset = */ 312,
892
893 /* Floating-point registers. */
894 /* .f0_offset = */ 0,
895 /* .fpscr_offset = */ 256,
896 /* .fpscr_size = */ 8,
897
898 /* AltiVec registers. */
899 /* .vr0_offset = */ 0,
06caf7d2
CES
900 /* .vscr_offset = */ 512 + 12,
901 /* .vrsave_offset = */ 528
f2db237a 902 };
2fda4977 903
f2db237a
AM
904static const struct regset ppc32_linux_gregset = {
905 &ppc32_linux_reg_offsets,
7284e1be 906 ppc_linux_supply_gregset,
f2db237a
AM
907 ppc_linux_collect_gregset,
908 NULL
f9be684a
AC
909};
910
f2db237a
AM
911static const struct regset ppc64_linux_gregset = {
912 &ppc64_linux_reg_offsets,
7284e1be 913 ppc_linux_supply_gregset,
f2db237a
AM
914 ppc_linux_collect_gregset,
915 NULL
916};
f9be684a 917
f2db237a
AM
918static const struct regset ppc32_linux_fpregset = {
919 &ppc32_linux_reg_offsets,
920 ppc_supply_fpregset,
921 ppc_collect_fpregset,
922 NULL
f9be684a
AC
923};
924
06caf7d2
CES
925static const struct regset ppc32_linux_vrregset = {
926 &ppc32_linux_reg_offsets,
927 ppc_supply_vrregset,
928 ppc_collect_vrregset,
929 NULL
930};
931
604c2f83
LM
932static const struct regset ppc32_linux_vsxregset = {
933 &ppc32_linux_reg_offsets,
934 ppc_supply_vsxregset,
935 ppc_collect_vsxregset,
936 NULL
937};
938
f2db237a
AM
939const struct regset *
940ppc_linux_gregset (int wordsize)
2fda4977 941{
f2db237a 942 return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
2fda4977
DJ
943}
944
f2db237a
AM
945const struct regset *
946ppc_linux_fpregset (void)
947{
948 return &ppc32_linux_fpregset;
949}
2fda4977 950
f9be684a
AC
951static const struct regset *
952ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
953 const char *sect_name, size_t sect_size)
2fda4977 954{
f9be684a
AC
955 struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
956 if (strcmp (sect_name, ".reg") == 0)
2fda4977 957 {
f9be684a
AC
958 if (tdep->wordsize == 4)
959 return &ppc32_linux_gregset;
2fda4977 960 else
f9be684a 961 return &ppc64_linux_gregset;
2fda4977 962 }
f9be684a 963 if (strcmp (sect_name, ".reg2") == 0)
f2db237a 964 return &ppc32_linux_fpregset;
06caf7d2
CES
965 if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
966 return &ppc32_linux_vrregset;
604c2f83
LM
967 if (strcmp (sect_name, ".reg-ppc-vsx") == 0)
968 return &ppc32_linux_vsxregset;
f9be684a 969 return NULL;
2fda4977
DJ
970}
971
a8f60bfc 972static void
5366653e 973ppc_linux_sigtramp_cache (struct frame_info *this_frame,
a8f60bfc
AC
974 struct trad_frame_cache *this_cache,
975 CORE_ADDR func, LONGEST offset,
976 int bias)
977{
978 CORE_ADDR base;
979 CORE_ADDR regs;
980 CORE_ADDR gpregs;
981 CORE_ADDR fpregs;
982 int i;
5366653e 983 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8f60bfc 984 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 985 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8f60bfc 986
5366653e
DJ
987 base = get_frame_register_unsigned (this_frame,
988 gdbarch_sp_regnum (gdbarch));
989 if (bias > 0 && get_frame_pc (this_frame) != func)
a8f60bfc
AC
990 /* See below, some signal trampolines increment the stack as their
991 first instruction, need to compensate for that. */
992 base -= bias;
993
994 /* Find the address of the register buffer pointer. */
995 regs = base + offset;
996 /* Use that to find the address of the corresponding register
997 buffers. */
e17a4113 998 gpregs = read_memory_unsigned_integer (regs, tdep->wordsize, byte_order);
a8f60bfc
AC
999 fpregs = gpregs + 48 * tdep->wordsize;
1000
1001 /* General purpose. */
1002 for (i = 0; i < 32; i++)
1003 {
1004 int regnum = i + tdep->ppc_gp0_regnum;
0df8b418
MS
1005 trad_frame_set_reg_addr (this_cache,
1006 regnum, gpregs + i * tdep->wordsize);
a8f60bfc 1007 }
3e8c568d 1008 trad_frame_set_reg_addr (this_cache,
40a6adc1 1009 gdbarch_pc_regnum (gdbarch),
3e8c568d 1010 gpregs + 32 * tdep->wordsize);
a8f60bfc
AC
1011 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
1012 gpregs + 35 * tdep->wordsize);
1013 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
1014 gpregs + 36 * tdep->wordsize);
1015 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
1016 gpregs + 37 * tdep->wordsize);
1017 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
1018 gpregs + 38 * tdep->wordsize);
1019
7284e1be
UW
1020 if (ppc_linux_trap_reg_p (gdbarch))
1021 {
1022 trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM,
1023 gpregs + 34 * tdep->wordsize);
1024 trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM,
1025 gpregs + 40 * tdep->wordsize);
1026 }
1027
60f140f9
PG
1028 if (ppc_floating_point_unit_p (gdbarch))
1029 {
1030 /* Floating point registers. */
1031 for (i = 0; i < 32; i++)
1032 {
40a6adc1 1033 int regnum = i + gdbarch_fp0_regnum (gdbarch);
60f140f9
PG
1034 trad_frame_set_reg_addr (this_cache, regnum,
1035 fpregs + i * tdep->wordsize);
1036 }
1037 trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
4019046a 1038 fpregs + 32 * tdep->wordsize);
60f140f9 1039 }
a8f60bfc
AC
1040 trad_frame_set_id (this_cache, frame_id_build (base, func));
1041}
1042
1043static void
1044ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 1045 struct frame_info *this_frame,
a8f60bfc
AC
1046 struct trad_frame_cache *this_cache,
1047 CORE_ADDR func)
1048{
5366653e 1049 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1050 0xd0 /* Offset to ucontext_t. */
1051 + 0x30 /* Offset to .reg. */,
1052 0);
1053}
1054
1055static void
1056ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 1057 struct frame_info *this_frame,
a8f60bfc
AC
1058 struct trad_frame_cache *this_cache,
1059 CORE_ADDR func)
1060{
5366653e 1061 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1062 0x80 /* Offset to ucontext_t. */
1063 + 0xe0 /* Offset to .reg. */,
1064 128);
1065}
1066
1067static void
1068ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 1069 struct frame_info *this_frame,
a8f60bfc
AC
1070 struct trad_frame_cache *this_cache,
1071 CORE_ADDR func)
1072{
5366653e 1073 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1074 0x40 /* Offset to ucontext_t. */
1075 + 0x1c /* Offset to .reg. */,
1076 0);
1077}
1078
1079static void
1080ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 1081 struct frame_info *this_frame,
a8f60bfc
AC
1082 struct trad_frame_cache *this_cache,
1083 CORE_ADDR func)
1084{
5366653e 1085 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1086 0x80 /* Offset to struct sigcontext. */
1087 + 0x38 /* Offset to .reg. */,
1088 128);
1089}
1090
1091static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
1092 SIGTRAMP_FRAME,
1093 4,
1094 {
1095 { 0x380000ac, -1 }, /* li r0, 172 */
1096 { 0x44000002, -1 }, /* sc */
1097 { TRAMP_SENTINEL_INSN },
1098 },
1099 ppc32_linux_sigaction_cache_init
1100};
1101static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
1102 SIGTRAMP_FRAME,
1103 4,
1104 {
1105 { 0x38210080, -1 }, /* addi r1,r1,128 */
1106 { 0x380000ac, -1 }, /* li r0, 172 */
1107 { 0x44000002, -1 }, /* sc */
1108 { TRAMP_SENTINEL_INSN },
1109 },
1110 ppc64_linux_sigaction_cache_init
1111};
1112static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
1113 SIGTRAMP_FRAME,
1114 4,
1115 {
1116 { 0x38000077, -1 }, /* li r0,119 */
1117 { 0x44000002, -1 }, /* sc */
1118 { TRAMP_SENTINEL_INSN },
1119 },
1120 ppc32_linux_sighandler_cache_init
1121};
1122static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
1123 SIGTRAMP_FRAME,
1124 4,
1125 {
1126 { 0x38210080, -1 }, /* addi r1,r1,128 */
1127 { 0x38000077, -1 }, /* li r0,119 */
1128 { 0x44000002, -1 }, /* sc */
1129 { TRAMP_SENTINEL_INSN },
1130 },
1131 ppc64_linux_sighandler_cache_init
1132};
1133
7284e1be 1134
85e747d2
UW
1135/* Address to use for displaced stepping. When debugging a stand-alone
1136 SPU executable, entry_point_address () will point to an SPU local-store
1137 address and is thus not usable as displaced stepping location. We use
1138 the auxiliary vector to determine the PowerPC-side entry point address
1139 instead. */
1140
1141static CORE_ADDR ppc_linux_entry_point_addr = 0;
1142
1143static void
1144ppc_linux_inferior_created (struct target_ops *target, int from_tty)
1145{
1146 ppc_linux_entry_point_addr = 0;
1147}
1148
1149static CORE_ADDR
1150ppc_linux_displaced_step_location (struct gdbarch *gdbarch)
1151{
1152 if (ppc_linux_entry_point_addr == 0)
1153 {
1154 CORE_ADDR addr;
1155
1156 /* Determine entry point from target auxiliary vector. */
1157 if (target_auxv_search (&current_target, AT_ENTRY, &addr) <= 0)
1158 error (_("Cannot find AT_ENTRY auxiliary vector entry."));
1159
1160 /* Make certain that the address points at real code, and not a
1161 function descriptor. */
1162 addr = gdbarch_convert_from_func_ptr_addr (gdbarch, addr,
1163 &current_target);
1164
1165 /* Inferior calls also use the entry point as a breakpoint location.
1166 We don't want displaced stepping to interfere with those
1167 breakpoints, so leave space. */
5931a2fa 1168 ppc_linux_entry_point_addr = addr + 2 * PPC_INSN_SIZE;
85e747d2
UW
1169 }
1170
1171 return ppc_linux_entry_point_addr;
1172}
1173
1174
7284e1be
UW
1175/* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
1176int
1177ppc_linux_trap_reg_p (struct gdbarch *gdbarch)
1178{
1179 /* If we do not have a target description with registers, then
1180 the special registers will not be included in the register set. */
1181 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1182 return 0;
1183
1184 /* If we do, then it is safe to check the size. */
1185 return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0
1186 && register_size (gdbarch, PPC_TRAP_REGNUM) > 0;
1187}
1188
a96d9b2e
SDJ
1189/* Return the current system call's number present in the
1190 r0 register. When the function fails, it returns -1. */
1191static LONGEST
1192ppc_linux_get_syscall_number (struct gdbarch *gdbarch,
1193 ptid_t ptid)
1194{
1195 struct regcache *regcache = get_thread_regcache (ptid);
1196 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1197 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1198 struct cleanup *cleanbuf;
1199 /* The content of a register */
1200 gdb_byte *buf;
1201 /* The result */
1202 LONGEST ret;
1203
1204 /* Make sure we're in a 32- or 64-bit machine */
1205 gdb_assert (tdep->wordsize == 4 || tdep->wordsize == 8);
1206
1207 buf = (gdb_byte *) xmalloc (tdep->wordsize * sizeof (gdb_byte));
1208
1209 cleanbuf = make_cleanup (xfree, buf);
1210
1211 /* Getting the system call number from the register.
1212 When dealing with PowerPC architecture, this information
1213 is stored at 0th register. */
1214 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum, buf);
1215
1216 ret = extract_signed_integer (buf, tdep->wordsize, byte_order);
1217 do_cleanups (cleanbuf);
1218
1219 return ret;
1220}
1221
7284e1be
UW
1222static void
1223ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1224{
1225 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1226
1227 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1228
1229 /* Set special TRAP register to -1 to prevent the kernel from
1230 messing with the PC we just installed, if we happen to be
1231 within an interrupted system call that the kernel wants to
1232 restart.
1233
1234 Note that after we return from the dummy call, the TRAP and
1235 ORIG_R3 registers will be automatically restored, and the
1236 kernel continues to restart the system call at this point. */
1237 if (ppc_linux_trap_reg_p (gdbarch))
1238 regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
1239}
1240
f4d9bade
UW
1241static int
1242ppc_linux_spu_section (bfd *abfd, asection *asect, void *user_data)
1243{
1244 return strncmp (bfd_section_name (abfd, asect), "SPU/", 4) == 0;
1245}
1246
7284e1be
UW
1247static const struct target_desc *
1248ppc_linux_core_read_description (struct gdbarch *gdbarch,
1249 struct target_ops *target,
1250 bfd *abfd)
1251{
f4d9bade 1252 asection *cell = bfd_sections_find_if (abfd, ppc_linux_spu_section, NULL);
7284e1be 1253 asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
604c2f83 1254 asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
7284e1be
UW
1255 asection *section = bfd_get_section_by_name (abfd, ".reg");
1256 if (! section)
1257 return NULL;
1258
1259 switch (bfd_section_size (abfd, section))
1260 {
1261 case 48 * 4:
f4d9bade
UW
1262 if (cell)
1263 return tdesc_powerpc_cell32l;
1264 else if (vsx)
604c2f83
LM
1265 return tdesc_powerpc_vsx32l;
1266 else if (altivec)
1267 return tdesc_powerpc_altivec32l;
1268 else
1269 return tdesc_powerpc_32l;
7284e1be
UW
1270
1271 case 48 * 8:
f4d9bade
UW
1272 if (cell)
1273 return tdesc_powerpc_cell64l;
1274 else if (vsx)
604c2f83
LM
1275 return tdesc_powerpc_vsx64l;
1276 else if (altivec)
1277 return tdesc_powerpc_altivec64l;
1278 else
1279 return tdesc_powerpc_64l;
7284e1be
UW
1280
1281 default:
1282 return NULL;
1283 }
1284}
1285
55aa24fb
SDJ
1286/* Implementation of `gdbarch_stap_is_single_operand', as defined in
1287 gdbarch.h. */
1288
1289static int
1290ppc_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
1291{
1292 return (*s == 'i' /* Literal number. */
1293 || (isdigit (*s) && s[1] == '('
1294 && isdigit (s[2])) /* Displacement. */
1295 || (*s == '(' && isdigit (s[1])) /* Register indirection. */
1296 || isdigit (*s)); /* Register value. */
1297}
1298
1299/* Implementation of `gdbarch_stap_parse_special_token', as defined in
1300 gdbarch.h. */
1301
1302static int
1303ppc_stap_parse_special_token (struct gdbarch *gdbarch,
1304 struct stap_parse_info *p)
1305{
1306 if (isdigit (*p->arg))
1307 {
1308 /* This temporary pointer is needed because we have to do a lookahead.
1309 We could be dealing with a register displacement, and in such case
1310 we would not need to do anything. */
1311 const char *s = p->arg;
1312 char *regname;
1313 int len;
1314 struct stoken str;
1315
1316 while (isdigit (*s))
1317 ++s;
1318
1319 if (*s == '(')
1320 {
1321 /* It is a register displacement indeed. Returning 0 means we are
1322 deferring the treatment of this case to the generic parser. */
1323 return 0;
1324 }
1325
1326 len = s - p->arg;
1327 regname = alloca (len + 2);
1328 regname[0] = 'r';
1329
1330 strncpy (regname + 1, p->arg, len);
1331 ++len;
1332 regname[len] = '\0';
1333
1334 if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1)
1335 error (_("Invalid register name `%s' on expression `%s'."),
1336 regname, p->saved_arg);
1337
1338 write_exp_elt_opcode (OP_REGISTER);
1339 str.ptr = regname;
1340 str.length = len;
1341 write_exp_string (str);
1342 write_exp_elt_opcode (OP_REGISTER);
1343
1344 p->arg = s;
1345 }
1346 else
1347 {
1348 /* All the other tokens should be handled correctly by the generic
1349 parser. */
1350 return 0;
1351 }
1352
1353 return 1;
1354}
cc5f0d61
UW
1355
1356/* Cell/B.E. active SPE context tracking support. */
1357
1358static struct objfile *spe_context_objfile = NULL;
1359static CORE_ADDR spe_context_lm_addr = 0;
1360static CORE_ADDR spe_context_offset = 0;
1361
1362static ptid_t spe_context_cache_ptid;
1363static CORE_ADDR spe_context_cache_address;
1364
1365/* Hook into inferior_created, solib_loaded, and solib_unloaded observers
1366 to track whether we've loaded a version of libspe2 (as static or dynamic
1367 library) that provides the __spe_current_active_context variable. */
1368static void
1369ppc_linux_spe_context_lookup (struct objfile *objfile)
1370{
1371 struct minimal_symbol *sym;
1372
1373 if (!objfile)
1374 {
1375 spe_context_objfile = NULL;
1376 spe_context_lm_addr = 0;
1377 spe_context_offset = 0;
1378 spe_context_cache_ptid = minus_one_ptid;
1379 spe_context_cache_address = 0;
1380 return;
1381 }
1382
1383 sym = lookup_minimal_symbol ("__spe_current_active_context", NULL, objfile);
1384 if (sym)
1385 {
1386 spe_context_objfile = objfile;
1387 spe_context_lm_addr = svr4_fetch_objfile_link_map (objfile);
1388 spe_context_offset = SYMBOL_VALUE_ADDRESS (sym);
1389 spe_context_cache_ptid = minus_one_ptid;
1390 spe_context_cache_address = 0;
1391 return;
1392 }
1393}
1394
1395static void
1396ppc_linux_spe_context_inferior_created (struct target_ops *t, int from_tty)
1397{
1398 struct objfile *objfile;
1399
1400 ppc_linux_spe_context_lookup (NULL);
1401 ALL_OBJFILES (objfile)
1402 ppc_linux_spe_context_lookup (objfile);
1403}
1404
1405static void
1406ppc_linux_spe_context_solib_loaded (struct so_list *so)
1407{
1408 if (strstr (so->so_original_name, "/libspe") != NULL)
1409 {
7e559477 1410 solib_read_symbols (so, 0);
cc5f0d61
UW
1411 ppc_linux_spe_context_lookup (so->objfile);
1412 }
1413}
1414
1415static void
1416ppc_linux_spe_context_solib_unloaded (struct so_list *so)
1417{
1418 if (so->objfile == spe_context_objfile)
1419 ppc_linux_spe_context_lookup (NULL);
1420}
1421
1422/* Retrieve contents of the N'th element in the current thread's
1423 linked SPE context list into ID and NPC. Return the address of
1424 said context element, or 0 if not found. */
1425static CORE_ADDR
1426ppc_linux_spe_context (int wordsize, enum bfd_endian byte_order,
1427 int n, int *id, unsigned int *npc)
1428{
1429 CORE_ADDR spe_context = 0;
1430 gdb_byte buf[16];
1431 int i;
1432
1433 /* Quick exit if we have not found __spe_current_active_context. */
1434 if (!spe_context_objfile)
1435 return 0;
1436
1437 /* Look up cached address of thread-local variable. */
1438 if (!ptid_equal (spe_context_cache_ptid, inferior_ptid))
1439 {
1440 struct target_ops *target = &current_target;
1441 volatile struct gdb_exception ex;
1442
1443 while (target && !target->to_get_thread_local_address)
1444 target = find_target_beneath (target);
1445 if (!target)
1446 return 0;
1447
1448 TRY_CATCH (ex, RETURN_MASK_ERROR)
1449 {
1450 /* We do not call target_translate_tls_address here, because
1451 svr4_fetch_objfile_link_map may invalidate the frame chain,
1452 which must not do while inside a frame sniffer.
1453
1454 Instead, we have cached the lm_addr value, and use that to
1455 directly call the target's to_get_thread_local_address. */
1456 spe_context_cache_address
1457 = target->to_get_thread_local_address (target, inferior_ptid,
1458 spe_context_lm_addr,
1459 spe_context_offset);
1460 spe_context_cache_ptid = inferior_ptid;
1461 }
1462
1463 if (ex.reason < 0)
1464 return 0;
1465 }
1466
1467 /* Read variable value. */
1468 if (target_read_memory (spe_context_cache_address, buf, wordsize) == 0)
1469 spe_context = extract_unsigned_integer (buf, wordsize, byte_order);
1470
1471 /* Cyle through to N'th linked list element. */
1472 for (i = 0; i < n && spe_context; i++)
1473 if (target_read_memory (spe_context + align_up (12, wordsize),
1474 buf, wordsize) == 0)
1475 spe_context = extract_unsigned_integer (buf, wordsize, byte_order);
1476 else
1477 spe_context = 0;
1478
1479 /* Read current context. */
1480 if (spe_context
1481 && target_read_memory (spe_context, buf, 12) != 0)
1482 spe_context = 0;
1483
1484 /* Extract data elements. */
1485 if (spe_context)
1486 {
1487 if (id)
1488 *id = extract_signed_integer (buf, 4, byte_order);
1489 if (npc)
1490 *npc = extract_unsigned_integer (buf + 4, 4, byte_order);
1491 }
1492
1493 return spe_context;
1494}
1495
1496
1497/* Cell/B.E. cross-architecture unwinder support. */
1498
1499struct ppu2spu_cache
1500{
1501 struct frame_id frame_id;
1502 struct regcache *regcache;
1503};
1504
1505static struct gdbarch *
1506ppu2spu_prev_arch (struct frame_info *this_frame, void **this_cache)
1507{
1508 struct ppu2spu_cache *cache = *this_cache;
1509 return get_regcache_arch (cache->regcache);
1510}
1511
1512static void
1513ppu2spu_this_id (struct frame_info *this_frame,
1514 void **this_cache, struct frame_id *this_id)
1515{
1516 struct ppu2spu_cache *cache = *this_cache;
1517 *this_id = cache->frame_id;
1518}
1519
1520static struct value *
1521ppu2spu_prev_register (struct frame_info *this_frame,
1522 void **this_cache, int regnum)
1523{
1524 struct ppu2spu_cache *cache = *this_cache;
1525 struct gdbarch *gdbarch = get_regcache_arch (cache->regcache);
1526 gdb_byte *buf;
1527
1528 buf = alloca (register_size (gdbarch, regnum));
a536c6d7
UW
1529
1530 if (regnum < gdbarch_num_regs (gdbarch))
1531 regcache_raw_read (cache->regcache, regnum, buf);
1532 else
1533 gdbarch_pseudo_register_read (gdbarch, cache->regcache, regnum, buf);
1534
cc5f0d61
UW
1535 return frame_unwind_got_bytes (this_frame, regnum, buf);
1536}
1537
1538struct ppu2spu_data
1539{
1540 struct gdbarch *gdbarch;
1541 int id;
1542 unsigned int npc;
1543 gdb_byte gprs[128*16];
1544};
1545
1546static int
1547ppu2spu_unwind_register (void *src, int regnum, gdb_byte *buf)
1548{
1549 struct ppu2spu_data *data = src;
1550 enum bfd_endian byte_order = gdbarch_byte_order (data->gdbarch);
1551
1552 if (regnum >= 0 && regnum < SPU_NUM_GPRS)
1553 memcpy (buf, data->gprs + 16*regnum, 16);
1554 else if (regnum == SPU_ID_REGNUM)
1555 store_unsigned_integer (buf, 4, byte_order, data->id);
1556 else if (regnum == SPU_PC_REGNUM)
1557 store_unsigned_integer (buf, 4, byte_order, data->npc);
1558 else
a536c6d7 1559 return REG_UNAVAILABLE;
cc5f0d61 1560
a536c6d7 1561 return REG_VALID;
cc5f0d61
UW
1562}
1563
1564static int
1565ppu2spu_sniffer (const struct frame_unwind *self,
1566 struct frame_info *this_frame, void **this_prologue_cache)
1567{
1568 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1569 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1570 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1571 struct ppu2spu_data data;
1572 struct frame_info *fi;
1573 CORE_ADDR base, func, backchain, spe_context;
1574 gdb_byte buf[8];
1575 int n = 0;
1576
1577 /* Count the number of SPU contexts already in the frame chain. */
1578 for (fi = get_next_frame (this_frame); fi; fi = get_next_frame (fi))
1579 if (get_frame_type (fi) == ARCH_FRAME
1580 && gdbarch_bfd_arch_info (get_frame_arch (fi))->arch == bfd_arch_spu)
1581 n++;
1582
1583 base = get_frame_sp (this_frame);
1584 func = get_frame_pc (this_frame);
1585 if (target_read_memory (base, buf, tdep->wordsize))
1586 return 0;
1587 backchain = extract_unsigned_integer (buf, tdep->wordsize, byte_order);
1588
1589 spe_context = ppc_linux_spe_context (tdep->wordsize, byte_order,
1590 n, &data.id, &data.npc);
1591 if (spe_context && base <= spe_context && spe_context < backchain)
1592 {
1593 char annex[32];
1594
1595 /* Find gdbarch for SPU. */
1596 struct gdbarch_info info;
1597 gdbarch_info_init (&info);
1598 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
1599 info.byte_order = BFD_ENDIAN_BIG;
1600 info.osabi = GDB_OSABI_LINUX;
1601 info.tdep_info = (void *) &data.id;
1602 data.gdbarch = gdbarch_find_by_info (info);
1603 if (!data.gdbarch)
1604 return 0;
1605
1606 xsnprintf (annex, sizeof annex, "%d/regs", data.id);
1607 if (target_read (&current_target, TARGET_OBJECT_SPU, annex,
1608 data.gprs, 0, sizeof data.gprs)
1609 == sizeof data.gprs)
1610 {
1611 struct ppu2spu_cache *cache
1612 = FRAME_OBSTACK_CALLOC (1, struct ppu2spu_cache);
1613
d37346f0
DJ
1614 struct address_space *aspace = get_frame_address_space (this_frame);
1615 struct regcache *regcache = regcache_xmalloc (data.gdbarch, aspace);
cc5f0d61
UW
1616 struct cleanup *cleanups = make_cleanup_regcache_xfree (regcache);
1617 regcache_save (regcache, ppu2spu_unwind_register, &data);
1618 discard_cleanups (cleanups);
1619
1620 cache->frame_id = frame_id_build (base, func);
1621 cache->regcache = regcache;
1622 *this_prologue_cache = cache;
1623 return 1;
1624 }
1625 }
1626
1627 return 0;
1628}
1629
1630static void
1631ppu2spu_dealloc_cache (struct frame_info *self, void *this_cache)
1632{
1633 struct ppu2spu_cache *cache = this_cache;
1634 regcache_xfree (cache->regcache);
1635}
1636
1637static const struct frame_unwind ppu2spu_unwind = {
1638 ARCH_FRAME,
8fbca658 1639 default_frame_unwind_stop_reason,
cc5f0d61
UW
1640 ppu2spu_this_id,
1641 ppu2spu_prev_register,
1642 NULL,
1643 ppu2spu_sniffer,
1644 ppu2spu_dealloc_cache,
1645 ppu2spu_prev_arch,
1646};
1647
1648
7b112f9c
JT
1649static void
1650ppc_linux_init_abi (struct gdbarch_info info,
1651 struct gdbarch *gdbarch)
1652{
1653 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7284e1be 1654 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
7b112f9c 1655
a5ee0f0c
PA
1656 linux_init_abi (info, gdbarch);
1657
b14d30e1
JM
1658 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
1659 128-bit, they are IBM long double, not IEEE quad long double as
1660 in the System V ABI PowerPC Processor Supplement. We can safely
1661 let them default to 128-bit, since the debug info will give the
1662 size of type actually used in each case. */
1663 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
1664 set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
0598a43c 1665
7284e1be
UW
1666 /* Handle inferior calls during interrupted system calls. */
1667 set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc);
1668
a96d9b2e
SDJ
1669 /* Get the syscall number from the arch's register. */
1670 set_gdbarch_get_syscall_number (gdbarch, ppc_linux_get_syscall_number);
1671
55aa24fb
SDJ
1672 /* SystemTap functions. */
1673 set_gdbarch_stap_integer_prefix (gdbarch, "i");
1674 set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
1675 set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
1676 set_gdbarch_stap_gdb_register_prefix (gdbarch, "r");
1677 set_gdbarch_stap_is_single_operand (gdbarch, ppc_stap_is_single_operand);
1678 set_gdbarch_stap_parse_special_token (gdbarch,
1679 ppc_stap_parse_special_token);
1680
7b112f9c
JT
1681 if (tdep->wordsize == 4)
1682 {
b9ff3018
AC
1683 /* Until November 2001, gcc did not comply with the 32 bit SysV
1684 R4 ABI requirement that structures less than or equal to 8
1685 bytes should be returned in registers. Instead GCC was using
b021a221 1686 the AIX/PowerOpen ABI - everything returned in memory
b9ff3018
AC
1687 (well ignoring vectors that is). When this was corrected, it
1688 wasn't fixed for GNU/Linux native platform. Use the
1689 PowerOpen struct convention. */
05580c65 1690 set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
b9ff3018 1691
7b112f9c
JT
1692 set_gdbarch_memory_remove_breakpoint (gdbarch,
1693 ppc_linux_memory_remove_breakpoint);
61a65099 1694
f470a70a 1695 /* Shared library handling. */
5d853008 1696 set_gdbarch_skip_trampoline_code (gdbarch, ppc_skip_trampoline_code);
7b112f9c 1697 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1698 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
a8f60bfc 1699
a96d9b2e
SDJ
1700 /* Setting the correct XML syscall filename. */
1701 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_PPC);
1702
a8f60bfc 1703 /* Trampolines. */
0df8b418
MS
1704 tramp_frame_prepend_unwinder (gdbarch,
1705 &ppc32_linux_sigaction_tramp_frame);
1706 tramp_frame_prepend_unwinder (gdbarch,
1707 &ppc32_linux_sighandler_tramp_frame);
a78c2d62
UW
1708
1709 /* BFD target for core files. */
1710 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1711 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpcle");
1712 else
1713 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpc");
2f2241f1
UW
1714
1715 /* Supported register sections. */
1716 if (tdesc_find_feature (info.target_desc,
1717 "org.gnu.gdb.power.vsx"))
1718 set_gdbarch_core_regset_sections (gdbarch,
1719 ppc_linux_vsx_regset_sections);
1720 else if (tdesc_find_feature (info.target_desc,
1721 "org.gnu.gdb.power.altivec"))
1722 set_gdbarch_core_regset_sections (gdbarch,
1723 ppc_linux_vmx_regset_sections);
1724 else
1725 set_gdbarch_core_regset_sections (gdbarch,
1726 ppc_linux_fp_regset_sections);
5d853008
ME
1727
1728 if (powerpc_so_ops.in_dynsym_resolve_code == NULL)
1729 {
1730 powerpc_so_ops = svr4_so_ops;
1731 /* Override dynamic resolve function. */
1732 powerpc_so_ops.in_dynsym_resolve_code =
1733 powerpc_linux_in_dynsym_resolve_code;
1734 }
1735 set_solib_ops (gdbarch, &powerpc_so_ops);
1736
1737 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
7b112f9c 1738 }
f470a70a
JB
1739
1740 if (tdep->wordsize == 8)
1741 {
00d5f93a
UW
1742 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1743 function descriptors). */
1744 set_gdbarch_convert_from_func_ptr_addr
1745 (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
1746
fb318ff7 1747 /* Shared library handling. */
2bbe3cc1 1748 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
fb318ff7
DJ
1749 set_solib_svr4_fetch_link_map_offsets
1750 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1751
a96d9b2e
SDJ
1752 /* Setting the correct XML syscall filename. */
1753 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_PPC64);
1754
a8f60bfc 1755 /* Trampolines. */
0df8b418
MS
1756 tramp_frame_prepend_unwinder (gdbarch,
1757 &ppc64_linux_sigaction_tramp_frame);
1758 tramp_frame_prepend_unwinder (gdbarch,
1759 &ppc64_linux_sighandler_tramp_frame);
a78c2d62
UW
1760
1761 /* BFD target for core files. */
1762 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1763 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpcle");
1764 else
1765 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpc");
2f2241f1
UW
1766
1767 /* Supported register sections. */
1768 if (tdesc_find_feature (info.target_desc,
1769 "org.gnu.gdb.power.vsx"))
1770 set_gdbarch_core_regset_sections (gdbarch,
1771 ppc64_linux_vsx_regset_sections);
1772 else if (tdesc_find_feature (info.target_desc,
1773 "org.gnu.gdb.power.altivec"))
1774 set_gdbarch_core_regset_sections (gdbarch,
1775 ppc64_linux_vmx_regset_sections);
1776 else
1777 set_gdbarch_core_regset_sections (gdbarch,
1778 ppc64_linux_fp_regset_sections);
f470a70a 1779 }
0df8b418
MS
1780 set_gdbarch_regset_from_core_section (gdbarch,
1781 ppc_linux_regset_from_core_section);
7284e1be 1782 set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
b2756930
KB
1783
1784 /* Enable TLS support. */
1785 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1786 svr4_fetch_objfile_link_map);
7284e1be
UW
1787
1788 if (tdesc_data)
1789 {
1790 const struct tdesc_feature *feature;
1791
1792 /* If we have target-described registers, then we can safely
1793 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1794 (whether they are described or not). */
1795 gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM);
1796 set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1);
1797
1798 /* If they are present, then assign them to the reserved number. */
1799 feature = tdesc_find_feature (info.target_desc,
1800 "org.gnu.gdb.power.linux");
1801 if (feature != NULL)
1802 {
1803 tdesc_numbered_register (feature, tdesc_data,
1804 PPC_ORIG_R3_REGNUM, "orig_r3");
1805 tdesc_numbered_register (feature, tdesc_data,
1806 PPC_TRAP_REGNUM, "trap");
1807 }
1808 }
85e747d2
UW
1809
1810 /* Enable Cell/B.E. if supported by the target. */
1811 if (tdesc_compatible_p (info.target_desc,
1812 bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu)))
1813 {
1814 /* Cell/B.E. multi-architecture support. */
1815 set_spu_solib_ops (gdbarch);
1816
cc5f0d61
UW
1817 /* Cell/B.E. cross-architecture unwinder support. */
1818 frame_unwind_prepend_unwinder (gdbarch, &ppu2spu_unwind);
1819
85e747d2
UW
1820 /* The default displaced_step_at_entry_point doesn't work for
1821 SPU stand-alone executables. */
1822 set_gdbarch_displaced_step_location (gdbarch,
1823 ppc_linux_displaced_step_location);
1824 }
f782ad9b
AS
1825
1826 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
7b112f9c
JT
1827}
1828
63807e1d
PA
1829/* Provide a prototype to silence -Wmissing-prototypes. */
1830extern initialize_file_ftype _initialize_ppc_linux_tdep;
1831
7b112f9c
JT
1832void
1833_initialize_ppc_linux_tdep (void)
1834{
0a0a4ac3
AC
1835 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1836 64-bit PowerPC, and the older rs6k. */
1837 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
1838 ppc_linux_init_abi);
1839 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
1840 ppc_linux_init_abi);
1841 gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
1842 ppc_linux_init_abi);
7284e1be 1843
85e747d2
UW
1844 /* Attach to inferior_created observer. */
1845 observer_attach_inferior_created (ppc_linux_inferior_created);
1846
cc5f0d61
UW
1847 /* Attach to observers to track __spe_current_active_context. */
1848 observer_attach_inferior_created (ppc_linux_spe_context_inferior_created);
1849 observer_attach_solib_loaded (ppc_linux_spe_context_solib_loaded);
1850 observer_attach_solib_unloaded (ppc_linux_spe_context_solib_unloaded);
1851
7284e1be
UW
1852 /* Initialize the Linux target descriptions. */
1853 initialize_tdesc_powerpc_32l ();
1854 initialize_tdesc_powerpc_altivec32l ();
f4d9bade 1855 initialize_tdesc_powerpc_cell32l ();
604c2f83 1856 initialize_tdesc_powerpc_vsx32l ();
69abc51c
TJB
1857 initialize_tdesc_powerpc_isa205_32l ();
1858 initialize_tdesc_powerpc_isa205_altivec32l ();
1859 initialize_tdesc_powerpc_isa205_vsx32l ();
7284e1be
UW
1860 initialize_tdesc_powerpc_64l ();
1861 initialize_tdesc_powerpc_altivec64l ();
f4d9bade 1862 initialize_tdesc_powerpc_cell64l ();
604c2f83 1863 initialize_tdesc_powerpc_vsx64l ();
69abc51c
TJB
1864 initialize_tdesc_powerpc_isa205_64l ();
1865 initialize_tdesc_powerpc_isa205_altivec64l ();
1866 initialize_tdesc_powerpc_isa205_vsx64l ();
7284e1be 1867 initialize_tdesc_powerpc_e500l ();
7b112f9c 1868}
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