* gdbarch.sh (make_corefile_notes): New architecture callback.
[deliverable/binutils-gdb.git] / gdb / ppc-linux-tdep.c
CommitLineData
c877c8e6 1/* Target-dependent code for GDB, the GNU debugger.
4e052eda 2
0b302171
JB
3 Copyright (C) 1986-1987, 1989, 1991-1997, 2000-2012 Free Software
4 Foundation, Inc.
c877c8e6
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5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
c877c8e6
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11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c877c8e6
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20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
26#include "gdbcore.h"
27#include "gdbcmd.h"
28#include "symfile.h"
29#include "objfiles.h"
4e052eda 30#include "regcache.h"
fd0407d6 31#include "value.h"
4be87837 32#include "osabi.h"
f9be684a 33#include "regset.h"
6ded7999 34#include "solib-svr4.h"
85e747d2 35#include "solib-spu.h"
cc5f0d61
UW
36#include "solib.h"
37#include "solist.h"
9aa1e687 38#include "ppc-tdep.h"
7284e1be 39#include "ppc-linux-tdep.h"
61a65099
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40#include "trad-frame.h"
41#include "frame-unwind.h"
a8f60bfc 42#include "tramp-frame.h"
85e747d2
UW
43#include "observer.h"
44#include "auxv.h"
45#include "elf/common.h"
cc5f0d61
UW
46#include "exceptions.h"
47#include "arch-utils.h"
48#include "spu-tdep.h"
a96d9b2e 49#include "xml-syscall.h"
a5ee0f0c 50#include "linux-tdep.h"
9aa1e687 51
7284e1be
UW
52#include "features/rs6000/powerpc-32l.c"
53#include "features/rs6000/powerpc-altivec32l.c"
f4d9bade 54#include "features/rs6000/powerpc-cell32l.c"
604c2f83 55#include "features/rs6000/powerpc-vsx32l.c"
69abc51c
TJB
56#include "features/rs6000/powerpc-isa205-32l.c"
57#include "features/rs6000/powerpc-isa205-altivec32l.c"
58#include "features/rs6000/powerpc-isa205-vsx32l.c"
7284e1be
UW
59#include "features/rs6000/powerpc-64l.c"
60#include "features/rs6000/powerpc-altivec64l.c"
f4d9bade 61#include "features/rs6000/powerpc-cell64l.c"
604c2f83 62#include "features/rs6000/powerpc-vsx64l.c"
69abc51c
TJB
63#include "features/rs6000/powerpc-isa205-64l.c"
64#include "features/rs6000/powerpc-isa205-altivec64l.c"
65#include "features/rs6000/powerpc-isa205-vsx64l.c"
7284e1be
UW
66#include "features/rs6000/powerpc-e500l.c"
67
a96d9b2e
SDJ
68/* The syscall's XML filename for PPC and PPC64. */
69#define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml"
70#define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml"
c877c8e6 71
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72/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
73 in much the same fashion as memory_remove_breakpoint in mem-break.c,
74 but is careful not to write back the previous contents if the code
75 in question has changed in between inserting the breakpoint and
76 removing it.
77
78 Here is the problem that we're trying to solve...
79
80 Once upon a time, before introducing this function to remove
81 breakpoints from the inferior, setting a breakpoint on a shared
82 library function prior to running the program would not work
83 properly. In order to understand the problem, it is first
84 necessary to understand a little bit about dynamic linking on
85 this platform.
86
87 A call to a shared library function is accomplished via a bl
88 (branch-and-link) instruction whose branch target is an entry
89 in the procedure linkage table (PLT). The PLT in the object
90 file is uninitialized. To gdb, prior to running the program, the
91 entries in the PLT are all zeros.
92
93 Once the program starts running, the shared libraries are loaded
94 and the procedure linkage table is initialized, but the entries in
95 the table are not (necessarily) resolved. Once a function is
96 actually called, the code in the PLT is hit and the function is
97 resolved. In order to better illustrate this, an example is in
98 order; the following example is from the gdb testsuite.
99
100 We start the program shmain.
101
102 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
103 [...]
104
105 We place two breakpoints, one on shr1 and the other on main.
106
107 (gdb) b shr1
108 Breakpoint 1 at 0x100409d4
109 (gdb) b main
110 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
111
112 Examine the instruction (and the immediatly following instruction)
113 upon which the breakpoint was placed. Note that the PLT entry
114 for shr1 contains zeros.
115
116 (gdb) x/2i 0x100409d4
117 0x100409d4 <shr1>: .long 0x0
118 0x100409d8 <shr1+4>: .long 0x0
119
120 Now run 'til main.
121
122 (gdb) r
123 Starting program: gdb.base/shmain
124 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
125
126 Breakpoint 2, main ()
127 at gdb.base/shmain.c:44
128 44 g = 1;
129
130 Examine the PLT again. Note that the loading of the shared
131 library has initialized the PLT to code which loads a constant
132 (which I think is an index into the GOT) into r11 and then
133 branchs a short distance to the code which actually does the
134 resolving.
135
136 (gdb) x/2i 0x100409d4
137 0x100409d4 <shr1>: li r11,4
138 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
139 (gdb) c
140 Continuing.
141
142 Breakpoint 1, shr1 (x=1)
143 at gdb.base/shr1.c:19
144 19 l = 1;
145
146 Now we've hit the breakpoint at shr1. (The breakpoint was
147 reset from the PLT entry to the actual shr1 function after the
148 shared library was loaded.) Note that the PLT entry has been
0df8b418 149 resolved to contain a branch that takes us directly to shr1.
122a33de
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150 (The real one, not the PLT entry.)
151
152 (gdb) x/2i 0x100409d4
153 0x100409d4 <shr1>: b 0xffaf76c <shr1>
154 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
155
156 The thing to note here is that the PLT entry for shr1 has been
157 changed twice.
158
159 Now the problem should be obvious. GDB places a breakpoint (a
0df8b418 160 trap instruction) on the zero value of the PLT entry for shr1.
122a33de
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161 Later on, after the shared library had been loaded and the PLT
162 initialized, GDB gets a signal indicating this fact and attempts
163 (as it always does when it stops) to remove all the breakpoints.
164
165 The breakpoint removal was causing the former contents (a zero
166 word) to be written back to the now initialized PLT entry thus
167 destroying a portion of the initialization that had occurred only a
168 short time ago. When execution continued, the zero word would be
766062f6 169 executed as an instruction an illegal instruction trap was
122a33de
KB
170 generated instead. (0 is not a legal instruction.)
171
172 The fix for this problem was fairly straightforward. The function
173 memory_remove_breakpoint from mem-break.c was copied to this file,
174 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
175 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
176 function.
177
178 The differences between ppc_linux_memory_remove_breakpoint () and
179 memory_remove_breakpoint () are minor. All that the former does
180 that the latter does not is check to make sure that the breakpoint
181 location actually contains a breakpoint (trap instruction) prior
182 to attempting to write back the old contents. If it does contain
0df8b418 183 a trap instruction, we allow the old contents to be written back.
122a33de
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184 Otherwise, we silently do nothing.
185
186 The big question is whether memory_remove_breakpoint () should be
187 changed to have the same functionality. The downside is that more
188 traffic is generated for remote targets since we'll have an extra
189 fetch of a memory word each time a breakpoint is removed.
190
191 For the time being, we'll leave this self-modifying-code-friendly
192 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
193 else in the event that some other platform has similar needs with
194 regard to removing breakpoints in some potentially self modifying
195 code. */
63807e1d 196static int
ae4b2284
MD
197ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
198 struct bp_target_info *bp_tgt)
482ca3f5 199{
8181d85f 200 CORE_ADDR addr = bp_tgt->placed_address;
f4f9705a 201 const unsigned char *bp;
482ca3f5
KB
202 int val;
203 int bplen;
50fd1280 204 gdb_byte old_contents[BREAKPOINT_MAX];
8defab1a 205 struct cleanup *cleanup;
482ca3f5
KB
206
207 /* Determine appropriate breakpoint contents and size for this address. */
ae4b2284 208 bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
482ca3f5 209 if (bp == NULL)
8a3fe4f8 210 error (_("Software breakpoints not implemented for this target."));
482ca3f5 211
8defab1a
DJ
212 /* Make sure we see the memory breakpoints. */
213 cleanup = make_show_memory_breakpoints_cleanup (1);
482ca3f5
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214 val = target_read_memory (addr, old_contents, bplen);
215
216 /* If our breakpoint is no longer at the address, this means that the
217 program modified the code on us, so it is wrong to put back the
0df8b418 218 old value. */
482ca3f5 219 if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
dd110abf 220 val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
482ca3f5 221
8defab1a 222 do_cleanups (cleanup);
482ca3f5
KB
223 return val;
224}
6ded7999 225
b9ff3018
AC
226/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
227 than the 32 bit SYSV R4 ABI structure return convention - all
228 structures, no matter their size, are put in memory. Vectors,
229 which were added later, do get returned in a register though. */
230
05580c65 231static enum return_value_convention
c055b101
CV
232ppc_linux_return_value (struct gdbarch *gdbarch, struct type *func_type,
233 struct type *valtype, struct regcache *regcache,
234 gdb_byte *readbuf, const gdb_byte *writebuf)
b9ff3018 235{
05580c65
AC
236 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
237 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
238 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
239 && TYPE_VECTOR (valtype)))
240 return RETURN_VALUE_STRUCT_CONVENTION;
241 else
c055b101
CV
242 return ppc_sysv_abi_return_value (gdbarch, func_type, valtype, regcache,
243 readbuf, writebuf);
b9ff3018
AC
244}
245
f470a70a
JB
246/* Macros for matching instructions. Note that, since all the
247 operands are masked off before they're or-ed into the instruction,
248 you can use -1 to make masks. */
249
250#define insn_d(opcd, rts, ra, d) \
251 ((((opcd) & 0x3f) << 26) \
252 | (((rts) & 0x1f) << 21) \
253 | (((ra) & 0x1f) << 16) \
254 | ((d) & 0xffff))
255
256#define insn_ds(opcd, rts, ra, d, xo) \
257 ((((opcd) & 0x3f) << 26) \
258 | (((rts) & 0x1f) << 21) \
259 | (((ra) & 0x1f) << 16) \
260 | ((d) & 0xfffc) \
261 | ((xo) & 0x3))
262
263#define insn_xfx(opcd, rts, spr, xo) \
264 ((((opcd) & 0x3f) << 26) \
265 | (((rts) & 0x1f) << 21) \
266 | (((spr) & 0x1f) << 16) \
267 | (((spr) & 0x3e0) << 6) \
268 | (((xo) & 0x3ff) << 1))
269
270/* Read a PPC instruction from memory. PPC instructions are always
271 big-endian, no matter what endianness the program is running in, so
272 we can't use read_memory_integer or one of its friends here. */
273static unsigned int
274read_insn (CORE_ADDR pc)
275{
276 unsigned char buf[4];
277
278 read_memory (pc, buf, 4);
279 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
280}
281
282
283/* An instruction to match. */
284struct insn_pattern
285{
0df8b418
MS
286 unsigned int mask; /* mask the insn with this... */
287 unsigned int data; /* ...and see if it matches this. */
f470a70a
JB
288 int optional; /* If non-zero, this insn may be absent. */
289};
290
291/* Return non-zero if the instructions at PC match the series
292 described in PATTERN, or zero otherwise. PATTERN is an array of
293 'struct insn_pattern' objects, terminated by an entry whose mask is
294 zero.
295
296 When the match is successful, fill INSN[i] with what PATTERN[i]
297 matched. If PATTERN[i] is optional, and the instruction wasn't
298 present, set INSN[i] to 0 (which is not a valid PPC instruction).
299 INSN should have as many elements as PATTERN. Note that, if
300 PATTERN contains optional instructions which aren't present in
301 memory, then INSN will have holes, so INSN[i] isn't necessarily the
302 i'th instruction in memory. */
303static int
304insns_match_pattern (CORE_ADDR pc,
305 struct insn_pattern *pattern,
306 unsigned int *insn)
307{
308 int i;
309
310 for (i = 0; pattern[i].mask; i++)
311 {
312 insn[i] = read_insn (pc);
313 if ((insn[i] & pattern[i].mask) == pattern[i].data)
314 pc += 4;
315 else if (pattern[i].optional)
316 insn[i] = 0;
317 else
318 return 0;
319 }
320
321 return 1;
322}
323
324
325/* Return the 'd' field of the d-form instruction INSN, properly
326 sign-extended. */
327static CORE_ADDR
328insn_d_field (unsigned int insn)
329{
330 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
331}
332
333
334/* Return the 'ds' field of the ds-form instruction INSN, with the two
335 zero bits concatenated at the right, and properly
336 sign-extended. */
337static CORE_ADDR
338insn_ds_field (unsigned int insn)
339{
340 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
341}
342
343
e538d2d7 344/* If DESC is the address of a 64-bit PowerPC GNU/Linux function
d64558a5
JB
345 descriptor, return the descriptor's entry point. */
346static CORE_ADDR
e17a4113 347ppc64_desc_entry_point (struct gdbarch *gdbarch, CORE_ADDR desc)
d64558a5 348{
e17a4113 349 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d64558a5 350 /* The first word of the descriptor is the entry point. */
e17a4113 351 return (CORE_ADDR) read_memory_unsigned_integer (desc, 8, byte_order);
d64558a5
JB
352}
353
354
f470a70a
JB
355/* Pattern for the standard linkage function. These are built by
356 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
357 zero. */
42848c96 358static struct insn_pattern ppc64_standard_linkage1[] =
f470a70a
JB
359 {
360 /* addis r12, r2, <any> */
361 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
362
363 /* std r2, 40(r1) */
364 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
365
366 /* ld r11, <any>(r12) */
367 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
368
369 /* addis r12, r12, 1 <optional> */
42848c96 370 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
f470a70a
JB
371
372 /* ld r2, <any>(r12) */
373 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
374
375 /* addis r12, r12, 1 <optional> */
42848c96 376 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
f470a70a
JB
377
378 /* mtctr r11 */
42848c96 379 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
f470a70a
JB
380
381 /* ld r11, <any>(r12) */
382 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
383
384 /* bctr */
385 { -1, 0x4e800420, 0 },
386
387 { 0, 0, 0 }
388 };
42848c96
UW
389#define PPC64_STANDARD_LINKAGE1_LEN \
390 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
391
392static struct insn_pattern ppc64_standard_linkage2[] =
393 {
394 /* addis r12, r2, <any> */
395 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
396
397 /* std r2, 40(r1) */
398 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
399
400 /* ld r11, <any>(r12) */
401 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
402
403 /* addi r12, r12, <any> <optional> */
404 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
405
406 /* mtctr r11 */
407 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
408
409 /* ld r2, <any>(r12) */
410 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
411
412 /* ld r11, <any>(r12) */
413 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
414
415 /* bctr */
416 { -1, 0x4e800420, 0 },
417
418 { 0, 0, 0 }
419 };
420#define PPC64_STANDARD_LINKAGE2_LEN \
421 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
422
423static struct insn_pattern ppc64_standard_linkage3[] =
424 {
425 /* std r2, 40(r1) */
426 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
427
428 /* ld r11, <any>(r2) */
429 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
430
431 /* addi r2, r2, <any> <optional> */
432 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
433
434 /* mtctr r11 */
435 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
436
437 /* ld r11, <any>(r2) */
438 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
439
440 /* ld r2, <any>(r2) */
441 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
442
443 /* bctr */
444 { -1, 0x4e800420, 0 },
445
446 { 0, 0, 0 }
447 };
448#define PPC64_STANDARD_LINKAGE3_LEN \
449 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
450
f470a70a 451
f470a70a
JB
452/* When the dynamic linker is doing lazy symbol resolution, the first
453 call to a function in another object will go like this:
454
455 - The user's function calls the linkage function:
456
457 100007c4: 4b ff fc d5 bl 10000498
458 100007c8: e8 41 00 28 ld r2,40(r1)
459
460 - The linkage function loads the entry point (and other stuff) from
461 the function descriptor in the PLT, and jumps to it:
462
463 10000498: 3d 82 00 00 addis r12,r2,0
464 1000049c: f8 41 00 28 std r2,40(r1)
465 100004a0: e9 6c 80 98 ld r11,-32616(r12)
466 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
467 100004a8: 7d 69 03 a6 mtctr r11
468 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
469 100004b0: 4e 80 04 20 bctr
470
471 - But since this is the first time that PLT entry has been used, it
472 sends control to its glink entry. That loads the number of the
473 PLT entry and jumps to the common glink0 code:
474
475 10000c98: 38 00 00 00 li r0,0
476 10000c9c: 4b ff ff dc b 10000c78
477
478 - The common glink0 code then transfers control to the dynamic
479 linker's fixup code:
480
481 10000c78: e8 41 00 28 ld r2,40(r1)
482 10000c7c: 3d 82 00 00 addis r12,r2,0
483 10000c80: e9 6c 80 80 ld r11,-32640(r12)
484 10000c84: e8 4c 80 88 ld r2,-32632(r12)
485 10000c88: 7d 69 03 a6 mtctr r11
486 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
487 10000c90: 4e 80 04 20 bctr
488
489 Eventually, this code will figure out how to skip all of this,
490 including the dynamic linker. At the moment, we just get through
491 the linkage function. */
492
493/* If the current thread is about to execute a series of instructions
494 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
495 from that pattern match, return the code address to which the
496 standard linkage function will send them. (This doesn't deal with
497 dynamic linker lazy symbol resolution stubs.) */
498static CORE_ADDR
42848c96
UW
499ppc64_standard_linkage1_target (struct frame_info *frame,
500 CORE_ADDR pc, unsigned int *insn)
f470a70a 501{
e17a4113
UW
502 struct gdbarch *gdbarch = get_frame_arch (frame);
503 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
f470a70a
JB
504
505 /* The address of the function descriptor this linkage function
506 references. */
507 CORE_ADDR desc
52f729a7
UW
508 = ((CORE_ADDR) get_frame_register_unsigned (frame,
509 tdep->ppc_gp0_regnum + 2)
f470a70a
JB
510 + (insn_d_field (insn[0]) << 16)
511 + insn_ds_field (insn[2]));
512
513 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 514 return ppc64_desc_entry_point (gdbarch, desc);
f470a70a
JB
515}
516
6207416c 517static struct core_regset_section ppc_linux_vsx_regset_sections[] =
17ea7499 518{
2f2241f1 519 { ".reg", 48 * 4, "general-purpose" },
1b1818e4
UW
520 { ".reg2", 264, "floating-point" },
521 { ".reg-ppc-vmx", 544, "ppc Altivec" },
522 { ".reg-ppc-vsx", 256, "POWER7 VSX" },
17ea7499
CES
523 { NULL, 0}
524};
525
6207416c
LM
526static struct core_regset_section ppc_linux_vmx_regset_sections[] =
527{
2f2241f1 528 { ".reg", 48 * 4, "general-purpose" },
1b1818e4
UW
529 { ".reg2", 264, "floating-point" },
530 { ".reg-ppc-vmx", 544, "ppc Altivec" },
6207416c
LM
531 { NULL, 0}
532};
533
534static struct core_regset_section ppc_linux_fp_regset_sections[] =
535{
2f2241f1
UW
536 { ".reg", 48 * 4, "general-purpose" },
537 { ".reg2", 264, "floating-point" },
538 { NULL, 0}
539};
540
541static struct core_regset_section ppc64_linux_vsx_regset_sections[] =
542{
543 { ".reg", 48 * 8, "general-purpose" },
544 { ".reg2", 264, "floating-point" },
545 { ".reg-ppc-vmx", 544, "ppc Altivec" },
546 { ".reg-ppc-vsx", 256, "POWER7 VSX" },
547 { NULL, 0}
548};
549
550static struct core_regset_section ppc64_linux_vmx_regset_sections[] =
551{
552 { ".reg", 48 * 8, "general-purpose" },
553 { ".reg2", 264, "floating-point" },
554 { ".reg-ppc-vmx", 544, "ppc Altivec" },
555 { NULL, 0}
556};
557
558static struct core_regset_section ppc64_linux_fp_regset_sections[] =
559{
560 { ".reg", 48 * 8, "general-purpose" },
1b1818e4 561 { ".reg2", 264, "floating-point" },
6207416c
LM
562 { NULL, 0}
563};
564
42848c96
UW
565static CORE_ADDR
566ppc64_standard_linkage2_target (struct frame_info *frame,
567 CORE_ADDR pc, unsigned int *insn)
568{
e17a4113
UW
569 struct gdbarch *gdbarch = get_frame_arch (frame);
570 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
42848c96
UW
571
572 /* The address of the function descriptor this linkage function
573 references. */
574 CORE_ADDR desc
575 = ((CORE_ADDR) get_frame_register_unsigned (frame,
576 tdep->ppc_gp0_regnum + 2)
577 + (insn_d_field (insn[0]) << 16)
578 + insn_ds_field (insn[2]));
579
580 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 581 return ppc64_desc_entry_point (gdbarch, desc);
42848c96
UW
582}
583
584static CORE_ADDR
585ppc64_standard_linkage3_target (struct frame_info *frame,
586 CORE_ADDR pc, unsigned int *insn)
587{
e17a4113
UW
588 struct gdbarch *gdbarch = get_frame_arch (frame);
589 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
42848c96
UW
590
591 /* The address of the function descriptor this linkage function
592 references. */
593 CORE_ADDR desc
594 = ((CORE_ADDR) get_frame_register_unsigned (frame,
595 tdep->ppc_gp0_regnum + 2)
596 + insn_ds_field (insn[1]));
597
598 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 599 return ppc64_desc_entry_point (gdbarch, desc);
42848c96
UW
600}
601
f470a70a
JB
602
603/* Given that we've begun executing a call trampoline at PC, return
604 the entry point of the function the trampoline will go to. */
605static CORE_ADDR
52f729a7 606ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
f470a70a 607{
42848c96
UW
608 unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
609 unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
610 unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
611 CORE_ADDR target;
612
613 if (insns_match_pattern (pc, ppc64_standard_linkage1,
614 ppc64_standard_linkage1_insn))
615 pc = ppc64_standard_linkage1_target (frame, pc,
616 ppc64_standard_linkage1_insn);
617 else if (insns_match_pattern (pc, ppc64_standard_linkage2,
618 ppc64_standard_linkage2_insn))
619 pc = ppc64_standard_linkage2_target (frame, pc,
620 ppc64_standard_linkage2_insn);
621 else if (insns_match_pattern (pc, ppc64_standard_linkage3,
622 ppc64_standard_linkage3_insn))
623 pc = ppc64_standard_linkage3_target (frame, pc,
624 ppc64_standard_linkage3_insn);
f470a70a
JB
625 else
626 return 0;
42848c96
UW
627
628 /* The PLT descriptor will either point to the already resolved target
629 address, or else to a glink stub. As the latter carry synthetic @plt
630 symbols, find_solib_trampoline_target should be able to resolve them. */
631 target = find_solib_trampoline_target (frame, pc);
632 return target? target : pc;
f470a70a
JB
633}
634
635
00d5f93a 636/* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
e2d0e7eb 637 GNU/Linux.
02631ec0
JB
638
639 Usually a function pointer's representation is simply the address
2bbe3cc1
DJ
640 of the function. On GNU/Linux on the PowerPC however, a function
641 pointer may be a pointer to a function descriptor.
642
643 For PPC64, a function descriptor is a TOC entry, in a data section,
644 which contains three words: the first word is the address of the
645 function, the second word is the TOC pointer (r2), and the third word
646 is the static chain value.
647
2bbe3cc1
DJ
648 Throughout GDB it is currently assumed that a function pointer contains
649 the address of the function, which is not easy to fix. In addition, the
e538d2d7
JB
650 conversion of a function address to a function pointer would
651 require allocation of a TOC entry in the inferior's memory space,
652 with all its drawbacks. To be able to call C++ virtual methods in
653 the inferior (which are called via function pointers),
654 find_function_addr uses this function to get the function address
2bbe3cc1 655 from a function pointer.
02631ec0 656
2bbe3cc1
DJ
657 If ADDR points at what is clearly a function descriptor, transform
658 it into the address of the corresponding function, if needed. Be
659 conservative, otherwise GDB will do the transformation on any
660 random addresses such as occur when there is no symbol table. */
02631ec0
JB
661
662static CORE_ADDR
00d5f93a
UW
663ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
664 CORE_ADDR addr,
665 struct target_ops *targ)
02631ec0 666{
e17a4113 667 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0542c86d 668 struct target_section *s = target_section_by_addr (targ, addr);
02631ec0 669
9b540880 670 /* Check if ADDR points to a function descriptor. */
00d5f93a 671 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
e84ee240
UW
672 {
673 /* There may be relocations that need to be applied to the .opd
674 section. Unfortunately, this function may be called at a time
675 where these relocations have not yet been performed -- this can
676 happen for example shortly after a library has been loaded with
677 dlopen, but ld.so has not yet applied the relocations.
678
679 To cope with both the case where the relocation has been applied,
680 and the case where it has not yet been applied, we do *not* read
681 the (maybe) relocated value from target memory, but we instead
682 read the non-relocated value from the BFD, and apply the relocation
683 offset manually.
684
685 This makes the assumption that all .opd entries are always relocated
686 by the same offset the section itself was relocated. This should
687 always be the case for GNU/Linux executables and shared libraries.
688 Note that other kind of object files (e.g. those added via
689 add-symbol-files) will currently never end up here anyway, as this
690 function accesses *target* sections only; only the main exec and
691 shared libraries are ever added to the target. */
692
693 gdb_byte buf[8];
694 int res;
695
696 res = bfd_get_section_contents (s->bfd, s->the_bfd_section,
697 &buf, addr - s->addr, 8);
698 if (res != 0)
e17a4113 699 return extract_unsigned_integer (buf, 8, byte_order)
e84ee240
UW
700 - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr;
701 }
9b540880
AC
702
703 return addr;
02631ec0
JB
704}
705
7284e1be
UW
706/* Wrappers to handle Linux-only registers. */
707
708static void
709ppc_linux_supply_gregset (const struct regset *regset,
710 struct regcache *regcache,
711 int regnum, const void *gregs, size_t len)
712{
713 const struct ppc_reg_offsets *offsets = regset->descr;
714
715 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
716
717 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
718 {
719 /* "orig_r3" is stored 2 slots after "pc". */
720 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
721 ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
722 offsets->pc_offset + 2 * offsets->gpr_size,
723 offsets->gpr_size);
724
725 /* "trap" is stored 8 slots after "pc". */
726 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
727 ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs,
728 offsets->pc_offset + 8 * offsets->gpr_size,
729 offsets->gpr_size);
730 }
731}
f2db237a 732
f9be684a 733static void
f2db237a
AM
734ppc_linux_collect_gregset (const struct regset *regset,
735 const struct regcache *regcache,
736 int regnum, void *gregs, size_t len)
f9be684a 737{
7284e1be
UW
738 const struct ppc_reg_offsets *offsets = regset->descr;
739
740 /* Clear areas in the linux gregset not written elsewhere. */
f2db237a
AM
741 if (regnum == -1)
742 memset (gregs, 0, len);
7284e1be 743
f2db237a 744 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
7284e1be
UW
745
746 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
747 {
748 /* "orig_r3" is stored 2 slots after "pc". */
749 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
750 ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
751 offsets->pc_offset + 2 * offsets->gpr_size,
752 offsets->gpr_size);
753
754 /* "trap" is stored 8 slots after "pc". */
755 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
756 ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs,
757 offsets->pc_offset + 8 * offsets->gpr_size,
758 offsets->gpr_size);
759 }
f9be684a
AC
760}
761
f2db237a
AM
762/* Regset descriptions. */
763static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
764 {
765 /* General-purpose registers. */
766 /* .r0_offset = */ 0,
767 /* .gpr_size = */ 4,
768 /* .xr_size = */ 4,
769 /* .pc_offset = */ 128,
770 /* .ps_offset = */ 132,
771 /* .cr_offset = */ 152,
772 /* .lr_offset = */ 144,
773 /* .ctr_offset = */ 140,
774 /* .xer_offset = */ 148,
775 /* .mq_offset = */ 156,
776
777 /* Floating-point registers. */
778 /* .f0_offset = */ 0,
779 /* .fpscr_offset = */ 256,
780 /* .fpscr_size = */ 8,
781
782 /* AltiVec registers. */
783 /* .vr0_offset = */ 0,
06caf7d2
CES
784 /* .vscr_offset = */ 512 + 12,
785 /* .vrsave_offset = */ 528
f2db237a 786 };
f9be684a 787
f2db237a
AM
788static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
789 {
790 /* General-purpose registers. */
791 /* .r0_offset = */ 0,
792 /* .gpr_size = */ 8,
793 /* .xr_size = */ 8,
794 /* .pc_offset = */ 256,
795 /* .ps_offset = */ 264,
796 /* .cr_offset = */ 304,
797 /* .lr_offset = */ 288,
798 /* .ctr_offset = */ 280,
799 /* .xer_offset = */ 296,
800 /* .mq_offset = */ 312,
801
802 /* Floating-point registers. */
803 /* .f0_offset = */ 0,
804 /* .fpscr_offset = */ 256,
805 /* .fpscr_size = */ 8,
806
807 /* AltiVec registers. */
808 /* .vr0_offset = */ 0,
06caf7d2
CES
809 /* .vscr_offset = */ 512 + 12,
810 /* .vrsave_offset = */ 528
f2db237a 811 };
2fda4977 812
f2db237a
AM
813static const struct regset ppc32_linux_gregset = {
814 &ppc32_linux_reg_offsets,
7284e1be 815 ppc_linux_supply_gregset,
f2db237a
AM
816 ppc_linux_collect_gregset,
817 NULL
f9be684a
AC
818};
819
f2db237a
AM
820static const struct regset ppc64_linux_gregset = {
821 &ppc64_linux_reg_offsets,
7284e1be 822 ppc_linux_supply_gregset,
f2db237a
AM
823 ppc_linux_collect_gregset,
824 NULL
825};
f9be684a 826
f2db237a
AM
827static const struct regset ppc32_linux_fpregset = {
828 &ppc32_linux_reg_offsets,
829 ppc_supply_fpregset,
830 ppc_collect_fpregset,
831 NULL
f9be684a
AC
832};
833
06caf7d2
CES
834static const struct regset ppc32_linux_vrregset = {
835 &ppc32_linux_reg_offsets,
836 ppc_supply_vrregset,
837 ppc_collect_vrregset,
838 NULL
839};
840
604c2f83
LM
841static const struct regset ppc32_linux_vsxregset = {
842 &ppc32_linux_reg_offsets,
843 ppc_supply_vsxregset,
844 ppc_collect_vsxregset,
845 NULL
846};
847
f2db237a
AM
848const struct regset *
849ppc_linux_gregset (int wordsize)
2fda4977 850{
f2db237a 851 return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
2fda4977
DJ
852}
853
f2db237a
AM
854const struct regset *
855ppc_linux_fpregset (void)
856{
857 return &ppc32_linux_fpregset;
858}
2fda4977 859
f9be684a
AC
860static const struct regset *
861ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
862 const char *sect_name, size_t sect_size)
2fda4977 863{
f9be684a
AC
864 struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
865 if (strcmp (sect_name, ".reg") == 0)
2fda4977 866 {
f9be684a
AC
867 if (tdep->wordsize == 4)
868 return &ppc32_linux_gregset;
2fda4977 869 else
f9be684a 870 return &ppc64_linux_gregset;
2fda4977 871 }
f9be684a 872 if (strcmp (sect_name, ".reg2") == 0)
f2db237a 873 return &ppc32_linux_fpregset;
06caf7d2
CES
874 if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
875 return &ppc32_linux_vrregset;
604c2f83
LM
876 if (strcmp (sect_name, ".reg-ppc-vsx") == 0)
877 return &ppc32_linux_vsxregset;
f9be684a 878 return NULL;
2fda4977
DJ
879}
880
a8f60bfc 881static void
5366653e 882ppc_linux_sigtramp_cache (struct frame_info *this_frame,
a8f60bfc
AC
883 struct trad_frame_cache *this_cache,
884 CORE_ADDR func, LONGEST offset,
885 int bias)
886{
887 CORE_ADDR base;
888 CORE_ADDR regs;
889 CORE_ADDR gpregs;
890 CORE_ADDR fpregs;
891 int i;
5366653e 892 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8f60bfc 893 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 894 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8f60bfc 895
5366653e
DJ
896 base = get_frame_register_unsigned (this_frame,
897 gdbarch_sp_regnum (gdbarch));
898 if (bias > 0 && get_frame_pc (this_frame) != func)
a8f60bfc
AC
899 /* See below, some signal trampolines increment the stack as their
900 first instruction, need to compensate for that. */
901 base -= bias;
902
903 /* Find the address of the register buffer pointer. */
904 regs = base + offset;
905 /* Use that to find the address of the corresponding register
906 buffers. */
e17a4113 907 gpregs = read_memory_unsigned_integer (regs, tdep->wordsize, byte_order);
a8f60bfc
AC
908 fpregs = gpregs + 48 * tdep->wordsize;
909
910 /* General purpose. */
911 for (i = 0; i < 32; i++)
912 {
913 int regnum = i + tdep->ppc_gp0_regnum;
0df8b418
MS
914 trad_frame_set_reg_addr (this_cache,
915 regnum, gpregs + i * tdep->wordsize);
a8f60bfc 916 }
3e8c568d 917 trad_frame_set_reg_addr (this_cache,
40a6adc1 918 gdbarch_pc_regnum (gdbarch),
3e8c568d 919 gpregs + 32 * tdep->wordsize);
a8f60bfc
AC
920 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
921 gpregs + 35 * tdep->wordsize);
922 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
923 gpregs + 36 * tdep->wordsize);
924 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
925 gpregs + 37 * tdep->wordsize);
926 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
927 gpregs + 38 * tdep->wordsize);
928
7284e1be
UW
929 if (ppc_linux_trap_reg_p (gdbarch))
930 {
931 trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM,
932 gpregs + 34 * tdep->wordsize);
933 trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM,
934 gpregs + 40 * tdep->wordsize);
935 }
936
60f140f9
PG
937 if (ppc_floating_point_unit_p (gdbarch))
938 {
939 /* Floating point registers. */
940 for (i = 0; i < 32; i++)
941 {
40a6adc1 942 int regnum = i + gdbarch_fp0_regnum (gdbarch);
60f140f9
PG
943 trad_frame_set_reg_addr (this_cache, regnum,
944 fpregs + i * tdep->wordsize);
945 }
946 trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
4019046a 947 fpregs + 32 * tdep->wordsize);
60f140f9 948 }
a8f60bfc
AC
949 trad_frame_set_id (this_cache, frame_id_build (base, func));
950}
951
952static void
953ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 954 struct frame_info *this_frame,
a8f60bfc
AC
955 struct trad_frame_cache *this_cache,
956 CORE_ADDR func)
957{
5366653e 958 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
959 0xd0 /* Offset to ucontext_t. */
960 + 0x30 /* Offset to .reg. */,
961 0);
962}
963
964static void
965ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 966 struct frame_info *this_frame,
a8f60bfc
AC
967 struct trad_frame_cache *this_cache,
968 CORE_ADDR func)
969{
5366653e 970 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
971 0x80 /* Offset to ucontext_t. */
972 + 0xe0 /* Offset to .reg. */,
973 128);
974}
975
976static void
977ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 978 struct frame_info *this_frame,
a8f60bfc
AC
979 struct trad_frame_cache *this_cache,
980 CORE_ADDR func)
981{
5366653e 982 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
983 0x40 /* Offset to ucontext_t. */
984 + 0x1c /* Offset to .reg. */,
985 0);
986}
987
988static void
989ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 990 struct frame_info *this_frame,
a8f60bfc
AC
991 struct trad_frame_cache *this_cache,
992 CORE_ADDR func)
993{
5366653e 994 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
995 0x80 /* Offset to struct sigcontext. */
996 + 0x38 /* Offset to .reg. */,
997 128);
998}
999
1000static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
1001 SIGTRAMP_FRAME,
1002 4,
1003 {
1004 { 0x380000ac, -1 }, /* li r0, 172 */
1005 { 0x44000002, -1 }, /* sc */
1006 { TRAMP_SENTINEL_INSN },
1007 },
1008 ppc32_linux_sigaction_cache_init
1009};
1010static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
1011 SIGTRAMP_FRAME,
1012 4,
1013 {
1014 { 0x38210080, -1 }, /* addi r1,r1,128 */
1015 { 0x380000ac, -1 }, /* li r0, 172 */
1016 { 0x44000002, -1 }, /* sc */
1017 { TRAMP_SENTINEL_INSN },
1018 },
1019 ppc64_linux_sigaction_cache_init
1020};
1021static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
1022 SIGTRAMP_FRAME,
1023 4,
1024 {
1025 { 0x38000077, -1 }, /* li r0,119 */
1026 { 0x44000002, -1 }, /* sc */
1027 { TRAMP_SENTINEL_INSN },
1028 },
1029 ppc32_linux_sighandler_cache_init
1030};
1031static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
1032 SIGTRAMP_FRAME,
1033 4,
1034 {
1035 { 0x38210080, -1 }, /* addi r1,r1,128 */
1036 { 0x38000077, -1 }, /* li r0,119 */
1037 { 0x44000002, -1 }, /* sc */
1038 { TRAMP_SENTINEL_INSN },
1039 },
1040 ppc64_linux_sighandler_cache_init
1041};
1042
7284e1be 1043
85e747d2
UW
1044/* Address to use for displaced stepping. When debugging a stand-alone
1045 SPU executable, entry_point_address () will point to an SPU local-store
1046 address and is thus not usable as displaced stepping location. We use
1047 the auxiliary vector to determine the PowerPC-side entry point address
1048 instead. */
1049
1050static CORE_ADDR ppc_linux_entry_point_addr = 0;
1051
1052static void
1053ppc_linux_inferior_created (struct target_ops *target, int from_tty)
1054{
1055 ppc_linux_entry_point_addr = 0;
1056}
1057
1058static CORE_ADDR
1059ppc_linux_displaced_step_location (struct gdbarch *gdbarch)
1060{
1061 if (ppc_linux_entry_point_addr == 0)
1062 {
1063 CORE_ADDR addr;
1064
1065 /* Determine entry point from target auxiliary vector. */
1066 if (target_auxv_search (&current_target, AT_ENTRY, &addr) <= 0)
1067 error (_("Cannot find AT_ENTRY auxiliary vector entry."));
1068
1069 /* Make certain that the address points at real code, and not a
1070 function descriptor. */
1071 addr = gdbarch_convert_from_func_ptr_addr (gdbarch, addr,
1072 &current_target);
1073
1074 /* Inferior calls also use the entry point as a breakpoint location.
1075 We don't want displaced stepping to interfere with those
1076 breakpoints, so leave space. */
5931a2fa 1077 ppc_linux_entry_point_addr = addr + 2 * PPC_INSN_SIZE;
85e747d2
UW
1078 }
1079
1080 return ppc_linux_entry_point_addr;
1081}
1082
1083
7284e1be
UW
1084/* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
1085int
1086ppc_linux_trap_reg_p (struct gdbarch *gdbarch)
1087{
1088 /* If we do not have a target description with registers, then
1089 the special registers will not be included in the register set. */
1090 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1091 return 0;
1092
1093 /* If we do, then it is safe to check the size. */
1094 return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0
1095 && register_size (gdbarch, PPC_TRAP_REGNUM) > 0;
1096}
1097
a96d9b2e
SDJ
1098/* Return the current system call's number present in the
1099 r0 register. When the function fails, it returns -1. */
1100static LONGEST
1101ppc_linux_get_syscall_number (struct gdbarch *gdbarch,
1102 ptid_t ptid)
1103{
1104 struct regcache *regcache = get_thread_regcache (ptid);
1105 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1106 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1107 struct cleanup *cleanbuf;
1108 /* The content of a register */
1109 gdb_byte *buf;
1110 /* The result */
1111 LONGEST ret;
1112
1113 /* Make sure we're in a 32- or 64-bit machine */
1114 gdb_assert (tdep->wordsize == 4 || tdep->wordsize == 8);
1115
1116 buf = (gdb_byte *) xmalloc (tdep->wordsize * sizeof (gdb_byte));
1117
1118 cleanbuf = make_cleanup (xfree, buf);
1119
1120 /* Getting the system call number from the register.
1121 When dealing with PowerPC architecture, this information
1122 is stored at 0th register. */
1123 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum, buf);
1124
1125 ret = extract_signed_integer (buf, tdep->wordsize, byte_order);
1126 do_cleanups (cleanbuf);
1127
1128 return ret;
1129}
1130
7284e1be
UW
1131static void
1132ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1133{
1134 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1135
1136 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1137
1138 /* Set special TRAP register to -1 to prevent the kernel from
1139 messing with the PC we just installed, if we happen to be
1140 within an interrupted system call that the kernel wants to
1141 restart.
1142
1143 Note that after we return from the dummy call, the TRAP and
1144 ORIG_R3 registers will be automatically restored, and the
1145 kernel continues to restart the system call at this point. */
1146 if (ppc_linux_trap_reg_p (gdbarch))
1147 regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
1148}
1149
f4d9bade
UW
1150static int
1151ppc_linux_spu_section (bfd *abfd, asection *asect, void *user_data)
1152{
1153 return strncmp (bfd_section_name (abfd, asect), "SPU/", 4) == 0;
1154}
1155
7284e1be
UW
1156static const struct target_desc *
1157ppc_linux_core_read_description (struct gdbarch *gdbarch,
1158 struct target_ops *target,
1159 bfd *abfd)
1160{
f4d9bade 1161 asection *cell = bfd_sections_find_if (abfd, ppc_linux_spu_section, NULL);
7284e1be 1162 asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
604c2f83 1163 asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
7284e1be
UW
1164 asection *section = bfd_get_section_by_name (abfd, ".reg");
1165 if (! section)
1166 return NULL;
1167
1168 switch (bfd_section_size (abfd, section))
1169 {
1170 case 48 * 4:
f4d9bade
UW
1171 if (cell)
1172 return tdesc_powerpc_cell32l;
1173 else if (vsx)
604c2f83
LM
1174 return tdesc_powerpc_vsx32l;
1175 else if (altivec)
1176 return tdesc_powerpc_altivec32l;
1177 else
1178 return tdesc_powerpc_32l;
7284e1be
UW
1179
1180 case 48 * 8:
f4d9bade
UW
1181 if (cell)
1182 return tdesc_powerpc_cell64l;
1183 else if (vsx)
604c2f83
LM
1184 return tdesc_powerpc_vsx64l;
1185 else if (altivec)
1186 return tdesc_powerpc_altivec64l;
1187 else
1188 return tdesc_powerpc_64l;
7284e1be
UW
1189
1190 default:
1191 return NULL;
1192 }
1193}
1194
cc5f0d61
UW
1195
1196/* Cell/B.E. active SPE context tracking support. */
1197
1198static struct objfile *spe_context_objfile = NULL;
1199static CORE_ADDR spe_context_lm_addr = 0;
1200static CORE_ADDR spe_context_offset = 0;
1201
1202static ptid_t spe_context_cache_ptid;
1203static CORE_ADDR spe_context_cache_address;
1204
1205/* Hook into inferior_created, solib_loaded, and solib_unloaded observers
1206 to track whether we've loaded a version of libspe2 (as static or dynamic
1207 library) that provides the __spe_current_active_context variable. */
1208static void
1209ppc_linux_spe_context_lookup (struct objfile *objfile)
1210{
1211 struct minimal_symbol *sym;
1212
1213 if (!objfile)
1214 {
1215 spe_context_objfile = NULL;
1216 spe_context_lm_addr = 0;
1217 spe_context_offset = 0;
1218 spe_context_cache_ptid = minus_one_ptid;
1219 spe_context_cache_address = 0;
1220 return;
1221 }
1222
1223 sym = lookup_minimal_symbol ("__spe_current_active_context", NULL, objfile);
1224 if (sym)
1225 {
1226 spe_context_objfile = objfile;
1227 spe_context_lm_addr = svr4_fetch_objfile_link_map (objfile);
1228 spe_context_offset = SYMBOL_VALUE_ADDRESS (sym);
1229 spe_context_cache_ptid = minus_one_ptid;
1230 spe_context_cache_address = 0;
1231 return;
1232 }
1233}
1234
1235static void
1236ppc_linux_spe_context_inferior_created (struct target_ops *t, int from_tty)
1237{
1238 struct objfile *objfile;
1239
1240 ppc_linux_spe_context_lookup (NULL);
1241 ALL_OBJFILES (objfile)
1242 ppc_linux_spe_context_lookup (objfile);
1243}
1244
1245static void
1246ppc_linux_spe_context_solib_loaded (struct so_list *so)
1247{
1248 if (strstr (so->so_original_name, "/libspe") != NULL)
1249 {
7e559477 1250 solib_read_symbols (so, 0);
cc5f0d61
UW
1251 ppc_linux_spe_context_lookup (so->objfile);
1252 }
1253}
1254
1255static void
1256ppc_linux_spe_context_solib_unloaded (struct so_list *so)
1257{
1258 if (so->objfile == spe_context_objfile)
1259 ppc_linux_spe_context_lookup (NULL);
1260}
1261
1262/* Retrieve contents of the N'th element in the current thread's
1263 linked SPE context list into ID and NPC. Return the address of
1264 said context element, or 0 if not found. */
1265static CORE_ADDR
1266ppc_linux_spe_context (int wordsize, enum bfd_endian byte_order,
1267 int n, int *id, unsigned int *npc)
1268{
1269 CORE_ADDR spe_context = 0;
1270 gdb_byte buf[16];
1271 int i;
1272
1273 /* Quick exit if we have not found __spe_current_active_context. */
1274 if (!spe_context_objfile)
1275 return 0;
1276
1277 /* Look up cached address of thread-local variable. */
1278 if (!ptid_equal (spe_context_cache_ptid, inferior_ptid))
1279 {
1280 struct target_ops *target = &current_target;
1281 volatile struct gdb_exception ex;
1282
1283 while (target && !target->to_get_thread_local_address)
1284 target = find_target_beneath (target);
1285 if (!target)
1286 return 0;
1287
1288 TRY_CATCH (ex, RETURN_MASK_ERROR)
1289 {
1290 /* We do not call target_translate_tls_address here, because
1291 svr4_fetch_objfile_link_map may invalidate the frame chain,
1292 which must not do while inside a frame sniffer.
1293
1294 Instead, we have cached the lm_addr value, and use that to
1295 directly call the target's to_get_thread_local_address. */
1296 spe_context_cache_address
1297 = target->to_get_thread_local_address (target, inferior_ptid,
1298 spe_context_lm_addr,
1299 spe_context_offset);
1300 spe_context_cache_ptid = inferior_ptid;
1301 }
1302
1303 if (ex.reason < 0)
1304 return 0;
1305 }
1306
1307 /* Read variable value. */
1308 if (target_read_memory (spe_context_cache_address, buf, wordsize) == 0)
1309 spe_context = extract_unsigned_integer (buf, wordsize, byte_order);
1310
1311 /* Cyle through to N'th linked list element. */
1312 for (i = 0; i < n && spe_context; i++)
1313 if (target_read_memory (spe_context + align_up (12, wordsize),
1314 buf, wordsize) == 0)
1315 spe_context = extract_unsigned_integer (buf, wordsize, byte_order);
1316 else
1317 spe_context = 0;
1318
1319 /* Read current context. */
1320 if (spe_context
1321 && target_read_memory (spe_context, buf, 12) != 0)
1322 spe_context = 0;
1323
1324 /* Extract data elements. */
1325 if (spe_context)
1326 {
1327 if (id)
1328 *id = extract_signed_integer (buf, 4, byte_order);
1329 if (npc)
1330 *npc = extract_unsigned_integer (buf + 4, 4, byte_order);
1331 }
1332
1333 return spe_context;
1334}
1335
1336
1337/* Cell/B.E. cross-architecture unwinder support. */
1338
1339struct ppu2spu_cache
1340{
1341 struct frame_id frame_id;
1342 struct regcache *regcache;
1343};
1344
1345static struct gdbarch *
1346ppu2spu_prev_arch (struct frame_info *this_frame, void **this_cache)
1347{
1348 struct ppu2spu_cache *cache = *this_cache;
1349 return get_regcache_arch (cache->regcache);
1350}
1351
1352static void
1353ppu2spu_this_id (struct frame_info *this_frame,
1354 void **this_cache, struct frame_id *this_id)
1355{
1356 struct ppu2spu_cache *cache = *this_cache;
1357 *this_id = cache->frame_id;
1358}
1359
1360static struct value *
1361ppu2spu_prev_register (struct frame_info *this_frame,
1362 void **this_cache, int regnum)
1363{
1364 struct ppu2spu_cache *cache = *this_cache;
1365 struct gdbarch *gdbarch = get_regcache_arch (cache->regcache);
1366 gdb_byte *buf;
1367
1368 buf = alloca (register_size (gdbarch, regnum));
a536c6d7
UW
1369
1370 if (regnum < gdbarch_num_regs (gdbarch))
1371 regcache_raw_read (cache->regcache, regnum, buf);
1372 else
1373 gdbarch_pseudo_register_read (gdbarch, cache->regcache, regnum, buf);
1374
cc5f0d61
UW
1375 return frame_unwind_got_bytes (this_frame, regnum, buf);
1376}
1377
1378struct ppu2spu_data
1379{
1380 struct gdbarch *gdbarch;
1381 int id;
1382 unsigned int npc;
1383 gdb_byte gprs[128*16];
1384};
1385
1386static int
1387ppu2spu_unwind_register (void *src, int regnum, gdb_byte *buf)
1388{
1389 struct ppu2spu_data *data = src;
1390 enum bfd_endian byte_order = gdbarch_byte_order (data->gdbarch);
1391
1392 if (regnum >= 0 && regnum < SPU_NUM_GPRS)
1393 memcpy (buf, data->gprs + 16*regnum, 16);
1394 else if (regnum == SPU_ID_REGNUM)
1395 store_unsigned_integer (buf, 4, byte_order, data->id);
1396 else if (regnum == SPU_PC_REGNUM)
1397 store_unsigned_integer (buf, 4, byte_order, data->npc);
1398 else
a536c6d7 1399 return REG_UNAVAILABLE;
cc5f0d61 1400
a536c6d7 1401 return REG_VALID;
cc5f0d61
UW
1402}
1403
1404static int
1405ppu2spu_sniffer (const struct frame_unwind *self,
1406 struct frame_info *this_frame, void **this_prologue_cache)
1407{
1408 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1409 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1410 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1411 struct ppu2spu_data data;
1412 struct frame_info *fi;
1413 CORE_ADDR base, func, backchain, spe_context;
1414 gdb_byte buf[8];
1415 int n = 0;
1416
1417 /* Count the number of SPU contexts already in the frame chain. */
1418 for (fi = get_next_frame (this_frame); fi; fi = get_next_frame (fi))
1419 if (get_frame_type (fi) == ARCH_FRAME
1420 && gdbarch_bfd_arch_info (get_frame_arch (fi))->arch == bfd_arch_spu)
1421 n++;
1422
1423 base = get_frame_sp (this_frame);
1424 func = get_frame_pc (this_frame);
1425 if (target_read_memory (base, buf, tdep->wordsize))
1426 return 0;
1427 backchain = extract_unsigned_integer (buf, tdep->wordsize, byte_order);
1428
1429 spe_context = ppc_linux_spe_context (tdep->wordsize, byte_order,
1430 n, &data.id, &data.npc);
1431 if (spe_context && base <= spe_context && spe_context < backchain)
1432 {
1433 char annex[32];
1434
1435 /* Find gdbarch for SPU. */
1436 struct gdbarch_info info;
1437 gdbarch_info_init (&info);
1438 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
1439 info.byte_order = BFD_ENDIAN_BIG;
1440 info.osabi = GDB_OSABI_LINUX;
1441 info.tdep_info = (void *) &data.id;
1442 data.gdbarch = gdbarch_find_by_info (info);
1443 if (!data.gdbarch)
1444 return 0;
1445
1446 xsnprintf (annex, sizeof annex, "%d/regs", data.id);
1447 if (target_read (&current_target, TARGET_OBJECT_SPU, annex,
1448 data.gprs, 0, sizeof data.gprs)
1449 == sizeof data.gprs)
1450 {
1451 struct ppu2spu_cache *cache
1452 = FRAME_OBSTACK_CALLOC (1, struct ppu2spu_cache);
1453
d37346f0
DJ
1454 struct address_space *aspace = get_frame_address_space (this_frame);
1455 struct regcache *regcache = regcache_xmalloc (data.gdbarch, aspace);
cc5f0d61
UW
1456 struct cleanup *cleanups = make_cleanup_regcache_xfree (regcache);
1457 regcache_save (regcache, ppu2spu_unwind_register, &data);
1458 discard_cleanups (cleanups);
1459
1460 cache->frame_id = frame_id_build (base, func);
1461 cache->regcache = regcache;
1462 *this_prologue_cache = cache;
1463 return 1;
1464 }
1465 }
1466
1467 return 0;
1468}
1469
1470static void
1471ppu2spu_dealloc_cache (struct frame_info *self, void *this_cache)
1472{
1473 struct ppu2spu_cache *cache = this_cache;
1474 regcache_xfree (cache->regcache);
1475}
1476
1477static const struct frame_unwind ppu2spu_unwind = {
1478 ARCH_FRAME,
8fbca658 1479 default_frame_unwind_stop_reason,
cc5f0d61
UW
1480 ppu2spu_this_id,
1481 ppu2spu_prev_register,
1482 NULL,
1483 ppu2spu_sniffer,
1484 ppu2spu_dealloc_cache,
1485 ppu2spu_prev_arch,
1486};
1487
1488
7b112f9c
JT
1489static void
1490ppc_linux_init_abi (struct gdbarch_info info,
1491 struct gdbarch *gdbarch)
1492{
1493 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7284e1be 1494 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
7b112f9c 1495
a5ee0f0c
PA
1496 linux_init_abi (info, gdbarch);
1497
b14d30e1
JM
1498 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
1499 128-bit, they are IBM long double, not IEEE quad long double as
1500 in the System V ABI PowerPC Processor Supplement. We can safely
1501 let them default to 128-bit, since the debug info will give the
1502 size of type actually used in each case. */
1503 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
1504 set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
0598a43c 1505
7284e1be
UW
1506 /* Handle inferior calls during interrupted system calls. */
1507 set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc);
1508
a96d9b2e
SDJ
1509 /* Get the syscall number from the arch's register. */
1510 set_gdbarch_get_syscall_number (gdbarch, ppc_linux_get_syscall_number);
1511
7b112f9c
JT
1512 if (tdep->wordsize == 4)
1513 {
b9ff3018
AC
1514 /* Until November 2001, gcc did not comply with the 32 bit SysV
1515 R4 ABI requirement that structures less than or equal to 8
1516 bytes should be returned in registers. Instead GCC was using
b021a221 1517 the AIX/PowerOpen ABI - everything returned in memory
b9ff3018
AC
1518 (well ignoring vectors that is). When this was corrected, it
1519 wasn't fixed for GNU/Linux native platform. Use the
1520 PowerOpen struct convention. */
05580c65 1521 set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
b9ff3018 1522
7b112f9c
JT
1523 set_gdbarch_memory_remove_breakpoint (gdbarch,
1524 ppc_linux_memory_remove_breakpoint);
61a65099 1525
f470a70a 1526 /* Shared library handling. */
8526f328 1527 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
7b112f9c 1528 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1529 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
a8f60bfc 1530
a96d9b2e
SDJ
1531 /* Setting the correct XML syscall filename. */
1532 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_PPC);
1533
a8f60bfc 1534 /* Trampolines. */
0df8b418
MS
1535 tramp_frame_prepend_unwinder (gdbarch,
1536 &ppc32_linux_sigaction_tramp_frame);
1537 tramp_frame_prepend_unwinder (gdbarch,
1538 &ppc32_linux_sighandler_tramp_frame);
a78c2d62
UW
1539
1540 /* BFD target for core files. */
1541 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1542 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpcle");
1543 else
1544 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpc");
2f2241f1
UW
1545
1546 /* Supported register sections. */
1547 if (tdesc_find_feature (info.target_desc,
1548 "org.gnu.gdb.power.vsx"))
1549 set_gdbarch_core_regset_sections (gdbarch,
1550 ppc_linux_vsx_regset_sections);
1551 else if (tdesc_find_feature (info.target_desc,
1552 "org.gnu.gdb.power.altivec"))
1553 set_gdbarch_core_regset_sections (gdbarch,
1554 ppc_linux_vmx_regset_sections);
1555 else
1556 set_gdbarch_core_regset_sections (gdbarch,
1557 ppc_linux_fp_regset_sections);
7b112f9c 1558 }
f470a70a
JB
1559
1560 if (tdep->wordsize == 8)
1561 {
00d5f93a
UW
1562 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1563 function descriptors). */
1564 set_gdbarch_convert_from_func_ptr_addr
1565 (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
1566
fb318ff7 1567 /* Shared library handling. */
2bbe3cc1 1568 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
fb318ff7
DJ
1569 set_solib_svr4_fetch_link_map_offsets
1570 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1571
a96d9b2e
SDJ
1572 /* Setting the correct XML syscall filename. */
1573 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_PPC64);
1574
a8f60bfc 1575 /* Trampolines. */
0df8b418
MS
1576 tramp_frame_prepend_unwinder (gdbarch,
1577 &ppc64_linux_sigaction_tramp_frame);
1578 tramp_frame_prepend_unwinder (gdbarch,
1579 &ppc64_linux_sighandler_tramp_frame);
a78c2d62
UW
1580
1581 /* BFD target for core files. */
1582 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1583 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpcle");
1584 else
1585 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpc");
2f2241f1
UW
1586
1587 /* Supported register sections. */
1588 if (tdesc_find_feature (info.target_desc,
1589 "org.gnu.gdb.power.vsx"))
1590 set_gdbarch_core_regset_sections (gdbarch,
1591 ppc64_linux_vsx_regset_sections);
1592 else if (tdesc_find_feature (info.target_desc,
1593 "org.gnu.gdb.power.altivec"))
1594 set_gdbarch_core_regset_sections (gdbarch,
1595 ppc64_linux_vmx_regset_sections);
1596 else
1597 set_gdbarch_core_regset_sections (gdbarch,
1598 ppc64_linux_fp_regset_sections);
f470a70a 1599 }
0df8b418
MS
1600 set_gdbarch_regset_from_core_section (gdbarch,
1601 ppc_linux_regset_from_core_section);
7284e1be 1602 set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
b2756930
KB
1603
1604 /* Enable TLS support. */
1605 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1606 svr4_fetch_objfile_link_map);
7284e1be
UW
1607
1608 if (tdesc_data)
1609 {
1610 const struct tdesc_feature *feature;
1611
1612 /* If we have target-described registers, then we can safely
1613 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1614 (whether they are described or not). */
1615 gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM);
1616 set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1);
1617
1618 /* If they are present, then assign them to the reserved number. */
1619 feature = tdesc_find_feature (info.target_desc,
1620 "org.gnu.gdb.power.linux");
1621 if (feature != NULL)
1622 {
1623 tdesc_numbered_register (feature, tdesc_data,
1624 PPC_ORIG_R3_REGNUM, "orig_r3");
1625 tdesc_numbered_register (feature, tdesc_data,
1626 PPC_TRAP_REGNUM, "trap");
1627 }
1628 }
85e747d2
UW
1629
1630 /* Enable Cell/B.E. if supported by the target. */
1631 if (tdesc_compatible_p (info.target_desc,
1632 bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu)))
1633 {
1634 /* Cell/B.E. multi-architecture support. */
1635 set_spu_solib_ops (gdbarch);
1636
cc5f0d61
UW
1637 /* Cell/B.E. cross-architecture unwinder support. */
1638 frame_unwind_prepend_unwinder (gdbarch, &ppu2spu_unwind);
1639
85e747d2
UW
1640 /* The default displaced_step_at_entry_point doesn't work for
1641 SPU stand-alone executables. */
1642 set_gdbarch_displaced_step_location (gdbarch,
1643 ppc_linux_displaced_step_location);
1644 }
7b112f9c
JT
1645}
1646
63807e1d
PA
1647/* Provide a prototype to silence -Wmissing-prototypes. */
1648extern initialize_file_ftype _initialize_ppc_linux_tdep;
1649
7b112f9c
JT
1650void
1651_initialize_ppc_linux_tdep (void)
1652{
0a0a4ac3
AC
1653 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1654 64-bit PowerPC, and the older rs6k. */
1655 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
1656 ppc_linux_init_abi);
1657 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
1658 ppc_linux_init_abi);
1659 gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
1660 ppc_linux_init_abi);
7284e1be 1661
85e747d2
UW
1662 /* Attach to inferior_created observer. */
1663 observer_attach_inferior_created (ppc_linux_inferior_created);
1664
cc5f0d61
UW
1665 /* Attach to observers to track __spe_current_active_context. */
1666 observer_attach_inferior_created (ppc_linux_spe_context_inferior_created);
1667 observer_attach_solib_loaded (ppc_linux_spe_context_solib_loaded);
1668 observer_attach_solib_unloaded (ppc_linux_spe_context_solib_unloaded);
1669
7284e1be
UW
1670 /* Initialize the Linux target descriptions. */
1671 initialize_tdesc_powerpc_32l ();
1672 initialize_tdesc_powerpc_altivec32l ();
f4d9bade 1673 initialize_tdesc_powerpc_cell32l ();
604c2f83 1674 initialize_tdesc_powerpc_vsx32l ();
69abc51c
TJB
1675 initialize_tdesc_powerpc_isa205_32l ();
1676 initialize_tdesc_powerpc_isa205_altivec32l ();
1677 initialize_tdesc_powerpc_isa205_vsx32l ();
7284e1be
UW
1678 initialize_tdesc_powerpc_64l ();
1679 initialize_tdesc_powerpc_altivec64l ();
f4d9bade 1680 initialize_tdesc_powerpc_cell64l ();
604c2f83 1681 initialize_tdesc_powerpc_vsx64l ();
69abc51c
TJB
1682 initialize_tdesc_powerpc_isa205_64l ();
1683 initialize_tdesc_powerpc_isa205_altivec64l ();
1684 initialize_tdesc_powerpc_isa205_vsx64l ();
7284e1be 1685 initialize_tdesc_powerpc_e500l ();
7b112f9c 1686}
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