Sync from gcc mainline.
[deliverable/binutils-gdb.git] / gdb / ppc-linux-tdep.c
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c877c8e6 1/* Target-dependent code for GDB, the GNU debugger.
4e052eda 2
6aba47ca 3 Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4c38e0a4 4 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
76a9d10f 5 Free Software Foundation, Inc.
c877c8e6
KB
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
c877c8e6
KB
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c877c8e6
KB
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "target.h"
27#include "gdbcore.h"
28#include "gdbcmd.h"
29#include "symfile.h"
30#include "objfiles.h"
4e052eda 31#include "regcache.h"
fd0407d6 32#include "value.h"
4be87837 33#include "osabi.h"
f9be684a 34#include "regset.h"
6ded7999 35#include "solib-svr4.h"
85e747d2 36#include "solib-spu.h"
cc5f0d61
UW
37#include "solib.h"
38#include "solist.h"
9aa1e687 39#include "ppc-tdep.h"
7284e1be 40#include "ppc-linux-tdep.h"
61a65099
KB
41#include "trad-frame.h"
42#include "frame-unwind.h"
a8f60bfc 43#include "tramp-frame.h"
85e747d2
UW
44#include "observer.h"
45#include "auxv.h"
46#include "elf/common.h"
cc5f0d61
UW
47#include "exceptions.h"
48#include "arch-utils.h"
49#include "spu-tdep.h"
a96d9b2e 50#include "xml-syscall.h"
9aa1e687 51
7284e1be
UW
52#include "features/rs6000/powerpc-32l.c"
53#include "features/rs6000/powerpc-altivec32l.c"
f4d9bade 54#include "features/rs6000/powerpc-cell32l.c"
604c2f83 55#include "features/rs6000/powerpc-vsx32l.c"
69abc51c
TJB
56#include "features/rs6000/powerpc-isa205-32l.c"
57#include "features/rs6000/powerpc-isa205-altivec32l.c"
58#include "features/rs6000/powerpc-isa205-vsx32l.c"
7284e1be
UW
59#include "features/rs6000/powerpc-64l.c"
60#include "features/rs6000/powerpc-altivec64l.c"
f4d9bade 61#include "features/rs6000/powerpc-cell64l.c"
604c2f83 62#include "features/rs6000/powerpc-vsx64l.c"
69abc51c
TJB
63#include "features/rs6000/powerpc-isa205-64l.c"
64#include "features/rs6000/powerpc-isa205-altivec64l.c"
65#include "features/rs6000/powerpc-isa205-vsx64l.c"
7284e1be
UW
66#include "features/rs6000/powerpc-e500l.c"
67
a96d9b2e
SDJ
68/* The syscall's XML filename for PPC and PPC64. */
69#define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml"
70#define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml"
c877c8e6 71
122a33de
KB
72/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
73 in much the same fashion as memory_remove_breakpoint in mem-break.c,
74 but is careful not to write back the previous contents if the code
75 in question has changed in between inserting the breakpoint and
76 removing it.
77
78 Here is the problem that we're trying to solve...
79
80 Once upon a time, before introducing this function to remove
81 breakpoints from the inferior, setting a breakpoint on a shared
82 library function prior to running the program would not work
83 properly. In order to understand the problem, it is first
84 necessary to understand a little bit about dynamic linking on
85 this platform.
86
87 A call to a shared library function is accomplished via a bl
88 (branch-and-link) instruction whose branch target is an entry
89 in the procedure linkage table (PLT). The PLT in the object
90 file is uninitialized. To gdb, prior to running the program, the
91 entries in the PLT are all zeros.
92
93 Once the program starts running, the shared libraries are loaded
94 and the procedure linkage table is initialized, but the entries in
95 the table are not (necessarily) resolved. Once a function is
96 actually called, the code in the PLT is hit and the function is
97 resolved. In order to better illustrate this, an example is in
98 order; the following example is from the gdb testsuite.
99
100 We start the program shmain.
101
102 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
103 [...]
104
105 We place two breakpoints, one on shr1 and the other on main.
106
107 (gdb) b shr1
108 Breakpoint 1 at 0x100409d4
109 (gdb) b main
110 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
111
112 Examine the instruction (and the immediatly following instruction)
113 upon which the breakpoint was placed. Note that the PLT entry
114 for shr1 contains zeros.
115
116 (gdb) x/2i 0x100409d4
117 0x100409d4 <shr1>: .long 0x0
118 0x100409d8 <shr1+4>: .long 0x0
119
120 Now run 'til main.
121
122 (gdb) r
123 Starting program: gdb.base/shmain
124 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
125
126 Breakpoint 2, main ()
127 at gdb.base/shmain.c:44
128 44 g = 1;
129
130 Examine the PLT again. Note that the loading of the shared
131 library has initialized the PLT to code which loads a constant
132 (which I think is an index into the GOT) into r11 and then
133 branchs a short distance to the code which actually does the
134 resolving.
135
136 (gdb) x/2i 0x100409d4
137 0x100409d4 <shr1>: li r11,4
138 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
139 (gdb) c
140 Continuing.
141
142 Breakpoint 1, shr1 (x=1)
143 at gdb.base/shr1.c:19
144 19 l = 1;
145
146 Now we've hit the breakpoint at shr1. (The breakpoint was
147 reset from the PLT entry to the actual shr1 function after the
148 shared library was loaded.) Note that the PLT entry has been
149 resolved to contain a branch that takes us directly to shr1.
150 (The real one, not the PLT entry.)
151
152 (gdb) x/2i 0x100409d4
153 0x100409d4 <shr1>: b 0xffaf76c <shr1>
154 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
155
156 The thing to note here is that the PLT entry for shr1 has been
157 changed twice.
158
159 Now the problem should be obvious. GDB places a breakpoint (a
160 trap instruction) on the zero value of the PLT entry for shr1.
161 Later on, after the shared library had been loaded and the PLT
162 initialized, GDB gets a signal indicating this fact and attempts
163 (as it always does when it stops) to remove all the breakpoints.
164
165 The breakpoint removal was causing the former contents (a zero
166 word) to be written back to the now initialized PLT entry thus
167 destroying a portion of the initialization that had occurred only a
168 short time ago. When execution continued, the zero word would be
169 executed as an instruction an an illegal instruction trap was
170 generated instead. (0 is not a legal instruction.)
171
172 The fix for this problem was fairly straightforward. The function
173 memory_remove_breakpoint from mem-break.c was copied to this file,
174 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
175 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
176 function.
177
178 The differences between ppc_linux_memory_remove_breakpoint () and
179 memory_remove_breakpoint () are minor. All that the former does
180 that the latter does not is check to make sure that the breakpoint
181 location actually contains a breakpoint (trap instruction) prior
182 to attempting to write back the old contents. If it does contain
183 a trap instruction, we allow the old contents to be written back.
184 Otherwise, we silently do nothing.
185
186 The big question is whether memory_remove_breakpoint () should be
187 changed to have the same functionality. The downside is that more
188 traffic is generated for remote targets since we'll have an extra
189 fetch of a memory word each time a breakpoint is removed.
190
191 For the time being, we'll leave this self-modifying-code-friendly
192 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
193 else in the event that some other platform has similar needs with
194 regard to removing breakpoints in some potentially self modifying
195 code. */
63807e1d 196static int
ae4b2284
MD
197ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
198 struct bp_target_info *bp_tgt)
482ca3f5 199{
8181d85f 200 CORE_ADDR addr = bp_tgt->placed_address;
f4f9705a 201 const unsigned char *bp;
482ca3f5
KB
202 int val;
203 int bplen;
50fd1280 204 gdb_byte old_contents[BREAKPOINT_MAX];
8defab1a 205 struct cleanup *cleanup;
482ca3f5
KB
206
207 /* Determine appropriate breakpoint contents and size for this address. */
ae4b2284 208 bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
482ca3f5 209 if (bp == NULL)
8a3fe4f8 210 error (_("Software breakpoints not implemented for this target."));
482ca3f5 211
8defab1a
DJ
212 /* Make sure we see the memory breakpoints. */
213 cleanup = make_show_memory_breakpoints_cleanup (1);
482ca3f5
KB
214 val = target_read_memory (addr, old_contents, bplen);
215
216 /* If our breakpoint is no longer at the address, this means that the
217 program modified the code on us, so it is wrong to put back the
218 old value */
219 if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
8181d85f 220 val = target_write_memory (addr, bp_tgt->shadow_contents, bplen);
482ca3f5 221
8defab1a 222 do_cleanups (cleanup);
482ca3f5
KB
223 return val;
224}
6ded7999 225
b9ff3018
AC
226/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
227 than the 32 bit SYSV R4 ABI structure return convention - all
228 structures, no matter their size, are put in memory. Vectors,
229 which were added later, do get returned in a register though. */
230
05580c65 231static enum return_value_convention
c055b101
CV
232ppc_linux_return_value (struct gdbarch *gdbarch, struct type *func_type,
233 struct type *valtype, struct regcache *regcache,
234 gdb_byte *readbuf, const gdb_byte *writebuf)
b9ff3018 235{
05580c65
AC
236 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
237 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
238 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
239 && TYPE_VECTOR (valtype)))
240 return RETURN_VALUE_STRUCT_CONVENTION;
241 else
c055b101
CV
242 return ppc_sysv_abi_return_value (gdbarch, func_type, valtype, regcache,
243 readbuf, writebuf);
b9ff3018
AC
244}
245
f470a70a
JB
246/* Macros for matching instructions. Note that, since all the
247 operands are masked off before they're or-ed into the instruction,
248 you can use -1 to make masks. */
249
250#define insn_d(opcd, rts, ra, d) \
251 ((((opcd) & 0x3f) << 26) \
252 | (((rts) & 0x1f) << 21) \
253 | (((ra) & 0x1f) << 16) \
254 | ((d) & 0xffff))
255
256#define insn_ds(opcd, rts, ra, d, xo) \
257 ((((opcd) & 0x3f) << 26) \
258 | (((rts) & 0x1f) << 21) \
259 | (((ra) & 0x1f) << 16) \
260 | ((d) & 0xfffc) \
261 | ((xo) & 0x3))
262
263#define insn_xfx(opcd, rts, spr, xo) \
264 ((((opcd) & 0x3f) << 26) \
265 | (((rts) & 0x1f) << 21) \
266 | (((spr) & 0x1f) << 16) \
267 | (((spr) & 0x3e0) << 6) \
268 | (((xo) & 0x3ff) << 1))
269
270/* Read a PPC instruction from memory. PPC instructions are always
271 big-endian, no matter what endianness the program is running in, so
272 we can't use read_memory_integer or one of its friends here. */
273static unsigned int
274read_insn (CORE_ADDR pc)
275{
276 unsigned char buf[4];
277
278 read_memory (pc, buf, 4);
279 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
280}
281
282
283/* An instruction to match. */
284struct insn_pattern
285{
286 unsigned int mask; /* mask the insn with this... */
287 unsigned int data; /* ...and see if it matches this. */
288 int optional; /* If non-zero, this insn may be absent. */
289};
290
291/* Return non-zero if the instructions at PC match the series
292 described in PATTERN, or zero otherwise. PATTERN is an array of
293 'struct insn_pattern' objects, terminated by an entry whose mask is
294 zero.
295
296 When the match is successful, fill INSN[i] with what PATTERN[i]
297 matched. If PATTERN[i] is optional, and the instruction wasn't
298 present, set INSN[i] to 0 (which is not a valid PPC instruction).
299 INSN should have as many elements as PATTERN. Note that, if
300 PATTERN contains optional instructions which aren't present in
301 memory, then INSN will have holes, so INSN[i] isn't necessarily the
302 i'th instruction in memory. */
303static int
304insns_match_pattern (CORE_ADDR pc,
305 struct insn_pattern *pattern,
306 unsigned int *insn)
307{
308 int i;
309
310 for (i = 0; pattern[i].mask; i++)
311 {
312 insn[i] = read_insn (pc);
313 if ((insn[i] & pattern[i].mask) == pattern[i].data)
314 pc += 4;
315 else if (pattern[i].optional)
316 insn[i] = 0;
317 else
318 return 0;
319 }
320
321 return 1;
322}
323
324
325/* Return the 'd' field of the d-form instruction INSN, properly
326 sign-extended. */
327static CORE_ADDR
328insn_d_field (unsigned int insn)
329{
330 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
331}
332
333
334/* Return the 'ds' field of the ds-form instruction INSN, with the two
335 zero bits concatenated at the right, and properly
336 sign-extended. */
337static CORE_ADDR
338insn_ds_field (unsigned int insn)
339{
340 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
341}
342
343
e538d2d7 344/* If DESC is the address of a 64-bit PowerPC GNU/Linux function
d64558a5
JB
345 descriptor, return the descriptor's entry point. */
346static CORE_ADDR
e17a4113 347ppc64_desc_entry_point (struct gdbarch *gdbarch, CORE_ADDR desc)
d64558a5 348{
e17a4113 349 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
d64558a5 350 /* The first word of the descriptor is the entry point. */
e17a4113 351 return (CORE_ADDR) read_memory_unsigned_integer (desc, 8, byte_order);
d64558a5
JB
352}
353
354
f470a70a
JB
355/* Pattern for the standard linkage function. These are built by
356 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
357 zero. */
42848c96 358static struct insn_pattern ppc64_standard_linkage1[] =
f470a70a
JB
359 {
360 /* addis r12, r2, <any> */
361 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
362
363 /* std r2, 40(r1) */
364 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
365
366 /* ld r11, <any>(r12) */
367 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
368
369 /* addis r12, r12, 1 <optional> */
42848c96 370 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
f470a70a
JB
371
372 /* ld r2, <any>(r12) */
373 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
374
375 /* addis r12, r12, 1 <optional> */
42848c96 376 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
f470a70a
JB
377
378 /* mtctr r11 */
42848c96 379 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
f470a70a
JB
380
381 /* ld r11, <any>(r12) */
382 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
383
384 /* bctr */
385 { -1, 0x4e800420, 0 },
386
387 { 0, 0, 0 }
388 };
42848c96
UW
389#define PPC64_STANDARD_LINKAGE1_LEN \
390 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
391
392static struct insn_pattern ppc64_standard_linkage2[] =
393 {
394 /* addis r12, r2, <any> */
395 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
396
397 /* std r2, 40(r1) */
398 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
399
400 /* ld r11, <any>(r12) */
401 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
402
403 /* addi r12, r12, <any> <optional> */
404 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
405
406 /* mtctr r11 */
407 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
408
409 /* ld r2, <any>(r12) */
410 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
411
412 /* ld r11, <any>(r12) */
413 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
414
415 /* bctr */
416 { -1, 0x4e800420, 0 },
417
418 { 0, 0, 0 }
419 };
420#define PPC64_STANDARD_LINKAGE2_LEN \
421 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
422
423static struct insn_pattern ppc64_standard_linkage3[] =
424 {
425 /* std r2, 40(r1) */
426 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
427
428 /* ld r11, <any>(r2) */
429 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
430
431 /* addi r2, r2, <any> <optional> */
432 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
433
434 /* mtctr r11 */
435 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
436
437 /* ld r11, <any>(r2) */
438 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
439
440 /* ld r2, <any>(r2) */
441 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
442
443 /* bctr */
444 { -1, 0x4e800420, 0 },
445
446 { 0, 0, 0 }
447 };
448#define PPC64_STANDARD_LINKAGE3_LEN \
449 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
450
f470a70a 451
f470a70a
JB
452/* When the dynamic linker is doing lazy symbol resolution, the first
453 call to a function in another object will go like this:
454
455 - The user's function calls the linkage function:
456
457 100007c4: 4b ff fc d5 bl 10000498
458 100007c8: e8 41 00 28 ld r2,40(r1)
459
460 - The linkage function loads the entry point (and other stuff) from
461 the function descriptor in the PLT, and jumps to it:
462
463 10000498: 3d 82 00 00 addis r12,r2,0
464 1000049c: f8 41 00 28 std r2,40(r1)
465 100004a0: e9 6c 80 98 ld r11,-32616(r12)
466 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
467 100004a8: 7d 69 03 a6 mtctr r11
468 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
469 100004b0: 4e 80 04 20 bctr
470
471 - But since this is the first time that PLT entry has been used, it
472 sends control to its glink entry. That loads the number of the
473 PLT entry and jumps to the common glink0 code:
474
475 10000c98: 38 00 00 00 li r0,0
476 10000c9c: 4b ff ff dc b 10000c78
477
478 - The common glink0 code then transfers control to the dynamic
479 linker's fixup code:
480
481 10000c78: e8 41 00 28 ld r2,40(r1)
482 10000c7c: 3d 82 00 00 addis r12,r2,0
483 10000c80: e9 6c 80 80 ld r11,-32640(r12)
484 10000c84: e8 4c 80 88 ld r2,-32632(r12)
485 10000c88: 7d 69 03 a6 mtctr r11
486 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
487 10000c90: 4e 80 04 20 bctr
488
489 Eventually, this code will figure out how to skip all of this,
490 including the dynamic linker. At the moment, we just get through
491 the linkage function. */
492
493/* If the current thread is about to execute a series of instructions
494 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
495 from that pattern match, return the code address to which the
496 standard linkage function will send them. (This doesn't deal with
497 dynamic linker lazy symbol resolution stubs.) */
498static CORE_ADDR
42848c96
UW
499ppc64_standard_linkage1_target (struct frame_info *frame,
500 CORE_ADDR pc, unsigned int *insn)
f470a70a 501{
e17a4113
UW
502 struct gdbarch *gdbarch = get_frame_arch (frame);
503 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
f470a70a
JB
504
505 /* The address of the function descriptor this linkage function
506 references. */
507 CORE_ADDR desc
52f729a7
UW
508 = ((CORE_ADDR) get_frame_register_unsigned (frame,
509 tdep->ppc_gp0_regnum + 2)
f470a70a
JB
510 + (insn_d_field (insn[0]) << 16)
511 + insn_ds_field (insn[2]));
512
513 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 514 return ppc64_desc_entry_point (gdbarch, desc);
f470a70a
JB
515}
516
6207416c 517static struct core_regset_section ppc_linux_vsx_regset_sections[] =
17ea7499 518{
1b1818e4
UW
519 { ".reg", 268, "general-purpose" },
520 { ".reg2", 264, "floating-point" },
521 { ".reg-ppc-vmx", 544, "ppc Altivec" },
522 { ".reg-ppc-vsx", 256, "POWER7 VSX" },
17ea7499
CES
523 { NULL, 0}
524};
525
6207416c
LM
526static struct core_regset_section ppc_linux_vmx_regset_sections[] =
527{
1b1818e4
UW
528 { ".reg", 268, "general-purpose" },
529 { ".reg2", 264, "floating-point" },
530 { ".reg-ppc-vmx", 544, "ppc Altivec" },
6207416c
LM
531 { NULL, 0}
532};
533
534static struct core_regset_section ppc_linux_fp_regset_sections[] =
535{
1b1818e4
UW
536 { ".reg", 268, "general-purpose" },
537 { ".reg2", 264, "floating-point" },
6207416c
LM
538 { NULL, 0}
539};
540
42848c96
UW
541static CORE_ADDR
542ppc64_standard_linkage2_target (struct frame_info *frame,
543 CORE_ADDR pc, unsigned int *insn)
544{
e17a4113
UW
545 struct gdbarch *gdbarch = get_frame_arch (frame);
546 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
42848c96
UW
547
548 /* The address of the function descriptor this linkage function
549 references. */
550 CORE_ADDR desc
551 = ((CORE_ADDR) get_frame_register_unsigned (frame,
552 tdep->ppc_gp0_regnum + 2)
553 + (insn_d_field (insn[0]) << 16)
554 + insn_ds_field (insn[2]));
555
556 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 557 return ppc64_desc_entry_point (gdbarch, desc);
42848c96
UW
558}
559
560static CORE_ADDR
561ppc64_standard_linkage3_target (struct frame_info *frame,
562 CORE_ADDR pc, unsigned int *insn)
563{
e17a4113
UW
564 struct gdbarch *gdbarch = get_frame_arch (frame);
565 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
42848c96
UW
566
567 /* The address of the function descriptor this linkage function
568 references. */
569 CORE_ADDR desc
570 = ((CORE_ADDR) get_frame_register_unsigned (frame,
571 tdep->ppc_gp0_regnum + 2)
572 + insn_ds_field (insn[1]));
573
574 /* The first word of the descriptor is the entry point. Return that. */
e17a4113 575 return ppc64_desc_entry_point (gdbarch, desc);
42848c96
UW
576}
577
f470a70a
JB
578
579/* Given that we've begun executing a call trampoline at PC, return
580 the entry point of the function the trampoline will go to. */
581static CORE_ADDR
52f729a7 582ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
f470a70a 583{
42848c96
UW
584 unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
585 unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
586 unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
587 CORE_ADDR target;
588
589 if (insns_match_pattern (pc, ppc64_standard_linkage1,
590 ppc64_standard_linkage1_insn))
591 pc = ppc64_standard_linkage1_target (frame, pc,
592 ppc64_standard_linkage1_insn);
593 else if (insns_match_pattern (pc, ppc64_standard_linkage2,
594 ppc64_standard_linkage2_insn))
595 pc = ppc64_standard_linkage2_target (frame, pc,
596 ppc64_standard_linkage2_insn);
597 else if (insns_match_pattern (pc, ppc64_standard_linkage3,
598 ppc64_standard_linkage3_insn))
599 pc = ppc64_standard_linkage3_target (frame, pc,
600 ppc64_standard_linkage3_insn);
f470a70a
JB
601 else
602 return 0;
42848c96
UW
603
604 /* The PLT descriptor will either point to the already resolved target
605 address, or else to a glink stub. As the latter carry synthetic @plt
606 symbols, find_solib_trampoline_target should be able to resolve them. */
607 target = find_solib_trampoline_target (frame, pc);
608 return target? target : pc;
f470a70a
JB
609}
610
611
00d5f93a 612/* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
e2d0e7eb 613 GNU/Linux.
02631ec0
JB
614
615 Usually a function pointer's representation is simply the address
2bbe3cc1
DJ
616 of the function. On GNU/Linux on the PowerPC however, a function
617 pointer may be a pointer to a function descriptor.
618
619 For PPC64, a function descriptor is a TOC entry, in a data section,
620 which contains three words: the first word is the address of the
621 function, the second word is the TOC pointer (r2), and the third word
622 is the static chain value.
623
2bbe3cc1
DJ
624 Throughout GDB it is currently assumed that a function pointer contains
625 the address of the function, which is not easy to fix. In addition, the
e538d2d7
JB
626 conversion of a function address to a function pointer would
627 require allocation of a TOC entry in the inferior's memory space,
628 with all its drawbacks. To be able to call C++ virtual methods in
629 the inferior (which are called via function pointers),
630 find_function_addr uses this function to get the function address
2bbe3cc1 631 from a function pointer.
02631ec0 632
2bbe3cc1
DJ
633 If ADDR points at what is clearly a function descriptor, transform
634 it into the address of the corresponding function, if needed. Be
635 conservative, otherwise GDB will do the transformation on any
636 random addresses such as occur when there is no symbol table. */
02631ec0
JB
637
638static CORE_ADDR
00d5f93a
UW
639ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
640 CORE_ADDR addr,
641 struct target_ops *targ)
02631ec0 642{
e17a4113 643 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0542c86d 644 struct target_section *s = target_section_by_addr (targ, addr);
02631ec0 645
9b540880 646 /* Check if ADDR points to a function descriptor. */
00d5f93a 647 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
e84ee240
UW
648 {
649 /* There may be relocations that need to be applied to the .opd
650 section. Unfortunately, this function may be called at a time
651 where these relocations have not yet been performed -- this can
652 happen for example shortly after a library has been loaded with
653 dlopen, but ld.so has not yet applied the relocations.
654
655 To cope with both the case where the relocation has been applied,
656 and the case where it has not yet been applied, we do *not* read
657 the (maybe) relocated value from target memory, but we instead
658 read the non-relocated value from the BFD, and apply the relocation
659 offset manually.
660
661 This makes the assumption that all .opd entries are always relocated
662 by the same offset the section itself was relocated. This should
663 always be the case for GNU/Linux executables and shared libraries.
664 Note that other kind of object files (e.g. those added via
665 add-symbol-files) will currently never end up here anyway, as this
666 function accesses *target* sections only; only the main exec and
667 shared libraries are ever added to the target. */
668
669 gdb_byte buf[8];
670 int res;
671
672 res = bfd_get_section_contents (s->bfd, s->the_bfd_section,
673 &buf, addr - s->addr, 8);
674 if (res != 0)
e17a4113 675 return extract_unsigned_integer (buf, 8, byte_order)
e84ee240
UW
676 - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr;
677 }
9b540880
AC
678
679 return addr;
02631ec0
JB
680}
681
7284e1be
UW
682/* Wrappers to handle Linux-only registers. */
683
684static void
685ppc_linux_supply_gregset (const struct regset *regset,
686 struct regcache *regcache,
687 int regnum, const void *gregs, size_t len)
688{
689 const struct ppc_reg_offsets *offsets = regset->descr;
690
691 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
692
693 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
694 {
695 /* "orig_r3" is stored 2 slots after "pc". */
696 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
697 ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
698 offsets->pc_offset + 2 * offsets->gpr_size,
699 offsets->gpr_size);
700
701 /* "trap" is stored 8 slots after "pc". */
702 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
703 ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs,
704 offsets->pc_offset + 8 * offsets->gpr_size,
705 offsets->gpr_size);
706 }
707}
f2db237a 708
f9be684a 709static void
f2db237a
AM
710ppc_linux_collect_gregset (const struct regset *regset,
711 const struct regcache *regcache,
712 int regnum, void *gregs, size_t len)
f9be684a 713{
7284e1be
UW
714 const struct ppc_reg_offsets *offsets = regset->descr;
715
716 /* Clear areas in the linux gregset not written elsewhere. */
f2db237a
AM
717 if (regnum == -1)
718 memset (gregs, 0, len);
7284e1be 719
f2db237a 720 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
7284e1be
UW
721
722 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
723 {
724 /* "orig_r3" is stored 2 slots after "pc". */
725 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
726 ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
727 offsets->pc_offset + 2 * offsets->gpr_size,
728 offsets->gpr_size);
729
730 /* "trap" is stored 8 slots after "pc". */
731 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
732 ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs,
733 offsets->pc_offset + 8 * offsets->gpr_size,
734 offsets->gpr_size);
735 }
f9be684a
AC
736}
737
f2db237a
AM
738/* Regset descriptions. */
739static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
740 {
741 /* General-purpose registers. */
742 /* .r0_offset = */ 0,
743 /* .gpr_size = */ 4,
744 /* .xr_size = */ 4,
745 /* .pc_offset = */ 128,
746 /* .ps_offset = */ 132,
747 /* .cr_offset = */ 152,
748 /* .lr_offset = */ 144,
749 /* .ctr_offset = */ 140,
750 /* .xer_offset = */ 148,
751 /* .mq_offset = */ 156,
752
753 /* Floating-point registers. */
754 /* .f0_offset = */ 0,
755 /* .fpscr_offset = */ 256,
756 /* .fpscr_size = */ 8,
757
758 /* AltiVec registers. */
759 /* .vr0_offset = */ 0,
06caf7d2
CES
760 /* .vscr_offset = */ 512 + 12,
761 /* .vrsave_offset = */ 528
f2db237a 762 };
f9be684a 763
f2db237a
AM
764static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
765 {
766 /* General-purpose registers. */
767 /* .r0_offset = */ 0,
768 /* .gpr_size = */ 8,
769 /* .xr_size = */ 8,
770 /* .pc_offset = */ 256,
771 /* .ps_offset = */ 264,
772 /* .cr_offset = */ 304,
773 /* .lr_offset = */ 288,
774 /* .ctr_offset = */ 280,
775 /* .xer_offset = */ 296,
776 /* .mq_offset = */ 312,
777
778 /* Floating-point registers. */
779 /* .f0_offset = */ 0,
780 /* .fpscr_offset = */ 256,
781 /* .fpscr_size = */ 8,
782
783 /* AltiVec registers. */
784 /* .vr0_offset = */ 0,
06caf7d2
CES
785 /* .vscr_offset = */ 512 + 12,
786 /* .vrsave_offset = */ 528
f2db237a 787 };
2fda4977 788
f2db237a
AM
789static const struct regset ppc32_linux_gregset = {
790 &ppc32_linux_reg_offsets,
7284e1be 791 ppc_linux_supply_gregset,
f2db237a
AM
792 ppc_linux_collect_gregset,
793 NULL
f9be684a
AC
794};
795
f2db237a
AM
796static const struct regset ppc64_linux_gregset = {
797 &ppc64_linux_reg_offsets,
7284e1be 798 ppc_linux_supply_gregset,
f2db237a
AM
799 ppc_linux_collect_gregset,
800 NULL
801};
f9be684a 802
f2db237a
AM
803static const struct regset ppc32_linux_fpregset = {
804 &ppc32_linux_reg_offsets,
805 ppc_supply_fpregset,
806 ppc_collect_fpregset,
807 NULL
f9be684a
AC
808};
809
06caf7d2
CES
810static const struct regset ppc32_linux_vrregset = {
811 &ppc32_linux_reg_offsets,
812 ppc_supply_vrregset,
813 ppc_collect_vrregset,
814 NULL
815};
816
604c2f83
LM
817static const struct regset ppc32_linux_vsxregset = {
818 &ppc32_linux_reg_offsets,
819 ppc_supply_vsxregset,
820 ppc_collect_vsxregset,
821 NULL
822};
823
f2db237a
AM
824const struct regset *
825ppc_linux_gregset (int wordsize)
2fda4977 826{
f2db237a 827 return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
2fda4977
DJ
828}
829
f2db237a
AM
830const struct regset *
831ppc_linux_fpregset (void)
832{
833 return &ppc32_linux_fpregset;
834}
2fda4977 835
f9be684a
AC
836static const struct regset *
837ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
838 const char *sect_name, size_t sect_size)
2fda4977 839{
f9be684a
AC
840 struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
841 if (strcmp (sect_name, ".reg") == 0)
2fda4977 842 {
f9be684a
AC
843 if (tdep->wordsize == 4)
844 return &ppc32_linux_gregset;
2fda4977 845 else
f9be684a 846 return &ppc64_linux_gregset;
2fda4977 847 }
f9be684a 848 if (strcmp (sect_name, ".reg2") == 0)
f2db237a 849 return &ppc32_linux_fpregset;
06caf7d2
CES
850 if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
851 return &ppc32_linux_vrregset;
604c2f83
LM
852 if (strcmp (sect_name, ".reg-ppc-vsx") == 0)
853 return &ppc32_linux_vsxregset;
f9be684a 854 return NULL;
2fda4977
DJ
855}
856
a8f60bfc 857static void
5366653e 858ppc_linux_sigtramp_cache (struct frame_info *this_frame,
a8f60bfc
AC
859 struct trad_frame_cache *this_cache,
860 CORE_ADDR func, LONGEST offset,
861 int bias)
862{
863 CORE_ADDR base;
864 CORE_ADDR regs;
865 CORE_ADDR gpregs;
866 CORE_ADDR fpregs;
867 int i;
5366653e 868 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8f60bfc 869 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 870 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8f60bfc 871
5366653e
DJ
872 base = get_frame_register_unsigned (this_frame,
873 gdbarch_sp_regnum (gdbarch));
874 if (bias > 0 && get_frame_pc (this_frame) != func)
a8f60bfc
AC
875 /* See below, some signal trampolines increment the stack as their
876 first instruction, need to compensate for that. */
877 base -= bias;
878
879 /* Find the address of the register buffer pointer. */
880 regs = base + offset;
881 /* Use that to find the address of the corresponding register
882 buffers. */
e17a4113 883 gpregs = read_memory_unsigned_integer (regs, tdep->wordsize, byte_order);
a8f60bfc
AC
884 fpregs = gpregs + 48 * tdep->wordsize;
885
886 /* General purpose. */
887 for (i = 0; i < 32; i++)
888 {
889 int regnum = i + tdep->ppc_gp0_regnum;
890 trad_frame_set_reg_addr (this_cache, regnum, gpregs + i * tdep->wordsize);
891 }
3e8c568d 892 trad_frame_set_reg_addr (this_cache,
40a6adc1 893 gdbarch_pc_regnum (gdbarch),
3e8c568d 894 gpregs + 32 * tdep->wordsize);
a8f60bfc
AC
895 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
896 gpregs + 35 * tdep->wordsize);
897 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
898 gpregs + 36 * tdep->wordsize);
899 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
900 gpregs + 37 * tdep->wordsize);
901 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
902 gpregs + 38 * tdep->wordsize);
903
7284e1be
UW
904 if (ppc_linux_trap_reg_p (gdbarch))
905 {
906 trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM,
907 gpregs + 34 * tdep->wordsize);
908 trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM,
909 gpregs + 40 * tdep->wordsize);
910 }
911
60f140f9
PG
912 if (ppc_floating_point_unit_p (gdbarch))
913 {
914 /* Floating point registers. */
915 for (i = 0; i < 32; i++)
916 {
40a6adc1 917 int regnum = i + gdbarch_fp0_regnum (gdbarch);
60f140f9
PG
918 trad_frame_set_reg_addr (this_cache, regnum,
919 fpregs + i * tdep->wordsize);
920 }
921 trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
4019046a 922 fpregs + 32 * tdep->wordsize);
60f140f9 923 }
a8f60bfc
AC
924 trad_frame_set_id (this_cache, frame_id_build (base, func));
925}
926
927static void
928ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 929 struct frame_info *this_frame,
a8f60bfc
AC
930 struct trad_frame_cache *this_cache,
931 CORE_ADDR func)
932{
5366653e 933 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
934 0xd0 /* Offset to ucontext_t. */
935 + 0x30 /* Offset to .reg. */,
936 0);
937}
938
939static void
940ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 941 struct frame_info *this_frame,
a8f60bfc
AC
942 struct trad_frame_cache *this_cache,
943 CORE_ADDR func)
944{
5366653e 945 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
946 0x80 /* Offset to ucontext_t. */
947 + 0xe0 /* Offset to .reg. */,
948 128);
949}
950
951static void
952ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 953 struct frame_info *this_frame,
a8f60bfc
AC
954 struct trad_frame_cache *this_cache,
955 CORE_ADDR func)
956{
5366653e 957 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
958 0x40 /* Offset to ucontext_t. */
959 + 0x1c /* Offset to .reg. */,
960 0);
961}
962
963static void
964ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 965 struct frame_info *this_frame,
a8f60bfc
AC
966 struct trad_frame_cache *this_cache,
967 CORE_ADDR func)
968{
5366653e 969 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
970 0x80 /* Offset to struct sigcontext. */
971 + 0x38 /* Offset to .reg. */,
972 128);
973}
974
975static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
976 SIGTRAMP_FRAME,
977 4,
978 {
979 { 0x380000ac, -1 }, /* li r0, 172 */
980 { 0x44000002, -1 }, /* sc */
981 { TRAMP_SENTINEL_INSN },
982 },
983 ppc32_linux_sigaction_cache_init
984};
985static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
986 SIGTRAMP_FRAME,
987 4,
988 {
989 { 0x38210080, -1 }, /* addi r1,r1,128 */
990 { 0x380000ac, -1 }, /* li r0, 172 */
991 { 0x44000002, -1 }, /* sc */
992 { TRAMP_SENTINEL_INSN },
993 },
994 ppc64_linux_sigaction_cache_init
995};
996static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
997 SIGTRAMP_FRAME,
998 4,
999 {
1000 { 0x38000077, -1 }, /* li r0,119 */
1001 { 0x44000002, -1 }, /* sc */
1002 { TRAMP_SENTINEL_INSN },
1003 },
1004 ppc32_linux_sighandler_cache_init
1005};
1006static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
1007 SIGTRAMP_FRAME,
1008 4,
1009 {
1010 { 0x38210080, -1 }, /* addi r1,r1,128 */
1011 { 0x38000077, -1 }, /* li r0,119 */
1012 { 0x44000002, -1 }, /* sc */
1013 { TRAMP_SENTINEL_INSN },
1014 },
1015 ppc64_linux_sighandler_cache_init
1016};
1017
7284e1be 1018
85e747d2
UW
1019/* Address to use for displaced stepping. When debugging a stand-alone
1020 SPU executable, entry_point_address () will point to an SPU local-store
1021 address and is thus not usable as displaced stepping location. We use
1022 the auxiliary vector to determine the PowerPC-side entry point address
1023 instead. */
1024
1025static CORE_ADDR ppc_linux_entry_point_addr = 0;
1026
1027static void
1028ppc_linux_inferior_created (struct target_ops *target, int from_tty)
1029{
1030 ppc_linux_entry_point_addr = 0;
1031}
1032
1033static CORE_ADDR
1034ppc_linux_displaced_step_location (struct gdbarch *gdbarch)
1035{
1036 if (ppc_linux_entry_point_addr == 0)
1037 {
1038 CORE_ADDR addr;
1039
1040 /* Determine entry point from target auxiliary vector. */
1041 if (target_auxv_search (&current_target, AT_ENTRY, &addr) <= 0)
1042 error (_("Cannot find AT_ENTRY auxiliary vector entry."));
1043
1044 /* Make certain that the address points at real code, and not a
1045 function descriptor. */
1046 addr = gdbarch_convert_from_func_ptr_addr (gdbarch, addr,
1047 &current_target);
1048
1049 /* Inferior calls also use the entry point as a breakpoint location.
1050 We don't want displaced stepping to interfere with those
1051 breakpoints, so leave space. */
1052 ppc_linux_entry_point_addr = addr + 2 * PPC_INSN_SIZE;
1053 }
1054
1055 return ppc_linux_entry_point_addr;
1056}
1057
1058
7284e1be
UW
1059/* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
1060int
1061ppc_linux_trap_reg_p (struct gdbarch *gdbarch)
1062{
1063 /* If we do not have a target description with registers, then
1064 the special registers will not be included in the register set. */
1065 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1066 return 0;
1067
1068 /* If we do, then it is safe to check the size. */
1069 return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0
1070 && register_size (gdbarch, PPC_TRAP_REGNUM) > 0;
1071}
1072
a96d9b2e
SDJ
1073/* Return the current system call's number present in the
1074 r0 register. When the function fails, it returns -1. */
1075static LONGEST
1076ppc_linux_get_syscall_number (struct gdbarch *gdbarch,
1077 ptid_t ptid)
1078{
1079 struct regcache *regcache = get_thread_regcache (ptid);
1080 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1081 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1082 struct cleanup *cleanbuf;
1083 /* The content of a register */
1084 gdb_byte *buf;
1085 /* The result */
1086 LONGEST ret;
1087
1088 /* Make sure we're in a 32- or 64-bit machine */
1089 gdb_assert (tdep->wordsize == 4 || tdep->wordsize == 8);
1090
1091 buf = (gdb_byte *) xmalloc (tdep->wordsize * sizeof (gdb_byte));
1092
1093 cleanbuf = make_cleanup (xfree, buf);
1094
1095 /* Getting the system call number from the register.
1096 When dealing with PowerPC architecture, this information
1097 is stored at 0th register. */
1098 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum, buf);
1099
1100 ret = extract_signed_integer (buf, tdep->wordsize, byte_order);
1101 do_cleanups (cleanbuf);
1102
1103 return ret;
1104}
1105
7284e1be
UW
1106static void
1107ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1108{
1109 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1110
1111 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1112
1113 /* Set special TRAP register to -1 to prevent the kernel from
1114 messing with the PC we just installed, if we happen to be
1115 within an interrupted system call that the kernel wants to
1116 restart.
1117
1118 Note that after we return from the dummy call, the TRAP and
1119 ORIG_R3 registers will be automatically restored, and the
1120 kernel continues to restart the system call at this point. */
1121 if (ppc_linux_trap_reg_p (gdbarch))
1122 regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
1123}
1124
f4d9bade
UW
1125static int
1126ppc_linux_spu_section (bfd *abfd, asection *asect, void *user_data)
1127{
1128 return strncmp (bfd_section_name (abfd, asect), "SPU/", 4) == 0;
1129}
1130
7284e1be
UW
1131static const struct target_desc *
1132ppc_linux_core_read_description (struct gdbarch *gdbarch,
1133 struct target_ops *target,
1134 bfd *abfd)
1135{
f4d9bade 1136 asection *cell = bfd_sections_find_if (abfd, ppc_linux_spu_section, NULL);
7284e1be 1137 asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
604c2f83 1138 asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
7284e1be
UW
1139 asection *section = bfd_get_section_by_name (abfd, ".reg");
1140 if (! section)
1141 return NULL;
1142
1143 switch (bfd_section_size (abfd, section))
1144 {
1145 case 48 * 4:
f4d9bade
UW
1146 if (cell)
1147 return tdesc_powerpc_cell32l;
1148 else if (vsx)
604c2f83
LM
1149 return tdesc_powerpc_vsx32l;
1150 else if (altivec)
1151 return tdesc_powerpc_altivec32l;
1152 else
1153 return tdesc_powerpc_32l;
7284e1be
UW
1154
1155 case 48 * 8:
f4d9bade
UW
1156 if (cell)
1157 return tdesc_powerpc_cell64l;
1158 else if (vsx)
604c2f83
LM
1159 return tdesc_powerpc_vsx64l;
1160 else if (altivec)
1161 return tdesc_powerpc_altivec64l;
1162 else
1163 return tdesc_powerpc_64l;
7284e1be
UW
1164
1165 default:
1166 return NULL;
1167 }
1168}
1169
cc5f0d61
UW
1170
1171/* Cell/B.E. active SPE context tracking support. */
1172
1173static struct objfile *spe_context_objfile = NULL;
1174static CORE_ADDR spe_context_lm_addr = 0;
1175static CORE_ADDR spe_context_offset = 0;
1176
1177static ptid_t spe_context_cache_ptid;
1178static CORE_ADDR spe_context_cache_address;
1179
1180/* Hook into inferior_created, solib_loaded, and solib_unloaded observers
1181 to track whether we've loaded a version of libspe2 (as static or dynamic
1182 library) that provides the __spe_current_active_context variable. */
1183static void
1184ppc_linux_spe_context_lookup (struct objfile *objfile)
1185{
1186 struct minimal_symbol *sym;
1187
1188 if (!objfile)
1189 {
1190 spe_context_objfile = NULL;
1191 spe_context_lm_addr = 0;
1192 spe_context_offset = 0;
1193 spe_context_cache_ptid = minus_one_ptid;
1194 spe_context_cache_address = 0;
1195 return;
1196 }
1197
1198 sym = lookup_minimal_symbol ("__spe_current_active_context", NULL, objfile);
1199 if (sym)
1200 {
1201 spe_context_objfile = objfile;
1202 spe_context_lm_addr = svr4_fetch_objfile_link_map (objfile);
1203 spe_context_offset = SYMBOL_VALUE_ADDRESS (sym);
1204 spe_context_cache_ptid = minus_one_ptid;
1205 spe_context_cache_address = 0;
1206 return;
1207 }
1208}
1209
1210static void
1211ppc_linux_spe_context_inferior_created (struct target_ops *t, int from_tty)
1212{
1213 struct objfile *objfile;
1214
1215 ppc_linux_spe_context_lookup (NULL);
1216 ALL_OBJFILES (objfile)
1217 ppc_linux_spe_context_lookup (objfile);
1218}
1219
1220static void
1221ppc_linux_spe_context_solib_loaded (struct so_list *so)
1222{
1223 if (strstr (so->so_original_name, "/libspe") != NULL)
1224 {
1225 solib_read_symbols (so, so->from_tty ? SYMFILE_VERBOSE : 0);
1226 ppc_linux_spe_context_lookup (so->objfile);
1227 }
1228}
1229
1230static void
1231ppc_linux_spe_context_solib_unloaded (struct so_list *so)
1232{
1233 if (so->objfile == spe_context_objfile)
1234 ppc_linux_spe_context_lookup (NULL);
1235}
1236
1237/* Retrieve contents of the N'th element in the current thread's
1238 linked SPE context list into ID and NPC. Return the address of
1239 said context element, or 0 if not found. */
1240static CORE_ADDR
1241ppc_linux_spe_context (int wordsize, enum bfd_endian byte_order,
1242 int n, int *id, unsigned int *npc)
1243{
1244 CORE_ADDR spe_context = 0;
1245 gdb_byte buf[16];
1246 int i;
1247
1248 /* Quick exit if we have not found __spe_current_active_context. */
1249 if (!spe_context_objfile)
1250 return 0;
1251
1252 /* Look up cached address of thread-local variable. */
1253 if (!ptid_equal (spe_context_cache_ptid, inferior_ptid))
1254 {
1255 struct target_ops *target = &current_target;
1256 volatile struct gdb_exception ex;
1257
1258 while (target && !target->to_get_thread_local_address)
1259 target = find_target_beneath (target);
1260 if (!target)
1261 return 0;
1262
1263 TRY_CATCH (ex, RETURN_MASK_ERROR)
1264 {
1265 /* We do not call target_translate_tls_address here, because
1266 svr4_fetch_objfile_link_map may invalidate the frame chain,
1267 which must not do while inside a frame sniffer.
1268
1269 Instead, we have cached the lm_addr value, and use that to
1270 directly call the target's to_get_thread_local_address. */
1271 spe_context_cache_address
1272 = target->to_get_thread_local_address (target, inferior_ptid,
1273 spe_context_lm_addr,
1274 spe_context_offset);
1275 spe_context_cache_ptid = inferior_ptid;
1276 }
1277
1278 if (ex.reason < 0)
1279 return 0;
1280 }
1281
1282 /* Read variable value. */
1283 if (target_read_memory (spe_context_cache_address, buf, wordsize) == 0)
1284 spe_context = extract_unsigned_integer (buf, wordsize, byte_order);
1285
1286 /* Cyle through to N'th linked list element. */
1287 for (i = 0; i < n && spe_context; i++)
1288 if (target_read_memory (spe_context + align_up (12, wordsize),
1289 buf, wordsize) == 0)
1290 spe_context = extract_unsigned_integer (buf, wordsize, byte_order);
1291 else
1292 spe_context = 0;
1293
1294 /* Read current context. */
1295 if (spe_context
1296 && target_read_memory (spe_context, buf, 12) != 0)
1297 spe_context = 0;
1298
1299 /* Extract data elements. */
1300 if (spe_context)
1301 {
1302 if (id)
1303 *id = extract_signed_integer (buf, 4, byte_order);
1304 if (npc)
1305 *npc = extract_unsigned_integer (buf + 4, 4, byte_order);
1306 }
1307
1308 return spe_context;
1309}
1310
1311
1312/* Cell/B.E. cross-architecture unwinder support. */
1313
1314struct ppu2spu_cache
1315{
1316 struct frame_id frame_id;
1317 struct regcache *regcache;
1318};
1319
1320static struct gdbarch *
1321ppu2spu_prev_arch (struct frame_info *this_frame, void **this_cache)
1322{
1323 struct ppu2spu_cache *cache = *this_cache;
1324 return get_regcache_arch (cache->regcache);
1325}
1326
1327static void
1328ppu2spu_this_id (struct frame_info *this_frame,
1329 void **this_cache, struct frame_id *this_id)
1330{
1331 struct ppu2spu_cache *cache = *this_cache;
1332 *this_id = cache->frame_id;
1333}
1334
1335static struct value *
1336ppu2spu_prev_register (struct frame_info *this_frame,
1337 void **this_cache, int regnum)
1338{
1339 struct ppu2spu_cache *cache = *this_cache;
1340 struct gdbarch *gdbarch = get_regcache_arch (cache->regcache);
1341 gdb_byte *buf;
1342
1343 buf = alloca (register_size (gdbarch, regnum));
1344 regcache_cooked_read (cache->regcache, regnum, buf);
1345 return frame_unwind_got_bytes (this_frame, regnum, buf);
1346}
1347
1348struct ppu2spu_data
1349{
1350 struct gdbarch *gdbarch;
1351 int id;
1352 unsigned int npc;
1353 gdb_byte gprs[128*16];
1354};
1355
1356static int
1357ppu2spu_unwind_register (void *src, int regnum, gdb_byte *buf)
1358{
1359 struct ppu2spu_data *data = src;
1360 enum bfd_endian byte_order = gdbarch_byte_order (data->gdbarch);
1361
1362 if (regnum >= 0 && regnum < SPU_NUM_GPRS)
1363 memcpy (buf, data->gprs + 16*regnum, 16);
1364 else if (regnum == SPU_ID_REGNUM)
1365 store_unsigned_integer (buf, 4, byte_order, data->id);
1366 else if (regnum == SPU_PC_REGNUM)
1367 store_unsigned_integer (buf, 4, byte_order, data->npc);
1368 else
1369 return 0;
1370
1371 return 1;
1372}
1373
1374static int
1375ppu2spu_sniffer (const struct frame_unwind *self,
1376 struct frame_info *this_frame, void **this_prologue_cache)
1377{
1378 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1379 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1380 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1381 struct ppu2spu_data data;
1382 struct frame_info *fi;
1383 CORE_ADDR base, func, backchain, spe_context;
1384 gdb_byte buf[8];
1385 int n = 0;
1386
1387 /* Count the number of SPU contexts already in the frame chain. */
1388 for (fi = get_next_frame (this_frame); fi; fi = get_next_frame (fi))
1389 if (get_frame_type (fi) == ARCH_FRAME
1390 && gdbarch_bfd_arch_info (get_frame_arch (fi))->arch == bfd_arch_spu)
1391 n++;
1392
1393 base = get_frame_sp (this_frame);
1394 func = get_frame_pc (this_frame);
1395 if (target_read_memory (base, buf, tdep->wordsize))
1396 return 0;
1397 backchain = extract_unsigned_integer (buf, tdep->wordsize, byte_order);
1398
1399 spe_context = ppc_linux_spe_context (tdep->wordsize, byte_order,
1400 n, &data.id, &data.npc);
1401 if (spe_context && base <= spe_context && spe_context < backchain)
1402 {
1403 char annex[32];
1404
1405 /* Find gdbarch for SPU. */
1406 struct gdbarch_info info;
1407 gdbarch_info_init (&info);
1408 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
1409 info.byte_order = BFD_ENDIAN_BIG;
1410 info.osabi = GDB_OSABI_LINUX;
1411 info.tdep_info = (void *) &data.id;
1412 data.gdbarch = gdbarch_find_by_info (info);
1413 if (!data.gdbarch)
1414 return 0;
1415
1416 xsnprintf (annex, sizeof annex, "%d/regs", data.id);
1417 if (target_read (&current_target, TARGET_OBJECT_SPU, annex,
1418 data.gprs, 0, sizeof data.gprs)
1419 == sizeof data.gprs)
1420 {
1421 struct ppu2spu_cache *cache
1422 = FRAME_OBSTACK_CALLOC (1, struct ppu2spu_cache);
1423
d37346f0
DJ
1424 struct address_space *aspace = get_frame_address_space (this_frame);
1425 struct regcache *regcache = regcache_xmalloc (data.gdbarch, aspace);
cc5f0d61
UW
1426 struct cleanup *cleanups = make_cleanup_regcache_xfree (regcache);
1427 regcache_save (regcache, ppu2spu_unwind_register, &data);
1428 discard_cleanups (cleanups);
1429
1430 cache->frame_id = frame_id_build (base, func);
1431 cache->regcache = regcache;
1432 *this_prologue_cache = cache;
1433 return 1;
1434 }
1435 }
1436
1437 return 0;
1438}
1439
1440static void
1441ppu2spu_dealloc_cache (struct frame_info *self, void *this_cache)
1442{
1443 struct ppu2spu_cache *cache = this_cache;
1444 regcache_xfree (cache->regcache);
1445}
1446
1447static const struct frame_unwind ppu2spu_unwind = {
1448 ARCH_FRAME,
1449 ppu2spu_this_id,
1450 ppu2spu_prev_register,
1451 NULL,
1452 ppu2spu_sniffer,
1453 ppu2spu_dealloc_cache,
1454 ppu2spu_prev_arch,
1455};
1456
1457
7b112f9c
JT
1458static void
1459ppc_linux_init_abi (struct gdbarch_info info,
1460 struct gdbarch *gdbarch)
1461{
1462 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7284e1be 1463 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
7b112f9c 1464
b14d30e1
JM
1465 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
1466 128-bit, they are IBM long double, not IEEE quad long double as
1467 in the System V ABI PowerPC Processor Supplement. We can safely
1468 let them default to 128-bit, since the debug info will give the
1469 size of type actually used in each case. */
1470 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
1471 set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
0598a43c 1472
7284e1be
UW
1473 /* Handle inferior calls during interrupted system calls. */
1474 set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc);
1475
a96d9b2e
SDJ
1476 /* Get the syscall number from the arch's register. */
1477 set_gdbarch_get_syscall_number (gdbarch, ppc_linux_get_syscall_number);
1478
7b112f9c
JT
1479 if (tdep->wordsize == 4)
1480 {
b9ff3018
AC
1481 /* Until November 2001, gcc did not comply with the 32 bit SysV
1482 R4 ABI requirement that structures less than or equal to 8
1483 bytes should be returned in registers. Instead GCC was using
1484 the the AIX/PowerOpen ABI - everything returned in memory
1485 (well ignoring vectors that is). When this was corrected, it
1486 wasn't fixed for GNU/Linux native platform. Use the
1487 PowerOpen struct convention. */
05580c65 1488 set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
b9ff3018 1489
7b112f9c
JT
1490 set_gdbarch_memory_remove_breakpoint (gdbarch,
1491 ppc_linux_memory_remove_breakpoint);
61a65099 1492
f470a70a 1493 /* Shared library handling. */
8526f328 1494 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
7b112f9c 1495 set_solib_svr4_fetch_link_map_offsets
76a9d10f 1496 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
a8f60bfc 1497
a96d9b2e
SDJ
1498 /* Setting the correct XML syscall filename. */
1499 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_PPC);
1500
a8f60bfc
AC
1501 /* Trampolines. */
1502 tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sigaction_tramp_frame);
1503 tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sighandler_tramp_frame);
a78c2d62
UW
1504
1505 /* BFD target for core files. */
1506 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1507 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpcle");
1508 else
1509 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpc");
7b112f9c 1510 }
f470a70a
JB
1511
1512 if (tdep->wordsize == 8)
1513 {
00d5f93a
UW
1514 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1515 function descriptors). */
1516 set_gdbarch_convert_from_func_ptr_addr
1517 (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
1518
fb318ff7 1519 /* Shared library handling. */
2bbe3cc1 1520 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
fb318ff7
DJ
1521 set_solib_svr4_fetch_link_map_offsets
1522 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1523
a96d9b2e
SDJ
1524 /* Setting the correct XML syscall filename. */
1525 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_PPC64);
1526
a8f60bfc
AC
1527 /* Trampolines. */
1528 tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sigaction_tramp_frame);
1529 tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sighandler_tramp_frame);
a78c2d62
UW
1530
1531 /* BFD target for core files. */
1532 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1533 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpcle");
1534 else
1535 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpc");
f470a70a 1536 }
f9be684a 1537 set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section);
7284e1be 1538 set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
b2756930 1539
17ea7499 1540 /* Supported register sections. */
6207416c
LM
1541 if (tdesc_find_feature (info.target_desc,
1542 "org.gnu.gdb.power.vsx"))
1543 set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vsx_regset_sections);
1544 else if (tdesc_find_feature (info.target_desc,
1545 "org.gnu.gdb.power.altivec"))
1546 set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vmx_regset_sections);
1547 else
1548 set_gdbarch_core_regset_sections (gdbarch, ppc_linux_fp_regset_sections);
17ea7499 1549
b2756930
KB
1550 /* Enable TLS support. */
1551 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1552 svr4_fetch_objfile_link_map);
7284e1be
UW
1553
1554 if (tdesc_data)
1555 {
1556 const struct tdesc_feature *feature;
1557
1558 /* If we have target-described registers, then we can safely
1559 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1560 (whether they are described or not). */
1561 gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM);
1562 set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1);
1563
1564 /* If they are present, then assign them to the reserved number. */
1565 feature = tdesc_find_feature (info.target_desc,
1566 "org.gnu.gdb.power.linux");
1567 if (feature != NULL)
1568 {
1569 tdesc_numbered_register (feature, tdesc_data,
1570 PPC_ORIG_R3_REGNUM, "orig_r3");
1571 tdesc_numbered_register (feature, tdesc_data,
1572 PPC_TRAP_REGNUM, "trap");
1573 }
1574 }
85e747d2
UW
1575
1576 /* Enable Cell/B.E. if supported by the target. */
1577 if (tdesc_compatible_p (info.target_desc,
1578 bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu)))
1579 {
1580 /* Cell/B.E. multi-architecture support. */
1581 set_spu_solib_ops (gdbarch);
1582
cc5f0d61
UW
1583 /* Cell/B.E. cross-architecture unwinder support. */
1584 frame_unwind_prepend_unwinder (gdbarch, &ppu2spu_unwind);
1585
85e747d2
UW
1586 /* The default displaced_step_at_entry_point doesn't work for
1587 SPU stand-alone executables. */
1588 set_gdbarch_displaced_step_location (gdbarch,
1589 ppc_linux_displaced_step_location);
1590 }
7b112f9c
JT
1591}
1592
63807e1d
PA
1593/* Provide a prototype to silence -Wmissing-prototypes. */
1594extern initialize_file_ftype _initialize_ppc_linux_tdep;
1595
7b112f9c
JT
1596void
1597_initialize_ppc_linux_tdep (void)
1598{
0a0a4ac3
AC
1599 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1600 64-bit PowerPC, and the older rs6k. */
1601 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
1602 ppc_linux_init_abi);
1603 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
1604 ppc_linux_init_abi);
1605 gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
1606 ppc_linux_init_abi);
7284e1be 1607
85e747d2
UW
1608 /* Attach to inferior_created observer. */
1609 observer_attach_inferior_created (ppc_linux_inferior_created);
1610
cc5f0d61
UW
1611 /* Attach to observers to track __spe_current_active_context. */
1612 observer_attach_inferior_created (ppc_linux_spe_context_inferior_created);
1613 observer_attach_solib_loaded (ppc_linux_spe_context_solib_loaded);
1614 observer_attach_solib_unloaded (ppc_linux_spe_context_solib_unloaded);
1615
7284e1be
UW
1616 /* Initialize the Linux target descriptions. */
1617 initialize_tdesc_powerpc_32l ();
1618 initialize_tdesc_powerpc_altivec32l ();
f4d9bade 1619 initialize_tdesc_powerpc_cell32l ();
604c2f83 1620 initialize_tdesc_powerpc_vsx32l ();
69abc51c
TJB
1621 initialize_tdesc_powerpc_isa205_32l ();
1622 initialize_tdesc_powerpc_isa205_altivec32l ();
1623 initialize_tdesc_powerpc_isa205_vsx32l ();
7284e1be
UW
1624 initialize_tdesc_powerpc_64l ();
1625 initialize_tdesc_powerpc_altivec64l ();
f4d9bade 1626 initialize_tdesc_powerpc_cell64l ();
604c2f83 1627 initialize_tdesc_powerpc_vsx64l ();
69abc51c
TJB
1628 initialize_tdesc_powerpc_isa205_64l ();
1629 initialize_tdesc_powerpc_isa205_altivec64l ();
1630 initialize_tdesc_powerpc_isa205_vsx64l ();
7284e1be 1631 initialize_tdesc_powerpc_e500l ();
7b112f9c 1632}
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