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c877c8e6 | 1 | /* Target-dependent code for GDB, the GNU debugger. |
4e052eda | 2 | |
6aba47ca | 3 | Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
9b254dd1 | 4 | 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 |
76a9d10f | 5 | Free Software Foundation, Inc. |
c877c8e6 KB |
6 | |
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
c877c8e6 KB |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c877c8e6 KB |
21 | |
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "symtab.h" | |
26 | #include "target.h" | |
27 | #include "gdbcore.h" | |
28 | #include "gdbcmd.h" | |
29 | #include "symfile.h" | |
30 | #include "objfiles.h" | |
4e052eda | 31 | #include "regcache.h" |
fd0407d6 | 32 | #include "value.h" |
4be87837 | 33 | #include "osabi.h" |
f9be684a | 34 | #include "regset.h" |
6ded7999 | 35 | #include "solib-svr4.h" |
9aa1e687 | 36 | #include "ppc-tdep.h" |
7284e1be | 37 | #include "ppc-linux-tdep.h" |
61a65099 KB |
38 | #include "trad-frame.h" |
39 | #include "frame-unwind.h" | |
a8f60bfc | 40 | #include "tramp-frame.h" |
9aa1e687 | 41 | |
7284e1be UW |
42 | #include "features/rs6000/powerpc-32l.c" |
43 | #include "features/rs6000/powerpc-altivec32l.c" | |
44 | #include "features/rs6000/powerpc-64l.c" | |
45 | #include "features/rs6000/powerpc-altivec64l.c" | |
46 | #include "features/rs6000/powerpc-e500l.c" | |
47 | ||
c877c8e6 | 48 | |
122a33de KB |
49 | /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint |
50 | in much the same fashion as memory_remove_breakpoint in mem-break.c, | |
51 | but is careful not to write back the previous contents if the code | |
52 | in question has changed in between inserting the breakpoint and | |
53 | removing it. | |
54 | ||
55 | Here is the problem that we're trying to solve... | |
56 | ||
57 | Once upon a time, before introducing this function to remove | |
58 | breakpoints from the inferior, setting a breakpoint on a shared | |
59 | library function prior to running the program would not work | |
60 | properly. In order to understand the problem, it is first | |
61 | necessary to understand a little bit about dynamic linking on | |
62 | this platform. | |
63 | ||
64 | A call to a shared library function is accomplished via a bl | |
65 | (branch-and-link) instruction whose branch target is an entry | |
66 | in the procedure linkage table (PLT). The PLT in the object | |
67 | file is uninitialized. To gdb, prior to running the program, the | |
68 | entries in the PLT are all zeros. | |
69 | ||
70 | Once the program starts running, the shared libraries are loaded | |
71 | and the procedure linkage table is initialized, but the entries in | |
72 | the table are not (necessarily) resolved. Once a function is | |
73 | actually called, the code in the PLT is hit and the function is | |
74 | resolved. In order to better illustrate this, an example is in | |
75 | order; the following example is from the gdb testsuite. | |
76 | ||
77 | We start the program shmain. | |
78 | ||
79 | [kev@arroyo testsuite]$ ../gdb gdb.base/shmain | |
80 | [...] | |
81 | ||
82 | We place two breakpoints, one on shr1 and the other on main. | |
83 | ||
84 | (gdb) b shr1 | |
85 | Breakpoint 1 at 0x100409d4 | |
86 | (gdb) b main | |
87 | Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44. | |
88 | ||
89 | Examine the instruction (and the immediatly following instruction) | |
90 | upon which the breakpoint was placed. Note that the PLT entry | |
91 | for shr1 contains zeros. | |
92 | ||
93 | (gdb) x/2i 0x100409d4 | |
94 | 0x100409d4 <shr1>: .long 0x0 | |
95 | 0x100409d8 <shr1+4>: .long 0x0 | |
96 | ||
97 | Now run 'til main. | |
98 | ||
99 | (gdb) r | |
100 | Starting program: gdb.base/shmain | |
101 | Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19. | |
102 | ||
103 | Breakpoint 2, main () | |
104 | at gdb.base/shmain.c:44 | |
105 | 44 g = 1; | |
106 | ||
107 | Examine the PLT again. Note that the loading of the shared | |
108 | library has initialized the PLT to code which loads a constant | |
109 | (which I think is an index into the GOT) into r11 and then | |
110 | branchs a short distance to the code which actually does the | |
111 | resolving. | |
112 | ||
113 | (gdb) x/2i 0x100409d4 | |
114 | 0x100409d4 <shr1>: li r11,4 | |
115 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
116 | (gdb) c | |
117 | Continuing. | |
118 | ||
119 | Breakpoint 1, shr1 (x=1) | |
120 | at gdb.base/shr1.c:19 | |
121 | 19 l = 1; | |
122 | ||
123 | Now we've hit the breakpoint at shr1. (The breakpoint was | |
124 | reset from the PLT entry to the actual shr1 function after the | |
125 | shared library was loaded.) Note that the PLT entry has been | |
126 | resolved to contain a branch that takes us directly to shr1. | |
127 | (The real one, not the PLT entry.) | |
128 | ||
129 | (gdb) x/2i 0x100409d4 | |
130 | 0x100409d4 <shr1>: b 0xffaf76c <shr1> | |
131 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
132 | ||
133 | The thing to note here is that the PLT entry for shr1 has been | |
134 | changed twice. | |
135 | ||
136 | Now the problem should be obvious. GDB places a breakpoint (a | |
137 | trap instruction) on the zero value of the PLT entry for shr1. | |
138 | Later on, after the shared library had been loaded and the PLT | |
139 | initialized, GDB gets a signal indicating this fact and attempts | |
140 | (as it always does when it stops) to remove all the breakpoints. | |
141 | ||
142 | The breakpoint removal was causing the former contents (a zero | |
143 | word) to be written back to the now initialized PLT entry thus | |
144 | destroying a portion of the initialization that had occurred only a | |
145 | short time ago. When execution continued, the zero word would be | |
146 | executed as an instruction an an illegal instruction trap was | |
147 | generated instead. (0 is not a legal instruction.) | |
148 | ||
149 | The fix for this problem was fairly straightforward. The function | |
150 | memory_remove_breakpoint from mem-break.c was copied to this file, | |
151 | modified slightly, and renamed to ppc_linux_memory_remove_breakpoint. | |
152 | In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new | |
153 | function. | |
154 | ||
155 | The differences between ppc_linux_memory_remove_breakpoint () and | |
156 | memory_remove_breakpoint () are minor. All that the former does | |
157 | that the latter does not is check to make sure that the breakpoint | |
158 | location actually contains a breakpoint (trap instruction) prior | |
159 | to attempting to write back the old contents. If it does contain | |
160 | a trap instruction, we allow the old contents to be written back. | |
161 | Otherwise, we silently do nothing. | |
162 | ||
163 | The big question is whether memory_remove_breakpoint () should be | |
164 | changed to have the same functionality. The downside is that more | |
165 | traffic is generated for remote targets since we'll have an extra | |
166 | fetch of a memory word each time a breakpoint is removed. | |
167 | ||
168 | For the time being, we'll leave this self-modifying-code-friendly | |
169 | version in ppc-linux-tdep.c, but it ought to be migrated somewhere | |
170 | else in the event that some other platform has similar needs with | |
171 | regard to removing breakpoints in some potentially self modifying | |
172 | code. */ | |
482ca3f5 | 173 | int |
ae4b2284 MD |
174 | ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
175 | struct bp_target_info *bp_tgt) | |
482ca3f5 | 176 | { |
8181d85f | 177 | CORE_ADDR addr = bp_tgt->placed_address; |
f4f9705a | 178 | const unsigned char *bp; |
482ca3f5 KB |
179 | int val; |
180 | int bplen; | |
50fd1280 | 181 | gdb_byte old_contents[BREAKPOINT_MAX]; |
8defab1a | 182 | struct cleanup *cleanup; |
482ca3f5 KB |
183 | |
184 | /* Determine appropriate breakpoint contents and size for this address. */ | |
ae4b2284 | 185 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
482ca3f5 | 186 | if (bp == NULL) |
8a3fe4f8 | 187 | error (_("Software breakpoints not implemented for this target.")); |
482ca3f5 | 188 | |
8defab1a DJ |
189 | /* Make sure we see the memory breakpoints. */ |
190 | cleanup = make_show_memory_breakpoints_cleanup (1); | |
482ca3f5 KB |
191 | val = target_read_memory (addr, old_contents, bplen); |
192 | ||
193 | /* If our breakpoint is no longer at the address, this means that the | |
194 | program modified the code on us, so it is wrong to put back the | |
195 | old value */ | |
196 | if (val == 0 && memcmp (bp, old_contents, bplen) == 0) | |
8181d85f | 197 | val = target_write_memory (addr, bp_tgt->shadow_contents, bplen); |
482ca3f5 | 198 | |
8defab1a | 199 | do_cleanups (cleanup); |
482ca3f5 KB |
200 | return val; |
201 | } | |
6ded7999 | 202 | |
b9ff3018 AC |
203 | /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather |
204 | than the 32 bit SYSV R4 ABI structure return convention - all | |
205 | structures, no matter their size, are put in memory. Vectors, | |
206 | which were added later, do get returned in a register though. */ | |
207 | ||
05580c65 | 208 | static enum return_value_convention |
c055b101 CV |
209 | ppc_linux_return_value (struct gdbarch *gdbarch, struct type *func_type, |
210 | struct type *valtype, struct regcache *regcache, | |
211 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
b9ff3018 | 212 | { |
05580c65 AC |
213 | if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
214 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) | |
215 | && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8) | |
216 | && TYPE_VECTOR (valtype))) | |
217 | return RETURN_VALUE_STRUCT_CONVENTION; | |
218 | else | |
c055b101 CV |
219 | return ppc_sysv_abi_return_value (gdbarch, func_type, valtype, regcache, |
220 | readbuf, writebuf); | |
b9ff3018 AC |
221 | } |
222 | ||
f470a70a JB |
223 | /* Macros for matching instructions. Note that, since all the |
224 | operands are masked off before they're or-ed into the instruction, | |
225 | you can use -1 to make masks. */ | |
226 | ||
227 | #define insn_d(opcd, rts, ra, d) \ | |
228 | ((((opcd) & 0x3f) << 26) \ | |
229 | | (((rts) & 0x1f) << 21) \ | |
230 | | (((ra) & 0x1f) << 16) \ | |
231 | | ((d) & 0xffff)) | |
232 | ||
233 | #define insn_ds(opcd, rts, ra, d, xo) \ | |
234 | ((((opcd) & 0x3f) << 26) \ | |
235 | | (((rts) & 0x1f) << 21) \ | |
236 | | (((ra) & 0x1f) << 16) \ | |
237 | | ((d) & 0xfffc) \ | |
238 | | ((xo) & 0x3)) | |
239 | ||
240 | #define insn_xfx(opcd, rts, spr, xo) \ | |
241 | ((((opcd) & 0x3f) << 26) \ | |
242 | | (((rts) & 0x1f) << 21) \ | |
243 | | (((spr) & 0x1f) << 16) \ | |
244 | | (((spr) & 0x3e0) << 6) \ | |
245 | | (((xo) & 0x3ff) << 1)) | |
246 | ||
247 | /* Read a PPC instruction from memory. PPC instructions are always | |
248 | big-endian, no matter what endianness the program is running in, so | |
249 | we can't use read_memory_integer or one of its friends here. */ | |
250 | static unsigned int | |
251 | read_insn (CORE_ADDR pc) | |
252 | { | |
253 | unsigned char buf[4]; | |
254 | ||
255 | read_memory (pc, buf, 4); | |
256 | return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; | |
257 | } | |
258 | ||
259 | ||
260 | /* An instruction to match. */ | |
261 | struct insn_pattern | |
262 | { | |
263 | unsigned int mask; /* mask the insn with this... */ | |
264 | unsigned int data; /* ...and see if it matches this. */ | |
265 | int optional; /* If non-zero, this insn may be absent. */ | |
266 | }; | |
267 | ||
268 | /* Return non-zero if the instructions at PC match the series | |
269 | described in PATTERN, or zero otherwise. PATTERN is an array of | |
270 | 'struct insn_pattern' objects, terminated by an entry whose mask is | |
271 | zero. | |
272 | ||
273 | When the match is successful, fill INSN[i] with what PATTERN[i] | |
274 | matched. If PATTERN[i] is optional, and the instruction wasn't | |
275 | present, set INSN[i] to 0 (which is not a valid PPC instruction). | |
276 | INSN should have as many elements as PATTERN. Note that, if | |
277 | PATTERN contains optional instructions which aren't present in | |
278 | memory, then INSN will have holes, so INSN[i] isn't necessarily the | |
279 | i'th instruction in memory. */ | |
280 | static int | |
281 | insns_match_pattern (CORE_ADDR pc, | |
282 | struct insn_pattern *pattern, | |
283 | unsigned int *insn) | |
284 | { | |
285 | int i; | |
286 | ||
287 | for (i = 0; pattern[i].mask; i++) | |
288 | { | |
289 | insn[i] = read_insn (pc); | |
290 | if ((insn[i] & pattern[i].mask) == pattern[i].data) | |
291 | pc += 4; | |
292 | else if (pattern[i].optional) | |
293 | insn[i] = 0; | |
294 | else | |
295 | return 0; | |
296 | } | |
297 | ||
298 | return 1; | |
299 | } | |
300 | ||
301 | ||
302 | /* Return the 'd' field of the d-form instruction INSN, properly | |
303 | sign-extended. */ | |
304 | static CORE_ADDR | |
305 | insn_d_field (unsigned int insn) | |
306 | { | |
307 | return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000); | |
308 | } | |
309 | ||
310 | ||
311 | /* Return the 'ds' field of the ds-form instruction INSN, with the two | |
312 | zero bits concatenated at the right, and properly | |
313 | sign-extended. */ | |
314 | static CORE_ADDR | |
315 | insn_ds_field (unsigned int insn) | |
316 | { | |
317 | return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000); | |
318 | } | |
319 | ||
320 | ||
e538d2d7 | 321 | /* If DESC is the address of a 64-bit PowerPC GNU/Linux function |
d64558a5 JB |
322 | descriptor, return the descriptor's entry point. */ |
323 | static CORE_ADDR | |
324 | ppc64_desc_entry_point (CORE_ADDR desc) | |
325 | { | |
326 | /* The first word of the descriptor is the entry point. */ | |
327 | return (CORE_ADDR) read_memory_unsigned_integer (desc, 8); | |
328 | } | |
329 | ||
330 | ||
f470a70a JB |
331 | /* Pattern for the standard linkage function. These are built by |
332 | build_plt_stub in elf64-ppc.c, whose GLINK argument is always | |
333 | zero. */ | |
334 | static struct insn_pattern ppc64_standard_linkage[] = | |
335 | { | |
336 | /* addis r12, r2, <any> */ | |
337 | { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 }, | |
338 | ||
339 | /* std r2, 40(r1) */ | |
340 | { -1, insn_ds (62, 2, 1, 40, 0), 0 }, | |
341 | ||
342 | /* ld r11, <any>(r12) */ | |
343 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 }, | |
344 | ||
345 | /* addis r12, r12, 1 <optional> */ | |
346 | { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 }, | |
347 | ||
348 | /* ld r2, <any>(r12) */ | |
349 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 }, | |
350 | ||
351 | /* addis r12, r12, 1 <optional> */ | |
352 | { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 }, | |
353 | ||
354 | /* mtctr r11 */ | |
355 | { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), | |
356 | 0 }, | |
357 | ||
358 | /* ld r11, <any>(r12) */ | |
359 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 }, | |
360 | ||
361 | /* bctr */ | |
362 | { -1, 0x4e800420, 0 }, | |
363 | ||
364 | { 0, 0, 0 } | |
365 | }; | |
366 | #define PPC64_STANDARD_LINKAGE_LEN \ | |
367 | (sizeof (ppc64_standard_linkage) / sizeof (ppc64_standard_linkage[0])) | |
368 | ||
f470a70a JB |
369 | /* When the dynamic linker is doing lazy symbol resolution, the first |
370 | call to a function in another object will go like this: | |
371 | ||
372 | - The user's function calls the linkage function: | |
373 | ||
374 | 100007c4: 4b ff fc d5 bl 10000498 | |
375 | 100007c8: e8 41 00 28 ld r2,40(r1) | |
376 | ||
377 | - The linkage function loads the entry point (and other stuff) from | |
378 | the function descriptor in the PLT, and jumps to it: | |
379 | ||
380 | 10000498: 3d 82 00 00 addis r12,r2,0 | |
381 | 1000049c: f8 41 00 28 std r2,40(r1) | |
382 | 100004a0: e9 6c 80 98 ld r11,-32616(r12) | |
383 | 100004a4: e8 4c 80 a0 ld r2,-32608(r12) | |
384 | 100004a8: 7d 69 03 a6 mtctr r11 | |
385 | 100004ac: e9 6c 80 a8 ld r11,-32600(r12) | |
386 | 100004b0: 4e 80 04 20 bctr | |
387 | ||
388 | - But since this is the first time that PLT entry has been used, it | |
389 | sends control to its glink entry. That loads the number of the | |
390 | PLT entry and jumps to the common glink0 code: | |
391 | ||
392 | 10000c98: 38 00 00 00 li r0,0 | |
393 | 10000c9c: 4b ff ff dc b 10000c78 | |
394 | ||
395 | - The common glink0 code then transfers control to the dynamic | |
396 | linker's fixup code: | |
397 | ||
398 | 10000c78: e8 41 00 28 ld r2,40(r1) | |
399 | 10000c7c: 3d 82 00 00 addis r12,r2,0 | |
400 | 10000c80: e9 6c 80 80 ld r11,-32640(r12) | |
401 | 10000c84: e8 4c 80 88 ld r2,-32632(r12) | |
402 | 10000c88: 7d 69 03 a6 mtctr r11 | |
403 | 10000c8c: e9 6c 80 90 ld r11,-32624(r12) | |
404 | 10000c90: 4e 80 04 20 bctr | |
405 | ||
406 | Eventually, this code will figure out how to skip all of this, | |
407 | including the dynamic linker. At the moment, we just get through | |
408 | the linkage function. */ | |
409 | ||
410 | /* If the current thread is about to execute a series of instructions | |
411 | at PC matching the ppc64_standard_linkage pattern, and INSN is the result | |
412 | from that pattern match, return the code address to which the | |
413 | standard linkage function will send them. (This doesn't deal with | |
414 | dynamic linker lazy symbol resolution stubs.) */ | |
415 | static CORE_ADDR | |
52f729a7 UW |
416 | ppc64_standard_linkage_target (struct frame_info *frame, |
417 | CORE_ADDR pc, unsigned int *insn) | |
f470a70a | 418 | { |
52f729a7 | 419 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); |
f470a70a JB |
420 | |
421 | /* The address of the function descriptor this linkage function | |
422 | references. */ | |
423 | CORE_ADDR desc | |
52f729a7 UW |
424 | = ((CORE_ADDR) get_frame_register_unsigned (frame, |
425 | tdep->ppc_gp0_regnum + 2) | |
f470a70a JB |
426 | + (insn_d_field (insn[0]) << 16) |
427 | + insn_ds_field (insn[2])); | |
428 | ||
429 | /* The first word of the descriptor is the entry point. Return that. */ | |
d64558a5 | 430 | return ppc64_desc_entry_point (desc); |
f470a70a JB |
431 | } |
432 | ||
433 | ||
434 | /* Given that we've begun executing a call trampoline at PC, return | |
435 | the entry point of the function the trampoline will go to. */ | |
436 | static CORE_ADDR | |
52f729a7 | 437 | ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc) |
f470a70a JB |
438 | { |
439 | unsigned int ppc64_standard_linkage_insn[PPC64_STANDARD_LINKAGE_LEN]; | |
440 | ||
441 | if (insns_match_pattern (pc, ppc64_standard_linkage, | |
442 | ppc64_standard_linkage_insn)) | |
52f729a7 UW |
443 | return ppc64_standard_linkage_target (frame, pc, |
444 | ppc64_standard_linkage_insn); | |
f470a70a JB |
445 | else |
446 | return 0; | |
447 | } | |
448 | ||
449 | ||
00d5f93a | 450 | /* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64 |
e2d0e7eb | 451 | GNU/Linux. |
02631ec0 JB |
452 | |
453 | Usually a function pointer's representation is simply the address | |
2bbe3cc1 DJ |
454 | of the function. On GNU/Linux on the PowerPC however, a function |
455 | pointer may be a pointer to a function descriptor. | |
456 | ||
457 | For PPC64, a function descriptor is a TOC entry, in a data section, | |
458 | which contains three words: the first word is the address of the | |
459 | function, the second word is the TOC pointer (r2), and the third word | |
460 | is the static chain value. | |
461 | ||
2bbe3cc1 DJ |
462 | Throughout GDB it is currently assumed that a function pointer contains |
463 | the address of the function, which is not easy to fix. In addition, the | |
e538d2d7 JB |
464 | conversion of a function address to a function pointer would |
465 | require allocation of a TOC entry in the inferior's memory space, | |
466 | with all its drawbacks. To be able to call C++ virtual methods in | |
467 | the inferior (which are called via function pointers), | |
468 | find_function_addr uses this function to get the function address | |
2bbe3cc1 | 469 | from a function pointer. |
02631ec0 | 470 | |
2bbe3cc1 DJ |
471 | If ADDR points at what is clearly a function descriptor, transform |
472 | it into the address of the corresponding function, if needed. Be | |
473 | conservative, otherwise GDB will do the transformation on any | |
474 | random addresses such as occur when there is no symbol table. */ | |
02631ec0 JB |
475 | |
476 | static CORE_ADDR | |
00d5f93a UW |
477 | ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch, |
478 | CORE_ADDR addr, | |
479 | struct target_ops *targ) | |
02631ec0 | 480 | { |
b6591e8b | 481 | struct section_table *s = target_section_by_addr (targ, addr); |
02631ec0 | 482 | |
9b540880 | 483 | /* Check if ADDR points to a function descriptor. */ |
00d5f93a UW |
484 | if (s && strcmp (s->the_bfd_section->name, ".opd") == 0) |
485 | return get_target_memory_unsigned (targ, addr, 8); | |
9b540880 AC |
486 | |
487 | return addr; | |
02631ec0 JB |
488 | } |
489 | ||
7284e1be UW |
490 | /* Wrappers to handle Linux-only registers. */ |
491 | ||
492 | static void | |
493 | ppc_linux_supply_gregset (const struct regset *regset, | |
494 | struct regcache *regcache, | |
495 | int regnum, const void *gregs, size_t len) | |
496 | { | |
497 | const struct ppc_reg_offsets *offsets = regset->descr; | |
498 | ||
499 | ppc_supply_gregset (regset, regcache, regnum, gregs, len); | |
500 | ||
501 | if (ppc_linux_trap_reg_p (get_regcache_arch (regcache))) | |
502 | { | |
503 | /* "orig_r3" is stored 2 slots after "pc". */ | |
504 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
505 | ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs, | |
506 | offsets->pc_offset + 2 * offsets->gpr_size, | |
507 | offsets->gpr_size); | |
508 | ||
509 | /* "trap" is stored 8 slots after "pc". */ | |
510 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
511 | ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs, | |
512 | offsets->pc_offset + 8 * offsets->gpr_size, | |
513 | offsets->gpr_size); | |
514 | } | |
515 | } | |
f2db237a | 516 | |
f9be684a | 517 | static void |
f2db237a AM |
518 | ppc_linux_collect_gregset (const struct regset *regset, |
519 | const struct regcache *regcache, | |
520 | int regnum, void *gregs, size_t len) | |
f9be684a | 521 | { |
7284e1be UW |
522 | const struct ppc_reg_offsets *offsets = regset->descr; |
523 | ||
524 | /* Clear areas in the linux gregset not written elsewhere. */ | |
f2db237a AM |
525 | if (regnum == -1) |
526 | memset (gregs, 0, len); | |
7284e1be | 527 | |
f2db237a | 528 | ppc_collect_gregset (regset, regcache, regnum, gregs, len); |
7284e1be UW |
529 | |
530 | if (ppc_linux_trap_reg_p (get_regcache_arch (regcache))) | |
531 | { | |
532 | /* "orig_r3" is stored 2 slots after "pc". */ | |
533 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
534 | ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs, | |
535 | offsets->pc_offset + 2 * offsets->gpr_size, | |
536 | offsets->gpr_size); | |
537 | ||
538 | /* "trap" is stored 8 slots after "pc". */ | |
539 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
540 | ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs, | |
541 | offsets->pc_offset + 8 * offsets->gpr_size, | |
542 | offsets->gpr_size); | |
543 | } | |
f9be684a AC |
544 | } |
545 | ||
f2db237a AM |
546 | /* Regset descriptions. */ |
547 | static const struct ppc_reg_offsets ppc32_linux_reg_offsets = | |
548 | { | |
549 | /* General-purpose registers. */ | |
550 | /* .r0_offset = */ 0, | |
551 | /* .gpr_size = */ 4, | |
552 | /* .xr_size = */ 4, | |
553 | /* .pc_offset = */ 128, | |
554 | /* .ps_offset = */ 132, | |
555 | /* .cr_offset = */ 152, | |
556 | /* .lr_offset = */ 144, | |
557 | /* .ctr_offset = */ 140, | |
558 | /* .xer_offset = */ 148, | |
559 | /* .mq_offset = */ 156, | |
560 | ||
561 | /* Floating-point registers. */ | |
562 | /* .f0_offset = */ 0, | |
563 | /* .fpscr_offset = */ 256, | |
564 | /* .fpscr_size = */ 8, | |
565 | ||
566 | /* AltiVec registers. */ | |
567 | /* .vr0_offset = */ 0, | |
06caf7d2 CES |
568 | /* .vscr_offset = */ 512 + 12, |
569 | /* .vrsave_offset = */ 528 | |
f2db237a | 570 | }; |
f9be684a | 571 | |
f2db237a AM |
572 | static const struct ppc_reg_offsets ppc64_linux_reg_offsets = |
573 | { | |
574 | /* General-purpose registers. */ | |
575 | /* .r0_offset = */ 0, | |
576 | /* .gpr_size = */ 8, | |
577 | /* .xr_size = */ 8, | |
578 | /* .pc_offset = */ 256, | |
579 | /* .ps_offset = */ 264, | |
580 | /* .cr_offset = */ 304, | |
581 | /* .lr_offset = */ 288, | |
582 | /* .ctr_offset = */ 280, | |
583 | /* .xer_offset = */ 296, | |
584 | /* .mq_offset = */ 312, | |
585 | ||
586 | /* Floating-point registers. */ | |
587 | /* .f0_offset = */ 0, | |
588 | /* .fpscr_offset = */ 256, | |
589 | /* .fpscr_size = */ 8, | |
590 | ||
591 | /* AltiVec registers. */ | |
592 | /* .vr0_offset = */ 0, | |
06caf7d2 CES |
593 | /* .vscr_offset = */ 512 + 12, |
594 | /* .vrsave_offset = */ 528 | |
f2db237a | 595 | }; |
2fda4977 | 596 | |
f2db237a AM |
597 | static const struct regset ppc32_linux_gregset = { |
598 | &ppc32_linux_reg_offsets, | |
7284e1be | 599 | ppc_linux_supply_gregset, |
f2db237a AM |
600 | ppc_linux_collect_gregset, |
601 | NULL | |
f9be684a AC |
602 | }; |
603 | ||
f2db237a AM |
604 | static const struct regset ppc64_linux_gregset = { |
605 | &ppc64_linux_reg_offsets, | |
7284e1be | 606 | ppc_linux_supply_gregset, |
f2db237a AM |
607 | ppc_linux_collect_gregset, |
608 | NULL | |
609 | }; | |
f9be684a | 610 | |
f2db237a AM |
611 | static const struct regset ppc32_linux_fpregset = { |
612 | &ppc32_linux_reg_offsets, | |
613 | ppc_supply_fpregset, | |
614 | ppc_collect_fpregset, | |
615 | NULL | |
f9be684a AC |
616 | }; |
617 | ||
06caf7d2 CES |
618 | static const struct regset ppc32_linux_vrregset = { |
619 | &ppc32_linux_reg_offsets, | |
620 | ppc_supply_vrregset, | |
621 | ppc_collect_vrregset, | |
622 | NULL | |
623 | }; | |
624 | ||
f2db237a AM |
625 | const struct regset * |
626 | ppc_linux_gregset (int wordsize) | |
2fda4977 | 627 | { |
f2db237a | 628 | return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset; |
2fda4977 DJ |
629 | } |
630 | ||
f2db237a AM |
631 | const struct regset * |
632 | ppc_linux_fpregset (void) | |
633 | { | |
634 | return &ppc32_linux_fpregset; | |
635 | } | |
2fda4977 | 636 | |
f9be684a AC |
637 | static const struct regset * |
638 | ppc_linux_regset_from_core_section (struct gdbarch *core_arch, | |
639 | const char *sect_name, size_t sect_size) | |
2fda4977 | 640 | { |
f9be684a AC |
641 | struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch); |
642 | if (strcmp (sect_name, ".reg") == 0) | |
2fda4977 | 643 | { |
f9be684a AC |
644 | if (tdep->wordsize == 4) |
645 | return &ppc32_linux_gregset; | |
2fda4977 | 646 | else |
f9be684a | 647 | return &ppc64_linux_gregset; |
2fda4977 | 648 | } |
f9be684a | 649 | if (strcmp (sect_name, ".reg2") == 0) |
f2db237a | 650 | return &ppc32_linux_fpregset; |
06caf7d2 CES |
651 | if (strcmp (sect_name, ".reg-ppc-vmx") == 0) |
652 | return &ppc32_linux_vrregset; | |
f9be684a | 653 | return NULL; |
2fda4977 DJ |
654 | } |
655 | ||
a8f60bfc | 656 | static void |
5366653e | 657 | ppc_linux_sigtramp_cache (struct frame_info *this_frame, |
a8f60bfc AC |
658 | struct trad_frame_cache *this_cache, |
659 | CORE_ADDR func, LONGEST offset, | |
660 | int bias) | |
661 | { | |
662 | CORE_ADDR base; | |
663 | CORE_ADDR regs; | |
664 | CORE_ADDR gpregs; | |
665 | CORE_ADDR fpregs; | |
666 | int i; | |
5366653e | 667 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8f60bfc AC |
668 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
669 | ||
5366653e DJ |
670 | base = get_frame_register_unsigned (this_frame, |
671 | gdbarch_sp_regnum (gdbarch)); | |
672 | if (bias > 0 && get_frame_pc (this_frame) != func) | |
a8f60bfc AC |
673 | /* See below, some signal trampolines increment the stack as their |
674 | first instruction, need to compensate for that. */ | |
675 | base -= bias; | |
676 | ||
677 | /* Find the address of the register buffer pointer. */ | |
678 | regs = base + offset; | |
679 | /* Use that to find the address of the corresponding register | |
680 | buffers. */ | |
681 | gpregs = read_memory_unsigned_integer (regs, tdep->wordsize); | |
682 | fpregs = gpregs + 48 * tdep->wordsize; | |
683 | ||
684 | /* General purpose. */ | |
685 | for (i = 0; i < 32; i++) | |
686 | { | |
687 | int regnum = i + tdep->ppc_gp0_regnum; | |
688 | trad_frame_set_reg_addr (this_cache, regnum, gpregs + i * tdep->wordsize); | |
689 | } | |
3e8c568d | 690 | trad_frame_set_reg_addr (this_cache, |
40a6adc1 | 691 | gdbarch_pc_regnum (gdbarch), |
3e8c568d | 692 | gpregs + 32 * tdep->wordsize); |
a8f60bfc AC |
693 | trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, |
694 | gpregs + 35 * tdep->wordsize); | |
695 | trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, | |
696 | gpregs + 36 * tdep->wordsize); | |
697 | trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, | |
698 | gpregs + 37 * tdep->wordsize); | |
699 | trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, | |
700 | gpregs + 38 * tdep->wordsize); | |
701 | ||
7284e1be UW |
702 | if (ppc_linux_trap_reg_p (gdbarch)) |
703 | { | |
704 | trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM, | |
705 | gpregs + 34 * tdep->wordsize); | |
706 | trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM, | |
707 | gpregs + 40 * tdep->wordsize); | |
708 | } | |
709 | ||
60f140f9 PG |
710 | if (ppc_floating_point_unit_p (gdbarch)) |
711 | { | |
712 | /* Floating point registers. */ | |
713 | for (i = 0; i < 32; i++) | |
714 | { | |
40a6adc1 | 715 | int regnum = i + gdbarch_fp0_regnum (gdbarch); |
60f140f9 PG |
716 | trad_frame_set_reg_addr (this_cache, regnum, |
717 | fpregs + i * tdep->wordsize); | |
718 | } | |
719 | trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum, | |
4019046a | 720 | fpregs + 32 * tdep->wordsize); |
60f140f9 | 721 | } |
a8f60bfc AC |
722 | trad_frame_set_id (this_cache, frame_id_build (base, func)); |
723 | } | |
724 | ||
725 | static void | |
726 | ppc32_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 727 | struct frame_info *this_frame, |
a8f60bfc AC |
728 | struct trad_frame_cache *this_cache, |
729 | CORE_ADDR func) | |
730 | { | |
5366653e | 731 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
732 | 0xd0 /* Offset to ucontext_t. */ |
733 | + 0x30 /* Offset to .reg. */, | |
734 | 0); | |
735 | } | |
736 | ||
737 | static void | |
738 | ppc64_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 739 | struct frame_info *this_frame, |
a8f60bfc AC |
740 | struct trad_frame_cache *this_cache, |
741 | CORE_ADDR func) | |
742 | { | |
5366653e | 743 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
744 | 0x80 /* Offset to ucontext_t. */ |
745 | + 0xe0 /* Offset to .reg. */, | |
746 | 128); | |
747 | } | |
748 | ||
749 | static void | |
750 | ppc32_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 751 | struct frame_info *this_frame, |
a8f60bfc AC |
752 | struct trad_frame_cache *this_cache, |
753 | CORE_ADDR func) | |
754 | { | |
5366653e | 755 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
756 | 0x40 /* Offset to ucontext_t. */ |
757 | + 0x1c /* Offset to .reg. */, | |
758 | 0); | |
759 | } | |
760 | ||
761 | static void | |
762 | ppc64_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 763 | struct frame_info *this_frame, |
a8f60bfc AC |
764 | struct trad_frame_cache *this_cache, |
765 | CORE_ADDR func) | |
766 | { | |
5366653e | 767 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
768 | 0x80 /* Offset to struct sigcontext. */ |
769 | + 0x38 /* Offset to .reg. */, | |
770 | 128); | |
771 | } | |
772 | ||
773 | static struct tramp_frame ppc32_linux_sigaction_tramp_frame = { | |
774 | SIGTRAMP_FRAME, | |
775 | 4, | |
776 | { | |
777 | { 0x380000ac, -1 }, /* li r0, 172 */ | |
778 | { 0x44000002, -1 }, /* sc */ | |
779 | { TRAMP_SENTINEL_INSN }, | |
780 | }, | |
781 | ppc32_linux_sigaction_cache_init | |
782 | }; | |
783 | static struct tramp_frame ppc64_linux_sigaction_tramp_frame = { | |
784 | SIGTRAMP_FRAME, | |
785 | 4, | |
786 | { | |
787 | { 0x38210080, -1 }, /* addi r1,r1,128 */ | |
788 | { 0x380000ac, -1 }, /* li r0, 172 */ | |
789 | { 0x44000002, -1 }, /* sc */ | |
790 | { TRAMP_SENTINEL_INSN }, | |
791 | }, | |
792 | ppc64_linux_sigaction_cache_init | |
793 | }; | |
794 | static struct tramp_frame ppc32_linux_sighandler_tramp_frame = { | |
795 | SIGTRAMP_FRAME, | |
796 | 4, | |
797 | { | |
798 | { 0x38000077, -1 }, /* li r0,119 */ | |
799 | { 0x44000002, -1 }, /* sc */ | |
800 | { TRAMP_SENTINEL_INSN }, | |
801 | }, | |
802 | ppc32_linux_sighandler_cache_init | |
803 | }; | |
804 | static struct tramp_frame ppc64_linux_sighandler_tramp_frame = { | |
805 | SIGTRAMP_FRAME, | |
806 | 4, | |
807 | { | |
808 | { 0x38210080, -1 }, /* addi r1,r1,128 */ | |
809 | { 0x38000077, -1 }, /* li r0,119 */ | |
810 | { 0x44000002, -1 }, /* sc */ | |
811 | { TRAMP_SENTINEL_INSN }, | |
812 | }, | |
813 | ppc64_linux_sighandler_cache_init | |
814 | }; | |
815 | ||
7284e1be UW |
816 | |
817 | /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */ | |
818 | int | |
819 | ppc_linux_trap_reg_p (struct gdbarch *gdbarch) | |
820 | { | |
821 | /* If we do not have a target description with registers, then | |
822 | the special registers will not be included in the register set. */ | |
823 | if (!tdesc_has_registers (gdbarch_target_desc (gdbarch))) | |
824 | return 0; | |
825 | ||
826 | /* If we do, then it is safe to check the size. */ | |
827 | return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0 | |
828 | && register_size (gdbarch, PPC_TRAP_REGNUM) > 0; | |
829 | } | |
830 | ||
831 | static void | |
832 | ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
833 | { | |
834 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
835 | ||
836 | regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc); | |
837 | ||
838 | /* Set special TRAP register to -1 to prevent the kernel from | |
839 | messing with the PC we just installed, if we happen to be | |
840 | within an interrupted system call that the kernel wants to | |
841 | restart. | |
842 | ||
843 | Note that after we return from the dummy call, the TRAP and | |
844 | ORIG_R3 registers will be automatically restored, and the | |
845 | kernel continues to restart the system call at this point. */ | |
846 | if (ppc_linux_trap_reg_p (gdbarch)) | |
847 | regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1); | |
848 | } | |
849 | ||
850 | static const struct target_desc * | |
851 | ppc_linux_core_read_description (struct gdbarch *gdbarch, | |
852 | struct target_ops *target, | |
853 | bfd *abfd) | |
854 | { | |
855 | asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx"); | |
856 | asection *section = bfd_get_section_by_name (abfd, ".reg"); | |
857 | if (! section) | |
858 | return NULL; | |
859 | ||
860 | switch (bfd_section_size (abfd, section)) | |
861 | { | |
862 | case 48 * 4: | |
863 | return altivec? tdesc_powerpc_altivec32l : tdesc_powerpc_32l; | |
864 | ||
865 | case 48 * 8: | |
866 | return altivec? tdesc_powerpc_altivec64l : tdesc_powerpc_64l; | |
867 | ||
868 | default: | |
869 | return NULL; | |
870 | } | |
871 | } | |
872 | ||
7b112f9c JT |
873 | static void |
874 | ppc_linux_init_abi (struct gdbarch_info info, | |
875 | struct gdbarch *gdbarch) | |
876 | { | |
877 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
7284e1be | 878 | struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info; |
7b112f9c | 879 | |
b14d30e1 JM |
880 | /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where |
881 | 128-bit, they are IBM long double, not IEEE quad long double as | |
882 | in the System V ABI PowerPC Processor Supplement. We can safely | |
883 | let them default to 128-bit, since the debug info will give the | |
884 | size of type actually used in each case. */ | |
885 | set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT); | |
886 | set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double); | |
0598a43c | 887 | |
7284e1be UW |
888 | /* Handle inferior calls during interrupted system calls. */ |
889 | set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc); | |
890 | ||
7b112f9c JT |
891 | if (tdep->wordsize == 4) |
892 | { | |
b9ff3018 AC |
893 | /* Until November 2001, gcc did not comply with the 32 bit SysV |
894 | R4 ABI requirement that structures less than or equal to 8 | |
895 | bytes should be returned in registers. Instead GCC was using | |
896 | the the AIX/PowerOpen ABI - everything returned in memory | |
897 | (well ignoring vectors that is). When this was corrected, it | |
898 | wasn't fixed for GNU/Linux native platform. Use the | |
899 | PowerOpen struct convention. */ | |
05580c65 | 900 | set_gdbarch_return_value (gdbarch, ppc_linux_return_value); |
b9ff3018 | 901 | |
7b112f9c JT |
902 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
903 | ppc_linux_memory_remove_breakpoint); | |
61a65099 | 904 | |
f470a70a | 905 | /* Shared library handling. */ |
8526f328 | 906 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
7b112f9c | 907 | set_solib_svr4_fetch_link_map_offsets |
76a9d10f | 908 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
a8f60bfc AC |
909 | |
910 | /* Trampolines. */ | |
911 | tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sigaction_tramp_frame); | |
912 | tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sighandler_tramp_frame); | |
7b112f9c | 913 | } |
f470a70a JB |
914 | |
915 | if (tdep->wordsize == 8) | |
916 | { | |
00d5f93a UW |
917 | /* Handle PPC GNU/Linux 64-bit function pointers (which are really |
918 | function descriptors). */ | |
919 | set_gdbarch_convert_from_func_ptr_addr | |
920 | (gdbarch, ppc64_linux_convert_from_func_ptr_addr); | |
921 | ||
fb318ff7 | 922 | /* Shared library handling. */ |
2bbe3cc1 | 923 | set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code); |
fb318ff7 DJ |
924 | set_solib_svr4_fetch_link_map_offsets |
925 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
926 | ||
a8f60bfc AC |
927 | /* Trampolines. */ |
928 | tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sigaction_tramp_frame); | |
929 | tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sighandler_tramp_frame); | |
f470a70a | 930 | } |
f9be684a | 931 | set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section); |
7284e1be | 932 | set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description); |
b2756930 KB |
933 | |
934 | /* Enable TLS support. */ | |
935 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
936 | svr4_fetch_objfile_link_map); | |
7284e1be UW |
937 | |
938 | if (tdesc_data) | |
939 | { | |
940 | const struct tdesc_feature *feature; | |
941 | ||
942 | /* If we have target-described registers, then we can safely | |
943 | reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM | |
944 | (whether they are described or not). */ | |
945 | gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM); | |
946 | set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1); | |
947 | ||
948 | /* If they are present, then assign them to the reserved number. */ | |
949 | feature = tdesc_find_feature (info.target_desc, | |
950 | "org.gnu.gdb.power.linux"); | |
951 | if (feature != NULL) | |
952 | { | |
953 | tdesc_numbered_register (feature, tdesc_data, | |
954 | PPC_ORIG_R3_REGNUM, "orig_r3"); | |
955 | tdesc_numbered_register (feature, tdesc_data, | |
956 | PPC_TRAP_REGNUM, "trap"); | |
957 | } | |
958 | } | |
7b112f9c JT |
959 | } |
960 | ||
961 | void | |
962 | _initialize_ppc_linux_tdep (void) | |
963 | { | |
0a0a4ac3 AC |
964 | /* Register for all sub-familes of the POWER/PowerPC: 32-bit and |
965 | 64-bit PowerPC, and the older rs6k. */ | |
966 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX, | |
967 | ppc_linux_init_abi); | |
968 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX, | |
969 | ppc_linux_init_abi); | |
970 | gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX, | |
971 | ppc_linux_init_abi); | |
7284e1be UW |
972 | |
973 | /* Initialize the Linux target descriptions. */ | |
974 | initialize_tdesc_powerpc_32l (); | |
975 | initialize_tdesc_powerpc_altivec32l (); | |
976 | initialize_tdesc_powerpc_64l (); | |
977 | initialize_tdesc_powerpc_altivec64l (); | |
978 | initialize_tdesc_powerpc_e500l (); | |
7b112f9c | 979 | } |