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[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
CommitLineData
7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
6aba47ca 4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007
65ada037 5 Free Software Foundation, Inc.
7b112f9c
JT
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
a9762ec7 11 the Free Software Foundation; either version 3 of the License, or
7b112f9c
JT
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
a9762ec7 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
7b112f9c
JT
21
22#include "defs.h"
23#include "gdbcore.h"
24#include "inferior.h"
25#include "regcache.h"
26#include "value.h"
bdf64bac 27#include "gdb_string.h"
8be9034a 28#include "gdb_assert.h"
7b112f9c 29#include "ppc-tdep.h"
6066c3de 30#include "target.h"
0a90bcdd 31#include "objfiles.h"
7d9b040b 32#include "infcall.h"
7b112f9c 33
7b112f9c
JT
34/* Pass the arguments in either registers, or in the stack. Using the
35 ppc sysv ABI, the first eight words of the argument list (that might
36 be less than eight parameters if some parameters occupy more than one
37 word) are passed in r3..r10 registers. float and double parameters are
38 passed in fpr's, in addition to that. Rest of the parameters if any
39 are passed in user stack.
40
41 If the function is returning a structure, then the return address is passed
42 in r3, then the first 7 words of the parametes can be passed in registers,
43 starting from r4. */
44
45CORE_ADDR
7d9b040b 46ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
47 struct regcache *regcache, CORE_ADDR bp_addr,
48 int nargs, struct value **args, CORE_ADDR sp,
49 int struct_return, CORE_ADDR struct_addr)
7b112f9c 50{
0a613259 51 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fb4443d8 52 ULONGEST saved_sp;
68856ea3
AC
53 int argspace = 0; /* 0 is an initial wrong guess. */
54 int write_pass;
7b112f9c 55
3e8c568d
UW
56 regcache_cooked_read_unsigned (regcache,
57 gdbarch_sp_regnum (current_gdbarch),
58 &saved_sp);
fb4443d8 59
68856ea3 60 /* Go through the argument list twice.
7b112f9c 61
68856ea3
AC
62 Pass 1: Figure out how much new stack space is required for
63 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
64 ABI doesn't reserve any extra space for parameters which are put
65 in registers, but does always push structures and then pass their
66 address.
7a41266b 67
68856ea3
AC
68 Pass 2: Replay the same computation but this time also write the
69 values out to the target. */
7b112f9c 70
68856ea3
AC
71 for (write_pass = 0; write_pass < 2; write_pass++)
72 {
73 int argno;
74 /* Next available floating point register for float and double
75 arguments. */
76 int freg = 1;
77 /* Next available general register for non-float, non-vector
78 arguments. */
79 int greg = 3;
80 /* Next available vector register for vector arguments. */
81 int vreg = 2;
82 /* Arguments start above the "LR save word" and "Back chain". */
83 int argoffset = 2 * tdep->wordsize;
84 /* Structures start after the arguments. */
85 int structoffset = argoffset + argspace;
86
87 /* If the function is returning a `struct', then the first word
944fcfab
AC
88 (which will be passed in r3) is used for struct return
89 address. In that case we should advance one word and start
90 from r4 register to copy parameters. */
68856ea3 91 if (struct_return)
7b112f9c 92 {
68856ea3
AC
93 if (write_pass)
94 regcache_cooked_write_signed (regcache,
95 tdep->ppc_gp0_regnum + greg,
96 struct_addr);
97 greg++;
7b112f9c 98 }
68856ea3
AC
99
100 for (argno = 0; argno < nargs; argno++)
7b112f9c 101 {
68856ea3 102 struct value *arg = args[argno];
df407dfe 103 struct type *type = check_typedef (value_type (arg));
68856ea3 104 int len = TYPE_LENGTH (type);
0fd88904 105 const bfd_byte *val = value_contents (arg);
68856ea3
AC
106
107 if (TYPE_CODE (type) == TYPE_CODE_FLT
944fcfab 108 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
7b112f9c 109 {
68856ea3 110 /* Floating point value converted to "double" then
944fcfab
AC
111 passed in an FP register, when the registers run out,
112 8 byte aligned stack is used. */
68856ea3
AC
113 if (freg <= 8)
114 {
115 if (write_pass)
116 {
117 /* Always store the floating point value using
944fcfab 118 the register's floating-point format. */
50fd1280 119 gdb_byte regval[MAX_REGISTER_SIZE];
68856ea3 120 struct type *regtype
366f009f 121 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
68856ea3 122 convert_typed_floating (val, type, regval, regtype);
366f009f
JB
123 regcache_cooked_write (regcache,
124 tdep->ppc_fp0_regnum + freg,
68856ea3
AC
125 regval);
126 }
127 freg++;
128 }
7b112f9c
JT
129 else
130 {
68856ea3 131 /* SysV ABI converts floats to doubles before
944fcfab 132 writing them to an 8 byte aligned stack location. */
68856ea3
AC
133 argoffset = align_up (argoffset, 8);
134 if (write_pass)
135 {
136 char memval[8];
8da61cc4
DJ
137 convert_typed_floating (val, type, memval,
138 builtin_type_ieee_double);
68856ea3
AC
139 write_memory (sp + argoffset, val, len);
140 }
141 argoffset += 8;
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JT
142 }
143 }
944fcfab
AC
144 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
145 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
7b112f9c 146 {
68856ea3 147 /* "long long" or "double" passed in an odd/even
944fcfab
AC
148 register pair with the low addressed word in the odd
149 register and the high addressed word in the even
150 register, or when the registers run out an 8 byte
151 aligned stack location. */
68856ea3
AC
152 if (greg > 9)
153 {
154 /* Just in case GREG was 10. */
155 greg = 11;
156 argoffset = align_up (argoffset, 8);
157 if (write_pass)
158 write_memory (sp + argoffset, val, len);
159 argoffset += 8;
160 }
161 else if (tdep->wordsize == 8)
162 {
163 if (write_pass)
164 regcache_cooked_write (regcache,
944fcfab 165 tdep->ppc_gp0_regnum + greg, val);
68856ea3
AC
166 greg += 1;
167 }
168 else
169 {
170 /* Must start on an odd register - r3/r4 etc. */
171 if ((greg & 1) == 0)
172 greg++;
173 if (write_pass)
174 {
175 regcache_cooked_write (regcache,
176 tdep->ppc_gp0_regnum + greg + 0,
177 val + 0);
178 regcache_cooked_write (regcache,
179 tdep->ppc_gp0_regnum + greg + 1,
180 val + 4);
181 }
182 greg += 2;
183 }
7b112f9c 184 }
68856ea3
AC
185 else if (len == 16
186 && TYPE_CODE (type) == TYPE_CODE_ARRAY
944fcfab 187 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
7b112f9c 188 {
68856ea3 189 /* Vector parameter passed in an Altivec register, or
944fcfab 190 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
191 if (vreg <= 13)
192 {
68856ea3 193 if (write_pass)
9c9acae0 194 regcache_cooked_write (regcache,
944fcfab 195 tdep->ppc_vr0_regnum + vreg, val);
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JT
196 vreg++;
197 }
198 else
199 {
68856ea3
AC
200 argoffset = align_up (argoffset, 16);
201 if (write_pass)
202 write_memory (sp + argoffset, val, 16);
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JT
203 argoffset += 16;
204 }
205 }
944fcfab 206 else if (len == 8
0a613259 207 && TYPE_CODE (type) == TYPE_CODE_ARRAY
944fcfab
AC
208 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
209 {
68856ea3 210 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
211 that runs out, 8 byte aligned stack location. Note
212 that since e500 vector and general purpose registers
213 both map onto the same underlying register set, a
214 "greg" and not a "vreg" is consumed here. A cooked
215 write stores the value in the correct locations
216 within the raw register cache. */
217 if (greg <= 10)
218 {
68856ea3 219 if (write_pass)
9c9acae0 220 regcache_cooked_write (regcache,
944fcfab
AC
221 tdep->ppc_ev0_regnum + greg, val);
222 greg++;
223 }
224 else
225 {
68856ea3
AC
226 argoffset = align_up (argoffset, 8);
227 if (write_pass)
228 write_memory (sp + argoffset, val, 8);
944fcfab
AC
229 argoffset += 8;
230 }
231 }
68856ea3
AC
232 else
233 {
234 /* Reduce the parameter down to something that fits in a
944fcfab 235 "word". */
50fd1280 236 gdb_byte word[MAX_REGISTER_SIZE];
68856ea3
AC
237 memset (word, 0, MAX_REGISTER_SIZE);
238 if (len > tdep->wordsize
239 || TYPE_CODE (type) == TYPE_CODE_STRUCT
240 || TYPE_CODE (type) == TYPE_CODE_UNION)
241 {
242 /* Structs and large values are put on an 8 byte
944fcfab 243 aligned stack ... */
68856ea3
AC
244 structoffset = align_up (structoffset, 8);
245 if (write_pass)
246 write_memory (sp + structoffset, val, len);
247 /* ... and then a "word" pointing to that address is
944fcfab 248 passed as the parameter. */
68856ea3
AC
249 store_unsigned_integer (word, tdep->wordsize,
250 sp + structoffset);
251 structoffset += len;
252 }
253 else if (TYPE_CODE (type) == TYPE_CODE_INT)
254 /* Sign or zero extend the "int" into a "word". */
255 store_unsigned_integer (word, tdep->wordsize,
256 unpack_long (type, val));
257 else
258 /* Always goes in the low address. */
259 memcpy (word, val, len);
260 /* Store that "word" in a register, or on the stack.
944fcfab 261 The words have "4" byte alignment. */
68856ea3
AC
262 if (greg <= 10)
263 {
264 if (write_pass)
265 regcache_cooked_write (regcache,
944fcfab 266 tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
267 greg++;
268 }
269 else
270 {
271 argoffset = align_up (argoffset, tdep->wordsize);
272 if (write_pass)
273 write_memory (sp + argoffset, word, tdep->wordsize);
274 argoffset += tdep->wordsize;
275 }
276 }
277 }
278
279 /* Compute the actual stack space requirements. */
280 if (!write_pass)
281 {
282 /* Remember the amount of space needed by the arguments. */
283 argspace = argoffset;
284 /* Allocate space for both the arguments and the structures. */
285 sp -= (argoffset + structoffset);
286 /* Ensure that the stack is still 16 byte aligned. */
287 sp = align_down (sp, 16);
288 }
65ada037
MK
289
290 /* The psABI says that "A caller of a function that takes a
291 variable argument list shall set condition register bit 6 to
292 1 if it passes one or more arguments in the floating-point
293 registers. It is strongly recommended that the caller set the
294 bit to 0 otherwise..." Doing this for normal functions too
295 shouldn't hurt. */
296 if (write_pass)
297 {
298 ULONGEST cr;
299
300 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
301 if (freg > 1)
302 cr |= 0x02000000;
303 else
304 cr &= ~0x02000000;
305 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
306 }
7b112f9c
JT
307 }
308
68856ea3 309 /* Update %sp. */
3e8c568d
UW
310 regcache_cooked_write_signed (regcache,
311 gdbarch_sp_regnum (current_gdbarch), sp);
68856ea3
AC
312
313 /* Write the backchain (it occupies WORDSIZED bytes). */
314 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
315
e56a0ecc
AC
316 /* Point the inferior function call's return address at the dummy's
317 breakpoint. */
68856ea3 318 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 319
7b112f9c
JT
320 return sp;
321}
322
e754ae69
AC
323/* Handle the return-value conventions specified by the SysV 32-bit
324 PowerPC ABI (including all the supplements):
325
326 no floating-point: floating-point values returned using 32-bit
327 general-purpose registers.
328
329 Altivec: 128-bit vectors returned using vector registers.
330
331 e500: 64-bit vectors returned using the full full 64 bit EV
332 register, floating-point values returned using 32-bit
333 general-purpose registers.
334
335 GCC (broken): Small struct values right (instead of left) aligned
336 when returned in general-purpose registers. */
337
338static enum return_value_convention
05580c65 339do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
963e2bb7
AC
340 struct regcache *regcache, void *readbuf,
341 const void *writebuf, int broken_gcc)
e754ae69 342{
05580c65 343 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e754ae69
AC
344 gdb_assert (tdep->wordsize == 4);
345 if (TYPE_CODE (type) == TYPE_CODE_FLT
346 && TYPE_LENGTH (type) <= 8
05580c65 347 && ppc_floating_point_unit_p (gdbarch))
e754ae69 348 {
963e2bb7 349 if (readbuf)
e754ae69
AC
350 {
351 /* Floats and doubles stored in "f1". Convert the value to
352 the required type. */
50fd1280 353 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f
JB
354 struct type *regtype = register_type (gdbarch,
355 tdep->ppc_fp0_regnum + 1);
356 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
963e2bb7 357 convert_typed_floating (regval, regtype, readbuf, type);
e754ae69 358 }
963e2bb7 359 if (writebuf)
e754ae69
AC
360 {
361 /* Floats and doubles stored in "f1". Convert the value to
362 the register's "double" type. */
50fd1280 363 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f 364 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 365 convert_typed_floating (writebuf, type, regval, regtype);
366f009f 366 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
367 }
368 return RETURN_VALUE_REGISTER_CONVENTION;
369 }
370 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
371 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
372 {
963e2bb7 373 if (readbuf)
e754ae69
AC
374 {
375 /* A long long, or a double stored in the 32 bit r3/r4. */
376 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 377 (bfd_byte *) readbuf + 0);
e754ae69 378 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
963e2bb7 379 (bfd_byte *) readbuf + 4);
e754ae69 380 }
963e2bb7 381 if (writebuf)
e754ae69
AC
382 {
383 /* A long long, or a double stored in the 32 bit r3/r4. */
384 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 385 (const bfd_byte *) writebuf + 0);
e754ae69 386 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
963e2bb7 387 (const bfd_byte *) writebuf + 4);
e754ae69
AC
388 }
389 return RETURN_VALUE_REGISTER_CONVENTION;
390 }
391 if (TYPE_CODE (type) == TYPE_CODE_INT
392 && TYPE_LENGTH (type) <= tdep->wordsize)
393 {
963e2bb7 394 if (readbuf)
e754ae69
AC
395 {
396 /* Some sort of integer stored in r3. Since TYPE isn't
397 bigger than the register, sign extension isn't a problem
398 - just do everything unsigned. */
399 ULONGEST regval;
400 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
401 &regval);
963e2bb7 402 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
e754ae69 403 }
963e2bb7 404 if (writebuf)
e754ae69
AC
405 {
406 /* Some sort of integer stored in r3. Use unpack_long since
407 that should handle any required sign extension. */
408 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 409 unpack_long (type, writebuf));
e754ae69
AC
410 }
411 return RETURN_VALUE_REGISTER_CONVENTION;
412 }
413 if (TYPE_LENGTH (type) == 16
414 && TYPE_CODE (type) == TYPE_CODE_ARRAY
415 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
416 {
963e2bb7 417 if (readbuf)
e754ae69
AC
418 {
419 /* Altivec places the return value in "v2". */
963e2bb7 420 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 421 }
963e2bb7 422 if (writebuf)
e754ae69
AC
423 {
424 /* Altivec places the return value in "v2". */
963e2bb7 425 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
426 }
427 return RETURN_VALUE_REGISTER_CONVENTION;
428 }
429 if (TYPE_LENGTH (type) == 8
430 && TYPE_CODE (type) == TYPE_CODE_ARRAY
431 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
432 {
433 /* The e500 ABI places return values for the 64-bit DSP types
434 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
435 corresponds to the entire r3 value for e500, whereas GDB's r3
436 only corresponds to the least significant 32-bits. So place
437 the 64-bit DSP type's value in ev3. */
963e2bb7
AC
438 if (readbuf)
439 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
440 if (writebuf)
441 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
442 return RETURN_VALUE_REGISTER_CONVENTION;
443 }
444 if (broken_gcc && TYPE_LENGTH (type) <= 8)
445 {
61bf9ae0
MK
446 /* GCC screwed up for structures or unions whose size is less
447 than or equal to 8 bytes.. Instead of left-aligning, it
448 right-aligns the data into the buffer formed by r3, r4. */
449 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
450 int len = TYPE_LENGTH (type);
451 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
452
963e2bb7 453 if (readbuf)
e754ae69 454 {
61bf9ae0
MK
455 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
456 regvals + 0 * tdep->wordsize);
457 if (len > tdep->wordsize)
458 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
459 regvals + 1 * tdep->wordsize);
460 memcpy (readbuf, regvals + offset, len);
e754ae69 461 }
963e2bb7 462 if (writebuf)
e754ae69 463 {
61bf9ae0
MK
464 memset (regvals, 0, sizeof regvals);
465 memcpy (regvals + offset, writebuf, len);
466 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
467 regvals + 0 * tdep->wordsize);
468 if (len > tdep->wordsize)
469 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
470 regvals + 1 * tdep->wordsize);
e754ae69 471 }
61bf9ae0 472
e754ae69
AC
473 return RETURN_VALUE_REGISTER_CONVENTION;
474 }
475 if (TYPE_LENGTH (type) <= 8)
476 {
963e2bb7 477 if (readbuf)
e754ae69
AC
478 {
479 /* This matches SVr4 PPC, it does not match GCC. */
480 /* The value is right-padded to 8 bytes and then loaded, as
481 two "words", into r3/r4. */
50fd1280 482 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
e754ae69
AC
483 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
484 regvals + 0 * tdep->wordsize);
485 if (TYPE_LENGTH (type) > tdep->wordsize)
486 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
487 regvals + 1 * tdep->wordsize);
963e2bb7 488 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 489 }
963e2bb7 490 if (writebuf)
e754ae69
AC
491 {
492 /* This matches SVr4 PPC, it does not match GCC. */
493 /* The value is padded out to 8 bytes and then loaded, as
494 two "words" into r3/r4. */
50fd1280 495 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
e754ae69 496 memset (regvals, 0, sizeof regvals);
963e2bb7 497 memcpy (regvals, writebuf, TYPE_LENGTH (type));
e754ae69
AC
498 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
499 regvals + 0 * tdep->wordsize);
500 if (TYPE_LENGTH (type) > tdep->wordsize)
501 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
502 regvals + 1 * tdep->wordsize);
503 }
504 return RETURN_VALUE_REGISTER_CONVENTION;
505 }
506 return RETURN_VALUE_STRUCT_CONVENTION;
507}
508
05580c65
AC
509enum return_value_convention
510ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
50fd1280
AC
511 struct regcache *regcache, gdb_byte *readbuf,
512 const gdb_byte *writebuf)
e754ae69 513{
963e2bb7
AC
514 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
515 writebuf, 0);
e754ae69
AC
516}
517
05580c65 518enum return_value_convention
963e2bb7
AC
519ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
520 struct type *valtype,
521 struct regcache *regcache,
50fd1280 522 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 523{
963e2bb7
AC
524 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
525 writebuf, 1);
944fcfab 526}
afd48b75 527
b6e1c027
AC
528/* The helper function for 64-bit SYSV push_dummy_call. Converts the
529 function's code address back into the function's descriptor
530 address.
531
532 Find a value for the TOC register. Every symbol should have both
533 ".FN" and "FN" in the minimal symbol table. "FN" points at the
534 FN's descriptor, while ".FN" points at the entry point (which
535 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
536 FN's descriptor address (while at the same time being careful to
537 find "FN" in the same object file as ".FN"). */
538
539static int
540convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
541{
542 struct obj_section *dot_fn_section;
543 struct minimal_symbol *dot_fn;
544 struct minimal_symbol *fn;
545 CORE_ADDR toc;
546 /* Find the minimal symbol that corresponds to CODE_ADDR (should
547 have a name of the form ".FN"). */
548 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
549 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
550 return 0;
551 /* Get the section that contains CODE_ADDR. Need this for the
552 "objfile" that it contains. */
553 dot_fn_section = find_pc_section (code_addr);
554 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
555 return 0;
556 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
557 address. Only look for the minimal symbol in ".FN"'s object file
558 - avoids problems when two object files (i.e., shared libraries)
559 contain a minimal symbol with the same name. */
560 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
561 dot_fn_section->objfile);
562 if (fn == NULL)
563 return 0;
564 /* Found a descriptor. */
565 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
566 return 1;
567}
568
8be9034a
AC
569/* Pass the arguments in either registers, or in the stack. Using the
570 ppc 64 bit SysV ABI.
571
572 This implements a dumbed down version of the ABI. It always writes
573 values to memory, GPR and FPR, even when not necessary. Doing this
574 greatly simplifies the logic. */
575
576CORE_ADDR
7d9b040b 577ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8be9034a
AC
578 struct regcache *regcache, CORE_ADDR bp_addr,
579 int nargs, struct value **args, CORE_ADDR sp,
580 int struct_return, CORE_ADDR struct_addr)
581{
7d9b040b 582 CORE_ADDR func_addr = find_function_addr (function, NULL);
8be9034a 583 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fb4443d8 584 ULONGEST back_chain;
8be9034a
AC
585 /* See for-loop comment below. */
586 int write_pass;
587 /* Size of the Altivec's vector parameter region, the final value is
588 computed in the for-loop below. */
589 LONGEST vparam_size = 0;
590 /* Size of the general parameter region, the final value is computed
591 in the for-loop below. */
592 LONGEST gparam_size = 0;
593 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
594 calls to align_up(), align_down(), etc. because this makes it
595 easier to reuse this code (in a copy/paste sense) in the future,
596 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
597 at some point makes it easier to verify that this function is
598 correct without having to do a non-local analysis to figure out
599 the possible values of tdep->wordsize. */
600 gdb_assert (tdep->wordsize == 8);
601
fb4443d8
UW
602 /* By this stage in the proceedings, SP has been decremented by "red
603 zone size" + "struct return size". Fetch the stack-pointer from
604 before this and use that as the BACK_CHAIN. */
3e8c568d
UW
605 regcache_cooked_read_unsigned (regcache,
606 gdbarch_sp_regnum (current_gdbarch),
607 &back_chain);
fb4443d8 608
8be9034a
AC
609 /* Go through the argument list twice.
610
611 Pass 1: Compute the function call's stack space and register
612 requirements.
613
614 Pass 2: Replay the same computation but this time also write the
615 values out to the target. */
616
617 for (write_pass = 0; write_pass < 2; write_pass++)
618 {
619 int argno;
620 /* Next available floating point register for float and double
621 arguments. */
622 int freg = 1;
623 /* Next available general register for non-vector (but possibly
624 float) arguments. */
625 int greg = 3;
626 /* Next available vector register for vector arguments. */
627 int vreg = 2;
628 /* The address, at which the next general purpose parameter
629 (integer, struct, float, ...) should be saved. */
630 CORE_ADDR gparam;
631 /* Address, at which the next Altivec vector parameter should be
632 saved. */
633 CORE_ADDR vparam;
634
635 if (!write_pass)
636 {
637 /* During the first pass, GPARAM and VPARAM are more like
638 offsets (start address zero) than addresses. That way
639 the accumulate the total stack space each region
640 requires. */
641 gparam = 0;
642 vparam = 0;
643 }
644 else
645 {
646 /* Decrement the stack pointer making space for the Altivec
647 and general on-stack parameters. Set vparam and gparam
648 to their corresponding regions. */
649 vparam = align_down (sp - vparam_size, 16);
650 gparam = align_down (vparam - gparam_size, 16);
651 /* Add in space for the TOC, link editor double word,
652 compiler double word, LR save area, CR save area. */
653 sp = align_down (gparam - 48, 16);
654 }
655
656 /* If the function is returning a `struct', then there is an
657 extra hidden parameter (which will be passed in r3)
658 containing the address of that struct.. In that case we
659 should advance one word and start from r4 register to copy
660 parameters. This also consumes one on-stack parameter slot. */
661 if (struct_return)
662 {
663 if (write_pass)
664 regcache_cooked_write_signed (regcache,
665 tdep->ppc_gp0_regnum + greg,
666 struct_addr);
667 greg++;
668 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
669 }
670
671 for (argno = 0; argno < nargs; argno++)
672 {
673 struct value *arg = args[argno];
df407dfe 674 struct type *type = check_typedef (value_type (arg));
0fd88904 675 const bfd_byte *val = value_contents (arg);
8be9034a
AC
676 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
677 {
678 /* Floats and Doubles go in f1 .. f13. They also
679 consume a left aligned GREG,, and can end up in
680 memory. */
681 if (write_pass)
682 {
683 if (ppc_floating_point_unit_p (current_gdbarch)
684 && freg <= 13)
685 {
50fd1280 686 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f
JB
687 struct type *regtype
688 = register_type (gdbarch, tdep->ppc_fp0_regnum);
8be9034a 689 convert_typed_floating (val, type, regval, regtype);
366f009f
JB
690 regcache_cooked_write (regcache,
691 tdep->ppc_fp0_regnum + freg,
8be9034a
AC
692 regval);
693 }
694 if (greg <= 10)
695 {
696 /* The ABI states "Single precision floating
697 point values are mapped to the first word in
698 a single doubleword" and "... floating point
699 values mapped to the first eight doublewords
700 of the parameter save area are also passed in
701 general registers").
702
703 This code interprets that to mean: store it,
704 left aligned, in the general register. */
50fd1280 705 gdb_byte regval[MAX_REGISTER_SIZE];
8be9034a
AC
706 memset (regval, 0, sizeof regval);
707 memcpy (regval, val, TYPE_LENGTH (type));
708 regcache_cooked_write (regcache,
709 tdep->ppc_gp0_regnum + greg,
710 regval);
711 }
712 write_memory (gparam, val, TYPE_LENGTH (type));
713 }
714 /* Always consume parameter stack space. */
715 freg++;
716 greg++;
717 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
718 }
719 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
720 && TYPE_CODE (type) == TYPE_CODE_ARRAY
721 && tdep->ppc_vr0_regnum >= 0)
722 {
723 /* In the Altivec ABI, vectors go in the vector
724 registers v2 .. v13, or when that runs out, a vector
725 annex which goes above all the normal parameters.
726 NOTE: cagney/2003-09-21: This is a guess based on the
727 PowerOpen Altivec ABI. */
728 if (vreg <= 13)
729 {
730 if (write_pass)
731 regcache_cooked_write (regcache,
732 tdep->ppc_vr0_regnum + vreg, val);
733 vreg++;
734 }
735 else
736 {
737 if (write_pass)
738 write_memory (vparam, val, TYPE_LENGTH (type));
739 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
740 }
741 }
742 else if ((TYPE_CODE (type) == TYPE_CODE_INT
b6e1c027
AC
743 || TYPE_CODE (type) == TYPE_CODE_ENUM
744 || TYPE_CODE (type) == TYPE_CODE_PTR)
8be9034a
AC
745 && TYPE_LENGTH (type) <= 8)
746 {
b6e1c027
AC
747 /* Scalars and Pointers get sign[un]extended and go in
748 gpr3 .. gpr10. They can also end up in memory. */
8be9034a
AC
749 if (write_pass)
750 {
751 /* Sign extend the value, then store it unsigned. */
752 ULONGEST word = unpack_long (type, val);
b6e1c027
AC
753 /* Convert any function code addresses into
754 descriptors. */
755 if (TYPE_CODE (type) == TYPE_CODE_PTR
756 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
757 {
758 CORE_ADDR desc = word;
759 convert_code_addr_to_desc_addr (word, &desc);
760 word = desc;
761 }
8be9034a
AC
762 if (greg <= 10)
763 regcache_cooked_write_unsigned (regcache,
764 tdep->ppc_gp0_regnum +
765 greg, word);
766 write_memory_unsigned_integer (gparam, tdep->wordsize,
767 word);
768 }
769 greg++;
770 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
771 }
772 else
773 {
774 int byte;
775 for (byte = 0; byte < TYPE_LENGTH (type);
776 byte += tdep->wordsize)
777 {
778 if (write_pass && greg <= 10)
779 {
50fd1280 780 gdb_byte regval[MAX_REGISTER_SIZE];
8be9034a
AC
781 int len = TYPE_LENGTH (type) - byte;
782 if (len > tdep->wordsize)
783 len = tdep->wordsize;
784 memset (regval, 0, sizeof regval);
785 /* WARNING: cagney/2003-09-21: As best I can
786 tell, the ABI specifies that the value should
787 be left aligned. Unfortunately, GCC doesn't
788 do this - it instead right aligns even sized
789 values and puts odd sized values on the
790 stack. Work around that by putting both a
791 left and right aligned value into the
792 register (hopefully no one notices :-^).
793 Arrrgh! */
794 /* Left aligned (8 byte values such as pointers
795 fill the buffer). */
796 memcpy (regval, val + byte, len);
797 /* Right aligned (but only if even). */
798 if (len == 1 || len == 2 || len == 4)
799 memcpy (regval + tdep->wordsize - len,
800 val + byte, len);
801 regcache_cooked_write (regcache, greg, regval);
802 }
803 greg++;
804 }
805 if (write_pass)
806 /* WARNING: cagney/2003-09-21: Strictly speaking, this
807 isn't necessary, unfortunately, GCC appears to get
808 "struct convention" parameter passing wrong putting
809 odd sized structures in memory instead of in a
810 register. Work around this by always writing the
811 value to memory. Fortunately, doing this
812 simplifies the code. */
813 write_memory (gparam, val, TYPE_LENGTH (type));
b6e1c027
AC
814 if (write_pass)
815 /* WARNING: cagney/2004-06-20: It appears that GCC
816 likes to put structures containing a single
817 floating-point member in an FP register instead of
818 general general purpose. */
8be9034a
AC
819 /* Always consume parameter stack space. */
820 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
821 }
822 }
823
824 if (!write_pass)
825 {
826 /* Save the true region sizes ready for the second pass. */
827 vparam_size = vparam;
828 /* Make certain that the general parameter save area is at
829 least the minimum 8 registers (or doublewords) in size. */
830 if (greg < 8)
831 gparam_size = 8 * tdep->wordsize;
832 else
833 gparam_size = gparam;
834 }
835 }
836
837 /* Update %sp. */
3e8c568d
UW
838 regcache_cooked_write_signed (regcache,
839 gdbarch_sp_regnum (current_gdbarch), sp);
8be9034a
AC
840
841 /* Write the backchain (it occupies WORDSIZED bytes). */
842 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
843
844 /* Point the inferior function call's return address at the dummy's
845 breakpoint. */
846 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
847
b6e1c027
AC
848 /* Use the func_addr to find the descriptor, and use that to find
849 the TOC. */
8be9034a 850 {
b6e1c027
AC
851 CORE_ADDR desc_addr;
852 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
8be9034a 853 {
b6e1c027
AC
854 /* The TOC is the second double word in the descriptor. */
855 CORE_ADDR toc =
856 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
857 tdep->wordsize);
858 regcache_cooked_write_unsigned (regcache,
859 tdep->ppc_gp0_regnum + 2, toc);
8be9034a
AC
860 }
861 }
862
863 return sp;
864}
865
afd48b75
AC
866
867/* The 64 bit ABI retun value convention.
868
869 Return non-zero if the return-value is stored in a register, return
870 0 if the return-value is instead stored on the stack (a.k.a.,
871 struct return convention).
872
963e2bb7 873 For a return-value stored in a register: when WRITEBUF is non-NULL,
afd48b75 874 copy the buffer to the corresponding register return-value location
963e2bb7 875 location; when READBUF is non-NULL, fill the buffer from the
afd48b75 876 corresponding register return-value location. */
05580c65
AC
877enum return_value_convention
878ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
50fd1280
AC
879 struct regcache *regcache, gdb_byte *readbuf,
880 const gdb_byte *writebuf)
afd48b75 881{
05580c65 882 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152
JB
883
884 /* This function exists to support a calling convention that
885 requires floating-point registers. It shouldn't be used on
886 processors that lack them. */
887 gdb_assert (ppc_floating_point_unit_p (gdbarch));
888
afd48b75 889 /* Floats and doubles in F1. */
944fcfab 890 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
afd48b75 891 {
50fd1280 892 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f 893 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 894 if (writebuf != NULL)
afd48b75 895 {
963e2bb7 896 convert_typed_floating (writebuf, valtype, regval, regtype);
366f009f 897 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
afd48b75 898 }
963e2bb7 899 if (readbuf != NULL)
afd48b75 900 {
366f009f 901 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
963e2bb7 902 convert_typed_floating (regval, regtype, readbuf, valtype);
afd48b75
AC
903 }
904 return RETURN_VALUE_REGISTER_CONVENTION;
905 }
3d8476bc 906 /* Integers in r3. */
b6e1c027
AC
907 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
908 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
909 && TYPE_LENGTH (valtype) <= 8)
afd48b75 910 {
963e2bb7 911 if (writebuf != NULL)
afd48b75
AC
912 {
913 /* Be careful to sign extend the value. */
914 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 915 unpack_long (valtype, writebuf));
afd48b75 916 }
963e2bb7 917 if (readbuf != NULL)
afd48b75
AC
918 {
919 /* Extract the integer from r3. Since this is truncating the
920 value, there isn't a sign extension problem. */
921 ULONGEST regval;
922 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
923 &regval);
963e2bb7 924 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
afd48b75
AC
925 }
926 return RETURN_VALUE_REGISTER_CONVENTION;
927 }
928 /* All pointers live in r3. */
929 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
930 {
931 /* All pointers live in r3. */
963e2bb7
AC
932 if (writebuf != NULL)
933 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
934 if (readbuf != NULL)
935 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
afd48b75
AC
936 return RETURN_VALUE_REGISTER_CONVENTION;
937 }
3d8476bc
PG
938 /* Array type has more than one use. */
939 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
afd48b75
AC
940 {
941 /* Small character arrays are returned, right justified, in r3. */
3d8476bc
PG
942 if (TYPE_LENGTH (valtype) <= 8
943 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
944 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
945 {
946 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
947 - TYPE_LENGTH (valtype));
948 if (writebuf != NULL)
949 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
950 offset, TYPE_LENGTH (valtype), writebuf);
951 if (readbuf != NULL)
952 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
953 offset, TYPE_LENGTH (valtype), readbuf);
954 return RETURN_VALUE_REGISTER_CONVENTION;
955 }
956 /* A VMX vector is returned in v2. */
957 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
958 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
959 {
960 if (readbuf)
961 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
962 if (writebuf)
963 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
964 return RETURN_VALUE_REGISTER_CONVENTION;
965 }
afd48b75
AC
966 }
967 /* Big floating point values get stored in adjacent floating
3d8476bc 968 point registers, starting with F1. */
afd48b75 969 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
944fcfab 970 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
afd48b75 971 {
963e2bb7 972 if (writebuf || readbuf != NULL)
afd48b75
AC
973 {
974 int i;
975 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
976 {
963e2bb7 977 if (writebuf != NULL)
366f009f 978 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7
AC
979 (const bfd_byte *) writebuf + i * 8);
980 if (readbuf != NULL)
366f009f 981 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7 982 (bfd_byte *) readbuf + i * 8);
afd48b75
AC
983 }
984 }
985 return RETURN_VALUE_REGISTER_CONVENTION;
986 }
987 /* Complex values get returned in f1:f2, need to convert. */
988 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
989 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
990 {
991 if (regcache != NULL)
992 {
993 int i;
994 for (i = 0; i < 2; i++)
995 {
50fd1280 996 gdb_byte regval[MAX_REGISTER_SIZE];
944fcfab 997 struct type *regtype =
366f009f 998 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 999 if (writebuf != NULL)
afd48b75 1000 {
963e2bb7 1001 convert_typed_floating ((const bfd_byte *) writebuf +
944fcfab 1002 i * (TYPE_LENGTH (valtype) / 2),
afd48b75 1003 valtype, regval, regtype);
366f009f
JB
1004 regcache_cooked_write (regcache,
1005 tdep->ppc_fp0_regnum + 1 + i,
944fcfab 1006 regval);
afd48b75 1007 }
963e2bb7 1008 if (readbuf != NULL)
afd48b75 1009 {
366f009f
JB
1010 regcache_cooked_read (regcache,
1011 tdep->ppc_fp0_regnum + 1 + i,
1012 regval);
afd48b75 1013 convert_typed_floating (regval, regtype,
963e2bb7 1014 (bfd_byte *) readbuf +
944fcfab 1015 i * (TYPE_LENGTH (valtype) / 2),
afd48b75
AC
1016 valtype);
1017 }
1018 }
1019 }
1020 return RETURN_VALUE_REGISTER_CONVENTION;
1021 }
1022 /* Big complex values get stored in f1:f4. */
944fcfab 1023 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
afd48b75
AC
1024 {
1025 if (regcache != NULL)
1026 {
1027 int i;
1028 for (i = 0; i < 4; i++)
1029 {
963e2bb7 1030 if (writebuf != NULL)
366f009f 1031 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7
AC
1032 (const bfd_byte *) writebuf + i * 8);
1033 if (readbuf != NULL)
366f009f 1034 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7 1035 (bfd_byte *) readbuf + i * 8);
afd48b75
AC
1036 }
1037 }
1038 return RETURN_VALUE_REGISTER_CONVENTION;
1039 }
1040 return RETURN_VALUE_STRUCT_CONVENTION;
1041}
1042
6066c3de
AC
1043CORE_ADDR
1044ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1045 CORE_ADDR bpaddr)
1046{
1047 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1048 a function-descriptor while the corresponding minimal-symbol
1049 ".FN" should point at the entry point. Consequently, a command
1050 like "break FN" applied to an object file with only minimal
1051 symbols, will insert the breakpoint into the descriptor at "FN"
1052 and not the function at ".FN". Avoid this confusion by adjusting
1053 any attempt to set a descriptor breakpoint into a corresponding
1054 function breakpoint. Note that GDB warns the user when this
1055 adjustment is applied - that's ok as otherwise the user will have
1056 no way of knowing why their breakpoint at "FN" resulted in the
1057 program stopping at ".FN". */
1058 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1059}
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