[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c

/* Target-dependent code for PowerPC systems using the SVR4 ABI
   for GDB, the GNU debugger.

   Copyright 2000, 2001, 2002 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "gdbcore.h"
#include "inferior.h"
#include "regcache.h"
#include "value.h"
#include "gdb_string.h"

#include "ppc-tdep.h"

/* Pass the arguments in either registers, or in the stack. Using the
   ppc sysv ABI, the first eight words of the argument list (that might
   be less than eight parameters if some parameters occupy more than one
   word) are passed in r3..r10 registers.  float and double parameters are
   passed in fpr's, in addition to that. Rest of the parameters if any
   are passed in user stack. 

   If the function is returning a structure, then the return address is passed
   in r3, then the first 7 words of the parametes can be passed in registers,
   starting from r4. */

CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
			      struct regcache *regcache, CORE_ADDR bp_addr,
			      int nargs, struct value **args, CORE_ADDR sp,
			      int struct_return, CORE_ADDR struct_addr)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
  const CORE_ADDR saved_sp = read_sp ();
  int argspace = 0;		/* 0 is an initial wrong guess.  */
  int write_pass;

  /* Go through the argument list twice.

     Pass 1: Figure out how much new stack space is required for
     arguments and pushed values.  Unlike the PowerOpen ABI, the SysV
     ABI doesn't reserve any extra space for parameters which are put
     in registers, but does always push structures and then pass their
     address.

     Pass 2: Replay the same computation but this time also write the
     values out to the target.  */

  for (write_pass = 0; write_pass < 2; write_pass++)
    {
      int argno;
      /* Next available floating point register for float and double
         arguments.  */
      int freg = 1;
      /* Next available general register for non-float, non-vector
         arguments.  */
      int greg = 3;
      /* Next available vector register for vector arguments.  */
      int vreg = 2;
      /* Arguments start above the "LR save word" and "Back chain".  */
      int argoffset = 2 * tdep->wordsize;
      /* Structures start after the arguments.  */
      int structoffset = argoffset + argspace;

      /* If the function is returning a `struct', then the first word
	 (which will be passed in r3) is used for struct return
	 address.  In that case we should advance one word and start
	 from r4 register to copy parameters.  */
      if (struct_return)
	{
	  if (write_pass)
	    regcache_cooked_write_signed (regcache,
					  tdep->ppc_gp0_regnum + greg,
					  struct_addr);
	  greg++;
	}

      for (argno = 0; argno < nargs; argno++)
	{
	  struct value *arg = args[argno];
	  struct type *type = check_typedef (VALUE_TYPE (arg));
	  int len = TYPE_LENGTH (type);
	  char *val = VALUE_CONTENTS (arg);

	  if (TYPE_CODE (type) == TYPE_CODE_FLT
	      && ppc_floating_point_unit_p (current_gdbarch)
	      && len <= 8)
	    {
	      /* Floating point value converted to "double" then
                 passed in an FP register, when the registers run out,
                 8 byte aligned stack is used.  */
	      if (freg <= 8)
		{
		  if (write_pass)
		    {
		      /* Always store the floating point value using
                         the register's floating-point format.  */
		      char regval[MAX_REGISTER_SIZE];
		      struct type *regtype
			= register_type (gdbarch, FP0_REGNUM + freg);
		      convert_typed_floating (val, type, regval, regtype);
		      regcache_cooked_write (regcache, FP0_REGNUM + freg,
					     regval);
		    }
		  freg++;
		}
	      else
		{
		  /* SysV ABI converts floats to doubles before
                     writing them to an 8 byte aligned stack location.  */
		  argoffset = align_up (argoffset, 8);
		  if (write_pass)
		    {
		      char memval[8];
		      struct type *memtype;
		      switch (TARGET_BYTE_ORDER)
			{
			case BFD_ENDIAN_BIG:
			  memtype = builtin_type_ieee_double_big;
			  break;
			case BFD_ENDIAN_LITTLE:
			  memtype = builtin_type_ieee_double_little;
			  break;
			default:
			  internal_error (__FILE__, __LINE__, "bad switch");
			}
		      convert_typed_floating (val, type, memval, memtype);
		      write_memory (sp + argoffset, val, len);
		    }
		  argoffset += 8;
		}
	    }
	  else if (len == 8 
		   && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
		       || (!ppc_floating_point_unit_p (current_gdbarch)
			   && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
	    {
	      /* "long long" or "double" passed in an odd/even
                 register pair with the low addressed word in the odd
                 register and the high addressed word in the even
                 register, or when the registers run out an 8 byte
                 aligned stack location.  */
	      if (greg > 9)
		{
		  /* Just in case GREG was 10.  */
		  greg = 11;
		  argoffset = align_up (argoffset, 8);
		  if (write_pass)
		    write_memory (sp + argoffset, val, len);
		  argoffset += 8;
		}
	      else if (tdep->wordsize == 8)
		{
		  if (write_pass)
		    regcache_cooked_write (regcache,
					   tdep->ppc_gp0_regnum + greg,
					   val);
		  greg += 1;
		}
	      else
		{
		  /* Must start on an odd register - r3/r4 etc.  */
		  if ((greg & 1) == 0)
		    greg++;
		  if (write_pass)
		    {
		      regcache_cooked_write (regcache,
					     tdep->ppc_gp0_regnum + greg + 0,
					     val + 0);
		      regcache_cooked_write (regcache,
					     tdep->ppc_gp0_regnum + greg + 1,
					     val + 4);
		    }
		  greg += 2;
		}
	    }
	  else if (len == 16
		   && TYPE_CODE (type) == TYPE_CODE_ARRAY
		   && TYPE_VECTOR (type)
		   && tdep->ppc_vr0_regnum >= 0)
	    {
	      /* Vector parameter passed in an Altivec register, or
                 when that runs out, 16 byte aligned stack location.  */
	      if (vreg <= 13)
		{
		  if (write_pass)
		    regcache_cooked_write (current_regcache,
					   tdep->ppc_vr0_regnum + vreg,
					   val);
		  vreg++;
		}
	      else
		{
		  argoffset = align_up (argoffset, 16);
		  if (write_pass)
		    write_memory (sp + argoffset, val, 16);
		  argoffset += 16;
		}
	    }
          else if (len == 8 
		   && TYPE_CODE (type) == TYPE_CODE_ARRAY
		   && TYPE_VECTOR (type)
		   && tdep->ppc_ev0_regnum >= 0)
            {
	      /* Vector parameter passed in an e500 register, or when
                 that runs out, 8 byte aligned stack location.  Note
                 that since e500 vector and general purpose registers
                 both map onto the same underlying register set, a
                 "greg" and not a "vreg" is consumed here.  A cooked
                 write stores the value in the correct locations
                 within the raw register cache.  */
              if (greg <= 10)
                {
		  if (write_pass)
		    regcache_cooked_write (current_regcache,
					   tdep->ppc_ev0_regnum + greg,
					   val);
                  greg++;
                }
              else
                {
		  argoffset = align_up (argoffset, 8);
		  if (write_pass)
		    write_memory (sp + argoffset, val, 8);
                  argoffset += 8;
                }
            }
	  else
	    {
	      /* Reduce the parameter down to something that fits in a
                 "word".  */
	      char word[MAX_REGISTER_SIZE];
	      memset (word, 0, MAX_REGISTER_SIZE);
	      if (len > tdep->wordsize
		  || TYPE_CODE (type) == TYPE_CODE_STRUCT
		  || TYPE_CODE (type) == TYPE_CODE_UNION)
		{
		  /* Structs and large values are put on an 8 byte
                     aligned stack ... */
		  structoffset = align_up (structoffset, 8);
		  if (write_pass)
		    write_memory (sp + structoffset, val, len);
		  /* ... and then a "word" pointing to that address is
                     passed as the parameter.  */
		  store_unsigned_integer (word, tdep->wordsize,
					  sp + structoffset);
		  structoffset += len;
		}
	      else if (TYPE_CODE (type) == TYPE_CODE_INT)
		/* Sign or zero extend the "int" into a "word".  */
		store_unsigned_integer (word, tdep->wordsize,
					unpack_long (type, val));
	      else
		/* Always goes in the low address.  */
		memcpy (word, val, len);
	      /* Store that "word" in a register, or on the stack.
                 The words have "4" byte alignment.  */
	      if (greg <= 10)
		{
		  if (write_pass)
		    regcache_cooked_write (regcache,
					   tdep->ppc_gp0_regnum + greg,
					   word);
		  greg++;
		}
	      else
		{
		  argoffset = align_up (argoffset, tdep->wordsize);
		  if (write_pass)
		    write_memory (sp + argoffset, word, tdep->wordsize);
		  argoffset += tdep->wordsize;
		}
	    }
	}

      /* Compute the actual stack space requirements.  */
      if (!write_pass)
	{
	  /* Remember the amount of space needed by the arguments.  */
	  argspace = argoffset;
	  /* Allocate space for both the arguments and the structures.  */
	  sp -= (argoffset + structoffset);
	  /* Ensure that the stack is still 16 byte aligned.  */
	  sp = align_down (sp, 16);
	}
    }

  /* Update %sp.   */
  regcache_cooked_write_signed (regcache, SP_REGNUM, sp);

  /* Write the backchain (it occupies WORDSIZED bytes).  */
  write_memory_signed_integer (sp, tdep->wordsize, saved_sp);

  /* Point the inferior function call's return address at the dummy's
     breakpoint.  */
  regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);

  return sp;
}

/* Structures 8 bytes or less long are returned in the r3 & r4
   registers, according to the SYSV ABI. */
int
ppc_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type)
{
  if ((TYPE_LENGTH (value_type) == 16 || TYPE_LENGTH (value_type) == 8)
      && TYPE_VECTOR (value_type))
    return 0;

  return (TYPE_LENGTH (value_type) > 8);
}
Commit	Line	Data
7b112f9c JT	1	/* Target-dependent code for PowerPC systems using the SVR4 ABI
	2	for GDB, the GNU debugger.
	3
	4	Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 2 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program; if not, write to the Free Software
	20	Foundation, Inc., 59 Temple Place - Suite 330,
	21	Boston, MA 02111-1307, USA. */
	22
	23	#include "defs.h"
	24	#include "gdbcore.h"
	25	#include "inferior.h"
	26	#include "regcache.h"
	27	#include "value.h"
bdf64bac	28	#include "gdb_string.h"
7b112f9c JT	29
	30	#include "ppc-tdep.h"
	31
7b112f9c JT	32	/* Pass the arguments in either registers, or in the stack. Using the
	33	ppc sysv ABI, the first eight words of the argument list (that might
	34	be less than eight parameters if some parameters occupy more than one
	35	word) are passed in r3..r10 registers. float and double parameters are
	36	passed in fpr's, in addition to that. Rest of the parameters if any
	37	are passed in user stack.
	38
	39	If the function is returning a structure, then the return address is passed
	40	in r3, then the first 7 words of the parametes can be passed in registers,
	41	starting from r4. */
	42
	43	CORE_ADDR
77b2b6d4 AC	44	ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
	45	struct regcache *regcache, CORE_ADDR bp_addr,
	46	int nargs, struct value **args, CORE_ADDR sp,
	47	int struct_return, CORE_ADDR struct_addr)
7b112f9c	48	{
0a613259	49	struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
68856ea3 AC	50	const CORE_ADDR saved_sp = read_sp ();
	51	int argspace = 0; /* 0 is an initial wrong guess. */
	52	int write_pass;
7b112f9c	53
68856ea3	54	/* Go through the argument list twice.
7b112f9c	55
68856ea3 AC	56	Pass 1: Figure out how much new stack space is required for
	57	arguments and pushed values. Unlike the PowerOpen ABI, the SysV
	58	ABI doesn't reserve any extra space for parameters which are put
	59	in registers, but does always push structures and then pass their
	60	address.
7a41266b	61
68856ea3 AC	62	Pass 2: Replay the same computation but this time also write the
68856ea3 AC	63	values out to the target. */
7b112f9c	64
68856ea3 AC	65	for (write_pass = 0; write_pass < 2; write_pass++)
	66	{
	67	int argno;
	68	/* Next available floating point register for float and double
	69	arguments. */
	70	int freg = 1;
	71	/* Next available general register for non-float, non-vector
	72	arguments. */
	73	int greg = 3;
	74	/* Next available vector register for vector arguments. */
	75	int vreg = 2;
	76	/* Arguments start above the "LR save word" and "Back chain". */
	77	int argoffset = 2 * tdep->wordsize;
	78	/* Structures start after the arguments. */
	79	int structoffset = argoffset + argspace;
	80
	81	/* If the function is returning a `struct', then the first word
	82	(which will be passed in r3) is used for struct return
	83	address. In that case we should advance one word and start
	84	from r4 register to copy parameters. */
	85	if (struct_return)
7b112f9c	86	{
68856ea3 AC	87	if (write_pass)
	88	regcache_cooked_write_signed (regcache,
	89	tdep->ppc_gp0_regnum + greg,
	90	struct_addr);
	91	greg++;
7b112f9c	92	}
68856ea3 AC	93
68856ea3 AC	94	for (argno = 0; argno < nargs; argno++)
7b112f9c	95	{
68856ea3 AC	96	struct value *arg = args[argno];
	97	struct type *type = check_typedef (VALUE_TYPE (arg));
	98	int len = TYPE_LENGTH (type);
	99	char *val = VALUE_CONTENTS (arg);
	100
	101	if (TYPE_CODE (type) == TYPE_CODE_FLT
	102	&& ppc_floating_point_unit_p (current_gdbarch)
	103	&& len <= 8)
7b112f9c	104	{
68856ea3 AC	105	/* Floating point value converted to "double" then
	106	passed in an FP register, when the registers run out,
	107	8 byte aligned stack is used. */
	108	if (freg <= 8)
	109	{
	110	if (write_pass)
	111	{
	112	/* Always store the floating point value using
	113	the register's floating-point format. */
	114	char regval[MAX_REGISTER_SIZE];
	115	struct type *regtype
	116	= register_type (gdbarch, FP0_REGNUM + freg);
	117	convert_typed_floating (val, type, regval, regtype);
	118	regcache_cooked_write (regcache, FP0_REGNUM + freg,
	119	regval);
	120	}
	121	freg++;
	122	}
7b112f9c JT	123	else
7b112f9c JT	124	{
68856ea3 AC	125	/* SysV ABI converts floats to doubles before
	126	writing them to an 8 byte aligned stack location. */
	127	argoffset = align_up (argoffset, 8);
	128	if (write_pass)
	129	{
	130	char memval[8];
	131	struct type *memtype;
	132	switch (TARGET_BYTE_ORDER)
	133	{
	134	case BFD_ENDIAN_BIG:
	135	memtype = builtin_type_ieee_double_big;
	136	break;
	137	case BFD_ENDIAN_LITTLE:
	138	memtype = builtin_type_ieee_double_little;
	139	break;
	140	default:
	141	internal_error (__FILE__, __LINE__, "bad switch");
	142	}
	143	convert_typed_floating (val, type, memval, memtype);
	144	write_memory (sp + argoffset, val, len);
	145	}
	146	argoffset += 8;
7b112f9c JT	147	}
7b112f9c JT	148	}
68856ea3 AC	149	else if (len == 8
	150	&& (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
	151	\|\| (!ppc_floating_point_unit_p (current_gdbarch)
	152	&& TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
7b112f9c	153	{
68856ea3 AC	154	/* "long long" or "double" passed in an odd/even
	155	register pair with the low addressed word in the odd
	156	register and the high addressed word in the even
	157	register, or when the registers run out an 8 byte
	158	aligned stack location. */
	159	if (greg > 9)
	160	{
	161	/* Just in case GREG was 10. */
	162	greg = 11;
	163	argoffset = align_up (argoffset, 8);
	164	if (write_pass)
	165	write_memory (sp + argoffset, val, len);
	166	argoffset += 8;
	167	}
	168	else if (tdep->wordsize == 8)
	169	{
	170	if (write_pass)
	171	regcache_cooked_write (regcache,
	172	tdep->ppc_gp0_regnum + greg,
	173	val);
	174	greg += 1;
	175	}
	176	else
	177	{
	178	/* Must start on an odd register - r3/r4 etc. */
	179	if ((greg & 1) == 0)
	180	greg++;
	181	if (write_pass)
	182	{
	183	regcache_cooked_write (regcache,
	184	tdep->ppc_gp0_regnum + greg + 0,
	185	val + 0);
	186	regcache_cooked_write (regcache,
	187	tdep->ppc_gp0_regnum + greg + 1,
	188	val + 4);
	189	}
	190	greg += 2;
	191	}
7b112f9c	192	}
68856ea3 AC	193	else if (len == 16
	194	&& TYPE_CODE (type) == TYPE_CODE_ARRAY
	195	&& TYPE_VECTOR (type)
	196	&& tdep->ppc_vr0_regnum >= 0)
7b112f9c	197	{
68856ea3 AC	198	/* Vector parameter passed in an Altivec register, or
68856ea3 AC	199	when that runs out, 16 byte aligned stack location. */
7b112f9c JT	200	if (vreg <= 13)
7b112f9c JT	201	{
68856ea3 AC	202	if (write_pass)
	203	regcache_cooked_write (current_regcache,
	204	tdep->ppc_vr0_regnum + vreg,
	205	val);
7b112f9c JT	206	vreg++;
	207	}
	208	else
	209	{
68856ea3 AC	210	argoffset = align_up (argoffset, 16);
	211	if (write_pass)
	212	write_memory (sp + argoffset, val, 16);
7b112f9c JT	213	argoffset += 16;
	214	}
	215	}
0a613259 AC	216	else if (len == 8
0a613259 AC	217	&& TYPE_CODE (type) == TYPE_CODE_ARRAY
68856ea3 AC	218	&& TYPE_VECTOR (type)
68856ea3 AC	219	&& tdep->ppc_ev0_regnum >= 0)
0a613259	220	{
68856ea3 AC	221	/* Vector parameter passed in an e500 register, or when
	222	that runs out, 8 byte aligned stack location. Note
	223	that since e500 vector and general purpose registers
	224	both map onto the same underlying register set, a
	225	"greg" and not a "vreg" is consumed here. A cooked
	226	write stores the value in the correct locations
	227	within the raw register cache. */
0a613259 AC	228	if (greg <= 10)
0a613259 AC	229	{
68856ea3 AC	230	if (write_pass)
	231	regcache_cooked_write (current_regcache,
	232	tdep->ppc_ev0_regnum + greg,
	233	val);
0a613259 AC	234	greg++;
	235	}
	236	else
	237	{
68856ea3 AC	238	argoffset = align_up (argoffset, 8);
	239	if (write_pass)
	240	write_memory (sp + argoffset, val, 8);
0a613259 AC	241	argoffset += 8;
	242	}
	243	}
68856ea3 AC	244	else
	245	{
	246	/* Reduce the parameter down to something that fits in a
	247	"word". */
	248	char word[MAX_REGISTER_SIZE];
	249	memset (word, 0, MAX_REGISTER_SIZE);
	250	if (len > tdep->wordsize
	251	\|\| TYPE_CODE (type) == TYPE_CODE_STRUCT
	252	\|\| TYPE_CODE (type) == TYPE_CODE_UNION)
	253	{
	254	/* Structs and large values are put on an 8 byte
	255	aligned stack ... */
	256	structoffset = align_up (structoffset, 8);
	257	if (write_pass)
	258	write_memory (sp + structoffset, val, len);
	259	/* ... and then a "word" pointing to that address is
	260	passed as the parameter. */
	261	store_unsigned_integer (word, tdep->wordsize,
	262	sp + structoffset);
	263	structoffset += len;
	264	}
	265	else if (TYPE_CODE (type) == TYPE_CODE_INT)
	266	/* Sign or zero extend the "int" into a "word". */
	267	store_unsigned_integer (word, tdep->wordsize,
	268	unpack_long (type, val));
	269	else
	270	/* Always goes in the low address. */
	271	memcpy (word, val, len);
	272	/* Store that "word" in a register, or on the stack.
	273	The words have "4" byte alignment. */
	274	if (greg <= 10)
	275	{
	276	if (write_pass)
	277	regcache_cooked_write (regcache,
	278	tdep->ppc_gp0_regnum + greg,
	279	word);
	280	greg++;
	281	}
	282	else
	283	{
	284	argoffset = align_up (argoffset, tdep->wordsize);
	285	if (write_pass)
	286	write_memory (sp + argoffset, word, tdep->wordsize);
	287	argoffset += tdep->wordsize;
	288	}
	289	}
	290	}
	291
	292	/* Compute the actual stack space requirements. */
	293	if (!write_pass)
	294	{
	295	/* Remember the amount of space needed by the arguments. */
	296	argspace = argoffset;
	297	/* Allocate space for both the arguments and the structures. */
	298	sp -= (argoffset + structoffset);
	299	/* Ensure that the stack is still 16 byte aligned. */
	300	sp = align_down (sp, 16);
	301	}
7b112f9c JT	302	}
7b112f9c JT	303
68856ea3 AC	304	/* Update %sp. */
	305	regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
	306
	307	/* Write the backchain (it occupies WORDSIZED bytes). */
	308	write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
	309
e56a0ecc AC	310	/* Point the inferior function call's return address at the dummy's
e56a0ecc AC	311	breakpoint. */
68856ea3	312	regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc	313
7b112f9c JT	314	return sp;
	315	}
	316
7b112f9c JT	317	/* Structures 8 bytes or less long are returned in the r3 & r4
	318	registers, according to the SYSV ABI. */
	319	int
	320	ppc_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type)
	321	{
0a613259	322	if ((TYPE_LENGTH (value_type) == 16 \|\| TYPE_LENGTH (value_type) == 8)
7b112f9c JT	323	&& TYPE_VECTOR (value_type))
	324	return 0;
	325
	326	return (TYPE_LENGTH (value_type) > 8);
	327	}