* arm-tdep.c (arm_print_float_info): Use register value from FRAME
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
CommitLineData
7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
6aba47ca 4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007
65ada037 5 Free Software Foundation, Inc.
7b112f9c
JT
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
197e01b6
EZ
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
7b112f9c
JT
23
24#include "defs.h"
25#include "gdbcore.h"
26#include "inferior.h"
27#include "regcache.h"
28#include "value.h"
bdf64bac 29#include "gdb_string.h"
8be9034a 30#include "gdb_assert.h"
7b112f9c 31#include "ppc-tdep.h"
6066c3de 32#include "target.h"
0a90bcdd 33#include "objfiles.h"
7d9b040b 34#include "infcall.h"
7b112f9c 35
7b112f9c
JT
36/* Pass the arguments in either registers, or in the stack. Using the
37 ppc sysv ABI, the first eight words of the argument list (that might
38 be less than eight parameters if some parameters occupy more than one
39 word) are passed in r3..r10 registers. float and double parameters are
40 passed in fpr's, in addition to that. Rest of the parameters if any
41 are passed in user stack.
42
43 If the function is returning a structure, then the return address is passed
44 in r3, then the first 7 words of the parametes can be passed in registers,
45 starting from r4. */
46
47CORE_ADDR
7d9b040b 48ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
49 struct regcache *regcache, CORE_ADDR bp_addr,
50 int nargs, struct value **args, CORE_ADDR sp,
51 int struct_return, CORE_ADDR struct_addr)
7b112f9c 52{
0a613259 53 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fb4443d8 54 ULONGEST saved_sp;
68856ea3
AC
55 int argspace = 0; /* 0 is an initial wrong guess. */
56 int write_pass;
7b112f9c 57
fb4443d8
UW
58 regcache_cooked_read_unsigned (regcache, SP_REGNUM, &saved_sp);
59
68856ea3 60 /* Go through the argument list twice.
7b112f9c 61
68856ea3
AC
62 Pass 1: Figure out how much new stack space is required for
63 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
64 ABI doesn't reserve any extra space for parameters which are put
65 in registers, but does always push structures and then pass their
66 address.
7a41266b 67
68856ea3
AC
68 Pass 2: Replay the same computation but this time also write the
69 values out to the target. */
7b112f9c 70
68856ea3
AC
71 for (write_pass = 0; write_pass < 2; write_pass++)
72 {
73 int argno;
74 /* Next available floating point register for float and double
75 arguments. */
76 int freg = 1;
77 /* Next available general register for non-float, non-vector
78 arguments. */
79 int greg = 3;
80 /* Next available vector register for vector arguments. */
81 int vreg = 2;
82 /* Arguments start above the "LR save word" and "Back chain". */
83 int argoffset = 2 * tdep->wordsize;
84 /* Structures start after the arguments. */
85 int structoffset = argoffset + argspace;
86
87 /* If the function is returning a `struct', then the first word
944fcfab
AC
88 (which will be passed in r3) is used for struct return
89 address. In that case we should advance one word and start
90 from r4 register to copy parameters. */
68856ea3 91 if (struct_return)
7b112f9c 92 {
68856ea3
AC
93 if (write_pass)
94 regcache_cooked_write_signed (regcache,
95 tdep->ppc_gp0_regnum + greg,
96 struct_addr);
97 greg++;
7b112f9c 98 }
68856ea3
AC
99
100 for (argno = 0; argno < nargs; argno++)
7b112f9c 101 {
68856ea3 102 struct value *arg = args[argno];
df407dfe 103 struct type *type = check_typedef (value_type (arg));
68856ea3 104 int len = TYPE_LENGTH (type);
0fd88904 105 const bfd_byte *val = value_contents (arg);
68856ea3
AC
106
107 if (TYPE_CODE (type) == TYPE_CODE_FLT
944fcfab 108 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
7b112f9c 109 {
68856ea3 110 /* Floating point value converted to "double" then
944fcfab
AC
111 passed in an FP register, when the registers run out,
112 8 byte aligned stack is used. */
68856ea3
AC
113 if (freg <= 8)
114 {
115 if (write_pass)
116 {
117 /* Always store the floating point value using
944fcfab 118 the register's floating-point format. */
50fd1280 119 gdb_byte regval[MAX_REGISTER_SIZE];
68856ea3 120 struct type *regtype
366f009f 121 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
68856ea3 122 convert_typed_floating (val, type, regval, regtype);
366f009f
JB
123 regcache_cooked_write (regcache,
124 tdep->ppc_fp0_regnum + freg,
68856ea3
AC
125 regval);
126 }
127 freg++;
128 }
7b112f9c
JT
129 else
130 {
68856ea3 131 /* SysV ABI converts floats to doubles before
944fcfab 132 writing them to an 8 byte aligned stack location. */
68856ea3
AC
133 argoffset = align_up (argoffset, 8);
134 if (write_pass)
135 {
136 char memval[8];
8da61cc4
DJ
137 convert_typed_floating (val, type, memval,
138 builtin_type_ieee_double);
68856ea3
AC
139 write_memory (sp + argoffset, val, len);
140 }
141 argoffset += 8;
7b112f9c
JT
142 }
143 }
944fcfab
AC
144 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
145 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
7b112f9c 146 {
68856ea3 147 /* "long long" or "double" passed in an odd/even
944fcfab
AC
148 register pair with the low addressed word in the odd
149 register and the high addressed word in the even
150 register, or when the registers run out an 8 byte
151 aligned stack location. */
68856ea3
AC
152 if (greg > 9)
153 {
154 /* Just in case GREG was 10. */
155 greg = 11;
156 argoffset = align_up (argoffset, 8);
157 if (write_pass)
158 write_memory (sp + argoffset, val, len);
159 argoffset += 8;
160 }
161 else if (tdep->wordsize == 8)
162 {
163 if (write_pass)
164 regcache_cooked_write (regcache,
944fcfab 165 tdep->ppc_gp0_regnum + greg, val);
68856ea3
AC
166 greg += 1;
167 }
168 else
169 {
170 /* Must start on an odd register - r3/r4 etc. */
171 if ((greg & 1) == 0)
172 greg++;
173 if (write_pass)
174 {
175 regcache_cooked_write (regcache,
176 tdep->ppc_gp0_regnum + greg + 0,
177 val + 0);
178 regcache_cooked_write (regcache,
179 tdep->ppc_gp0_regnum + greg + 1,
180 val + 4);
181 }
182 greg += 2;
183 }
7b112f9c 184 }
68856ea3
AC
185 else if (len == 16
186 && TYPE_CODE (type) == TYPE_CODE_ARRAY
944fcfab 187 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
7b112f9c 188 {
68856ea3 189 /* Vector parameter passed in an Altivec register, or
944fcfab 190 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
191 if (vreg <= 13)
192 {
68856ea3 193 if (write_pass)
9c9acae0 194 regcache_cooked_write (regcache,
944fcfab 195 tdep->ppc_vr0_regnum + vreg, val);
7b112f9c
JT
196 vreg++;
197 }
198 else
199 {
68856ea3
AC
200 argoffset = align_up (argoffset, 16);
201 if (write_pass)
202 write_memory (sp + argoffset, val, 16);
7b112f9c
JT
203 argoffset += 16;
204 }
205 }
944fcfab 206 else if (len == 8
0a613259 207 && TYPE_CODE (type) == TYPE_CODE_ARRAY
944fcfab
AC
208 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
209 {
68856ea3 210 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
211 that runs out, 8 byte aligned stack location. Note
212 that since e500 vector and general purpose registers
213 both map onto the same underlying register set, a
214 "greg" and not a "vreg" is consumed here. A cooked
215 write stores the value in the correct locations
216 within the raw register cache. */
217 if (greg <= 10)
218 {
68856ea3 219 if (write_pass)
9c9acae0 220 regcache_cooked_write (regcache,
944fcfab
AC
221 tdep->ppc_ev0_regnum + greg, val);
222 greg++;
223 }
224 else
225 {
68856ea3
AC
226 argoffset = align_up (argoffset, 8);
227 if (write_pass)
228 write_memory (sp + argoffset, val, 8);
944fcfab
AC
229 argoffset += 8;
230 }
231 }
68856ea3
AC
232 else
233 {
234 /* Reduce the parameter down to something that fits in a
944fcfab 235 "word". */
50fd1280 236 gdb_byte word[MAX_REGISTER_SIZE];
68856ea3
AC
237 memset (word, 0, MAX_REGISTER_SIZE);
238 if (len > tdep->wordsize
239 || TYPE_CODE (type) == TYPE_CODE_STRUCT
240 || TYPE_CODE (type) == TYPE_CODE_UNION)
241 {
242 /* Structs and large values are put on an 8 byte
944fcfab 243 aligned stack ... */
68856ea3
AC
244 structoffset = align_up (structoffset, 8);
245 if (write_pass)
246 write_memory (sp + structoffset, val, len);
247 /* ... and then a "word" pointing to that address is
944fcfab 248 passed as the parameter. */
68856ea3
AC
249 store_unsigned_integer (word, tdep->wordsize,
250 sp + structoffset);
251 structoffset += len;
252 }
253 else if (TYPE_CODE (type) == TYPE_CODE_INT)
254 /* Sign or zero extend the "int" into a "word". */
255 store_unsigned_integer (word, tdep->wordsize,
256 unpack_long (type, val));
257 else
258 /* Always goes in the low address. */
259 memcpy (word, val, len);
260 /* Store that "word" in a register, or on the stack.
944fcfab 261 The words have "4" byte alignment. */
68856ea3
AC
262 if (greg <= 10)
263 {
264 if (write_pass)
265 regcache_cooked_write (regcache,
944fcfab 266 tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
267 greg++;
268 }
269 else
270 {
271 argoffset = align_up (argoffset, tdep->wordsize);
272 if (write_pass)
273 write_memory (sp + argoffset, word, tdep->wordsize);
274 argoffset += tdep->wordsize;
275 }
276 }
277 }
278
279 /* Compute the actual stack space requirements. */
280 if (!write_pass)
281 {
282 /* Remember the amount of space needed by the arguments. */
283 argspace = argoffset;
284 /* Allocate space for both the arguments and the structures. */
285 sp -= (argoffset + structoffset);
286 /* Ensure that the stack is still 16 byte aligned. */
287 sp = align_down (sp, 16);
288 }
65ada037
MK
289
290 /* The psABI says that "A caller of a function that takes a
291 variable argument list shall set condition register bit 6 to
292 1 if it passes one or more arguments in the floating-point
293 registers. It is strongly recommended that the caller set the
294 bit to 0 otherwise..." Doing this for normal functions too
295 shouldn't hurt. */
296 if (write_pass)
297 {
298 ULONGEST cr;
299
300 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
301 if (freg > 1)
302 cr |= 0x02000000;
303 else
304 cr &= ~0x02000000;
305 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
306 }
7b112f9c
JT
307 }
308
68856ea3
AC
309 /* Update %sp. */
310 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
311
312 /* Write the backchain (it occupies WORDSIZED bytes). */
313 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
314
e56a0ecc
AC
315 /* Point the inferior function call's return address at the dummy's
316 breakpoint. */
68856ea3 317 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 318
7b112f9c
JT
319 return sp;
320}
321
e754ae69
AC
322/* Handle the return-value conventions specified by the SysV 32-bit
323 PowerPC ABI (including all the supplements):
324
325 no floating-point: floating-point values returned using 32-bit
326 general-purpose registers.
327
328 Altivec: 128-bit vectors returned using vector registers.
329
330 e500: 64-bit vectors returned using the full full 64 bit EV
331 register, floating-point values returned using 32-bit
332 general-purpose registers.
333
334 GCC (broken): Small struct values right (instead of left) aligned
335 when returned in general-purpose registers. */
336
337static enum return_value_convention
05580c65 338do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
963e2bb7
AC
339 struct regcache *regcache, void *readbuf,
340 const void *writebuf, int broken_gcc)
e754ae69 341{
05580c65 342 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e754ae69
AC
343 gdb_assert (tdep->wordsize == 4);
344 if (TYPE_CODE (type) == TYPE_CODE_FLT
345 && TYPE_LENGTH (type) <= 8
05580c65 346 && ppc_floating_point_unit_p (gdbarch))
e754ae69 347 {
963e2bb7 348 if (readbuf)
e754ae69
AC
349 {
350 /* Floats and doubles stored in "f1". Convert the value to
351 the required type. */
50fd1280 352 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f
JB
353 struct type *regtype = register_type (gdbarch,
354 tdep->ppc_fp0_regnum + 1);
355 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
963e2bb7 356 convert_typed_floating (regval, regtype, readbuf, type);
e754ae69 357 }
963e2bb7 358 if (writebuf)
e754ae69
AC
359 {
360 /* Floats and doubles stored in "f1". Convert the value to
361 the register's "double" type. */
50fd1280 362 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f 363 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 364 convert_typed_floating (writebuf, type, regval, regtype);
366f009f 365 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
366 }
367 return RETURN_VALUE_REGISTER_CONVENTION;
368 }
369 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
370 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
371 {
963e2bb7 372 if (readbuf)
e754ae69
AC
373 {
374 /* A long long, or a double stored in the 32 bit r3/r4. */
375 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 376 (bfd_byte *) readbuf + 0);
e754ae69 377 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
963e2bb7 378 (bfd_byte *) readbuf + 4);
e754ae69 379 }
963e2bb7 380 if (writebuf)
e754ae69
AC
381 {
382 /* A long long, or a double stored in the 32 bit r3/r4. */
383 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 384 (const bfd_byte *) writebuf + 0);
e754ae69 385 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
963e2bb7 386 (const bfd_byte *) writebuf + 4);
e754ae69
AC
387 }
388 return RETURN_VALUE_REGISTER_CONVENTION;
389 }
390 if (TYPE_CODE (type) == TYPE_CODE_INT
391 && TYPE_LENGTH (type) <= tdep->wordsize)
392 {
963e2bb7 393 if (readbuf)
e754ae69
AC
394 {
395 /* Some sort of integer stored in r3. Since TYPE isn't
396 bigger than the register, sign extension isn't a problem
397 - just do everything unsigned. */
398 ULONGEST regval;
399 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
400 &regval);
963e2bb7 401 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
e754ae69 402 }
963e2bb7 403 if (writebuf)
e754ae69
AC
404 {
405 /* Some sort of integer stored in r3. Use unpack_long since
406 that should handle any required sign extension. */
407 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 408 unpack_long (type, writebuf));
e754ae69
AC
409 }
410 return RETURN_VALUE_REGISTER_CONVENTION;
411 }
412 if (TYPE_LENGTH (type) == 16
413 && TYPE_CODE (type) == TYPE_CODE_ARRAY
414 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
415 {
963e2bb7 416 if (readbuf)
e754ae69
AC
417 {
418 /* Altivec places the return value in "v2". */
963e2bb7 419 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 420 }
963e2bb7 421 if (writebuf)
e754ae69
AC
422 {
423 /* Altivec places the return value in "v2". */
963e2bb7 424 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
425 }
426 return RETURN_VALUE_REGISTER_CONVENTION;
427 }
428 if (TYPE_LENGTH (type) == 8
429 && TYPE_CODE (type) == TYPE_CODE_ARRAY
430 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
431 {
432 /* The e500 ABI places return values for the 64-bit DSP types
433 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
434 corresponds to the entire r3 value for e500, whereas GDB's r3
435 only corresponds to the least significant 32-bits. So place
436 the 64-bit DSP type's value in ev3. */
963e2bb7
AC
437 if (readbuf)
438 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
439 if (writebuf)
440 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
441 return RETURN_VALUE_REGISTER_CONVENTION;
442 }
443 if (broken_gcc && TYPE_LENGTH (type) <= 8)
444 {
61bf9ae0
MK
445 /* GCC screwed up for structures or unions whose size is less
446 than or equal to 8 bytes.. Instead of left-aligning, it
447 right-aligns the data into the buffer formed by r3, r4. */
448 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
449 int len = TYPE_LENGTH (type);
450 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
451
963e2bb7 452 if (readbuf)
e754ae69 453 {
61bf9ae0
MK
454 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
455 regvals + 0 * tdep->wordsize);
456 if (len > tdep->wordsize)
457 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
458 regvals + 1 * tdep->wordsize);
459 memcpy (readbuf, regvals + offset, len);
e754ae69 460 }
963e2bb7 461 if (writebuf)
e754ae69 462 {
61bf9ae0
MK
463 memset (regvals, 0, sizeof regvals);
464 memcpy (regvals + offset, writebuf, len);
465 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
466 regvals + 0 * tdep->wordsize);
467 if (len > tdep->wordsize)
468 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
469 regvals + 1 * tdep->wordsize);
e754ae69 470 }
61bf9ae0 471
e754ae69
AC
472 return RETURN_VALUE_REGISTER_CONVENTION;
473 }
474 if (TYPE_LENGTH (type) <= 8)
475 {
963e2bb7 476 if (readbuf)
e754ae69
AC
477 {
478 /* This matches SVr4 PPC, it does not match GCC. */
479 /* The value is right-padded to 8 bytes and then loaded, as
480 two "words", into r3/r4. */
50fd1280 481 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
e754ae69
AC
482 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
483 regvals + 0 * tdep->wordsize);
484 if (TYPE_LENGTH (type) > tdep->wordsize)
485 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
486 regvals + 1 * tdep->wordsize);
963e2bb7 487 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 488 }
963e2bb7 489 if (writebuf)
e754ae69
AC
490 {
491 /* This matches SVr4 PPC, it does not match GCC. */
492 /* The value is padded out to 8 bytes and then loaded, as
493 two "words" into r3/r4. */
50fd1280 494 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
e754ae69 495 memset (regvals, 0, sizeof regvals);
963e2bb7 496 memcpy (regvals, writebuf, TYPE_LENGTH (type));
e754ae69
AC
497 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
498 regvals + 0 * tdep->wordsize);
499 if (TYPE_LENGTH (type) > tdep->wordsize)
500 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
501 regvals + 1 * tdep->wordsize);
502 }
503 return RETURN_VALUE_REGISTER_CONVENTION;
504 }
505 return RETURN_VALUE_STRUCT_CONVENTION;
506}
507
05580c65
AC
508enum return_value_convention
509ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
50fd1280
AC
510 struct regcache *regcache, gdb_byte *readbuf,
511 const gdb_byte *writebuf)
e754ae69 512{
963e2bb7
AC
513 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
514 writebuf, 0);
e754ae69
AC
515}
516
05580c65 517enum return_value_convention
963e2bb7
AC
518ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
519 struct type *valtype,
520 struct regcache *regcache,
50fd1280 521 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 522{
963e2bb7
AC
523 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
524 writebuf, 1);
944fcfab 525}
afd48b75 526
b6e1c027
AC
527/* The helper function for 64-bit SYSV push_dummy_call. Converts the
528 function's code address back into the function's descriptor
529 address.
530
531 Find a value for the TOC register. Every symbol should have both
532 ".FN" and "FN" in the minimal symbol table. "FN" points at the
533 FN's descriptor, while ".FN" points at the entry point (which
534 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
535 FN's descriptor address (while at the same time being careful to
536 find "FN" in the same object file as ".FN"). */
537
538static int
539convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
540{
541 struct obj_section *dot_fn_section;
542 struct minimal_symbol *dot_fn;
543 struct minimal_symbol *fn;
544 CORE_ADDR toc;
545 /* Find the minimal symbol that corresponds to CODE_ADDR (should
546 have a name of the form ".FN"). */
547 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
548 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
549 return 0;
550 /* Get the section that contains CODE_ADDR. Need this for the
551 "objfile" that it contains. */
552 dot_fn_section = find_pc_section (code_addr);
553 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
554 return 0;
555 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
556 address. Only look for the minimal symbol in ".FN"'s object file
557 - avoids problems when two object files (i.e., shared libraries)
558 contain a minimal symbol with the same name. */
559 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
560 dot_fn_section->objfile);
561 if (fn == NULL)
562 return 0;
563 /* Found a descriptor. */
564 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
565 return 1;
566}
567
8be9034a
AC
568/* Pass the arguments in either registers, or in the stack. Using the
569 ppc 64 bit SysV ABI.
570
571 This implements a dumbed down version of the ABI. It always writes
572 values to memory, GPR and FPR, even when not necessary. Doing this
573 greatly simplifies the logic. */
574
575CORE_ADDR
7d9b040b 576ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8be9034a
AC
577 struct regcache *regcache, CORE_ADDR bp_addr,
578 int nargs, struct value **args, CORE_ADDR sp,
579 int struct_return, CORE_ADDR struct_addr)
580{
7d9b040b 581 CORE_ADDR func_addr = find_function_addr (function, NULL);
8be9034a 582 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fb4443d8 583 ULONGEST back_chain;
8be9034a
AC
584 /* See for-loop comment below. */
585 int write_pass;
586 /* Size of the Altivec's vector parameter region, the final value is
587 computed in the for-loop below. */
588 LONGEST vparam_size = 0;
589 /* Size of the general parameter region, the final value is computed
590 in the for-loop below. */
591 LONGEST gparam_size = 0;
592 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
593 calls to align_up(), align_down(), etc. because this makes it
594 easier to reuse this code (in a copy/paste sense) in the future,
595 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
596 at some point makes it easier to verify that this function is
597 correct without having to do a non-local analysis to figure out
598 the possible values of tdep->wordsize. */
599 gdb_assert (tdep->wordsize == 8);
600
fb4443d8
UW
601 /* By this stage in the proceedings, SP has been decremented by "red
602 zone size" + "struct return size". Fetch the stack-pointer from
603 before this and use that as the BACK_CHAIN. */
604 regcache_cooked_read_unsigned (regcache, SP_REGNUM, &back_chain);
605
8be9034a
AC
606 /* Go through the argument list twice.
607
608 Pass 1: Compute the function call's stack space and register
609 requirements.
610
611 Pass 2: Replay the same computation but this time also write the
612 values out to the target. */
613
614 for (write_pass = 0; write_pass < 2; write_pass++)
615 {
616 int argno;
617 /* Next available floating point register for float and double
618 arguments. */
619 int freg = 1;
620 /* Next available general register for non-vector (but possibly
621 float) arguments. */
622 int greg = 3;
623 /* Next available vector register for vector arguments. */
624 int vreg = 2;
625 /* The address, at which the next general purpose parameter
626 (integer, struct, float, ...) should be saved. */
627 CORE_ADDR gparam;
628 /* Address, at which the next Altivec vector parameter should be
629 saved. */
630 CORE_ADDR vparam;
631
632 if (!write_pass)
633 {
634 /* During the first pass, GPARAM and VPARAM are more like
635 offsets (start address zero) than addresses. That way
636 the accumulate the total stack space each region
637 requires. */
638 gparam = 0;
639 vparam = 0;
640 }
641 else
642 {
643 /* Decrement the stack pointer making space for the Altivec
644 and general on-stack parameters. Set vparam and gparam
645 to their corresponding regions. */
646 vparam = align_down (sp - vparam_size, 16);
647 gparam = align_down (vparam - gparam_size, 16);
648 /* Add in space for the TOC, link editor double word,
649 compiler double word, LR save area, CR save area. */
650 sp = align_down (gparam - 48, 16);
651 }
652
653 /* If the function is returning a `struct', then there is an
654 extra hidden parameter (which will be passed in r3)
655 containing the address of that struct.. In that case we
656 should advance one word and start from r4 register to copy
657 parameters. This also consumes one on-stack parameter slot. */
658 if (struct_return)
659 {
660 if (write_pass)
661 regcache_cooked_write_signed (regcache,
662 tdep->ppc_gp0_regnum + greg,
663 struct_addr);
664 greg++;
665 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
666 }
667
668 for (argno = 0; argno < nargs; argno++)
669 {
670 struct value *arg = args[argno];
df407dfe 671 struct type *type = check_typedef (value_type (arg));
0fd88904 672 const bfd_byte *val = value_contents (arg);
8be9034a
AC
673 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
674 {
675 /* Floats and Doubles go in f1 .. f13. They also
676 consume a left aligned GREG,, and can end up in
677 memory. */
678 if (write_pass)
679 {
680 if (ppc_floating_point_unit_p (current_gdbarch)
681 && freg <= 13)
682 {
50fd1280 683 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f
JB
684 struct type *regtype
685 = register_type (gdbarch, tdep->ppc_fp0_regnum);
8be9034a 686 convert_typed_floating (val, type, regval, regtype);
366f009f
JB
687 regcache_cooked_write (regcache,
688 tdep->ppc_fp0_regnum + freg,
8be9034a
AC
689 regval);
690 }
691 if (greg <= 10)
692 {
693 /* The ABI states "Single precision floating
694 point values are mapped to the first word in
695 a single doubleword" and "... floating point
696 values mapped to the first eight doublewords
697 of the parameter save area are also passed in
698 general registers").
699
700 This code interprets that to mean: store it,
701 left aligned, in the general register. */
50fd1280 702 gdb_byte regval[MAX_REGISTER_SIZE];
8be9034a
AC
703 memset (regval, 0, sizeof regval);
704 memcpy (regval, val, TYPE_LENGTH (type));
705 regcache_cooked_write (regcache,
706 tdep->ppc_gp0_regnum + greg,
707 regval);
708 }
709 write_memory (gparam, val, TYPE_LENGTH (type));
710 }
711 /* Always consume parameter stack space. */
712 freg++;
713 greg++;
714 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
715 }
716 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
717 && TYPE_CODE (type) == TYPE_CODE_ARRAY
718 && tdep->ppc_vr0_regnum >= 0)
719 {
720 /* In the Altivec ABI, vectors go in the vector
721 registers v2 .. v13, or when that runs out, a vector
722 annex which goes above all the normal parameters.
723 NOTE: cagney/2003-09-21: This is a guess based on the
724 PowerOpen Altivec ABI. */
725 if (vreg <= 13)
726 {
727 if (write_pass)
728 regcache_cooked_write (regcache,
729 tdep->ppc_vr0_regnum + vreg, val);
730 vreg++;
731 }
732 else
733 {
734 if (write_pass)
735 write_memory (vparam, val, TYPE_LENGTH (type));
736 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
737 }
738 }
739 else if ((TYPE_CODE (type) == TYPE_CODE_INT
b6e1c027
AC
740 || TYPE_CODE (type) == TYPE_CODE_ENUM
741 || TYPE_CODE (type) == TYPE_CODE_PTR)
8be9034a
AC
742 && TYPE_LENGTH (type) <= 8)
743 {
b6e1c027
AC
744 /* Scalars and Pointers get sign[un]extended and go in
745 gpr3 .. gpr10. They can also end up in memory. */
8be9034a
AC
746 if (write_pass)
747 {
748 /* Sign extend the value, then store it unsigned. */
749 ULONGEST word = unpack_long (type, val);
b6e1c027
AC
750 /* Convert any function code addresses into
751 descriptors. */
752 if (TYPE_CODE (type) == TYPE_CODE_PTR
753 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
754 {
755 CORE_ADDR desc = word;
756 convert_code_addr_to_desc_addr (word, &desc);
757 word = desc;
758 }
8be9034a
AC
759 if (greg <= 10)
760 regcache_cooked_write_unsigned (regcache,
761 tdep->ppc_gp0_regnum +
762 greg, word);
763 write_memory_unsigned_integer (gparam, tdep->wordsize,
764 word);
765 }
766 greg++;
767 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
768 }
769 else
770 {
771 int byte;
772 for (byte = 0; byte < TYPE_LENGTH (type);
773 byte += tdep->wordsize)
774 {
775 if (write_pass && greg <= 10)
776 {
50fd1280 777 gdb_byte regval[MAX_REGISTER_SIZE];
8be9034a
AC
778 int len = TYPE_LENGTH (type) - byte;
779 if (len > tdep->wordsize)
780 len = tdep->wordsize;
781 memset (regval, 0, sizeof regval);
782 /* WARNING: cagney/2003-09-21: As best I can
783 tell, the ABI specifies that the value should
784 be left aligned. Unfortunately, GCC doesn't
785 do this - it instead right aligns even sized
786 values and puts odd sized values on the
787 stack. Work around that by putting both a
788 left and right aligned value into the
789 register (hopefully no one notices :-^).
790 Arrrgh! */
791 /* Left aligned (8 byte values such as pointers
792 fill the buffer). */
793 memcpy (regval, val + byte, len);
794 /* Right aligned (but only if even). */
795 if (len == 1 || len == 2 || len == 4)
796 memcpy (regval + tdep->wordsize - len,
797 val + byte, len);
798 regcache_cooked_write (regcache, greg, regval);
799 }
800 greg++;
801 }
802 if (write_pass)
803 /* WARNING: cagney/2003-09-21: Strictly speaking, this
804 isn't necessary, unfortunately, GCC appears to get
805 "struct convention" parameter passing wrong putting
806 odd sized structures in memory instead of in a
807 register. Work around this by always writing the
808 value to memory. Fortunately, doing this
809 simplifies the code. */
810 write_memory (gparam, val, TYPE_LENGTH (type));
b6e1c027
AC
811 if (write_pass)
812 /* WARNING: cagney/2004-06-20: It appears that GCC
813 likes to put structures containing a single
814 floating-point member in an FP register instead of
815 general general purpose. */
8be9034a
AC
816 /* Always consume parameter stack space. */
817 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
818 }
819 }
820
821 if (!write_pass)
822 {
823 /* Save the true region sizes ready for the second pass. */
824 vparam_size = vparam;
825 /* Make certain that the general parameter save area is at
826 least the minimum 8 registers (or doublewords) in size. */
827 if (greg < 8)
828 gparam_size = 8 * tdep->wordsize;
829 else
830 gparam_size = gparam;
831 }
832 }
833
834 /* Update %sp. */
835 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
836
837 /* Write the backchain (it occupies WORDSIZED bytes). */
838 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
839
840 /* Point the inferior function call's return address at the dummy's
841 breakpoint. */
842 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
843
b6e1c027
AC
844 /* Use the func_addr to find the descriptor, and use that to find
845 the TOC. */
8be9034a 846 {
b6e1c027
AC
847 CORE_ADDR desc_addr;
848 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
8be9034a 849 {
b6e1c027
AC
850 /* The TOC is the second double word in the descriptor. */
851 CORE_ADDR toc =
852 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
853 tdep->wordsize);
854 regcache_cooked_write_unsigned (regcache,
855 tdep->ppc_gp0_regnum + 2, toc);
8be9034a
AC
856 }
857 }
858
859 return sp;
860}
861
afd48b75
AC
862
863/* The 64 bit ABI retun value convention.
864
865 Return non-zero if the return-value is stored in a register, return
866 0 if the return-value is instead stored on the stack (a.k.a.,
867 struct return convention).
868
963e2bb7 869 For a return-value stored in a register: when WRITEBUF is non-NULL,
afd48b75 870 copy the buffer to the corresponding register return-value location
963e2bb7 871 location; when READBUF is non-NULL, fill the buffer from the
afd48b75 872 corresponding register return-value location. */
05580c65
AC
873enum return_value_convention
874ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
50fd1280
AC
875 struct regcache *regcache, gdb_byte *readbuf,
876 const gdb_byte *writebuf)
afd48b75 877{
05580c65 878 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152
JB
879
880 /* This function exists to support a calling convention that
881 requires floating-point registers. It shouldn't be used on
882 processors that lack them. */
883 gdb_assert (ppc_floating_point_unit_p (gdbarch));
884
afd48b75 885 /* Floats and doubles in F1. */
944fcfab 886 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
afd48b75 887 {
50fd1280 888 gdb_byte regval[MAX_REGISTER_SIZE];
366f009f 889 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 890 if (writebuf != NULL)
afd48b75 891 {
963e2bb7 892 convert_typed_floating (writebuf, valtype, regval, regtype);
366f009f 893 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
afd48b75 894 }
963e2bb7 895 if (readbuf != NULL)
afd48b75 896 {
366f009f 897 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
963e2bb7 898 convert_typed_floating (regval, regtype, readbuf, valtype);
afd48b75
AC
899 }
900 return RETURN_VALUE_REGISTER_CONVENTION;
901 }
3d8476bc 902 /* Integers in r3. */
b6e1c027
AC
903 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
904 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
905 && TYPE_LENGTH (valtype) <= 8)
afd48b75 906 {
963e2bb7 907 if (writebuf != NULL)
afd48b75
AC
908 {
909 /* Be careful to sign extend the value. */
910 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 911 unpack_long (valtype, writebuf));
afd48b75 912 }
963e2bb7 913 if (readbuf != NULL)
afd48b75
AC
914 {
915 /* Extract the integer from r3. Since this is truncating the
916 value, there isn't a sign extension problem. */
917 ULONGEST regval;
918 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
919 &regval);
963e2bb7 920 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
afd48b75
AC
921 }
922 return RETURN_VALUE_REGISTER_CONVENTION;
923 }
924 /* All pointers live in r3. */
925 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
926 {
927 /* All pointers live in r3. */
963e2bb7
AC
928 if (writebuf != NULL)
929 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
930 if (readbuf != NULL)
931 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
afd48b75
AC
932 return RETURN_VALUE_REGISTER_CONVENTION;
933 }
3d8476bc
PG
934 /* Array type has more than one use. */
935 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
afd48b75
AC
936 {
937 /* Small character arrays are returned, right justified, in r3. */
3d8476bc
PG
938 if (TYPE_LENGTH (valtype) <= 8
939 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
940 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
941 {
942 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
943 - TYPE_LENGTH (valtype));
944 if (writebuf != NULL)
945 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
946 offset, TYPE_LENGTH (valtype), writebuf);
947 if (readbuf != NULL)
948 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
949 offset, TYPE_LENGTH (valtype), readbuf);
950 return RETURN_VALUE_REGISTER_CONVENTION;
951 }
952 /* A VMX vector is returned in v2. */
953 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
954 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
955 {
956 if (readbuf)
957 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
958 if (writebuf)
959 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
960 return RETURN_VALUE_REGISTER_CONVENTION;
961 }
afd48b75
AC
962 }
963 /* Big floating point values get stored in adjacent floating
3d8476bc 964 point registers, starting with F1. */
afd48b75 965 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
944fcfab 966 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
afd48b75 967 {
963e2bb7 968 if (writebuf || readbuf != NULL)
afd48b75
AC
969 {
970 int i;
971 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
972 {
963e2bb7 973 if (writebuf != NULL)
366f009f 974 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7
AC
975 (const bfd_byte *) writebuf + i * 8);
976 if (readbuf != NULL)
366f009f 977 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7 978 (bfd_byte *) readbuf + i * 8);
afd48b75
AC
979 }
980 }
981 return RETURN_VALUE_REGISTER_CONVENTION;
982 }
983 /* Complex values get returned in f1:f2, need to convert. */
984 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
985 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
986 {
987 if (regcache != NULL)
988 {
989 int i;
990 for (i = 0; i < 2; i++)
991 {
50fd1280 992 gdb_byte regval[MAX_REGISTER_SIZE];
944fcfab 993 struct type *regtype =
366f009f 994 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
963e2bb7 995 if (writebuf != NULL)
afd48b75 996 {
963e2bb7 997 convert_typed_floating ((const bfd_byte *) writebuf +
944fcfab 998 i * (TYPE_LENGTH (valtype) / 2),
afd48b75 999 valtype, regval, regtype);
366f009f
JB
1000 regcache_cooked_write (regcache,
1001 tdep->ppc_fp0_regnum + 1 + i,
944fcfab 1002 regval);
afd48b75 1003 }
963e2bb7 1004 if (readbuf != NULL)
afd48b75 1005 {
366f009f
JB
1006 regcache_cooked_read (regcache,
1007 tdep->ppc_fp0_regnum + 1 + i,
1008 regval);
afd48b75 1009 convert_typed_floating (regval, regtype,
963e2bb7 1010 (bfd_byte *) readbuf +
944fcfab 1011 i * (TYPE_LENGTH (valtype) / 2),
afd48b75
AC
1012 valtype);
1013 }
1014 }
1015 }
1016 return RETURN_VALUE_REGISTER_CONVENTION;
1017 }
1018 /* Big complex values get stored in f1:f4. */
944fcfab 1019 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
afd48b75
AC
1020 {
1021 if (regcache != NULL)
1022 {
1023 int i;
1024 for (i = 0; i < 4; i++)
1025 {
963e2bb7 1026 if (writebuf != NULL)
366f009f 1027 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7
AC
1028 (const bfd_byte *) writebuf + i * 8);
1029 if (readbuf != NULL)
366f009f 1030 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
963e2bb7 1031 (bfd_byte *) readbuf + i * 8);
afd48b75
AC
1032 }
1033 }
1034 return RETURN_VALUE_REGISTER_CONVENTION;
1035 }
1036 return RETURN_VALUE_STRUCT_CONVENTION;
1037}
1038
6066c3de
AC
1039CORE_ADDR
1040ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1041 CORE_ADDR bpaddr)
1042{
1043 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1044 a function-descriptor while the corresponding minimal-symbol
1045 ".FN" should point at the entry point. Consequently, a command
1046 like "break FN" applied to an object file with only minimal
1047 symbols, will insert the breakpoint into the descriptor at "FN"
1048 and not the function at ".FN". Avoid this confusion by adjusting
1049 any attempt to set a descriptor breakpoint into a corresponding
1050 function breakpoint. Note that GDB warns the user when this
1051 adjustment is applied - that's ok as otherwise the user will have
1052 no way of knowing why their breakpoint at "FN" resulted in the
1053 program stopping at ".FN". */
1054 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1055}
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