Remove regcache_cooked_read
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
CommitLineData
7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
e2882c85 4 Copyright (C) 2000-2018 Free Software Foundation, Inc.
7b112f9c
JT
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
7b112f9c
JT
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
7b112f9c
JT
20
21#include "defs.h"
22#include "gdbcore.h"
23#include "inferior.h"
24#include "regcache.h"
25#include "value.h"
7b112f9c 26#include "ppc-tdep.h"
6066c3de 27#include "target.h"
0a90bcdd 28#include "objfiles.h"
7d9b040b 29#include "infcall.h"
54fcddd0 30#include "dwarf2.h"
3b2ca824 31#include "target-float.h"
325fac50 32#include <algorithm>
7b112f9c 33
88aed45e
UW
34
35/* Check whether FTPYE is a (pointer to) function type that should use
36 the OpenCL vector ABI. */
37
38static int
39ppc_sysv_use_opencl_abi (struct type *ftype)
40{
41 ftype = check_typedef (ftype);
42
43 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
44 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
45
46 return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
47 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
48}
49
0df8b418 50/* Pass the arguments in either registers, or in the stack. Using the
7b112f9c
JT
51 ppc sysv ABI, the first eight words of the argument list (that might
52 be less than eight parameters if some parameters occupy more than one
53 word) are passed in r3..r10 registers. float and double parameters are
0df8b418
MS
54 passed in fpr's, in addition to that. Rest of the parameters if any
55 are passed in user stack.
7b112f9c
JT
56
57 If the function is returning a structure, then the return address is passed
58 in r3, then the first 7 words of the parametes can be passed in registers,
0df8b418 59 starting from r4. */
7b112f9c
JT
60
61CORE_ADDR
7d9b040b 62ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
63 struct regcache *regcache, CORE_ADDR bp_addr,
64 int nargs, struct value **args, CORE_ADDR sp,
65 int struct_return, CORE_ADDR struct_addr)
7b112f9c 66{
40a6adc1 67 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 68 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 69 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 70 ULONGEST saved_sp;
68856ea3
AC
71 int argspace = 0; /* 0 is an initial wrong guess. */
72 int write_pass;
7b112f9c 73
b14d30e1
JM
74 gdb_assert (tdep->wordsize == 4);
75
40a6adc1 76 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 77 &saved_sp);
fb4443d8 78
68856ea3 79 /* Go through the argument list twice.
7b112f9c 80
68856ea3
AC
81 Pass 1: Figure out how much new stack space is required for
82 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
83 ABI doesn't reserve any extra space for parameters which are put
84 in registers, but does always push structures and then pass their
85 address.
7a41266b 86
68856ea3
AC
87 Pass 2: Replay the same computation but this time also write the
88 values out to the target. */
7b112f9c 89
68856ea3
AC
90 for (write_pass = 0; write_pass < 2; write_pass++)
91 {
92 int argno;
93 /* Next available floating point register for float and double
94 arguments. */
95 int freg = 1;
96 /* Next available general register for non-float, non-vector
97 arguments. */
98 int greg = 3;
99 /* Next available vector register for vector arguments. */
100 int vreg = 2;
101 /* Arguments start above the "LR save word" and "Back chain". */
102 int argoffset = 2 * tdep->wordsize;
103 /* Structures start after the arguments. */
104 int structoffset = argoffset + argspace;
105
106 /* If the function is returning a `struct', then the first word
944fcfab
AC
107 (which will be passed in r3) is used for struct return
108 address. In that case we should advance one word and start
109 from r4 register to copy parameters. */
68856ea3 110 if (struct_return)
7b112f9c 111 {
68856ea3
AC
112 if (write_pass)
113 regcache_cooked_write_signed (regcache,
114 tdep->ppc_gp0_regnum + greg,
115 struct_addr);
116 greg++;
7b112f9c 117 }
68856ea3
AC
118
119 for (argno = 0; argno < nargs; argno++)
7b112f9c 120 {
68856ea3 121 struct value *arg = args[argno];
df407dfe 122 struct type *type = check_typedef (value_type (arg));
68856ea3 123 int len = TYPE_LENGTH (type);
0fd88904 124 const bfd_byte *val = value_contents (arg);
68856ea3 125
55eddb0f
DJ
126 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
127 && !tdep->soft_float)
7b112f9c 128 {
68856ea3 129 /* Floating point value converted to "double" then
944fcfab
AC
130 passed in an FP register, when the registers run out,
131 8 byte aligned stack is used. */
68856ea3
AC
132 if (freg <= 8)
133 {
134 if (write_pass)
135 {
136 /* Always store the floating point value using
944fcfab 137 the register's floating-point format. */
0f068fb5 138 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
68856ea3 139 struct type *regtype
366f009f 140 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
3b2ca824 141 target_float_convert (val, type, regval, regtype);
366f009f
JB
142 regcache_cooked_write (regcache,
143 tdep->ppc_fp0_regnum + freg,
68856ea3
AC
144 regval);
145 }
146 freg++;
147 }
7b112f9c
JT
148 else
149 {
f964a756
MK
150 /* The SysV ABI tells us to convert floats to
151 doubles before writing them to an 8 byte aligned
152 stack location. Unfortunately GCC does not do
153 that, and stores floats into 4 byte aligned
154 locations without converting them to doubles.
155 Since there is no know compiler that actually
156 follows the ABI here, we implement the GCC
157 convention. */
158
159 /* Align to 4 bytes or 8 bytes depending on the type of
160 the argument (float or double). */
161 argoffset = align_up (argoffset, len);
68856ea3 162 if (write_pass)
68856ea3 163 write_memory (sp + argoffset, val, len);
f964a756 164 argoffset += len;
7b112f9c
JT
165 }
166 }
b14d30e1
JM
167 else if (TYPE_CODE (type) == TYPE_CODE_FLT
168 && len == 16
169 && !tdep->soft_float
40a6adc1 170 && (gdbarch_long_double_format (gdbarch)
b14d30e1
JM
171 == floatformats_ibm_long_double))
172 {
173 /* IBM long double passed in two FP registers if
174 available, otherwise 8-byte aligned stack. */
175 if (freg <= 7)
176 {
177 if (write_pass)
178 {
179 regcache_cooked_write (regcache,
180 tdep->ppc_fp0_regnum + freg,
181 val);
182 regcache_cooked_write (regcache,
183 tdep->ppc_fp0_regnum + freg + 1,
184 val + 8);
185 }
186 freg += 2;
187 }
188 else
189 {
190 argoffset = align_up (argoffset, 8);
191 if (write_pass)
192 write_memory (sp + argoffset, val, len);
193 argoffset += 16;
194 }
195 }
55eddb0f
DJ
196 else if (len == 8
197 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
00fbcec4
JM
198 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
199 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
200 && tdep->soft_float)))
7b112f9c 201 {
00fbcec4
JM
202 /* "long long" or soft-float "double" or "_Decimal64"
203 passed in an odd/even register pair with the low
204 addressed word in the odd register and the high
205 addressed word in the even register, or when the
206 registers run out an 8 byte aligned stack
207 location. */
68856ea3
AC
208 if (greg > 9)
209 {
210 /* Just in case GREG was 10. */
211 greg = 11;
212 argoffset = align_up (argoffset, 8);
213 if (write_pass)
214 write_memory (sp + argoffset, val, len);
215 argoffset += 8;
216 }
68856ea3
AC
217 else
218 {
219 /* Must start on an odd register - r3/r4 etc. */
220 if ((greg & 1) == 0)
221 greg++;
222 if (write_pass)
223 {
224 regcache_cooked_write (regcache,
225 tdep->ppc_gp0_regnum + greg + 0,
226 val + 0);
227 regcache_cooked_write (regcache,
228 tdep->ppc_gp0_regnum + greg + 1,
229 val + 4);
230 }
231 greg += 2;
232 }
7b112f9c 233 }
00fbcec4
JM
234 else if (len == 16
235 && ((TYPE_CODE (type) == TYPE_CODE_FLT
236 && (gdbarch_long_double_format (gdbarch)
237 == floatformats_ibm_long_double))
238 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
239 && tdep->soft_float)))
b14d30e1 240 {
00fbcec4
JM
241 /* Soft-float IBM long double or _Decimal128 passed in
242 four consecutive registers, or on the stack. The
243 registers are not necessarily odd/even pairs. */
b14d30e1
JM
244 if (greg > 7)
245 {
246 greg = 11;
247 argoffset = align_up (argoffset, 8);
248 if (write_pass)
249 write_memory (sp + argoffset, val, len);
250 argoffset += 16;
251 }
252 else
253 {
254 if (write_pass)
255 {
256 regcache_cooked_write (regcache,
257 tdep->ppc_gp0_regnum + greg + 0,
258 val + 0);
259 regcache_cooked_write (regcache,
260 tdep->ppc_gp0_regnum + greg + 1,
261 val + 4);
262 regcache_cooked_write (regcache,
263 tdep->ppc_gp0_regnum + greg + 2,
264 val + 8);
265 regcache_cooked_write (regcache,
266 tdep->ppc_gp0_regnum + greg + 3,
267 val + 12);
268 }
269 greg += 4;
270 }
271 }
1300a2f4
TJB
272 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
273 && !tdep->soft_float)
274 {
275 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
276 end up in memory. */
277
278 if (freg <= 8)
279 {
280 if (write_pass)
281 {
0f068fb5 282 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
283 const gdb_byte *p;
284
285 /* 32-bit decimal floats are right aligned in the
286 doubleword. */
287 if (TYPE_LENGTH (type) == 4)
288 {
289 memcpy (regval + 4, val, 4);
290 p = regval;
291 }
292 else
293 p = val;
294
295 regcache_cooked_write (regcache,
296 tdep->ppc_fp0_regnum + freg, p);
297 }
298
299 freg++;
300 }
301 else
302 {
303 argoffset = align_up (argoffset, len);
304
305 if (write_pass)
306 /* Write value in the stack's parameter save area. */
307 write_memory (sp + argoffset, val, len);
308
309 argoffset += len;
310 }
311 }
312 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
313 && !tdep->soft_float)
314 {
315 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
316 pairs. They can end up in memory, using two doublewords. */
317
318 if (freg <= 6)
319 {
320 /* Make sure freg is even. */
321 freg += freg & 1;
322
323 if (write_pass)
324 {
325 regcache_cooked_write (regcache,
326 tdep->ppc_fp0_regnum + freg, val);
327 regcache_cooked_write (regcache,
328 tdep->ppc_fp0_regnum + freg + 1, val + 8);
329 }
330 }
331 else
332 {
333 argoffset = align_up (argoffset, 8);
334
335 if (write_pass)
336 write_memory (sp + argoffset, val, 16);
337
338 argoffset += 16;
339 }
340
341 /* If a 128-bit decimal float goes to the stack because only f7
342 and f8 are free (thus there's no even/odd register pair
343 available), these registers should be marked as occupied.
344 Hence we increase freg even when writing to memory. */
345 freg += 2;
346 }
54fcddd0
UW
347 else if (len < 16
348 && TYPE_CODE (type) == TYPE_CODE_ARRAY
349 && TYPE_VECTOR (type)
350 && opencl_abi)
351 {
352 /* OpenCL vectors shorter than 16 bytes are passed as if
353 a series of independent scalars. */
354 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
355 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
356
357 for (i = 0; i < nelt; i++)
358 {
359 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
360
361 if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
362 {
363 if (freg <= 8)
364 {
365 if (write_pass)
366 {
367 int regnum = tdep->ppc_fp0_regnum + freg;
0f068fb5 368 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
369 struct type *regtype
370 = register_type (gdbarch, regnum);
3b2ca824
UW
371 target_float_convert (elval, eltype,
372 regval, regtype);
54fcddd0
UW
373 regcache_cooked_write (regcache, regnum, regval);
374 }
375 freg++;
376 }
377 else
378 {
379 argoffset = align_up (argoffset, len);
380 if (write_pass)
381 write_memory (sp + argoffset, val, len);
382 argoffset += len;
383 }
384 }
385 else if (TYPE_LENGTH (eltype) == 8)
386 {
387 if (greg > 9)
388 {
389 /* Just in case GREG was 10. */
390 greg = 11;
391 argoffset = align_up (argoffset, 8);
392 if (write_pass)
393 write_memory (sp + argoffset, elval,
394 TYPE_LENGTH (eltype));
395 argoffset += 8;
396 }
397 else
398 {
399 /* Must start on an odd register - r3/r4 etc. */
400 if ((greg & 1) == 0)
401 greg++;
402 if (write_pass)
403 {
404 int regnum = tdep->ppc_gp0_regnum + greg;
405 regcache_cooked_write (regcache,
406 regnum + 0, elval + 0);
407 regcache_cooked_write (regcache,
408 regnum + 1, elval + 4);
409 }
410 greg += 2;
411 }
412 }
413 else
414 {
0f068fb5 415 gdb_byte word[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
416 store_unsigned_integer (word, tdep->wordsize, byte_order,
417 unpack_long (eltype, elval));
418
419 if (greg <= 10)
420 {
421 if (write_pass)
422 regcache_cooked_write (regcache,
423 tdep->ppc_gp0_regnum + greg,
424 word);
425 greg++;
426 }
427 else
428 {
429 argoffset = align_up (argoffset, tdep->wordsize);
430 if (write_pass)
431 write_memory (sp + argoffset, word, tdep->wordsize);
432 argoffset += tdep->wordsize;
433 }
434 }
435 }
436 }
437 else if (len >= 16
438 && TYPE_CODE (type) == TYPE_CODE_ARRAY
439 && TYPE_VECTOR (type)
440 && opencl_abi)
441 {
442 /* OpenCL vectors 16 bytes or longer are passed as if
443 a series of AltiVec vectors. */
444 int i;
445
446 for (i = 0; i < len / 16; i++)
447 {
448 const gdb_byte *elval = val + i * 16;
449
450 if (vreg <= 13)
451 {
452 if (write_pass)
453 regcache_cooked_write (regcache,
454 tdep->ppc_vr0_regnum + vreg,
455 elval);
456 vreg++;
457 }
458 else
459 {
460 argoffset = align_up (argoffset, 16);
461 if (write_pass)
462 write_memory (sp + argoffset, elval, 16);
463 argoffset += 16;
464 }
465 }
466 }
68856ea3
AC
467 else if (len == 16
468 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
469 && TYPE_VECTOR (type)
470 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
7b112f9c 471 {
68856ea3 472 /* Vector parameter passed in an Altivec register, or
944fcfab 473 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
474 if (vreg <= 13)
475 {
68856ea3 476 if (write_pass)
9c9acae0 477 regcache_cooked_write (regcache,
944fcfab 478 tdep->ppc_vr0_regnum + vreg, val);
7b112f9c
JT
479 vreg++;
480 }
481 else
482 {
68856ea3
AC
483 argoffset = align_up (argoffset, 16);
484 if (write_pass)
485 write_memory (sp + argoffset, val, 16);
7b112f9c
JT
486 argoffset += 16;
487 }
488 }
944fcfab 489 else if (len == 8
0a613259 490 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
491 && TYPE_VECTOR (type)
492 && tdep->vector_abi == POWERPC_VEC_SPE)
944fcfab 493 {
68856ea3 494 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
495 that runs out, 8 byte aligned stack location. Note
496 that since e500 vector and general purpose registers
497 both map onto the same underlying register set, a
498 "greg" and not a "vreg" is consumed here. A cooked
499 write stores the value in the correct locations
500 within the raw register cache. */
501 if (greg <= 10)
502 {
68856ea3 503 if (write_pass)
9c9acae0 504 regcache_cooked_write (regcache,
944fcfab
AC
505 tdep->ppc_ev0_regnum + greg, val);
506 greg++;
507 }
508 else
509 {
68856ea3
AC
510 argoffset = align_up (argoffset, 8);
511 if (write_pass)
512 write_memory (sp + argoffset, val, 8);
944fcfab
AC
513 argoffset += 8;
514 }
515 }
68856ea3
AC
516 else
517 {
518 /* Reduce the parameter down to something that fits in a
944fcfab 519 "word". */
0f068fb5
AH
520 gdb_byte word[PPC_MAX_REGISTER_SIZE];
521 memset (word, 0, PPC_MAX_REGISTER_SIZE);
68856ea3
AC
522 if (len > tdep->wordsize
523 || TYPE_CODE (type) == TYPE_CODE_STRUCT
524 || TYPE_CODE (type) == TYPE_CODE_UNION)
525 {
55eddb0f 526 /* Structs and large values are put in an
0df8b418 527 aligned stack slot ... */
55eddb0f
DJ
528 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
529 && TYPE_VECTOR (type)
530 && len >= 16)
531 structoffset = align_up (structoffset, 16);
532 else
533 structoffset = align_up (structoffset, 8);
534
68856ea3
AC
535 if (write_pass)
536 write_memory (sp + structoffset, val, len);
537 /* ... and then a "word" pointing to that address is
944fcfab 538 passed as the parameter. */
e17a4113 539 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
540 sp + structoffset);
541 structoffset += len;
542 }
543 else if (TYPE_CODE (type) == TYPE_CODE_INT)
544 /* Sign or zero extend the "int" into a "word". */
e17a4113 545 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
546 unpack_long (type, val));
547 else
548 /* Always goes in the low address. */
549 memcpy (word, val, len);
550 /* Store that "word" in a register, or on the stack.
944fcfab 551 The words have "4" byte alignment. */
68856ea3
AC
552 if (greg <= 10)
553 {
554 if (write_pass)
555 regcache_cooked_write (regcache,
944fcfab 556 tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
557 greg++;
558 }
559 else
560 {
561 argoffset = align_up (argoffset, tdep->wordsize);
562 if (write_pass)
563 write_memory (sp + argoffset, word, tdep->wordsize);
564 argoffset += tdep->wordsize;
565 }
566 }
567 }
568
569 /* Compute the actual stack space requirements. */
570 if (!write_pass)
571 {
572 /* Remember the amount of space needed by the arguments. */
573 argspace = argoffset;
574 /* Allocate space for both the arguments and the structures. */
575 sp -= (argoffset + structoffset);
576 /* Ensure that the stack is still 16 byte aligned. */
577 sp = align_down (sp, 16);
578 }
65ada037
MK
579
580 /* The psABI says that "A caller of a function that takes a
581 variable argument list shall set condition register bit 6 to
582 1 if it passes one or more arguments in the floating-point
0df8b418 583 registers. It is strongly recommended that the caller set the
65ada037
MK
584 bit to 0 otherwise..." Doing this for normal functions too
585 shouldn't hurt. */
586 if (write_pass)
587 {
588 ULONGEST cr;
589
590 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
591 if (freg > 1)
592 cr |= 0x02000000;
593 else
594 cr &= ~0x02000000;
595 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
596 }
7b112f9c
JT
597 }
598
68856ea3 599 /* Update %sp. */
40a6adc1 600 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
68856ea3
AC
601
602 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 603 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
68856ea3 604
e56a0ecc
AC
605 /* Point the inferior function call's return address at the dummy's
606 breakpoint. */
68856ea3 607 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 608
7b112f9c
JT
609 return sp;
610}
611
e765b44c 612/* Handle the return-value conventions for Decimal Floating Point values. */
f486487f 613static enum return_value_convention
1300a2f4
TJB
614get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
615 struct regcache *regcache, gdb_byte *readbuf,
616 const gdb_byte *writebuf)
617{
618 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
619
620 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
621
622 /* 32-bit and 64-bit decimal floats in f1. */
623 if (TYPE_LENGTH (valtype) <= 8)
624 {
625 if (writebuf != NULL)
626 {
0f068fb5 627 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
628 const gdb_byte *p;
629
630 /* 32-bit decimal float is right aligned in the doubleword. */
631 if (TYPE_LENGTH (valtype) == 4)
632 {
633 memcpy (regval + 4, writebuf, 4);
634 p = regval;
635 }
636 else
637 p = writebuf;
638
639 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
640 }
641 if (readbuf != NULL)
642 {
dca08e1f 643 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
1300a2f4
TJB
644
645 /* Left align 32-bit decimal float. */
646 if (TYPE_LENGTH (valtype) == 4)
647 memcpy (readbuf, readbuf + 4, 4);
648 }
649 }
650 /* 128-bit decimal floats in f2,f3. */
651 else if (TYPE_LENGTH (valtype) == 16)
652 {
653 if (writebuf != NULL || readbuf != NULL)
654 {
655 int i;
656
657 for (i = 0; i < 2; i++)
658 {
659 if (writebuf != NULL)
660 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
661 writebuf + i * 8);
662 if (readbuf != NULL)
dca08e1f
SM
663 regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i,
664 readbuf + i * 8);
1300a2f4
TJB
665 }
666 }
667 }
668 else
669 /* Can't happen. */
9b20d036 670 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
1300a2f4
TJB
671
672 return RETURN_VALUE_REGISTER_CONVENTION;
673}
674
e754ae69
AC
675/* Handle the return-value conventions specified by the SysV 32-bit
676 PowerPC ABI (including all the supplements):
677
678 no floating-point: floating-point values returned using 32-bit
679 general-purpose registers.
680
681 Altivec: 128-bit vectors returned using vector registers.
682
683 e500: 64-bit vectors returned using the full full 64 bit EV
684 register, floating-point values returned using 32-bit
685 general-purpose registers.
686
687 GCC (broken): Small struct values right (instead of left) aligned
688 when returned in general-purpose registers. */
689
690static enum return_value_convention
54fcddd0
UW
691do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
692 struct type *type, struct regcache *regcache,
693 gdb_byte *readbuf, const gdb_byte *writebuf,
694 int broken_gcc)
e754ae69 695{
05580c65 696 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 697 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 698 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
54fcddd0 699
e754ae69 700 gdb_assert (tdep->wordsize == 4);
54fcddd0 701
e754ae69
AC
702 if (TYPE_CODE (type) == TYPE_CODE_FLT
703 && TYPE_LENGTH (type) <= 8
55eddb0f 704 && !tdep->soft_float)
e754ae69 705 {
963e2bb7 706 if (readbuf)
e754ae69
AC
707 {
708 /* Floats and doubles stored in "f1". Convert the value to
709 the required type. */
0f068fb5 710 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f
JB
711 struct type *regtype = register_type (gdbarch,
712 tdep->ppc_fp0_regnum + 1);
dca08e1f 713 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval);
3b2ca824 714 target_float_convert (regval, regtype, readbuf, type);
e754ae69 715 }
963e2bb7 716 if (writebuf)
e754ae69
AC
717 {
718 /* Floats and doubles stored in "f1". Convert the value to
719 the register's "double" type. */
0f068fb5 720 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f 721 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
3b2ca824 722 target_float_convert (writebuf, type, regval, regtype);
366f009f 723 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
724 }
725 return RETURN_VALUE_REGISTER_CONVENTION;
726 }
b14d30e1
JM
727 if (TYPE_CODE (type) == TYPE_CODE_FLT
728 && TYPE_LENGTH (type) == 16
729 && !tdep->soft_float
0df8b418
MS
730 && (gdbarch_long_double_format (gdbarch)
731 == floatformats_ibm_long_double))
b14d30e1
JM
732 {
733 /* IBM long double stored in f1 and f2. */
734 if (readbuf)
735 {
dca08e1f
SM
736 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
737 regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8);
b14d30e1
JM
738 }
739 if (writebuf)
740 {
741 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
742 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
743 writebuf + 8);
744 }
745 return RETURN_VALUE_REGISTER_CONVENTION;
746 }
00fbcec4
JM
747 if (TYPE_LENGTH (type) == 16
748 && ((TYPE_CODE (type) == TYPE_CODE_FLT
0df8b418
MS
749 && (gdbarch_long_double_format (gdbarch)
750 == floatformats_ibm_long_double))
00fbcec4 751 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
b14d30e1 752 {
00fbcec4
JM
753 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
754 r5, r6. */
b14d30e1
JM
755 if (readbuf)
756 {
dca08e1f
SM
757 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf);
758 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
759 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
760 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
b14d30e1
JM
761 }
762 if (writebuf)
763 {
764 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
765 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
766 writebuf + 4);
767 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
768 writebuf + 8);
769 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
770 writebuf + 12);
771 }
772 return RETURN_VALUE_REGISTER_CONVENTION;
773 }
e754ae69 774 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
00fbcec4
JM
775 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
776 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
777 && tdep->soft_float))
e754ae69 778 {
963e2bb7 779 if (readbuf)
e754ae69 780 {
00fbcec4
JM
781 /* A long long, double or _Decimal64 stored in the 32 bit
782 r3/r4. */
dca08e1f
SM
783 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
784 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
e754ae69 785 }
963e2bb7 786 if (writebuf)
e754ae69 787 {
00fbcec4
JM
788 /* A long long, double or _Decimal64 stored in the 32 bit
789 r3/r4. */
e754ae69 790 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
55eddb0f 791 writebuf + 0);
e754ae69 792 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
55eddb0f 793 writebuf + 4);
e754ae69
AC
794 }
795 return RETURN_VALUE_REGISTER_CONVENTION;
796 }
1300a2f4
TJB
797 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
798 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
799 writebuf);
f0027ce2
DJ
800 else if ((TYPE_CODE (type) == TYPE_CODE_INT
801 || TYPE_CODE (type) == TYPE_CODE_CHAR
802 || TYPE_CODE (type) == TYPE_CODE_BOOL
803 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 804 || TYPE_IS_REFERENCE (type)
f0027ce2
DJ
805 || TYPE_CODE (type) == TYPE_CODE_ENUM)
806 && TYPE_LENGTH (type) <= tdep->wordsize)
e754ae69 807 {
963e2bb7 808 if (readbuf)
e754ae69
AC
809 {
810 /* Some sort of integer stored in r3. Since TYPE isn't
811 bigger than the register, sign extension isn't a problem
812 - just do everything unsigned. */
813 ULONGEST regval;
814 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
815 &regval);
e17a4113
UW
816 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
817 regval);
e754ae69 818 }
963e2bb7 819 if (writebuf)
e754ae69
AC
820 {
821 /* Some sort of integer stored in r3. Use unpack_long since
822 that should handle any required sign extension. */
823 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 824 unpack_long (type, writebuf));
e754ae69
AC
825 }
826 return RETURN_VALUE_REGISTER_CONVENTION;
827 }
54fcddd0
UW
828 /* OpenCL vectors < 16 bytes are returned as distinct
829 scalars in f1..f2 or r3..r10. */
830 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
831 && TYPE_VECTOR (type)
832 && TYPE_LENGTH (type) < 16
833 && opencl_abi)
834 {
835 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
836 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
837
838 for (i = 0; i < nelt; i++)
839 {
840 int offset = i * TYPE_LENGTH (eltype);
841
842 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
843 {
844 int regnum = tdep->ppc_fp0_regnum + 1 + i;
0f068fb5 845 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
846 struct type *regtype = register_type (gdbarch, regnum);
847
848 if (writebuf != NULL)
849 {
3b2ca824
UW
850 target_float_convert (writebuf + offset, eltype,
851 regval, regtype);
54fcddd0
UW
852 regcache_cooked_write (regcache, regnum, regval);
853 }
854 if (readbuf != NULL)
855 {
dca08e1f 856 regcache->cooked_read (regnum, regval);
3b2ca824
UW
857 target_float_convert (regval, regtype,
858 readbuf + offset, eltype);
54fcddd0
UW
859 }
860 }
861 else
862 {
863 int regnum = tdep->ppc_gp0_regnum + 3 + i;
864 ULONGEST regval;
865
866 if (writebuf != NULL)
867 {
868 regval = unpack_long (eltype, writebuf + offset);
869 regcache_cooked_write_unsigned (regcache, regnum, regval);
870 }
871 if (readbuf != NULL)
872 {
873 regcache_cooked_read_unsigned (regcache, regnum, &regval);
874 store_unsigned_integer (readbuf + offset,
875 TYPE_LENGTH (eltype), byte_order,
876 regval);
877 }
878 }
879 }
880
881 return RETURN_VALUE_REGISTER_CONVENTION;
882 }
883 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
884 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
885 && TYPE_VECTOR (type)
886 && TYPE_LENGTH (type) >= 16
887 && opencl_abi)
888 {
889 int n_regs = TYPE_LENGTH (type) / 16;
890 int i;
891
892 for (i = 0; i < n_regs; i++)
893 {
894 int offset = i * 16;
895 int regnum = tdep->ppc_vr0_regnum + 2 + i;
896
897 if (writebuf != NULL)
898 regcache_cooked_write (regcache, regnum, writebuf + offset);
899 if (readbuf != NULL)
dca08e1f 900 regcache->cooked_read (regnum, readbuf + offset);
54fcddd0
UW
901 }
902
903 return RETURN_VALUE_REGISTER_CONVENTION;
904 }
e754ae69
AC
905 if (TYPE_LENGTH (type) == 16
906 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
907 && TYPE_VECTOR (type)
908 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
e754ae69 909 {
963e2bb7 910 if (readbuf)
e754ae69
AC
911 {
912 /* Altivec places the return value in "v2". */
dca08e1f 913 regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 914 }
963e2bb7 915 if (writebuf)
e754ae69
AC
916 {
917 /* Altivec places the return value in "v2". */
963e2bb7 918 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
919 }
920 return RETURN_VALUE_REGISTER_CONVENTION;
921 }
55eddb0f
DJ
922 if (TYPE_LENGTH (type) == 16
923 && TYPE_CODE (type) == TYPE_CODE_ARRAY
924 && TYPE_VECTOR (type)
925 && tdep->vector_abi == POWERPC_VEC_GENERIC)
926 {
927 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
928 GCC without AltiVec returns them in memory, but it warns about
929 ABI risks in that case; we don't try to support it. */
930 if (readbuf)
931 {
dca08e1f
SM
932 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
933 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
934 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
935 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
55eddb0f
DJ
936 }
937 if (writebuf)
938 {
939 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
940 writebuf + 0);
941 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
942 writebuf + 4);
943 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
944 writebuf + 8);
945 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
946 writebuf + 12);
947 }
948 return RETURN_VALUE_REGISTER_CONVENTION;
949 }
e754ae69
AC
950 if (TYPE_LENGTH (type) == 8
951 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
952 && TYPE_VECTOR (type)
953 && tdep->vector_abi == POWERPC_VEC_SPE)
e754ae69
AC
954 {
955 /* The e500 ABI places return values for the 64-bit DSP types
956 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
957 corresponds to the entire r3 value for e500, whereas GDB's r3
958 only corresponds to the least significant 32-bits. So place
959 the 64-bit DSP type's value in ev3. */
963e2bb7 960 if (readbuf)
dca08e1f 961 regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf);
963e2bb7
AC
962 if (writebuf)
963 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
964 return RETURN_VALUE_REGISTER_CONVENTION;
965 }
966 if (broken_gcc && TYPE_LENGTH (type) <= 8)
967 {
61bf9ae0
MK
968 /* GCC screwed up for structures or unions whose size is less
969 than or equal to 8 bytes.. Instead of left-aligning, it
970 right-aligns the data into the buffer formed by r3, r4. */
0f068fb5 971 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
61bf9ae0
MK
972 int len = TYPE_LENGTH (type);
973 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
974
963e2bb7 975 if (readbuf)
e754ae69 976 {
dca08e1f
SM
977 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
978 regvals + 0 * tdep->wordsize);
61bf9ae0 979 if (len > tdep->wordsize)
dca08e1f
SM
980 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
981 regvals + 1 * tdep->wordsize);
61bf9ae0 982 memcpy (readbuf, regvals + offset, len);
e754ae69 983 }
963e2bb7 984 if (writebuf)
e754ae69 985 {
61bf9ae0
MK
986 memset (regvals, 0, sizeof regvals);
987 memcpy (regvals + offset, writebuf, len);
988 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
989 regvals + 0 * tdep->wordsize);
990 if (len > tdep->wordsize)
991 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
992 regvals + 1 * tdep->wordsize);
e754ae69 993 }
61bf9ae0 994
e754ae69
AC
995 return RETURN_VALUE_REGISTER_CONVENTION;
996 }
997 if (TYPE_LENGTH (type) <= 8)
998 {
963e2bb7 999 if (readbuf)
e754ae69
AC
1000 {
1001 /* This matches SVr4 PPC, it does not match GCC. */
1002 /* The value is right-padded to 8 bytes and then loaded, as
1003 two "words", into r3/r4. */
0f068fb5 1004 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
dca08e1f
SM
1005 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
1006 regvals + 0 * tdep->wordsize);
e754ae69 1007 if (TYPE_LENGTH (type) > tdep->wordsize)
dca08e1f
SM
1008 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
1009 regvals + 1 * tdep->wordsize);
963e2bb7 1010 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 1011 }
963e2bb7 1012 if (writebuf)
e754ae69
AC
1013 {
1014 /* This matches SVr4 PPC, it does not match GCC. */
1015 /* The value is padded out to 8 bytes and then loaded, as
1016 two "words" into r3/r4. */
0f068fb5 1017 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
e754ae69 1018 memset (regvals, 0, sizeof regvals);
963e2bb7 1019 memcpy (regvals, writebuf, TYPE_LENGTH (type));
e754ae69
AC
1020 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
1021 regvals + 0 * tdep->wordsize);
1022 if (TYPE_LENGTH (type) > tdep->wordsize)
1023 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1024 regvals + 1 * tdep->wordsize);
1025 }
1026 return RETURN_VALUE_REGISTER_CONVENTION;
1027 }
1028 return RETURN_VALUE_STRUCT_CONVENTION;
1029}
1030
05580c65 1031enum return_value_convention
6a3a010b 1032ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
1033 struct type *valtype, struct regcache *regcache,
1034 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1035{
6a3a010b
MR
1036 return do_ppc_sysv_return_value (gdbarch,
1037 function ? value_type (function) : NULL,
1038 valtype, regcache, readbuf, writebuf, 0);
e754ae69
AC
1039}
1040
05580c65 1041enum return_value_convention
963e2bb7 1042ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
6a3a010b 1043 struct value *function,
963e2bb7
AC
1044 struct type *valtype,
1045 struct regcache *regcache,
50fd1280 1046 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1047{
6a3a010b
MR
1048 return do_ppc_sysv_return_value (gdbarch,
1049 function ? value_type (function) : NULL,
1050 valtype, regcache, readbuf, writebuf, 1);
944fcfab 1051}
afd48b75 1052
b6e1c027
AC
1053/* The helper function for 64-bit SYSV push_dummy_call. Converts the
1054 function's code address back into the function's descriptor
1055 address.
1056
1057 Find a value for the TOC register. Every symbol should have both
1058 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1059 FN's descriptor, while ".FN" points at the entry point (which
1060 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1061 FN's descriptor address (while at the same time being careful to
1062 find "FN" in the same object file as ".FN"). */
1063
1064static int
1065convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1066{
1067 struct obj_section *dot_fn_section;
7cbd4a93 1068 struct bound_minimal_symbol dot_fn;
3b7344d5 1069 struct bound_minimal_symbol fn;
7cbd4a93 1070
b6e1c027
AC
1071 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1072 have a name of the form ".FN"). */
1073 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
efd66ac6 1074 if (dot_fn.minsym == NULL || MSYMBOL_LINKAGE_NAME (dot_fn.minsym)[0] != '.')
b6e1c027
AC
1075 return 0;
1076 /* Get the section that contains CODE_ADDR. Need this for the
1077 "objfile" that it contains. */
1078 dot_fn_section = find_pc_section (code_addr);
1079 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1080 return 0;
1081 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1082 address. Only look for the minimal symbol in ".FN"'s object file
1083 - avoids problems when two object files (i.e., shared libraries)
1084 contain a minimal symbol with the same name. */
efd66ac6 1085 fn = lookup_minimal_symbol (MSYMBOL_LINKAGE_NAME (dot_fn.minsym) + 1, NULL,
b6e1c027 1086 dot_fn_section->objfile);
3b7344d5 1087 if (fn.minsym == NULL)
b6e1c027
AC
1088 return 0;
1089 /* Found a descriptor. */
77e371c0 1090 (*desc_addr) = BMSYMBOL_VALUE_ADDRESS (fn);
b6e1c027
AC
1091 return 1;
1092}
1093
cc0e89c5
UW
1094/* Walk down the type tree of TYPE counting consecutive base elements.
1095 If *FIELD_TYPE is NULL, then set it to the first valid floating point
1096 or vector type. If a non-floating point or vector type is found, or
1097 if a floating point or vector type that doesn't match a non-NULL
1098 *FIELD_TYPE is found, then return -1, otherwise return the count in the
1099 sub-tree. */
1100
1101static LONGEST
1102ppc64_aggregate_candidate (struct type *type,
1103 struct type **field_type)
1104{
1105 type = check_typedef (type);
1106
1107 switch (TYPE_CODE (type))
1108 {
1109 case TYPE_CODE_FLT:
1110 case TYPE_CODE_DECFLOAT:
1111 if (!*field_type)
1112 *field_type = type;
1113 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1114 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1115 return 1;
1116 break;
1117
1118 case TYPE_CODE_COMPLEX:
1119 type = TYPE_TARGET_TYPE (type);
1120 if (TYPE_CODE (type) == TYPE_CODE_FLT
1121 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1122 {
1123 if (!*field_type)
1124 *field_type = type;
1125 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1126 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1127 return 2;
1128 }
1129 break;
1130
1131 case TYPE_CODE_ARRAY:
1132 if (TYPE_VECTOR (type))
1133 {
1134 if (!*field_type)
1135 *field_type = type;
1136 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1137 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1138 return 1;
1139 }
1140 else
1141 {
1142 LONGEST count, low_bound, high_bound;
1143
1144 count = ppc64_aggregate_candidate
1145 (TYPE_TARGET_TYPE (type), field_type);
1146 if (count == -1)
1147 return -1;
1148
1149 if (!get_array_bounds (type, &low_bound, &high_bound))
1150 return -1;
1151 count *= high_bound - low_bound;
1152
1153 /* There must be no padding. */
1154 if (count == 0)
1155 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1156 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1157 return -1;
1158
1159 return count;
1160 }
1161 break;
1162
1163 case TYPE_CODE_STRUCT:
1164 case TYPE_CODE_UNION:
1165 {
1166 LONGEST count = 0;
1167 int i;
1168
1169 for (i = 0; i < TYPE_NFIELDS (type); i++)
1170 {
1171 LONGEST sub_count;
1172
1173 if (field_is_static (&TYPE_FIELD (type, i)))
1174 continue;
1175
1176 sub_count = ppc64_aggregate_candidate
1177 (TYPE_FIELD_TYPE (type, i), field_type);
1178 if (sub_count == -1)
1179 return -1;
1180
1181 if (TYPE_CODE (type) == TYPE_CODE_STRUCT)
1182 count += sub_count;
1183 else
325fac50 1184 count = std::max (count, sub_count);
cc0e89c5
UW
1185 }
1186
1187 /* There must be no padding. */
1188 if (count == 0)
1189 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1190 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1191 return -1;
1192
1193 return count;
1194 }
1195 break;
1196
1197 default:
1198 break;
1199 }
1200
1201 return -1;
1202}
1203
1204/* If an argument of type TYPE is a homogeneous float or vector aggregate
1205 that shall be passed in FP/vector registers according to the ELFv2 ABI,
1206 return the homogeneous element type in *ELT_TYPE and the number of
1207 elements in *N_ELTS, and return non-zero. Otherwise, return zero. */
1208
1209static int
1210ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
1211 struct type **elt_type, int *n_elts)
1212{
1213 /* Complex types at the top level are treated separately. However,
1214 complex types can be elements of homogeneous aggregates. */
1215 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1216 || TYPE_CODE (type) == TYPE_CODE_UNION
1217 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && !TYPE_VECTOR (type)))
1218 {
1219 struct type *field_type = NULL;
1220 LONGEST field_count = ppc64_aggregate_candidate (type, &field_type);
1221
1222 if (field_count > 0)
1223 {
1224 int n_regs = ((TYPE_CODE (field_type) == TYPE_CODE_FLT
1225 || TYPE_CODE (field_type) == TYPE_CODE_DECFLOAT)?
1226 (TYPE_LENGTH (field_type) + 7) >> 3 : 1);
1227
1228 /* The ELFv2 ABI allows homogeneous aggregates to occupy
1229 up to 8 registers. */
1230 if (field_count * n_regs <= 8)
1231 {
1232 if (elt_type)
1233 *elt_type = field_type;
1234 if (n_elts)
1235 *n_elts = (int) field_count;
1236 /* Note that field_count is LONGEST since it may hold the size
1237 of an array, while *n_elts is int since its value is bounded
1238 by the number of registers used for argument passing. The
1239 cast cannot overflow due to the bounds checking above. */
1240 return 1;
1241 }
1242 }
1243 }
1244
1245 return 0;
1246}
1247
e765b44c
UW
1248/* Structure holding the next argument position. */
1249struct ppc64_sysv_argpos
1250 {
1251 /* Register cache holding argument registers. If this is NULL,
1252 we only simulate argument processing without actually updating
1253 any registers or memory. */
1254 struct regcache *regcache;
1255 /* Next available general-purpose argument register. */
1256 int greg;
1257 /* Next available floating-point argument register. */
1258 int freg;
1259 /* Next available vector argument register. */
1260 int vreg;
1261 /* The address, at which the next general purpose parameter
1262 (integer, struct, float, vector, ...) should be saved. */
1263 CORE_ADDR gparam;
1264 /* The address, at which the next by-reference parameter
1265 (non-Altivec vector, variably-sized type) should be saved. */
1266 CORE_ADDR refparam;
1267 };
1268
1269/* VAL is a value of length LEN. Store it into the argument area on the
1270 stack and load it into the corresponding general-purpose registers
1271 required by the ABI, and update ARGPOS.
1272
1273 If ALIGN is nonzero, it specifies the minimum alignment required
1274 for the on-stack copy of the argument. */
d81e75c0 1275
e765b44c
UW
1276static void
1277ppc64_sysv_abi_push_val (struct gdbarch *gdbarch,
1278 const bfd_byte *val, int len, int align,
1279 struct ppc64_sysv_argpos *argpos)
1280{
1281 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1282 int offset = 0;
1283
1284 /* Enforce alignment of stack location, if requested. */
1285 if (align > tdep->wordsize)
1286 {
1287 CORE_ADDR aligned_gparam = align_up (argpos->gparam, align);
1288
1289 argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize;
1290 argpos->gparam = aligned_gparam;
1291 }
1292
1293 /* The ABI (version 1.9) specifies that values smaller than one
1294 doubleword are right-aligned and those larger are left-aligned.
1295 GCC versions before 3.4 implemented this incorrectly; see
1296 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
d63167af
UW
1297 if (len < tdep->wordsize
1298 && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
e765b44c
UW
1299 offset = tdep->wordsize - len;
1300
1301 if (argpos->regcache)
1302 write_memory (argpos->gparam + offset, val, len);
1303 argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize);
1304
1305 while (len >= tdep->wordsize)
1306 {
1307 if (argpos->regcache && argpos->greg <= 10)
1308 regcache_cooked_write (argpos->regcache,
1309 tdep->ppc_gp0_regnum + argpos->greg, val);
1310 argpos->greg++;
1311 len -= tdep->wordsize;
1312 val += tdep->wordsize;
1313 }
1314
1315 if (len > 0)
1316 {
1317 if (argpos->regcache && argpos->greg <= 10)
1318 regcache_cooked_write_part (argpos->regcache,
1319 tdep->ppc_gp0_regnum + argpos->greg,
1320 offset, len, val);
1321 argpos->greg++;
1322 }
1323}
1324
1325/* The same as ppc64_sysv_abi_push_val, but using a single-word integer
1326 value VAL as argument. */
d81e75c0
TD
1327
1328static void
e765b44c
UW
1329ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val,
1330 struct ppc64_sysv_argpos *argpos)
d81e75c0 1331{
e765b44c
UW
1332 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1333 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0f068fb5 1334 gdb_byte buf[PPC_MAX_REGISTER_SIZE];
d81e75c0 1335
e765b44c
UW
1336 if (argpos->regcache)
1337 store_unsigned_integer (buf, tdep->wordsize, byte_order, val);
1338 ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos);
1339}
1340
1341/* VAL is a value of TYPE, a (binary or decimal) floating-point type.
1342 Load it into a floating-point register if required by the ABI,
1343 and update ARGPOS. */
1344
1345static void
1346ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch,
1347 struct type *type, const bfd_byte *val,
1348 struct ppc64_sysv_argpos *argpos)
1349{
1350 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1351 if (tdep->soft_float)
1352 return;
1353
1354 if (TYPE_LENGTH (type) <= 8
1355 && TYPE_CODE (type) == TYPE_CODE_FLT)
d81e75c0 1356 {
e765b44c
UW
1357 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1358 to double first. */
1359 if (argpos->regcache && argpos->freg <= 13)
1360 {
1361 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1362 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1363 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
d81e75c0 1364
3b2ca824 1365 target_float_convert (val, type, regval, regtype);
e765b44c
UW
1366 regcache_cooked_write (argpos->regcache, regnum, regval);
1367 }
d81e75c0 1368
e765b44c
UW
1369 argpos->freg++;
1370 }
1371 else if (TYPE_LENGTH (type) <= 8
1372 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1373 {
1374 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1375 placed in the least significant word. */
1376 if (argpos->regcache && argpos->freg <= 13)
1377 {
1378 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
5b757e5d
UW
1379 int offset = 0;
1380
1381 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1382 offset = 8 - TYPE_LENGTH (type);
d81e75c0 1383
e765b44c
UW
1384 regcache_cooked_write_part (argpos->regcache, regnum,
1385 offset, TYPE_LENGTH (type), val);
1386 }
d81e75c0 1387
e765b44c
UW
1388 argpos->freg++;
1389 }
1390 else if (TYPE_LENGTH (type) == 16
1391 && TYPE_CODE (type) == TYPE_CODE_FLT
1392 && (gdbarch_long_double_format (gdbarch)
1393 == floatformats_ibm_long_double))
1394 {
1395 /* IBM long double stored in two consecutive FPRs. */
1396 if (argpos->regcache && argpos->freg <= 13)
d81e75c0 1397 {
e765b44c
UW
1398 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1399
1400 regcache_cooked_write (argpos->regcache, regnum, val);
1401 if (argpos->freg <= 12)
1402 regcache_cooked_write (argpos->regcache, regnum + 1, val + 8);
d81e75c0 1403 }
d81e75c0 1404
e765b44c
UW
1405 argpos->freg += 2;
1406 }
1407 else if (TYPE_LENGTH (type) == 16
1408 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1409 {
1410 /* 128-bit decimal floating-point values are stored in and even/odd
1411 pair of FPRs, with the even FPR holding the most significant half. */
1412 argpos->freg += argpos->freg & 1;
d81e75c0 1413
e765b44c 1414 if (argpos->regcache && argpos->freg <= 12)
d81e75c0 1415 {
e765b44c 1416 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
0ff3e01f
UW
1417 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1418 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
d81e75c0 1419
0ff3e01f
UW
1420 regcache_cooked_write (argpos->regcache, regnum, val + hipart);
1421 regcache_cooked_write (argpos->regcache, regnum + 1, val + lopart);
d81e75c0 1422 }
e765b44c
UW
1423
1424 argpos->freg += 2;
d81e75c0 1425 }
e765b44c
UW
1426}
1427
1428/* VAL is a value of AltiVec vector type. Load it into a vector register
1429 if required by the ABI, and update ARGPOS. */
1430
1431static void
1432ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val,
1433 struct ppc64_sysv_argpos *argpos)
1434{
1435 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1436
1437 if (argpos->regcache && argpos->vreg <= 13)
1438 regcache_cooked_write (argpos->regcache,
1439 tdep->ppc_vr0_regnum + argpos->vreg, val);
1440
1441 argpos->vreg++;
1442}
1443
1444/* VAL is a value of TYPE. Load it into memory and/or registers
1445 as required by the ABI, and update ARGPOS. */
1446
1447static void
1448ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
1449 struct type *type, const bfd_byte *val,
1450 struct ppc64_sysv_argpos *argpos)
1451{
1452 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1453
1454 if (TYPE_CODE (type) == TYPE_CODE_FLT
1455 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1456 {
1457 /* Floating-point scalars are passed in floating-point registers. */
1458 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1459 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1460 }
1461 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1462 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1463 && TYPE_LENGTH (type) == 16)
1464 {
1465 /* AltiVec vectors are passed aligned, and in vector registers. */
1466 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 16, argpos);
1467 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1468 }
1469 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1470 && TYPE_LENGTH (type) >= 16)
d81e75c0 1471 {
e765b44c
UW
1472 /* Non-Altivec vectors are passed by reference. */
1473
1474 /* Copy value onto the stack ... */
1475 CORE_ADDR addr = align_up (argpos->refparam, 16);
1476 if (argpos->regcache)
1477 write_memory (addr, val, TYPE_LENGTH (type));
1478 argpos->refparam = align_up (addr + TYPE_LENGTH (type), tdep->wordsize);
1479
1480 /* ... and pass a pointer to the copy as parameter. */
1481 ppc64_sysv_abi_push_integer (gdbarch, addr, argpos);
1482 }
1483 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1484 || TYPE_CODE (type) == TYPE_CODE_ENUM
1485 || TYPE_CODE (type) == TYPE_CODE_BOOL
1486 || TYPE_CODE (type) == TYPE_CODE_CHAR
1487 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 1488 || TYPE_IS_REFERENCE (type))
e765b44c
UW
1489 && TYPE_LENGTH (type) <= tdep->wordsize)
1490 {
1491 ULONGEST word = 0;
1492
1493 if (argpos->regcache)
d81e75c0 1494 {
e765b44c
UW
1495 /* Sign extend the value, then store it unsigned. */
1496 word = unpack_long (type, val);
1497
1498 /* Convert any function code addresses into descriptors. */
d4094b6a
UW
1499 if (tdep->elf_abi == POWERPC_ELF_V1
1500 && (TYPE_CODE (type) == TYPE_CODE_PTR
1501 || TYPE_CODE (type) == TYPE_CODE_REF))
e765b44c
UW
1502 {
1503 struct type *target_type
1504 = check_typedef (TYPE_TARGET_TYPE (type));
1505
1506 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1507 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1508 {
1509 CORE_ADDR desc = word;
1510
1511 convert_code_addr_to_desc_addr (word, &desc);
1512 word = desc;
1513 }
1514 }
d81e75c0 1515 }
e765b44c
UW
1516
1517 ppc64_sysv_abi_push_integer (gdbarch, word, argpos);
1518 }
1519 else
1520 {
1521 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1522
1523 /* The ABI (version 1.9) specifies that structs containing a
1524 single floating-point value, at any level of nesting of
1525 single-member structs, are passed in floating-point registers. */
1526 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1527 && TYPE_NFIELDS (type) == 1)
d81e75c0 1528 {
e765b44c
UW
1529 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1530 && TYPE_NFIELDS (type) == 1)
1531 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1532
1533 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1534 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
d81e75c0 1535 }
cc0e89c5
UW
1536
1537 /* In the ELFv2 ABI, homogeneous floating-point or vector
1538 aggregates are passed in a series of registers. */
1539 if (tdep->elf_abi == POWERPC_ELF_V2)
1540 {
1541 struct type *eltype;
1542 int i, nelt;
1543
1544 if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt))
1545 for (i = 0; i < nelt; i++)
1546 {
1547 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1548
1549 if (TYPE_CODE (eltype) == TYPE_CODE_FLT
1550 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT)
1551 ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos);
1552 else if (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
1553 && TYPE_VECTOR (eltype)
1554 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1555 && TYPE_LENGTH (eltype) == 16)
1556 ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
1557 }
1558 }
d81e75c0
TD
1559 }
1560}
1561
0df8b418 1562/* Pass the arguments in either registers, or in the stack. Using the
8be9034a
AC
1563 ppc 64 bit SysV ABI.
1564
1565 This implements a dumbed down version of the ABI. It always writes
1566 values to memory, GPR and FPR, even when not necessary. Doing this
0df8b418 1567 greatly simplifies the logic. */
8be9034a
AC
1568
1569CORE_ADDR
0df8b418
MS
1570ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1571 struct value *function,
8be9034a
AC
1572 struct regcache *regcache, CORE_ADDR bp_addr,
1573 int nargs, struct value **args, CORE_ADDR sp,
1574 int struct_return, CORE_ADDR struct_addr)
1575{
7d9b040b 1576 CORE_ADDR func_addr = find_function_addr (function, NULL);
40a6adc1 1577 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 1578 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 1579 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 1580 ULONGEST back_chain;
8be9034a
AC
1581 /* See for-loop comment below. */
1582 int write_pass;
24e9cda0
UW
1583 /* Size of the by-reference parameter copy region, the final value is
1584 computed in the for-loop below. */
1585 LONGEST refparam_size = 0;
8be9034a
AC
1586 /* Size of the general parameter region, the final value is computed
1587 in the for-loop below. */
1588 LONGEST gparam_size = 0;
1589 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
0df8b418 1590 calls to align_up(), align_down(), etc. because this makes it
8be9034a
AC
1591 easier to reuse this code (in a copy/paste sense) in the future,
1592 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1593 at some point makes it easier to verify that this function is
1594 correct without having to do a non-local analysis to figure out
1595 the possible values of tdep->wordsize. */
1596 gdb_assert (tdep->wordsize == 8);
1597
55eddb0f
DJ
1598 /* This function exists to support a calling convention that
1599 requires floating-point registers. It shouldn't be used on
1600 processors that lack them. */
1601 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1602
fb4443d8
UW
1603 /* By this stage in the proceedings, SP has been decremented by "red
1604 zone size" + "struct return size". Fetch the stack-pointer from
1605 before this and use that as the BACK_CHAIN. */
40a6adc1 1606 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 1607 &back_chain);
fb4443d8 1608
8be9034a
AC
1609 /* Go through the argument list twice.
1610
1611 Pass 1: Compute the function call's stack space and register
1612 requirements.
1613
1614 Pass 2: Replay the same computation but this time also write the
1615 values out to the target. */
1616
1617 for (write_pass = 0; write_pass < 2; write_pass++)
1618 {
1619 int argno;
e765b44c
UW
1620
1621 struct ppc64_sysv_argpos argpos;
1622 argpos.greg = 3;
1623 argpos.freg = 1;
1624 argpos.vreg = 2;
8be9034a
AC
1625
1626 if (!write_pass)
1627 {
24e9cda0
UW
1628 /* During the first pass, GPARAM and REFPARAM are more like
1629 offsets (start address zero) than addresses. That way
1630 they accumulate the total stack space each region
1631 requires. */
e765b44c
UW
1632 argpos.regcache = NULL;
1633 argpos.gparam = 0;
1634 argpos.refparam = 0;
8be9034a
AC
1635 }
1636 else
1637 {
24e9cda0
UW
1638 /* Decrement the stack pointer making space for the Altivec
1639 and general on-stack parameters. Set refparam and gparam
1640 to their corresponding regions. */
e765b44c
UW
1641 argpos.regcache = regcache;
1642 argpos.refparam = align_down (sp - refparam_size, 16);
1643 argpos.gparam = align_down (argpos.refparam - gparam_size, 16);
52f548e4
UW
1644 /* Add in space for the TOC, link editor double word (v1 only),
1645 compiler double word (v1 only), LR save area, CR save area,
1646 and backchain. */
1647 if (tdep->elf_abi == POWERPC_ELF_V1)
1648 sp = align_down (argpos.gparam - 48, 16);
1649 else
1650 sp = align_down (argpos.gparam - 32, 16);
8be9034a
AC
1651 }
1652
1653 /* If the function is returning a `struct', then there is an
1654 extra hidden parameter (which will be passed in r3)
1655 containing the address of that struct.. In that case we
1656 should advance one word and start from r4 register to copy
1657 parameters. This also consumes one on-stack parameter slot. */
1658 if (struct_return)
e765b44c 1659 ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos);
8be9034a
AC
1660
1661 for (argno = 0; argno < nargs; argno++)
1662 {
1663 struct value *arg = args[argno];
df407dfe 1664 struct type *type = check_typedef (value_type (arg));
0fd88904 1665 const bfd_byte *val = value_contents (arg);
ce0451ad 1666
e765b44c 1667 if (TYPE_CODE (type) == TYPE_CODE_COMPLEX)
8be9034a 1668 {
e765b44c
UW
1669 /* Complex types are passed as if two independent scalars. */
1670 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1300a2f4 1671
e765b44c
UW
1672 ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos);
1673 ppc64_sysv_abi_push_param (gdbarch, eltype,
1674 val + TYPE_LENGTH (eltype), &argpos);
1300a2f4 1675 }
e765b44c 1676 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
54fcddd0
UW
1677 && opencl_abi)
1678 {
1679 /* OpenCL vectors shorter than 16 bytes are passed as if
e765b44c
UW
1680 a series of independent scalars; OpenCL vectors 16 bytes
1681 or longer are passed as if a series of AltiVec vectors. */
1682 struct type *eltype;
1683 int i, nelt;
54fcddd0 1684
e765b44c
UW
1685 if (TYPE_LENGTH (type) < 16)
1686 eltype = check_typedef (TYPE_TARGET_TYPE (type));
1687 else
1688 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1689
1690 nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
54fcddd0
UW
1691 for (i = 0; i < nelt; i++)
1692 {
1693 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1694
e765b44c 1695 ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos);
8be9034a 1696 }
8be9034a
AC
1697 }
1698 else
1699 {
e765b44c
UW
1700 /* All other types are passed as single arguments. */
1701 ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos);
8be9034a
AC
1702 }
1703 }
1704
1705 if (!write_pass)
1706 {
24e9cda0 1707 /* Save the true region sizes ready for the second pass. */
e765b44c 1708 refparam_size = argpos.refparam;
24e9cda0 1709 /* Make certain that the general parameter save area is at
8be9034a 1710 least the minimum 8 registers (or doublewords) in size. */
e765b44c 1711 if (argpos.greg < 8)
8be9034a
AC
1712 gparam_size = 8 * tdep->wordsize;
1713 else
e765b44c 1714 gparam_size = argpos.gparam;
8be9034a
AC
1715 }
1716 }
1717
1718 /* Update %sp. */
40a6adc1 1719 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
8be9034a
AC
1720
1721 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 1722 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
8be9034a
AC
1723
1724 /* Point the inferior function call's return address at the dummy's
1725 breakpoint. */
1726 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1727
d4094b6a
UW
1728 /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use
1729 that to find the TOC. If we're calling via a function pointer,
1730 the pointer itself identifies the descriptor. */
1731 if (tdep->elf_abi == POWERPC_ELF_V1)
1732 {
1733 struct type *ftype = check_typedef (value_type (function));
1734 CORE_ADDR desc_addr = value_as_address (function);
1735
1736 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1737 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1738 {
1739 /* The TOC is the second double word in the descriptor. */
1740 CORE_ADDR toc =
1741 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1742 tdep->wordsize, byte_order);
1743
1744 regcache_cooked_write_unsigned (regcache,
1745 tdep->ppc_gp0_regnum + 2, toc);
1746 }
1747 }
1748
1749 /* In the ELFv2 ABI, we need to pass the target address in r12 since
1750 we may be calling a global entry point. */
1751 if (tdep->elf_abi == POWERPC_ELF_V2)
1752 regcache_cooked_write_unsigned (regcache,
1753 tdep->ppc_gp0_regnum + 12, func_addr);
8be9034a
AC
1754
1755 return sp;
1756}
1757
e765b44c
UW
1758/* Subroutine of ppc64_sysv_abi_return_value that handles "base" types:
1759 integer, floating-point, and AltiVec vector types.
afd48b75 1760
e765b44c
UW
1761 This routine also handles components of aggregate return types;
1762 INDEX describes which part of the aggregate is to be handled.
afd48b75 1763
e765b44c
UW
1764 Returns true if VALTYPE is some such base type that could be handled,
1765 false otherwise. */
1766static int
1767ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
1768 struct regcache *regcache, gdb_byte *readbuf,
1769 const gdb_byte *writebuf, int index)
afd48b75 1770{
05580c65 1771 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152 1772
e765b44c 1773 /* Integers live in GPRs starting at r3. */
b6e1c027 1774 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
93d4208d
UW
1775 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1776 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1777 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
b6e1c027 1778 && TYPE_LENGTH (valtype) <= 8)
afd48b75 1779 {
e765b44c
UW
1780 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1781
963e2bb7 1782 if (writebuf != NULL)
afd48b75
AC
1783 {
1784 /* Be careful to sign extend the value. */
e765b44c 1785 regcache_cooked_write_unsigned (regcache, regnum,
963e2bb7 1786 unpack_long (valtype, writebuf));
afd48b75 1787 }
963e2bb7 1788 if (readbuf != NULL)
afd48b75 1789 {
e765b44c 1790 /* Extract the integer from GPR. Since this is truncating the
afd48b75
AC
1791 value, there isn't a sign extension problem. */
1792 ULONGEST regval;
e765b44c
UW
1793
1794 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1795 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype),
1796 gdbarch_byte_order (gdbarch), regval);
afd48b75 1797 }
e765b44c 1798 return 1;
afd48b75 1799 }
e765b44c
UW
1800
1801 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1802 to double first. */
1803 if (TYPE_LENGTH (valtype) <= 8
1804 && TYPE_CODE (valtype) == TYPE_CODE_FLT)
afd48b75 1805 {
e765b44c
UW
1806 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1807 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1808 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
e765b44c 1809
963e2bb7 1810 if (writebuf != NULL)
e765b44c 1811 {
3b2ca824 1812 target_float_convert (writebuf, valtype, regval, regtype);
e765b44c
UW
1813 regcache_cooked_write (regcache, regnum, regval);
1814 }
963e2bb7 1815 if (readbuf != NULL)
e765b44c 1816 {
dca08e1f 1817 regcache->cooked_read (regnum, regval);
3b2ca824 1818 target_float_convert (regval, regtype, readbuf, valtype);
e765b44c
UW
1819 }
1820 return 1;
afd48b75 1821 }
54fcddd0 1822
e765b44c
UW
1823 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1824 placed in the least significant word. */
1825 if (TYPE_LENGTH (valtype) <= 8
1826 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1827 {
1828 int regnum = tdep->ppc_fp0_regnum + 1 + index;
5b757e5d
UW
1829 int offset = 0;
1830
1831 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1832 offset = 8 - TYPE_LENGTH (valtype);
54fcddd0 1833
e765b44c
UW
1834 if (writebuf != NULL)
1835 regcache_cooked_write_part (regcache, regnum,
1836 offset, TYPE_LENGTH (valtype), writebuf);
1837 if (readbuf != NULL)
1838 regcache_cooked_read_part (regcache, regnum,
1839 offset, TYPE_LENGTH (valtype), readbuf);
1840 return 1;
1841 }
54fcddd0 1842
e765b44c
UW
1843 /* IBM long double stored in two consecutive FPRs. */
1844 if (TYPE_LENGTH (valtype) == 16
1845 && TYPE_CODE (valtype) == TYPE_CODE_FLT
1846 && (gdbarch_long_double_format (gdbarch)
1847 == floatformats_ibm_long_double))
1848 {
1849 int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index;
54fcddd0 1850
e765b44c
UW
1851 if (writebuf != NULL)
1852 {
1853 regcache_cooked_write (regcache, regnum, writebuf);
1854 regcache_cooked_write (regcache, regnum + 1, writebuf + 8);
54fcddd0 1855 }
e765b44c
UW
1856 if (readbuf != NULL)
1857 {
dca08e1f
SM
1858 regcache->cooked_read (regnum, readbuf);
1859 regcache->cooked_read (regnum + 1, readbuf + 8);
e765b44c
UW
1860 }
1861 return 1;
54fcddd0 1862 }
e765b44c
UW
1863
1864 /* 128-bit decimal floating-point values are stored in an even/odd
1865 pair of FPRs, with the even FPR holding the most significant half. */
1866 if (TYPE_LENGTH (valtype) == 16
1867 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
54fcddd0 1868 {
e765b44c 1869 int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index;
0ff3e01f
UW
1870 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1871 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
54fcddd0 1872
e765b44c 1873 if (writebuf != NULL)
54fcddd0 1874 {
0ff3e01f
UW
1875 regcache_cooked_write (regcache, regnum, writebuf + hipart);
1876 regcache_cooked_write (regcache, regnum + 1, writebuf + lopart);
54fcddd0 1877 }
e765b44c
UW
1878 if (readbuf != NULL)
1879 {
dca08e1f
SM
1880 regcache->cooked_read (regnum, readbuf + hipart);
1881 regcache->cooked_read (regnum + 1, readbuf + lopart);
e765b44c
UW
1882 }
1883 return 1;
54fcddd0 1884 }
e765b44c
UW
1885
1886 /* AltiVec vectors are returned in VRs starting at v2. */
a1da2672
UW
1887 if (TYPE_LENGTH (valtype) == 16
1888 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
e765b44c 1889 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
afd48b75 1890 {
e765b44c
UW
1891 int regnum = tdep->ppc_vr0_regnum + 2 + index;
1892
1893 if (writebuf != NULL)
1894 regcache_cooked_write (regcache, regnum, writebuf);
1895 if (readbuf != NULL)
dca08e1f 1896 regcache->cooked_read (regnum, readbuf);
e765b44c 1897 return 1;
afd48b75 1898 }
e765b44c 1899
a1da2672
UW
1900 /* Short vectors are returned in GPRs starting at r3. */
1901 if (TYPE_LENGTH (valtype) <= 8
1902 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype))
1903 {
1904 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1905 int offset = 0;
1906
1907 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1908 offset = 8 - TYPE_LENGTH (valtype);
1909
1910 if (writebuf != NULL)
1911 regcache_cooked_write_part (regcache, regnum,
1912 offset, TYPE_LENGTH (valtype), writebuf);
1913 if (readbuf != NULL)
1914 regcache_cooked_read_part (regcache, regnum,
1915 offset, TYPE_LENGTH (valtype), readbuf);
1916 return 1;
1917 }
1918
e765b44c
UW
1919 return 0;
1920}
1921
1922/* The 64 bit ABI return value convention.
1923
1924 Return non-zero if the return-value is stored in a register, return
1925 0 if the return-value is instead stored on the stack (a.k.a.,
1926 struct return convention).
1927
1928 For a return-value stored in a register: when WRITEBUF is non-NULL,
1929 copy the buffer to the corresponding register return-value location
1930 location; when READBUF is non-NULL, fill the buffer from the
1931 corresponding register return-value location. */
1932enum return_value_convention
1933ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1934 struct type *valtype, struct regcache *regcache,
1935 gdb_byte *readbuf, const gdb_byte *writebuf)
1936{
1937 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1938 struct type *func_type = function ? value_type (function) : NULL;
1939 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1940 struct type *eltype;
1941 int nelt, i, ok;
1942
1943 /* This function exists to support a calling convention that
1944 requires floating-point registers. It shouldn't be used on
1945 processors that lack them. */
1946 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1947
1948 /* Complex types are returned as if two independent scalars. */
1949 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX)
afd48b75 1950 {
e765b44c
UW
1951 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1952
1953 for (i = 0; i < 2; i++)
afd48b75 1954 {
e765b44c
UW
1955 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1956 readbuf, writebuf, i);
1957 gdb_assert (ok);
1958
1959 if (readbuf)
1960 readbuf += TYPE_LENGTH (eltype);
1961 if (writebuf)
1962 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1963 }
1964 return RETURN_VALUE_REGISTER_CONVENTION;
1965 }
e765b44c
UW
1966
1967 /* OpenCL vectors shorter than 16 bytes are returned as if
1968 a series of independent scalars; OpenCL vectors 16 bytes
1969 or longer are returned as if a series of AltiVec vectors. */
1970 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
1971 && opencl_abi)
afd48b75 1972 {
e765b44c
UW
1973 if (TYPE_LENGTH (valtype) < 16)
1974 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1975 else
1976 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1977
1978 nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
1979 for (i = 0; i < nelt; i++)
afd48b75 1980 {
e765b44c
UW
1981 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1982 readbuf, writebuf, i);
1983 gdb_assert (ok);
1984
1985 if (readbuf)
1986 readbuf += TYPE_LENGTH (eltype);
1987 if (writebuf)
1988 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1989 }
1990 return RETURN_VALUE_REGISTER_CONVENTION;
1991 }
e765b44c
UW
1992
1993 /* All pointers live in r3. */
aa006118 1994 if (TYPE_CODE (valtype) == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype))
afd48b75 1995 {
e765b44c
UW
1996 int regnum = tdep->ppc_gp0_regnum + 3;
1997
1998 if (writebuf != NULL)
1999 regcache_cooked_write (regcache, regnum, writebuf);
2000 if (readbuf != NULL)
dca08e1f 2001 regcache->cooked_read (regnum, readbuf);
afd48b75
AC
2002 return RETURN_VALUE_REGISTER_CONVENTION;
2003 }
e765b44c
UW
2004
2005 /* Small character arrays are returned, right justified, in r3. */
2006 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
a1da2672 2007 && !TYPE_VECTOR (valtype)
e765b44c
UW
2008 && TYPE_LENGTH (valtype) <= 8
2009 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
2010 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
2011 {
2012 int regnum = tdep->ppc_gp0_regnum + 3;
2013 int offset = (register_size (gdbarch, regnum) - TYPE_LENGTH (valtype));
2014
2015 if (writebuf != NULL)
2016 regcache_cooked_write_part (regcache, regnum,
2017 offset, TYPE_LENGTH (valtype), writebuf);
2018 if (readbuf != NULL)
2019 regcache_cooked_read_part (regcache, regnum,
2020 offset, TYPE_LENGTH (valtype), readbuf);
2021 return RETURN_VALUE_REGISTER_CONVENTION;
2022 }
2023
cc0e89c5
UW
2024 /* In the ELFv2 ABI, homogeneous floating-point or vector
2025 aggregates are returned in registers. */
2026 if (tdep->elf_abi == POWERPC_ELF_V2
a1da2672
UW
2027 && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt)
2028 && (TYPE_CODE (eltype) == TYPE_CODE_FLT
2029 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT
2030 || (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
2031 && TYPE_VECTOR (eltype)
2032 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
2033 && TYPE_LENGTH (eltype) == 16)))
cc0e89c5
UW
2034 {
2035 for (i = 0; i < nelt; i++)
2036 {
2037 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
2038 readbuf, writebuf, i);
2039 gdb_assert (ok);
2040
2041 if (readbuf)
2042 readbuf += TYPE_LENGTH (eltype);
2043 if (writebuf)
2044 writebuf += TYPE_LENGTH (eltype);
2045 }
2046
2047 return RETURN_VALUE_REGISTER_CONVENTION;
2048 }
2049
2050 /* In the ELFv2 ABI, aggregate types of up to 16 bytes are
2051 returned in registers r3:r4. */
2052 if (tdep->elf_abi == POWERPC_ELF_V2
2053 && TYPE_LENGTH (valtype) <= 16
2054 && (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
2055 || TYPE_CODE (valtype) == TYPE_CODE_UNION
2056 || (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
2057 && !TYPE_VECTOR (valtype))))
2058 {
2059 int n_regs = ((TYPE_LENGTH (valtype) + tdep->wordsize - 1)
2060 / tdep->wordsize);
2061 int i;
2062
2063 for (i = 0; i < n_regs; i++)
2064 {
0f068fb5 2065 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
cc0e89c5
UW
2066 int regnum = tdep->ppc_gp0_regnum + 3 + i;
2067 int offset = i * tdep->wordsize;
2068 int len = TYPE_LENGTH (valtype) - offset;
2069
2070 if (len > tdep->wordsize)
2071 len = tdep->wordsize;
2072
2073 if (writebuf != NULL)
2074 {
2075 memset (regval, 0, sizeof regval);
2076 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2077 && offset == 0)
2078 memcpy (regval + tdep->wordsize - len, writebuf, len);
2079 else
2080 memcpy (regval, writebuf + offset, len);
2081 regcache_cooked_write (regcache, regnum, regval);
2082 }
2083 if (readbuf != NULL)
2084 {
dca08e1f 2085 regcache->cooked_read (regnum, regval);
cc0e89c5
UW
2086 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2087 && offset == 0)
2088 memcpy (readbuf, regval + tdep->wordsize - len, len);
2089 else
2090 memcpy (readbuf + offset, regval, len);
2091 }
2092 }
2093 return RETURN_VALUE_REGISTER_CONVENTION;
2094 }
2095
e765b44c
UW
2096 /* Handle plain base types. */
2097 if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache,
2098 readbuf, writebuf, 0))
2099 return RETURN_VALUE_REGISTER_CONVENTION;
2100
afd48b75
AC
2101 return RETURN_VALUE_STRUCT_CONVENTION;
2102}
2103
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