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036b1ba8 JB |
1 | /* Ravenscar SPARC target support. |
2 | ||
0b302171 | 3 | Copyright 2004, 2010-2012 Free Software Foundation, Inc. |
036b1ba8 JB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "gdbcore.h" | |
22 | #include "regcache.h" | |
23 | #include "sparc-tdep.h" | |
24 | #include "inferior.h" | |
25 | #include "ravenscar-thread.h" | |
26 | ||
27 | static struct ravenscar_arch_ops ravenscar_sparc_ops; | |
28 | ||
29 | static void ravenscar_sparc_fetch_registers (struct regcache *regcache, | |
30 | int regnum); | |
31 | static void ravenscar_sparc_store_registers (struct regcache *regcache, | |
32 | int regnum); | |
33 | static void ravenscar_sparc_prepare_to_store (struct regcache *regcache); | |
34 | ||
35 | /* Register offsets from a referenced address (exempli gratia the | |
0df8b418 MS |
36 | Thread_Descriptor). The referenced address depends on the register |
37 | number. The Thread_Descriptor layout and the stack layout are documented | |
036b1ba8 JB |
38 | in the GNAT sources, in sparc-bb.h. */ |
39 | ||
40 | static const int sparc_register_offsets[] = | |
41 | { | |
42 | /* G0 - G7 */ | |
43 | -1, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C, | |
44 | /* O0 - O7 */ | |
45 | 0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C, | |
46 | /* L0 - L7 */ | |
47 | 0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C, | |
48 | /* I0 - I7 */ | |
49 | 0x20, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C, | |
50 | /* F0 - F31 */ | |
51 | 0x50, 0x54, 0x58, 0x5C, 0x60, 0x64, 0x68, 0x6C, | |
52 | 0x70, 0x74, 0x78, 0x7C, 0x80, 0x84, 0x88, 0x8C, | |
53 | 0x90, 0x94, 0x99, 0x9C, 0xA0, 0xA4, 0xA8, 0xAC, | |
54 | 0xB0, 0xB4, 0xBB, 0xBC, 0xC0, 0xC4, 0xC8, 0xCC, | |
55 | /* Y PSR WIM TBR PC NPC FPSR CPSR */ | |
56 | 0x40, 0x20, 0x44, -1, 0x1C, -1, 0x4C, -1 | |
57 | }; | |
58 | ||
59 | /* supply register REGNUM, which has been saved on REGISTER_ADDR, to the | |
60 | regcache. */ | |
61 | ||
62 | static void | |
63 | supply_register_at_address (struct regcache *regcache, int regnum, | |
64 | CORE_ADDR register_addr) | |
65 | { | |
66 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
67 | int buf_size = register_size (gdbarch, regnum); | |
68 | char *buf; | |
69 | ||
70 | buf = (char *) alloca (buf_size); | |
71 | read_memory (register_addr, buf, buf_size); | |
da700e1a | 72 | regcache_raw_supply (regcache, regnum, buf); |
036b1ba8 JB |
73 | } |
74 | ||
75 | /* Return true if, for a non-running thread, REGNUM has been saved on the | |
76 | stack. */ | |
77 | ||
78 | static int | |
79 | register_on_stack_p (int regnum) | |
80 | { | |
81 | return (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_L7_REGNUM) | |
82 | || (regnum >= SPARC_I0_REGNUM && regnum <= SPARC_I7_REGNUM); | |
83 | } | |
84 | ||
85 | /* Return true if, for a non-running thread, REGNUM has been saved on the | |
86 | Thread_Descriptor. */ | |
87 | ||
88 | static int | |
89 | register_in_thread_descriptor_p (int regnum) | |
90 | { | |
91 | return (regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM) | |
92 | || (regnum == SPARC32_PSR_REGNUM) | |
93 | || (regnum >= SPARC_G1_REGNUM && regnum <= SPARC_G7_REGNUM) | |
94 | || (regnum == SPARC32_Y_REGNUM) | |
95 | || (regnum == SPARC32_WIM_REGNUM) | |
96 | || (regnum == SPARC32_FSR_REGNUM) | |
97 | || (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F0_REGNUM + 31) | |
98 | || (regnum == SPARC32_PC_REGNUM); | |
99 | } | |
100 | ||
101 | /* to_fetch_registers when inferior_ptid is different from the running | |
102 | thread. */ | |
103 | ||
104 | static void | |
105 | ravenscar_sparc_fetch_registers (struct regcache *regcache, int regnum) | |
106 | { | |
107 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
108 | const int sp_regnum = gdbarch_sp_regnum (gdbarch); | |
109 | const int num_regs = gdbarch_num_regs (gdbarch); | |
110 | int current_regnum; | |
111 | CORE_ADDR current_address; | |
112 | CORE_ADDR thread_descriptor_address; | |
113 | ULONGEST stack_address; | |
114 | ||
2590b645 | 115 | /* The tid is the thread_id field, which is a pointer to the thread. */ |
036b1ba8 | 116 | thread_descriptor_address = (CORE_ADDR) ptid_get_tid (inferior_ptid); |
2590b645 JB |
117 | |
118 | /* Read the saved SP in the context buffer. */ | |
036b1ba8 JB |
119 | current_address = thread_descriptor_address |
120 | + sparc_register_offsets [sp_regnum]; | |
121 | supply_register_at_address (regcache, sp_regnum, current_address); | |
122 | regcache_cooked_read_unsigned (regcache, sp_regnum, &stack_address); | |
123 | ||
2590b645 | 124 | /* Read registers. */ |
036b1ba8 JB |
125 | for (current_regnum = 0; current_regnum < num_regs; current_regnum ++) |
126 | { | |
127 | if (register_in_thread_descriptor_p (current_regnum)) | |
128 | { | |
129 | current_address = thread_descriptor_address | |
130 | + sparc_register_offsets [current_regnum]; | |
131 | supply_register_at_address (regcache, current_regnum, | |
132 | current_address); | |
133 | } | |
134 | else if (register_on_stack_p (current_regnum)) | |
135 | { | |
136 | current_address = stack_address | |
137 | + sparc_register_offsets [current_regnum]; | |
138 | supply_register_at_address (regcache, current_regnum, | |
139 | current_address); | |
140 | } | |
141 | } | |
142 | } | |
143 | ||
144 | /* to_prepare_to_store when inferior_ptid is different from the running | |
145 | thread. */ | |
146 | ||
147 | static void | |
148 | ravenscar_sparc_prepare_to_store (struct regcache *regcache) | |
149 | { | |
150 | /* Nothing to do. */ | |
151 | } | |
152 | ||
153 | /* to_store_registers when inferior_ptid is different from the running | |
154 | thread. */ | |
155 | ||
156 | static void | |
157 | ravenscar_sparc_store_registers (struct regcache *regcache, int regnum) | |
158 | { | |
159 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
160 | int buf_size = register_size (gdbarch, regnum); | |
161 | char buf [buf_size]; | |
162 | ULONGEST register_address; | |
163 | ||
164 | if (register_in_thread_descriptor_p (regnum)) | |
165 | register_address = | |
166 | ptid_get_tid (inferior_ptid) + sparc_register_offsets [regnum]; | |
167 | else if (register_on_stack_p (regnum)) | |
168 | { | |
169 | regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, | |
170 | ®ister_address); | |
171 | register_address += sparc_register_offsets [regnum]; | |
172 | } | |
173 | else | |
174 | return; | |
175 | ||
176 | regcache_raw_collect (regcache, regnum, buf); | |
177 | write_memory (register_address, | |
178 | buf, | |
179 | buf_size); | |
180 | } | |
181 | ||
6f5e9362 JB |
182 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
183 | extern void _initialize_ravenscar_sparc (void); | |
184 | ||
036b1ba8 JB |
185 | void |
186 | _initialize_ravenscar_sparc (void) | |
187 | { | |
188 | ravenscar_sparc_ops.to_fetch_registers = ravenscar_sparc_fetch_registers; | |
189 | ravenscar_sparc_ops.to_store_registers = ravenscar_sparc_store_registers; | |
190 | ravenscar_sparc_ops.to_prepare_to_store = ravenscar_sparc_prepare_to_store; | |
191 | ravenscar_register_arch_ops (&ravenscar_sparc_ops); | |
192 | } |