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[deliverable/binutils-gdb.git] / gdb / ravenscar-sparc-thread.c
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1/* Ravenscar SPARC target support.
2
7b6bb8da 3 Copyright 2004, 2010, 2011 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "gdbcore.h"
22#include "regcache.h"
23#include "sparc-tdep.h"
24#include "inferior.h"
25#include "ravenscar-thread.h"
26
27static struct ravenscar_arch_ops ravenscar_sparc_ops;
28
29static void ravenscar_sparc_fetch_registers (struct regcache *regcache,
30 int regnum);
31static void ravenscar_sparc_store_registers (struct regcache *regcache,
32 int regnum);
33static void ravenscar_sparc_prepare_to_store (struct regcache *regcache);
34
35/* Register offsets from a referenced address (exempli gratia the
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36 Thread_Descriptor). The referenced address depends on the register
37 number. The Thread_Descriptor layout and the stack layout are documented
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38 in the GNAT sources, in sparc-bb.h. */
39
40static const int sparc_register_offsets[] =
41{
42 /* G0 - G7 */
43 -1, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C,
44 /* O0 - O7 */
45 0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C,
46 /* L0 - L7 */
47 0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C,
48 /* I0 - I7 */
49 0x20, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C,
50 /* F0 - F31 */
51 0x50, 0x54, 0x58, 0x5C, 0x60, 0x64, 0x68, 0x6C,
52 0x70, 0x74, 0x78, 0x7C, 0x80, 0x84, 0x88, 0x8C,
53 0x90, 0x94, 0x99, 0x9C, 0xA0, 0xA4, 0xA8, 0xAC,
54 0xB0, 0xB4, 0xBB, 0xBC, 0xC0, 0xC4, 0xC8, 0xCC,
55 /* Y PSR WIM TBR PC NPC FPSR CPSR */
56 0x40, 0x20, 0x44, -1, 0x1C, -1, 0x4C, -1
57};
58
59/* supply register REGNUM, which has been saved on REGISTER_ADDR, to the
60 regcache. */
61
62static void
63supply_register_at_address (struct regcache *regcache, int regnum,
64 CORE_ADDR register_addr)
65{
66 struct gdbarch *gdbarch = get_regcache_arch (regcache);
67 int buf_size = register_size (gdbarch, regnum);
68 char *buf;
69
70 buf = (char *) alloca (buf_size);
71 read_memory (register_addr, buf, buf_size);
da700e1a 72 regcache_raw_supply (regcache, regnum, buf);
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73}
74
75/* Return true if, for a non-running thread, REGNUM has been saved on the
76 stack. */
77
78static int
79register_on_stack_p (int regnum)
80{
81 return (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_L7_REGNUM)
82 || (regnum >= SPARC_I0_REGNUM && regnum <= SPARC_I7_REGNUM);
83}
84
85/* Return true if, for a non-running thread, REGNUM has been saved on the
86 Thread_Descriptor. */
87
88static int
89register_in_thread_descriptor_p (int regnum)
90{
91 return (regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
92 || (regnum == SPARC32_PSR_REGNUM)
93 || (regnum >= SPARC_G1_REGNUM && regnum <= SPARC_G7_REGNUM)
94 || (regnum == SPARC32_Y_REGNUM)
95 || (regnum == SPARC32_WIM_REGNUM)
96 || (regnum == SPARC32_FSR_REGNUM)
97 || (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F0_REGNUM + 31)
98 || (regnum == SPARC32_PC_REGNUM);
99}
100
101/* to_fetch_registers when inferior_ptid is different from the running
102 thread. */
103
104static void
105ravenscar_sparc_fetch_registers (struct regcache *regcache, int regnum)
106{
107 struct gdbarch *gdbarch = get_regcache_arch (regcache);
108 const int sp_regnum = gdbarch_sp_regnum (gdbarch);
109 const int num_regs = gdbarch_num_regs (gdbarch);
110 int current_regnum;
111 CORE_ADDR current_address;
112 CORE_ADDR thread_descriptor_address;
113 ULONGEST stack_address;
114
115 thread_descriptor_address = (CORE_ADDR) ptid_get_tid (inferior_ptid);
116 current_address = thread_descriptor_address
117 + sparc_register_offsets [sp_regnum];
118 supply_register_at_address (regcache, sp_regnum, current_address);
119 regcache_cooked_read_unsigned (regcache, sp_regnum, &stack_address);
120
121 for (current_regnum = 0; current_regnum < num_regs; current_regnum ++)
122 {
123 if (register_in_thread_descriptor_p (current_regnum))
124 {
125 current_address = thread_descriptor_address
126 + sparc_register_offsets [current_regnum];
127 supply_register_at_address (regcache, current_regnum,
128 current_address);
129 }
130 else if (register_on_stack_p (current_regnum))
131 {
132 current_address = stack_address
133 + sparc_register_offsets [current_regnum];
134 supply_register_at_address (regcache, current_regnum,
135 current_address);
136 }
137 }
138}
139
140/* to_prepare_to_store when inferior_ptid is different from the running
141 thread. */
142
143static void
144ravenscar_sparc_prepare_to_store (struct regcache *regcache)
145{
146 /* Nothing to do. */
147}
148
149/* to_store_registers when inferior_ptid is different from the running
150 thread. */
151
152static void
153ravenscar_sparc_store_registers (struct regcache *regcache, int regnum)
154{
155 struct gdbarch *gdbarch = get_regcache_arch (regcache);
156 int buf_size = register_size (gdbarch, regnum);
157 char buf [buf_size];
158 ULONGEST register_address;
159
160 if (register_in_thread_descriptor_p (regnum))
161 register_address =
162 ptid_get_tid (inferior_ptid) + sparc_register_offsets [regnum];
163 else if (register_on_stack_p (regnum))
164 {
165 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM,
166 &register_address);
167 register_address += sparc_register_offsets [regnum];
168 }
169 else
170 return;
171
172 regcache_raw_collect (regcache, regnum, buf);
173 write_memory (register_address,
174 buf,
175 buf_size);
176}
177
178void
179_initialize_ravenscar_sparc (void)
180{
181 ravenscar_sparc_ops.to_fetch_registers = ravenscar_sparc_fetch_registers;
182 ravenscar_sparc_ops.to_store_registers = ravenscar_sparc_store_registers;
183 ravenscar_sparc_ops.to_prepare_to_store = ravenscar_sparc_prepare_to_store;
184 ravenscar_register_arch_ops (&ravenscar_sparc_ops);
185}
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