Don't merge if the storage class of the non-debug symbol is C_NULL.
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab 1/* Cache and manage the values of registers for GDB, the GNU debugger.
b6ba6518 2 Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
32178cab
MS
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
32178cab
MS
23#include "inferior.h"
24#include "target.h"
25#include "gdbarch.h"
705152c5 26#include "gdbcmd.h"
4e052eda 27#include "regcache.h"
61a0eb5b 28#include "gdb_assert.h"
32178cab
MS
29
30/*
31 * DATA STRUCTURE
32 *
33 * Here is the actual register cache.
34 */
35
5ebd2499 36/* NOTE: this is a write-through cache. There is no "dirty" bit for
32178cab
MS
37 recording if the register values have been changed (eg. by the
38 user). Therefore all registers must be written back to the
39 target when appropriate. */
40
41/* REGISTERS contains the cached register values (in target byte order). */
42
43char *registers;
44
45/* REGISTER_VALID is 0 if the register needs to be fetched,
46 1 if it has been fetched, and
47 -1 if the register value was not available.
48 "Not available" means don't try to fetch it again. */
49
50signed char *register_valid;
51
39f77062 52/* The thread/process associated with the current set of registers. */
32178cab 53
39f77062 54static ptid_t registers_ptid;
32178cab
MS
55
56/*
57 * FUNCTIONS:
58 */
59
60/* REGISTER_CACHED()
61
62 Returns 0 if the value is not in the cache (needs fetch).
63 >0 if the value is in the cache.
64 <0 if the value is permanently unavailable (don't ask again). */
65
66int
67register_cached (int regnum)
68{
69 return register_valid[regnum];
70}
71
7302a204
ND
72/* Record that REGNUM's value is cached if STATE is >0, uncached but
73 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
74
75void
76set_register_cached (int regnum, int state)
77{
78 register_valid[regnum] = state;
79}
80
2dc4e391
DT
81/* REGISTER_CHANGED
82
83 invalidate a single register REGNUM in the cache */
84void
85register_changed (int regnum)
86{
7302a204
ND
87 set_register_cached (regnum, 0);
88}
89
90/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
91 else return a pointer to the start of the cache buffer. */
92
93char *
94register_buffer (int regnum)
95{
96 if (regnum < 0)
97 return registers;
98 else
99 return &registers[REGISTER_BYTE (regnum)];
100}
101
102/* Return whether register REGNUM is a real register. */
103
104static int
105real_register (int regnum)
106{
107 return regnum >= 0 && regnum < NUM_REGS;
108}
109
110/* Return whether register REGNUM is a pseudo register. */
111
112static int
113pseudo_register (int regnum)
114{
115 return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
116}
117
118/* Fetch register REGNUM into the cache. */
119
120static void
121fetch_register (int regnum)
122{
123 if (real_register (regnum))
124 target_fetch_registers (regnum);
125 else if (pseudo_register (regnum))
126 FETCH_PSEUDO_REGISTER (regnum);
127}
128
129/* Write register REGNUM cached value to the target. */
130
131static void
132store_register (int regnum)
133{
134 if (real_register (regnum))
135 target_store_registers (regnum);
136 else if (pseudo_register (regnum))
137 STORE_PSEUDO_REGISTER (regnum);
2dc4e391
DT
138}
139
32178cab
MS
140/* Low level examining and depositing of registers.
141
142 The caller is responsible for making sure that the inferior is
143 stopped before calling the fetching routines, or it will get
144 garbage. (a change from GDB version 3, in which the caller got the
145 value from the last stop). */
146
147/* REGISTERS_CHANGED ()
148
149 Indicate that registers may have changed, so invalidate the cache. */
150
151void
152registers_changed (void)
153{
154 int i;
32178cab 155
39f77062 156 registers_ptid = pid_to_ptid (-1);
32178cab
MS
157
158 /* Force cleanup of any alloca areas if using C alloca instead of
159 a builtin alloca. This particular call is used to clean up
160 areas allocated by low level target code which may build up
161 during lengthy interactions between gdb and the target before
162 gdb gives control to the user (ie watchpoints). */
163 alloca (0);
164
a728f042 165 for (i = 0; i < NUM_REGS; i++)
7302a204 166 set_register_cached (i, 0);
fcdc5976
MS
167
168 /* Assume that if all the hardware regs have changed,
169 then so have the pseudo-registers. */
170 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
7302a204 171 set_register_cached (i, 0);
32178cab
MS
172
173 if (registers_changed_hook)
174 registers_changed_hook ();
175}
176
177/* REGISTERS_FETCHED ()
178
179 Indicate that all registers have been fetched, so mark them all valid. */
180
181
182void
183registers_fetched (void)
184{
185 int i;
32178cab 186
a728f042 187 for (i = 0; i < NUM_REGS; i++)
7302a204 188 set_register_cached (i, 1);
fcdc5976
MS
189 /* Do not assume that the pseudo-regs have also been fetched.
190 Fetching all real regs might not account for all pseudo-regs. */
32178cab
MS
191}
192
193/* read_register_bytes and write_register_bytes are generally a *BAD*
194 idea. They are inefficient because they need to check for partial
195 updates, which can only be done by scanning through all of the
196 registers and seeing if the bytes that are being read/written fall
197 inside of an invalid register. [The main reason this is necessary
198 is that register sizes can vary, so a simple index won't suffice.]
199 It is far better to call read_register_gen and write_register_gen
200 if you want to get at the raw register contents, as it only takes a
5ebd2499 201 regnum as an argument, and therefore can't do a partial register
32178cab
MS
202 update.
203
204 Prior to the recent fixes to check for partial updates, both read
205 and write_register_bytes always checked to see if any registers
206 were stale, and then called target_fetch_registers (-1) to update
207 the whole set. This caused really slowed things down for remote
208 targets. */
209
210/* Copy INLEN bytes of consecutive data from registers
211 starting with the INREGBYTE'th byte of register data
212 into memory at MYADDR. */
213
214void
61a0eb5b 215read_register_bytes (int in_start, char *in_buf, int in_len)
32178cab 216{
61a0eb5b 217 int in_end = in_start + in_len;
5ebd2499 218 int regnum;
61a0eb5b 219 char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
220
221 /* See if we are trying to read bytes from out-of-date registers. If so,
222 update just those registers. */
223
5ebd2499 224 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab 225 {
61a0eb5b
AC
226 int reg_start;
227 int reg_end;
228 int reg_len;
229 int start;
230 int end;
231 int byte;
32178cab 232
5ebd2499 233 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
32178cab
MS
234 continue;
235
61a0eb5b
AC
236 reg_start = REGISTER_BYTE (regnum);
237 reg_len = REGISTER_RAW_SIZE (regnum);
238 reg_end = reg_start + reg_len;
32178cab 239
61a0eb5b 240 if (reg_end <= in_start || in_end <= reg_start)
5ebd2499 241 /* The range the user wants to read doesn't overlap with regnum. */
32178cab
MS
242 continue;
243
61a0eb5b
AC
244 /* Force the cache to fetch the entire register. */
245 read_register_gen (regnum, reg_buf);
32178cab 246
61a0eb5b
AC
247 /* Legacy note: This function, for some reason, allows a NULL
248 input buffer. If the buffer is NULL, the registers are still
249 fetched, just the final transfer is skipped. */
250 if (in_buf == NULL)
251 continue;
252
253 /* start = max (reg_start, in_start) */
254 if (reg_start > in_start)
255 start = reg_start;
256 else
257 start = in_start;
258
259 /* end = min (reg_end, in_end) */
260 if (reg_end < in_end)
261 end = reg_end;
262 else
263 end = in_end;
264
265 /* Transfer just the bytes common to both IN_BUF and REG_BUF */
266 for (byte = start; byte < end; byte++)
165cd47f 267 {
61a0eb5b 268 in_buf[byte - in_start] = reg_buf[byte - reg_start];
165cd47f 269 }
32178cab 270 }
32178cab
MS
271}
272
5ebd2499
ND
273/* Read register REGNUM into memory at MYADDR, which must be large
274 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
32178cab
MS
275 register is known to be the size of a CORE_ADDR or smaller,
276 read_register can be used instead. */
277
61a0eb5b
AC
278static void
279legacy_read_register_gen (int regnum, char *myaddr)
32178cab 280{
61a0eb5b 281 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
39f77062 282 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
283 {
284 registers_changed ();
39f77062 285 registers_ptid = inferior_ptid;
32178cab
MS
286 }
287
7302a204
ND
288 if (!register_cached (regnum))
289 fetch_register (regnum);
290
291 memcpy (myaddr, register_buffer (regnum),
5ebd2499 292 REGISTER_RAW_SIZE (regnum));
32178cab
MS
293}
294
61a0eb5b
AC
295void
296regcache_read (int rawnum, char *buf)
297{
298 gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
299 /* For moment, just use underlying legacy code. Ulgh!!! */
300 legacy_read_register_gen (rawnum, buf);
301}
302
303void
304read_register_gen (int regnum, char *buf)
305{
306 if (! gdbarch_register_read_p (current_gdbarch))
307 {
308 legacy_read_register_gen (regnum, buf);
309 return;
310 }
311 gdbarch_register_read (current_gdbarch, regnum, buf);
312}
313
314
5ebd2499
ND
315/* Write register REGNUM at MYADDR to the target. MYADDR points at
316 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
32178cab 317
61a0eb5b
AC
318static void
319legacy_write_register_gen (int regnum, char *myaddr)
32178cab
MS
320{
321 int size;
61a0eb5b 322 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
32178cab
MS
323
324 /* On the sparc, writing %g0 is a no-op, so we don't even want to
325 change the registers array if something writes to this register. */
5ebd2499 326 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
327 return;
328
39f77062 329 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
330 {
331 registers_changed ();
39f77062 332 registers_ptid = inferior_ptid;
32178cab
MS
333 }
334
5ebd2499 335 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
336
337 /* If we have a valid copy of the register, and new value == old value,
338 then don't bother doing the actual store. */
339
7302a204
ND
340 if (register_cached (regnum)
341 && memcmp (register_buffer (regnum), myaddr, size) == 0)
32178cab
MS
342 return;
343
7302a204 344 if (real_register (regnum))
fcdc5976 345 target_prepare_to_store ();
32178cab 346
7302a204 347 memcpy (register_buffer (regnum), myaddr, size);
32178cab 348
7302a204
ND
349 set_register_cached (regnum, 1);
350 store_register (regnum);
32178cab
MS
351}
352
61a0eb5b
AC
353void
354regcache_write (int rawnum, char *buf)
355{
356 gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
357 /* For moment, just use underlying legacy code. Ulgh!!! */
358 legacy_write_register_gen (rawnum, buf);
359}
360
361void
362write_register_gen (int regnum, char *buf)
363{
364 if (! gdbarch_register_write_p (current_gdbarch))
365 {
366 legacy_write_register_gen (regnum, buf);
367 return;
368 }
369 gdbarch_register_write (current_gdbarch, regnum, buf);
370}
371
32178cab
MS
372/* Copy INLEN bytes of consecutive data from memory at MYADDR
373 into registers starting with the MYREGSTART'th byte of register data. */
374
375void
376write_register_bytes (int myregstart, char *myaddr, int inlen)
377{
378 int myregend = myregstart + inlen;
5ebd2499 379 int regnum;
32178cab
MS
380
381 target_prepare_to_store ();
382
383 /* Scan through the registers updating any that are covered by the
384 range myregstart<=>myregend using write_register_gen, which does
385 nice things like handling threads, and avoiding updates when the
386 new and old contents are the same. */
387
5ebd2499 388 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
389 {
390 int regstart, regend;
391
5ebd2499
ND
392 regstart = REGISTER_BYTE (regnum);
393 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
394
395 /* Is this register completely outside the range the user is writing? */
396 if (myregend <= regstart || regend <= myregstart)
397 /* do nothing */ ;
398
399 /* Is this register completely within the range the user is writing? */
400 else if (myregstart <= regstart && regend <= myregend)
5ebd2499 401 write_register_gen (regnum, myaddr + (regstart - myregstart));
32178cab
MS
402
403 /* The register partially overlaps the range being written. */
404 else
405 {
e6cbd02a 406 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
407 /* What's the overlap between this register's bytes and
408 those the caller wants to write? */
409 int overlapstart = max (regstart, myregstart);
410 int overlapend = min (regend, myregend);
411
412 /* We may be doing a partial update of an invalid register.
413 Update it from the target before scribbling on it. */
5ebd2499 414 read_register_gen (regnum, regbuf);
32178cab
MS
415
416 memcpy (registers + overlapstart,
417 myaddr + (overlapstart - myregstart),
418 overlapend - overlapstart);
419
7302a204 420 store_register (regnum);
32178cab
MS
421 }
422 }
423}
424
425
5ebd2499 426/* Return the contents of register REGNUM as an unsigned integer. */
32178cab 427
173155e8 428ULONGEST
5ebd2499 429read_register (int regnum)
32178cab 430{
61a0eb5b
AC
431 char *buf = alloca (REGISTER_RAW_SIZE (regnum));
432 read_register_gen (regnum, buf);
433 return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
32178cab
MS
434}
435
173155e8 436ULONGEST
39f77062 437read_register_pid (int regnum, ptid_t ptid)
32178cab 438{
39f77062 439 ptid_t save_ptid;
32178cab
MS
440 int save_pid;
441 CORE_ADDR retval;
442
39f77062 443 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 444 return read_register (regnum);
32178cab 445
39f77062 446 save_ptid = inferior_ptid;
32178cab 447
39f77062 448 inferior_ptid = ptid;
32178cab 449
5ebd2499 450 retval = read_register (regnum);
32178cab 451
39f77062 452 inferior_ptid = save_ptid;
32178cab
MS
453
454 return retval;
455}
456
5ebd2499 457/* Return the contents of register REGNUM as a signed integer. */
173155e8
AC
458
459LONGEST
5ebd2499 460read_signed_register (int regnum)
173155e8 461{
61a0eb5b
AC
462 void *buf = alloca (REGISTER_RAW_SIZE (regnum));
463 read_register_gen (regnum, buf);
464 return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
173155e8
AC
465}
466
467LONGEST
39f77062 468read_signed_register_pid (int regnum, ptid_t ptid)
173155e8 469{
39f77062 470 ptid_t save_ptid;
173155e8
AC
471 LONGEST retval;
472
39f77062 473 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 474 return read_signed_register (regnum);
173155e8 475
39f77062 476 save_ptid = inferior_ptid;
173155e8 477
39f77062 478 inferior_ptid = ptid;
173155e8 479
5ebd2499 480 retval = read_signed_register (regnum);
173155e8 481
39f77062 482 inferior_ptid = save_ptid;
173155e8
AC
483
484 return retval;
485}
486
5ebd2499 487/* Store VALUE into the raw contents of register number REGNUM. */
32178cab
MS
488
489void
5ebd2499 490write_register (int regnum, LONGEST val)
32178cab 491{
61a0eb5b 492 void *buf;
32178cab 493 int size;
5ebd2499 494 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
495 buf = alloca (size);
496 store_signed_integer (buf, size, (LONGEST) val);
61a0eb5b 497 write_register_gen (regnum, buf);
32178cab
MS
498}
499
500void
39f77062 501write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
32178cab 502{
39f77062 503 ptid_t save_ptid;
32178cab 504
39f77062 505 if (ptid_equal (ptid, inferior_ptid))
32178cab 506 {
5ebd2499 507 write_register (regnum, val);
32178cab
MS
508 return;
509 }
510
39f77062 511 save_ptid = inferior_ptid;
32178cab 512
39f77062 513 inferior_ptid = ptid;
32178cab 514
5ebd2499 515 write_register (regnum, val);
32178cab 516
39f77062 517 inferior_ptid = save_ptid;
32178cab
MS
518}
519
520/* SUPPLY_REGISTER()
521
5ebd2499 522 Record that register REGNUM contains VAL. This is used when the
32178cab
MS
523 value is obtained from the inferior or core dump, so there is no
524 need to store the value there.
525
526 If VAL is a NULL pointer, then it's probably an unsupported register.
5ebd2499 527 We just set its value to all zeros. We might want to record this
32178cab
MS
528 fact, and report it to the users of read_register and friends. */
529
530void
5ebd2499 531supply_register (int regnum, char *val)
32178cab
MS
532{
533#if 1
39f77062 534 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
535 {
536 registers_changed ();
39f77062 537 registers_ptid = inferior_ptid;
32178cab
MS
538 }
539#endif
540
7302a204 541 set_register_cached (regnum, 1);
32178cab 542 if (val)
7302a204 543 memcpy (register_buffer (regnum), val,
5ebd2499 544 REGISTER_RAW_SIZE (regnum));
32178cab 545 else
7302a204 546 memset (register_buffer (regnum), '\000',
5ebd2499 547 REGISTER_RAW_SIZE (regnum));
32178cab
MS
548
549 /* On some architectures, e.g. HPPA, there are a few stray bits in
550 some registers, that the rest of the code would like to ignore. */
551
61a0eb5b
AC
552 /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
553 going to be deprecated. Instead architectures will leave the raw
554 register value as is and instead clean things up as they pass
555 through the method gdbarch_register_read() clean up the
556 values. */
557
32178cab 558#ifdef CLEAN_UP_REGISTER_VALUE
7302a204 559 CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
32178cab
MS
560#endif
561}
562
563/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
564 Special handling for registers PC, SP, and FP. */
565
4e052eda
AC
566/* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
567 read_pc_pid(), read_pc(), generic_target_write_pc(),
568 write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
569 generic_target_write_sp(), write_sp(), generic_target_read_fp(),
570 read_fp(), generic_target_write_fp(), write_fp will eventually be
571 moved out of the reg-cache into either frame.[hc] or to the
572 multi-arch framework. The are not part of the raw register cache. */
573
32178cab
MS
574/* This routine is getting awfully cluttered with #if's. It's probably
575 time to turn this into READ_PC and define it in the tm.h file.
576 Ditto for write_pc.
577
578 1999-06-08: The following were re-written so that it assumes the
8e1a459b 579 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
580 version of that macro is made available where needed.
581
582 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
583 by the multi-arch framework, it will eventually be possible to
584 eliminate the intermediate read_pc_pid(). The client would call
585 TARGET_READ_PC directly. (cagney). */
586
32178cab 587CORE_ADDR
39f77062 588generic_target_read_pc (ptid_t ptid)
32178cab
MS
589{
590#ifdef PC_REGNUM
591 if (PC_REGNUM >= 0)
592 {
39f77062 593 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
32178cab
MS
594 return pc_val;
595 }
596#endif
8e65ff28
AC
597 internal_error (__FILE__, __LINE__,
598 "generic_target_read_pc");
32178cab
MS
599 return 0;
600}
601
602CORE_ADDR
39f77062 603read_pc_pid (ptid_t ptid)
32178cab 604{
39f77062 605 ptid_t saved_inferior_ptid;
32178cab
MS
606 CORE_ADDR pc_val;
607
39f77062
KB
608 /* In case ptid != inferior_ptid. */
609 saved_inferior_ptid = inferior_ptid;
610 inferior_ptid = ptid;
32178cab 611
39f77062 612 pc_val = TARGET_READ_PC (ptid);
32178cab 613
39f77062 614 inferior_ptid = saved_inferior_ptid;
32178cab
MS
615 return pc_val;
616}
617
618CORE_ADDR
619read_pc (void)
620{
39f77062 621 return read_pc_pid (inferior_ptid);
32178cab
MS
622}
623
32178cab 624void
39f77062 625generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
32178cab
MS
626{
627#ifdef PC_REGNUM
628 if (PC_REGNUM >= 0)
39f77062 629 write_register_pid (PC_REGNUM, pc, ptid);
32178cab 630 if (NPC_REGNUM >= 0)
39f77062 631 write_register_pid (NPC_REGNUM, pc + 4, ptid);
32178cab 632 if (NNPC_REGNUM >= 0)
39f77062 633 write_register_pid (NNPC_REGNUM, pc + 8, ptid);
32178cab 634#else
8e65ff28
AC
635 internal_error (__FILE__, __LINE__,
636 "generic_target_write_pc");
32178cab
MS
637#endif
638}
639
640void
39f77062 641write_pc_pid (CORE_ADDR pc, ptid_t ptid)
32178cab 642{
39f77062 643 ptid_t saved_inferior_ptid;
32178cab 644
39f77062
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645 /* In case ptid != inferior_ptid. */
646 saved_inferior_ptid = inferior_ptid;
647 inferior_ptid = ptid;
32178cab 648
39f77062 649 TARGET_WRITE_PC (pc, ptid);
32178cab 650
39f77062 651 inferior_ptid = saved_inferior_ptid;
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652}
653
654void
655write_pc (CORE_ADDR pc)
656{
39f77062 657 write_pc_pid (pc, inferior_ptid);
32178cab
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658}
659
660/* Cope with strage ways of getting to the stack and frame pointers */
661
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662CORE_ADDR
663generic_target_read_sp (void)
664{
665#ifdef SP_REGNUM
666 if (SP_REGNUM >= 0)
667 return read_register (SP_REGNUM);
668#endif
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669 internal_error (__FILE__, __LINE__,
670 "generic_target_read_sp");
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671}
672
673CORE_ADDR
674read_sp (void)
675{
676 return TARGET_READ_SP ();
677}
678
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679void
680generic_target_write_sp (CORE_ADDR val)
681{
682#ifdef SP_REGNUM
683 if (SP_REGNUM >= 0)
684 {
685 write_register (SP_REGNUM, val);
686 return;
687 }
688#endif
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689 internal_error (__FILE__, __LINE__,
690 "generic_target_write_sp");
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691}
692
693void
694write_sp (CORE_ADDR val)
695{
696 TARGET_WRITE_SP (val);
697}
698
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699CORE_ADDR
700generic_target_read_fp (void)
701{
702#ifdef FP_REGNUM
703 if (FP_REGNUM >= 0)
704 return read_register (FP_REGNUM);
705#endif
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706 internal_error (__FILE__, __LINE__,
707 "generic_target_read_fp");
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708}
709
710CORE_ADDR
711read_fp (void)
712{
713 return TARGET_READ_FP ();
714}
715
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716void
717generic_target_write_fp (CORE_ADDR val)
718{
719#ifdef FP_REGNUM
720 if (FP_REGNUM >= 0)
721 {
722 write_register (FP_REGNUM, val);
723 return;
724 }
725#endif
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726 internal_error (__FILE__, __LINE__,
727 "generic_target_write_fp");
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728}
729
730void
731write_fp (CORE_ADDR val)
732{
733 TARGET_WRITE_FP (val);
734}
735
705152c5
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736/* ARGSUSED */
737static void
738reg_flush_command (char *command, int from_tty)
739{
740 /* Force-flush the register cache. */
741 registers_changed ();
742 if (from_tty)
743 printf_filtered ("Register cache flushed.\n");
744}
745
746
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747static void
748build_regcache (void)
749{
750 /* We allocate some extra slop since we do a lot of memcpy's around
751 `registers', and failing-soft is better than failing hard. */
752 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
fcdc5976
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753 int sizeof_register_valid =
754 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
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755 registers = xmalloc (sizeof_registers);
756 memset (registers, 0, sizeof_registers);
757 register_valid = xmalloc (sizeof_register_valid);
758 memset (register_valid, 0, sizeof_register_valid);
759}
760
761void
762_initialize_regcache (void)
763{
764 build_regcache ();
765
766 register_gdbarch_swap (&registers, sizeof (registers), NULL);
767 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
768 register_gdbarch_swap (NULL, 0, build_regcache);
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769
770 add_com ("flushregs", class_maintenance, reg_flush_command,
771 "Force gdb to flush its register cache (maintainer command)");
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772
773 /* Initialize the thread/process associated with the current set of
774 registers. For now, -1 is special, and means `no current process'. */
775 registers_ptid = pid_to_ptid (-1);
32178cab 776}
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