Commit | Line | Data |
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32178cab | 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
3fadccb3 AC |
2 | |
3 | Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, | |
4 | 2001, 2002 Free Software Foundation, Inc. | |
32178cab MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
32178cab MS |
24 | #include "inferior.h" |
25 | #include "target.h" | |
26 | #include "gdbarch.h" | |
705152c5 | 27 | #include "gdbcmd.h" |
4e052eda | 28 | #include "regcache.h" |
61a0eb5b | 29 | #include "gdb_assert.h" |
b66d6d2e | 30 | #include "gdb_string.h" |
32178cab MS |
31 | |
32 | /* | |
33 | * DATA STRUCTURE | |
34 | * | |
35 | * Here is the actual register cache. | |
36 | */ | |
37 | ||
3fadccb3 AC |
38 | /* Per-architecture object describing the layout of a register cache. |
39 | Computed once when the architecture is created */ | |
40 | ||
41 | struct gdbarch_data *regcache_descr_handle; | |
42 | ||
43 | struct regcache_descr | |
44 | { | |
45 | /* The architecture this descriptor belongs to. */ | |
46 | struct gdbarch *gdbarch; | |
47 | ||
48 | /* Is this a ``legacy'' register cache? Such caches reserve space | |
49 | for raw and pseudo registers and allow access to both. */ | |
50 | int legacy_p; | |
51 | ||
52 | /* The raw register cache. This should contain just [0 | |
53 | .. NUM_RAW_REGISTERS). However, for older targets, it contains | |
54 | space for the full [0 .. NUM_RAW_REGISTERS + | |
55 | NUM_PSEUDO_REGISTERS). */ | |
56 | int nr_raw_registers; | |
57 | long sizeof_raw_registers; | |
58 | long sizeof_raw_register_valid_p; | |
59 | ||
d138e37a AC |
60 | /* The cooked register space. Each cooked register in the range |
61 | [0..NR_RAW_REGISTERS) is direct-mapped onto the corresponding raw | |
62 | register. The remaining [NR_RAW_REGISTERS | |
63 | .. NR_COOKED_REGISTERS) (a.k.a. pseudo regiters) are mapped onto | |
64 | both raw registers and memory by the architecture methods | |
65 | gdbarch_register_read and gdbarch_register_write. */ | |
66 | int nr_cooked_registers; | |
67 | ||
68 | /* Offset and size (in 8 bit bytes), of reach register in the | |
69 | register cache. All registers (including those in the range | |
70 | [NR_RAW_REGISTERS .. NR_COOKED_REGISTERS) are given an offset. | |
71 | Assigning all registers an offset makes it possible to keep | |
72 | legacy code, such as that found in read_register_bytes() and | |
73 | write_register_bytes() working. */ | |
3fadccb3 | 74 | long *register_offset; |
3fadccb3 | 75 | long *sizeof_register; |
3fadccb3 | 76 | |
d138e37a AC |
77 | /* Useful constant. Largest of all the registers. */ |
78 | long max_register_size; | |
3fadccb3 AC |
79 | }; |
80 | ||
81 | static void * | |
82 | init_legacy_regcache_descr (struct gdbarch *gdbarch) | |
83 | { | |
84 | int i; | |
85 | struct regcache_descr *descr; | |
86 | /* FIXME: cagney/2002-05-11: gdbarch_data() should take that | |
87 | ``gdbarch'' as a parameter. */ | |
88 | gdb_assert (gdbarch != NULL); | |
89 | ||
90 | descr = XMALLOC (struct regcache_descr); | |
91 | descr->gdbarch = gdbarch; | |
92 | descr->legacy_p = 1; | |
93 | ||
94 | /* FIXME: cagney/2002-05-11: Shouldn't be including pseudo-registers | |
95 | in the register buffer. Unfortunatly some architectures do. */ | |
d138e37a AC |
96 | descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS; |
97 | descr->nr_raw_registers = descr->nr_cooked_registers; | |
98 | descr->sizeof_raw_register_valid_p = descr->nr_cooked_registers; | |
3fadccb3 AC |
99 | |
100 | /* FIXME: cagney/2002-05-11: Instead of using REGISTER_BYTE() this | |
101 | code should compute the offets et.al. at runtime. This currently | |
102 | isn't possible because some targets overlap register locations - | |
103 | see the mess in read_register_bytes() and write_register_bytes() | |
104 | registers. */ | |
d138e37a AC |
105 | descr->sizeof_register = XCALLOC (descr->nr_cooked_registers, long); |
106 | descr->register_offset = XCALLOC (descr->nr_cooked_registers, long); | |
3fadccb3 | 107 | descr->max_register_size = 0; |
d138e37a | 108 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
109 | { |
110 | descr->register_offset[i] = REGISTER_BYTE (i); | |
111 | descr->sizeof_register[i] = REGISTER_RAW_SIZE (i); | |
112 | if (descr->max_register_size < REGISTER_RAW_SIZE (i)) | |
113 | descr->max_register_size = REGISTER_RAW_SIZE (i); | |
114 | } | |
115 | ||
116 | /* Come up with the real size of the registers buffer. */ | |
117 | descr->sizeof_raw_registers = REGISTER_BYTES; /* OK use. */ | |
d138e37a | 118 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
119 | { |
120 | long regend; | |
121 | /* Keep extending the buffer so that there is always enough | |
122 | space for all registers. The comparison is necessary since | |
123 | legacy code is free to put registers in random places in the | |
124 | buffer separated by holes. Once REGISTER_BYTE() is killed | |
125 | this can be greatly simplified. */ | |
126 | /* FIXME: cagney/2001-12-04: This code shouldn't need to use | |
127 | REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the | |
128 | buffer out so that certain registers just happen to overlap. | |
129 | Ulgh! New targets use gdbarch's register read/write and | |
130 | entirely avoid this uglyness. */ | |
131 | regend = descr->register_offset[i] + descr->sizeof_register[i]; | |
132 | if (descr->sizeof_raw_registers < regend) | |
133 | descr->sizeof_raw_registers = regend; | |
134 | } | |
135 | return descr; | |
136 | } | |
137 | ||
138 | static void * | |
139 | init_regcache_descr (struct gdbarch *gdbarch) | |
140 | { | |
141 | int i; | |
142 | struct regcache_descr *descr; | |
143 | gdb_assert (gdbarch != NULL); | |
144 | ||
145 | /* If an old style architecture, construct the register cache | |
146 | description using all the register macros. */ | |
d8124050 AC |
147 | if (!gdbarch_pseudo_register_read_p (gdbarch) |
148 | && !gdbarch_pseudo_register_write_p (gdbarch)) | |
3fadccb3 AC |
149 | return init_legacy_regcache_descr (gdbarch); |
150 | ||
151 | descr = XMALLOC (struct regcache_descr); | |
152 | descr->gdbarch = gdbarch; | |
153 | descr->legacy_p = 0; | |
154 | ||
d138e37a AC |
155 | /* Total size of the register space. The raw registers are mapped |
156 | directly onto the raw register cache while the pseudo's are | |
3fadccb3 | 157 | either mapped onto raw-registers or memory. */ |
d138e37a | 158 | descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS; |
3fadccb3 AC |
159 | |
160 | /* Construct a strictly RAW register cache. Don't allow pseudo's | |
161 | into the register cache. */ | |
162 | descr->nr_raw_registers = NUM_REGS; | |
163 | descr->sizeof_raw_register_valid_p = NUM_REGS; | |
164 | ||
165 | /* Lay out the register cache. The pseud-registers are included in | |
166 | the layout even though their value isn't stored in the register | |
167 | cache. Some code, via read_register_bytes() access a register | |
168 | using an offset/length rather than a register number. | |
169 | ||
170 | NOTE: cagney/2002-05-22: Only REGISTER_VIRTUAL_TYPE() needs to be | |
171 | used when constructing the register cache. It is assumed that | |
172 | register raw size, virtual size and type length of the type are | |
173 | all the same. */ | |
174 | ||
175 | { | |
176 | long offset = 0; | |
d138e37a AC |
177 | descr->sizeof_register = XCALLOC (descr->nr_cooked_registers, long); |
178 | descr->register_offset = XCALLOC (descr->nr_cooked_registers, long); | |
3fadccb3 | 179 | descr->max_register_size = 0; |
d138e37a | 180 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
181 | { |
182 | descr->sizeof_register[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i)); | |
183 | descr->register_offset[i] = offset; | |
184 | offset += descr->sizeof_register[i]; | |
185 | if (descr->max_register_size < descr->sizeof_register[i]) | |
186 | descr->max_register_size = descr->sizeof_register[i]; | |
187 | } | |
188 | /* Set the real size of the register cache buffer. */ | |
189 | /* FIXME: cagney/2002-05-22: Should only need to allocate space | |
190 | for the raw registers. Unfortunatly some code still accesses | |
191 | the register array directly using the global registers[]. | |
192 | Until that code has been purged, play safe and over allocating | |
193 | the register buffer. Ulgh! */ | |
194 | descr->sizeof_raw_registers = offset; | |
195 | /* = descr->register_offset[descr->nr_raw_registers]; */ | |
196 | } | |
197 | ||
198 | #if 0 | |
199 | /* Sanity check. Confirm that the assumptions about gdbarch are | |
200 | true. The REGCACHE_DESCR_HANDLE is set before doing the checks | |
201 | so that targets using the generic methods supplied by regcache | |
202 | don't go into infinite recursion trying to, again, create the | |
203 | regcache. */ | |
204 | set_gdbarch_data (gdbarch, regcache_descr_handle, descr); | |
d138e37a | 205 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
206 | { |
207 | gdb_assert (descr->sizeof_register[i] == REGISTER_RAW_SIZE (i)); | |
208 | gdb_assert (descr->sizeof_register[i] == REGISTER_VIRTUAL_SIZE (i)); | |
209 | gdb_assert (descr->register_offset[i] == REGISTER_BYTE (i)); | |
210 | } | |
211 | /* gdb_assert (descr->sizeof_raw_registers == REGISTER_BYTES (i)); */ | |
212 | #endif | |
213 | ||
214 | return descr; | |
215 | } | |
216 | ||
217 | static struct regcache_descr * | |
218 | regcache_descr (struct gdbarch *gdbarch) | |
219 | { | |
220 | return gdbarch_data (gdbarch, regcache_descr_handle); | |
221 | } | |
222 | ||
223 | static void | |
224 | xfree_regcache_descr (struct gdbarch *gdbarch, void *ptr) | |
225 | { | |
226 | struct regcache_descr *descr = ptr; | |
227 | if (descr == NULL) | |
228 | return; | |
229 | xfree (descr->register_offset); | |
230 | xfree (descr->sizeof_register); | |
231 | descr->register_offset = NULL; | |
232 | descr->sizeof_register = NULL; | |
233 | xfree (descr); | |
234 | } | |
235 | ||
236 | /* The register cache for storing raw register values. */ | |
237 | ||
238 | struct regcache | |
239 | { | |
240 | struct regcache_descr *descr; | |
241 | char *raw_registers; | |
242 | char *raw_register_valid_p; | |
243 | /* If a value isn't in the cache should the corresponding target be | |
244 | queried for a value. */ | |
245 | int passthrough_p; | |
246 | }; | |
247 | ||
248 | struct regcache * | |
249 | regcache_xmalloc (struct gdbarch *gdbarch) | |
250 | { | |
251 | struct regcache_descr *descr; | |
252 | struct regcache *regcache; | |
253 | gdb_assert (gdbarch != NULL); | |
254 | descr = regcache_descr (gdbarch); | |
255 | regcache = XMALLOC (struct regcache); | |
256 | regcache->descr = descr; | |
257 | regcache->raw_registers | |
258 | = XCALLOC (descr->sizeof_raw_registers, char); | |
259 | regcache->raw_register_valid_p | |
260 | = XCALLOC (descr->sizeof_raw_register_valid_p, char); | |
261 | regcache->passthrough_p = 0; | |
262 | return regcache; | |
263 | } | |
264 | ||
265 | void | |
266 | regcache_xfree (struct regcache *regcache) | |
267 | { | |
268 | if (regcache == NULL) | |
269 | return; | |
270 | xfree (regcache->raw_registers); | |
271 | xfree (regcache->raw_register_valid_p); | |
272 | xfree (regcache); | |
273 | } | |
274 | ||
36160dc4 AC |
275 | void |
276 | do_regcache_xfree (void *data) | |
277 | { | |
278 | regcache_xfree (data); | |
279 | } | |
280 | ||
281 | struct cleanup * | |
282 | make_cleanup_regcache_xfree (struct regcache *regcache) | |
283 | { | |
284 | return make_cleanup (do_regcache_xfree, regcache); | |
285 | } | |
286 | ||
3fadccb3 AC |
287 | void |
288 | regcache_cpy (struct regcache *dst, struct regcache *src) | |
289 | { | |
290 | int i; | |
291 | char *buf; | |
292 | gdb_assert (src != NULL && dst != NULL); | |
293 | gdb_assert (src->descr->gdbarch == dst->descr->gdbarch); | |
294 | gdb_assert (src != dst); | |
295 | /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite. | |
296 | It keeps the existing code working where things rely on going | |
297 | through to the register cache. */ | |
298 | if (src == current_regcache && src->descr->legacy_p) | |
299 | { | |
300 | /* ULGH!!!! Old way. Use REGISTER bytes and let code below | |
301 | untangle fetch. */ | |
302 | read_register_bytes (0, dst->raw_registers, REGISTER_BYTES); | |
303 | return; | |
304 | } | |
305 | /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite. | |
306 | It keeps the existing code working where things rely on going | |
307 | through to the register cache. */ | |
308 | if (dst == current_regcache && dst->descr->legacy_p) | |
309 | { | |
310 | /* ULGH!!!! Old way. Use REGISTER bytes and let code below | |
311 | untangle fetch. */ | |
312 | write_register_bytes (0, src->raw_registers, REGISTER_BYTES); | |
313 | return; | |
314 | } | |
315 | buf = alloca (src->descr->max_register_size); | |
316 | for (i = 0; i < src->descr->nr_raw_registers; i++) | |
317 | { | |
318 | /* Should we worry about the valid bit here? */ | |
0818c12a AC |
319 | regcache_raw_read (src, i, buf); |
320 | regcache_raw_write (dst, i, buf); | |
3fadccb3 AC |
321 | } |
322 | } | |
323 | ||
324 | void | |
325 | regcache_cpy_no_passthrough (struct regcache *dst, struct regcache *src) | |
326 | { | |
327 | int i; | |
328 | gdb_assert (src != NULL && dst != NULL); | |
329 | gdb_assert (src->descr->gdbarch == dst->descr->gdbarch); | |
330 | /* NOTE: cagney/2002-05-17: Don't let the caller do a no-passthrough | |
331 | move of data into the current_regcache(). Doing this would be | |
332 | silly - it would mean that valid_p would be completly invalid. */ | |
333 | gdb_assert (dst != current_regcache); | |
334 | memcpy (dst->raw_registers, src->raw_registers, | |
335 | dst->descr->sizeof_raw_registers); | |
336 | memcpy (dst->raw_register_valid_p, src->raw_register_valid_p, | |
337 | dst->descr->sizeof_raw_register_valid_p); | |
338 | } | |
339 | ||
340 | struct regcache * | |
341 | regcache_dup (struct regcache *src) | |
342 | { | |
343 | struct regcache *newbuf; | |
344 | gdb_assert (current_regcache != NULL); | |
345 | newbuf = regcache_xmalloc (src->descr->gdbarch); | |
346 | regcache_cpy (newbuf, src); | |
347 | return newbuf; | |
348 | } | |
349 | ||
350 | struct regcache * | |
351 | regcache_dup_no_passthrough (struct regcache *src) | |
352 | { | |
353 | struct regcache *newbuf; | |
354 | gdb_assert (current_regcache != NULL); | |
355 | newbuf = regcache_xmalloc (src->descr->gdbarch); | |
356 | regcache_cpy_no_passthrough (newbuf, src); | |
357 | return newbuf; | |
358 | } | |
359 | ||
360 | int | |
361 | regcache_valid_p (struct regcache *regcache, int regnum) | |
362 | { | |
363 | gdb_assert (regcache != NULL); | |
364 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
365 | return regcache->raw_register_valid_p[regnum]; | |
366 | } | |
367 | ||
368 | CORE_ADDR | |
0818c12a | 369 | regcache_raw_read_as_address (struct regcache *regcache, int regnum) |
3fadccb3 AC |
370 | { |
371 | char *buf; | |
372 | gdb_assert (regcache != NULL); | |
373 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
374 | buf = alloca (regcache->descr->sizeof_register[regnum]); | |
0818c12a | 375 | regcache_raw_read (regcache, regnum, buf); |
3fadccb3 AC |
376 | return extract_address (buf, regcache->descr->sizeof_register[regnum]); |
377 | } | |
378 | ||
379 | char * | |
380 | deprecated_grub_regcache_for_registers (struct regcache *regcache) | |
381 | { | |
382 | return regcache->raw_registers; | |
383 | } | |
384 | ||
385 | char * | |
386 | deprecated_grub_regcache_for_register_valid (struct regcache *regcache) | |
387 | { | |
388 | return regcache->raw_register_valid_p; | |
389 | } | |
390 | ||
391 | /* Global structure containing the current regcache. */ | |
392 | /* FIXME: cagney/2002-05-11: The two global arrays registers[] and | |
393 | register_valid[] currently point into this structure. */ | |
394 | struct regcache *current_regcache; | |
395 | ||
5ebd2499 | 396 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
32178cab MS |
397 | recording if the register values have been changed (eg. by the |
398 | user). Therefore all registers must be written back to the | |
399 | target when appropriate. */ | |
400 | ||
401 | /* REGISTERS contains the cached register values (in target byte order). */ | |
402 | ||
403 | char *registers; | |
404 | ||
405 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
406 | 1 if it has been fetched, and | |
407 | -1 if the register value was not available. | |
c97dcfc7 AC |
408 | |
409 | "Not available" indicates that the target is not not able to supply | |
410 | the register at this state. The register may become available at a | |
411 | later time (after the next resume). This often occures when GDB is | |
412 | manipulating a target that contains only a snapshot of the entire | |
413 | system being debugged - some of the registers in such a system may | |
414 | not have been saved. */ | |
32178cab MS |
415 | |
416 | signed char *register_valid; | |
417 | ||
39f77062 | 418 | /* The thread/process associated with the current set of registers. */ |
32178cab | 419 | |
39f77062 | 420 | static ptid_t registers_ptid; |
32178cab MS |
421 | |
422 | /* | |
423 | * FUNCTIONS: | |
424 | */ | |
425 | ||
426 | /* REGISTER_CACHED() | |
427 | ||
428 | Returns 0 if the value is not in the cache (needs fetch). | |
429 | >0 if the value is in the cache. | |
430 | <0 if the value is permanently unavailable (don't ask again). */ | |
431 | ||
432 | int | |
433 | register_cached (int regnum) | |
434 | { | |
435 | return register_valid[regnum]; | |
436 | } | |
437 | ||
7302a204 ND |
438 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
439 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ | |
440 | ||
441 | void | |
442 | set_register_cached (int regnum, int state) | |
443 | { | |
444 | register_valid[regnum] = state; | |
445 | } | |
446 | ||
2dc4e391 DT |
447 | /* REGISTER_CHANGED |
448 | ||
449 | invalidate a single register REGNUM in the cache */ | |
450 | void | |
451 | register_changed (int regnum) | |
452 | { | |
7302a204 ND |
453 | set_register_cached (regnum, 0); |
454 | } | |
455 | ||
456 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, | |
457 | else return a pointer to the start of the cache buffer. */ | |
458 | ||
193cb69f | 459 | static char * |
3fadccb3 | 460 | register_buffer (struct regcache *regcache, int regnum) |
7302a204 | 461 | { |
3fadccb3 | 462 | return regcache->raw_registers + regcache->descr->register_offset[regnum]; |
7302a204 ND |
463 | } |
464 | ||
465 | /* Return whether register REGNUM is a real register. */ | |
466 | ||
467 | static int | |
468 | real_register (int regnum) | |
469 | { | |
470 | return regnum >= 0 && regnum < NUM_REGS; | |
471 | } | |
472 | ||
473 | /* Return whether register REGNUM is a pseudo register. */ | |
474 | ||
475 | static int | |
476 | pseudo_register (int regnum) | |
477 | { | |
478 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; | |
479 | } | |
480 | ||
481 | /* Fetch register REGNUM into the cache. */ | |
482 | ||
483 | static void | |
484 | fetch_register (int regnum) | |
485 | { | |
31e9866e AC |
486 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
487 | pseudo-register as a way of handling registers that needed to be | |
488 | constructed from one or more raw registers. New targets instead | |
489 | use gdbarch register read/write. */ | |
490 | if (FETCH_PSEUDO_REGISTER_P () | |
491 | && pseudo_register (regnum)) | |
7302a204 | 492 | FETCH_PSEUDO_REGISTER (regnum); |
6af4589c MS |
493 | else |
494 | target_fetch_registers (regnum); | |
7302a204 ND |
495 | } |
496 | ||
497 | /* Write register REGNUM cached value to the target. */ | |
498 | ||
499 | static void | |
500 | store_register (int regnum) | |
501 | { | |
31e9866e AC |
502 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
503 | pseudo-register as a way of handling registers that needed to be | |
504 | constructed from one or more raw registers. New targets instead | |
505 | use gdbarch register read/write. */ | |
506 | if (STORE_PSEUDO_REGISTER_P () | |
507 | && pseudo_register (regnum)) | |
7302a204 | 508 | STORE_PSEUDO_REGISTER (regnum); |
6af4589c MS |
509 | else |
510 | target_store_registers (regnum); | |
2dc4e391 DT |
511 | } |
512 | ||
32178cab MS |
513 | /* Low level examining and depositing of registers. |
514 | ||
515 | The caller is responsible for making sure that the inferior is | |
516 | stopped before calling the fetching routines, or it will get | |
517 | garbage. (a change from GDB version 3, in which the caller got the | |
518 | value from the last stop). */ | |
519 | ||
520 | /* REGISTERS_CHANGED () | |
521 | ||
522 | Indicate that registers may have changed, so invalidate the cache. */ | |
523 | ||
524 | void | |
525 | registers_changed (void) | |
526 | { | |
527 | int i; | |
32178cab | 528 | |
39f77062 | 529 | registers_ptid = pid_to_ptid (-1); |
32178cab MS |
530 | |
531 | /* Force cleanup of any alloca areas if using C alloca instead of | |
532 | a builtin alloca. This particular call is used to clean up | |
533 | areas allocated by low level target code which may build up | |
534 | during lengthy interactions between gdb and the target before | |
535 | gdb gives control to the user (ie watchpoints). */ | |
536 | alloca (0); | |
537 | ||
31e9866e | 538 | for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++) |
7302a204 | 539 | set_register_cached (i, 0); |
32178cab MS |
540 | |
541 | if (registers_changed_hook) | |
542 | registers_changed_hook (); | |
543 | } | |
544 | ||
545 | /* REGISTERS_FETCHED () | |
546 | ||
547 | Indicate that all registers have been fetched, so mark them all valid. */ | |
548 | ||
31e9866e AC |
549 | /* NOTE: cagney/2001-12-04: This function does not set valid on the |
550 | pseudo-register range since pseudo registers are always supplied | |
551 | using supply_register(). */ | |
552 | /* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target | |
553 | code was blatting the registers[] array and then calling this. | |
554 | Since targets should only be using supply_register() the need for | |
555 | this function/hack is eliminated. */ | |
32178cab MS |
556 | |
557 | void | |
558 | registers_fetched (void) | |
559 | { | |
560 | int i; | |
32178cab | 561 | |
a728f042 | 562 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 563 | set_register_cached (i, 1); |
fcdc5976 | 564 | /* Do not assume that the pseudo-regs have also been fetched. |
31e9866e | 565 | Fetching all real regs NEVER accounts for pseudo-regs. */ |
32178cab MS |
566 | } |
567 | ||
568 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
569 | idea. They are inefficient because they need to check for partial | |
570 | updates, which can only be done by scanning through all of the | |
571 | registers and seeing if the bytes that are being read/written fall | |
572 | inside of an invalid register. [The main reason this is necessary | |
573 | is that register sizes can vary, so a simple index won't suffice.] | |
574 | It is far better to call read_register_gen and write_register_gen | |
575 | if you want to get at the raw register contents, as it only takes a | |
5ebd2499 | 576 | regnum as an argument, and therefore can't do a partial register |
32178cab MS |
577 | update. |
578 | ||
579 | Prior to the recent fixes to check for partial updates, both read | |
580 | and write_register_bytes always checked to see if any registers | |
581 | were stale, and then called target_fetch_registers (-1) to update | |
582 | the whole set. This caused really slowed things down for remote | |
583 | targets. */ | |
584 | ||
585 | /* Copy INLEN bytes of consecutive data from registers | |
586 | starting with the INREGBYTE'th byte of register data | |
587 | into memory at MYADDR. */ | |
588 | ||
589 | void | |
61a0eb5b | 590 | read_register_bytes (int in_start, char *in_buf, int in_len) |
32178cab | 591 | { |
61a0eb5b | 592 | int in_end = in_start + in_len; |
5ebd2499 | 593 | int regnum; |
61a0eb5b | 594 | char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
595 | |
596 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
597 | update just those registers. */ | |
598 | ||
5ebd2499 | 599 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab | 600 | { |
61a0eb5b AC |
601 | int reg_start; |
602 | int reg_end; | |
603 | int reg_len; | |
604 | int start; | |
605 | int end; | |
606 | int byte; | |
32178cab | 607 | |
61a0eb5b AC |
608 | reg_start = REGISTER_BYTE (regnum); |
609 | reg_len = REGISTER_RAW_SIZE (regnum); | |
610 | reg_end = reg_start + reg_len; | |
32178cab | 611 | |
61a0eb5b | 612 | if (reg_end <= in_start || in_end <= reg_start) |
5ebd2499 | 613 | /* The range the user wants to read doesn't overlap with regnum. */ |
32178cab MS |
614 | continue; |
615 | ||
275f450c AC |
616 | if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0') |
617 | /* Force the cache to fetch the entire register. */ | |
618 | read_register_gen (regnum, reg_buf); | |
619 | else | |
620 | /* Legacy note: even though this register is ``invalid'' we | |
621 | still need to return something. It would appear that some | |
622 | code relies on apparent gaps in the register array also | |
623 | being returned. */ | |
624 | /* FIXME: cagney/2001-08-18: This is just silly. It defeats | |
625 | the entire register read/write flow of control. Must | |
626 | resist temptation to return 0xdeadbeef. */ | |
627 | memcpy (reg_buf, registers + reg_start, reg_len); | |
32178cab | 628 | |
61a0eb5b AC |
629 | /* Legacy note: This function, for some reason, allows a NULL |
630 | input buffer. If the buffer is NULL, the registers are still | |
631 | fetched, just the final transfer is skipped. */ | |
632 | if (in_buf == NULL) | |
633 | continue; | |
634 | ||
635 | /* start = max (reg_start, in_start) */ | |
636 | if (reg_start > in_start) | |
637 | start = reg_start; | |
638 | else | |
639 | start = in_start; | |
640 | ||
641 | /* end = min (reg_end, in_end) */ | |
642 | if (reg_end < in_end) | |
643 | end = reg_end; | |
644 | else | |
645 | end = in_end; | |
646 | ||
647 | /* Transfer just the bytes common to both IN_BUF and REG_BUF */ | |
648 | for (byte = start; byte < end; byte++) | |
165cd47f | 649 | { |
61a0eb5b | 650 | in_buf[byte - in_start] = reg_buf[byte - reg_start]; |
165cd47f | 651 | } |
32178cab | 652 | } |
32178cab MS |
653 | } |
654 | ||
5ebd2499 ND |
655 | /* Read register REGNUM into memory at MYADDR, which must be large |
656 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the | |
32178cab MS |
657 | register is known to be the size of a CORE_ADDR or smaller, |
658 | read_register can be used instead. */ | |
659 | ||
61a0eb5b AC |
660 | static void |
661 | legacy_read_register_gen (int regnum, char *myaddr) | |
32178cab | 662 | { |
61a0eb5b | 663 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
39f77062 | 664 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
665 | { |
666 | registers_changed (); | |
39f77062 | 667 | registers_ptid = inferior_ptid; |
32178cab MS |
668 | } |
669 | ||
7302a204 ND |
670 | if (!register_cached (regnum)) |
671 | fetch_register (regnum); | |
672 | ||
3fadccb3 | 673 | memcpy (myaddr, register_buffer (current_regcache, regnum), |
5ebd2499 | 674 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
675 | } |
676 | ||
61a0eb5b | 677 | void |
1aaa5f99 | 678 | regcache_raw_read (struct regcache *regcache, int regnum, void *buf) |
61a0eb5b | 679 | { |
3fadccb3 AC |
680 | gdb_assert (regcache != NULL && buf != NULL); |
681 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
682 | if (regcache->descr->legacy_p | |
683 | && regcache->passthrough_p) | |
684 | { | |
685 | gdb_assert (regcache == current_regcache); | |
686 | /* For moment, just use underlying legacy code. Ulgh!!! This | |
687 | silently and very indirectly updates the regcache's regcache | |
688 | via the global register_valid[]. */ | |
689 | legacy_read_register_gen (regnum, buf); | |
690 | return; | |
691 | } | |
692 | /* Make certain that the register cache is up-to-date with respect | |
693 | to the current thread. This switching shouldn't be necessary | |
694 | only there is still only one target side register cache. Sigh! | |
695 | On the bright side, at least there is a regcache object. */ | |
696 | if (regcache->passthrough_p) | |
697 | { | |
698 | gdb_assert (regcache == current_regcache); | |
699 | if (! ptid_equal (registers_ptid, inferior_ptid)) | |
700 | { | |
701 | registers_changed (); | |
702 | registers_ptid = inferior_ptid; | |
703 | } | |
704 | if (!register_cached (regnum)) | |
705 | fetch_register (regnum); | |
706 | } | |
707 | /* Copy the value directly into the register cache. */ | |
708 | memcpy (buf, (regcache->raw_registers | |
709 | + regcache->descr->register_offset[regnum]), | |
710 | regcache->descr->sizeof_register[regnum]); | |
61a0eb5b AC |
711 | } |
712 | ||
713 | void | |
714 | read_register_gen (int regnum, char *buf) | |
715 | { | |
3fadccb3 AC |
716 | gdb_assert (current_regcache != NULL); |
717 | gdb_assert (current_regcache->descr->gdbarch == current_gdbarch); | |
718 | if (current_regcache->descr->legacy_p) | |
61a0eb5b AC |
719 | { |
720 | legacy_read_register_gen (regnum, buf); | |
721 | return; | |
722 | } | |
68365089 AC |
723 | regcache_cooked_read (current_regcache, regnum, buf); |
724 | } | |
725 | ||
726 | void | |
29e1842b | 727 | regcache_cooked_read (struct regcache *regcache, int regnum, void *buf) |
68365089 | 728 | { |
d138e37a | 729 | gdb_assert (regnum >= 0); |
68365089 AC |
730 | gdb_assert (regnum < regcache->descr->nr_cooked_registers); |
731 | if (regnum < regcache->descr->nr_raw_registers) | |
732 | regcache_raw_read (regcache, regnum, buf); | |
d138e37a | 733 | else |
68365089 AC |
734 | gdbarch_pseudo_register_read (regcache->descr->gdbarch, regcache, |
735 | regnum, buf); | |
61a0eb5b AC |
736 | } |
737 | ||
5ebd2499 ND |
738 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
739 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ | |
32178cab | 740 | |
61a0eb5b | 741 | static void |
1aaa5f99 | 742 | legacy_write_register_gen (int regnum, const void *myaddr) |
32178cab MS |
743 | { |
744 | int size; | |
61a0eb5b | 745 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
32178cab MS |
746 | |
747 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
748 | change the registers array if something writes to this register. */ | |
5ebd2499 | 749 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
750 | return; |
751 | ||
39f77062 | 752 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
753 | { |
754 | registers_changed (); | |
39f77062 | 755 | registers_ptid = inferior_ptid; |
32178cab MS |
756 | } |
757 | ||
5ebd2499 | 758 | size = REGISTER_RAW_SIZE (regnum); |
32178cab | 759 | |
7302a204 | 760 | if (real_register (regnum)) |
1297a2f0 MS |
761 | { |
762 | /* If we have a valid copy of the register, and new value == old | |
763 | value, then don't bother doing the actual store. */ | |
764 | if (register_cached (regnum) | |
3fadccb3 AC |
765 | && (memcmp (register_buffer (current_regcache, regnum), myaddr, size) |
766 | == 0)) | |
1297a2f0 MS |
767 | return; |
768 | else | |
769 | target_prepare_to_store (); | |
770 | } | |
32178cab | 771 | |
3fadccb3 | 772 | memcpy (register_buffer (current_regcache, regnum), myaddr, size); |
32178cab | 773 | |
7302a204 ND |
774 | set_register_cached (regnum, 1); |
775 | store_register (regnum); | |
32178cab MS |
776 | } |
777 | ||
61a0eb5b | 778 | void |
1aaa5f99 | 779 | regcache_raw_write (struct regcache *regcache, int regnum, const void *buf) |
61a0eb5b | 780 | { |
3fadccb3 AC |
781 | gdb_assert (regcache != NULL && buf != NULL); |
782 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
783 | ||
784 | if (regcache->passthrough_p | |
785 | && regcache->descr->legacy_p) | |
786 | { | |
787 | /* For moment, just use underlying legacy code. Ulgh!!! This | |
788 | silently and very indirectly updates the regcache's buffers | |
789 | via the globals register_valid[] and registers[]. */ | |
790 | gdb_assert (regcache == current_regcache); | |
791 | legacy_write_register_gen (regnum, buf); | |
792 | return; | |
793 | } | |
794 | ||
795 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
796 | change the registers array if something writes to this register. */ | |
797 | if (CANNOT_STORE_REGISTER (regnum)) | |
798 | return; | |
799 | ||
800 | /* Handle the simple case first -> not write through so just store | |
801 | value in cache. */ | |
802 | if (!regcache->passthrough_p) | |
803 | { | |
804 | memcpy ((regcache->raw_registers | |
805 | + regcache->descr->register_offset[regnum]), buf, | |
806 | regcache->descr->sizeof_register[regnum]); | |
807 | regcache->raw_register_valid_p[regnum] = 1; | |
808 | return; | |
809 | } | |
810 | ||
811 | /* Make certain that the correct cache is selected. */ | |
812 | gdb_assert (regcache == current_regcache); | |
813 | if (! ptid_equal (registers_ptid, inferior_ptid)) | |
814 | { | |
815 | registers_changed (); | |
816 | registers_ptid = inferior_ptid; | |
817 | } | |
818 | ||
819 | /* If we have a valid copy of the register, and new value == old | |
820 | value, then don't bother doing the actual store. */ | |
821 | if (regcache_valid_p (regcache, regnum) | |
822 | && (memcmp (register_buffer (regcache, regnum), buf, | |
823 | regcache->descr->sizeof_register[regnum]) == 0)) | |
824 | return; | |
825 | ||
826 | target_prepare_to_store (); | |
827 | memcpy (register_buffer (regcache, regnum), buf, | |
828 | regcache->descr->sizeof_register[regnum]); | |
829 | regcache->raw_register_valid_p[regnum] = 1; | |
830 | store_register (regnum); | |
61a0eb5b AC |
831 | } |
832 | ||
833 | void | |
834 | write_register_gen (int regnum, char *buf) | |
835 | { | |
3fadccb3 AC |
836 | gdb_assert (current_regcache != NULL); |
837 | gdb_assert (current_regcache->descr->gdbarch == current_gdbarch); | |
838 | if (current_regcache->descr->legacy_p) | |
61a0eb5b AC |
839 | { |
840 | legacy_write_register_gen (regnum, buf); | |
841 | return; | |
842 | } | |
68365089 AC |
843 | regcache_cooked_write (current_regcache, regnum, buf); |
844 | } | |
845 | ||
846 | void | |
29e1842b | 847 | regcache_cooked_write (struct regcache *regcache, int regnum, const void *buf) |
68365089 | 848 | { |
d138e37a | 849 | gdb_assert (regnum >= 0); |
68365089 AC |
850 | gdb_assert (regnum < regcache->descr->nr_cooked_registers); |
851 | if (regnum < regcache->descr->nr_raw_registers) | |
852 | regcache_raw_write (regcache, regnum, buf); | |
d138e37a | 853 | else |
68365089 | 854 | gdbarch_pseudo_register_write (regcache->descr->gdbarch, regcache, |
d8124050 | 855 | regnum, buf); |
61a0eb5b AC |
856 | } |
857 | ||
32178cab MS |
858 | /* Copy INLEN bytes of consecutive data from memory at MYADDR |
859 | into registers starting with the MYREGSTART'th byte of register data. */ | |
860 | ||
861 | void | |
862 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
863 | { | |
864 | int myregend = myregstart + inlen; | |
5ebd2499 | 865 | int regnum; |
32178cab MS |
866 | |
867 | target_prepare_to_store (); | |
868 | ||
869 | /* Scan through the registers updating any that are covered by the | |
870 | range myregstart<=>myregend using write_register_gen, which does | |
871 | nice things like handling threads, and avoiding updates when the | |
872 | new and old contents are the same. */ | |
873 | ||
5ebd2499 | 874 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
875 | { |
876 | int regstart, regend; | |
877 | ||
5ebd2499 ND |
878 | regstart = REGISTER_BYTE (regnum); |
879 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
880 | |
881 | /* Is this register completely outside the range the user is writing? */ | |
882 | if (myregend <= regstart || regend <= myregstart) | |
883 | /* do nothing */ ; | |
884 | ||
885 | /* Is this register completely within the range the user is writing? */ | |
886 | else if (myregstart <= regstart && regend <= myregend) | |
5ebd2499 | 887 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
32178cab MS |
888 | |
889 | /* The register partially overlaps the range being written. */ | |
890 | else | |
891 | { | |
e6cbd02a | 892 | char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
893 | /* What's the overlap between this register's bytes and |
894 | those the caller wants to write? */ | |
895 | int overlapstart = max (regstart, myregstart); | |
896 | int overlapend = min (regend, myregend); | |
897 | ||
898 | /* We may be doing a partial update of an invalid register. | |
899 | Update it from the target before scribbling on it. */ | |
5ebd2499 | 900 | read_register_gen (regnum, regbuf); |
32178cab MS |
901 | |
902 | memcpy (registers + overlapstart, | |
903 | myaddr + (overlapstart - myregstart), | |
904 | overlapend - overlapstart); | |
905 | ||
7302a204 | 906 | store_register (regnum); |
32178cab MS |
907 | } |
908 | } | |
909 | } | |
910 | ||
911 | ||
5ebd2499 | 912 | /* Return the contents of register REGNUM as an unsigned integer. */ |
32178cab | 913 | |
173155e8 | 914 | ULONGEST |
5ebd2499 | 915 | read_register (int regnum) |
32178cab | 916 | { |
61a0eb5b AC |
917 | char *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
918 | read_register_gen (regnum, buf); | |
919 | return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
32178cab MS |
920 | } |
921 | ||
173155e8 | 922 | ULONGEST |
39f77062 | 923 | read_register_pid (int regnum, ptid_t ptid) |
32178cab | 924 | { |
39f77062 | 925 | ptid_t save_ptid; |
32178cab MS |
926 | int save_pid; |
927 | CORE_ADDR retval; | |
928 | ||
39f77062 | 929 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 930 | return read_register (regnum); |
32178cab | 931 | |
39f77062 | 932 | save_ptid = inferior_ptid; |
32178cab | 933 | |
39f77062 | 934 | inferior_ptid = ptid; |
32178cab | 935 | |
5ebd2499 | 936 | retval = read_register (regnum); |
32178cab | 937 | |
39f77062 | 938 | inferior_ptid = save_ptid; |
32178cab MS |
939 | |
940 | return retval; | |
941 | } | |
942 | ||
5ebd2499 | 943 | /* Return the contents of register REGNUM as a signed integer. */ |
173155e8 AC |
944 | |
945 | LONGEST | |
5ebd2499 | 946 | read_signed_register (int regnum) |
173155e8 | 947 | { |
61a0eb5b AC |
948 | void *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
949 | read_register_gen (regnum, buf); | |
950 | return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
173155e8 AC |
951 | } |
952 | ||
953 | LONGEST | |
39f77062 | 954 | read_signed_register_pid (int regnum, ptid_t ptid) |
173155e8 | 955 | { |
39f77062 | 956 | ptid_t save_ptid; |
173155e8 AC |
957 | LONGEST retval; |
958 | ||
39f77062 | 959 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 960 | return read_signed_register (regnum); |
173155e8 | 961 | |
39f77062 | 962 | save_ptid = inferior_ptid; |
173155e8 | 963 | |
39f77062 | 964 | inferior_ptid = ptid; |
173155e8 | 965 | |
5ebd2499 | 966 | retval = read_signed_register (regnum); |
173155e8 | 967 | |
39f77062 | 968 | inferior_ptid = save_ptid; |
173155e8 AC |
969 | |
970 | return retval; | |
971 | } | |
972 | ||
5ebd2499 | 973 | /* Store VALUE into the raw contents of register number REGNUM. */ |
32178cab MS |
974 | |
975 | void | |
5ebd2499 | 976 | write_register (int regnum, LONGEST val) |
32178cab | 977 | { |
61a0eb5b | 978 | void *buf; |
32178cab | 979 | int size; |
5ebd2499 | 980 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
981 | buf = alloca (size); |
982 | store_signed_integer (buf, size, (LONGEST) val); | |
61a0eb5b | 983 | write_register_gen (regnum, buf); |
32178cab MS |
984 | } |
985 | ||
986 | void | |
39f77062 | 987 | write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid) |
32178cab | 988 | { |
39f77062 | 989 | ptid_t save_ptid; |
32178cab | 990 | |
39f77062 | 991 | if (ptid_equal (ptid, inferior_ptid)) |
32178cab | 992 | { |
5ebd2499 | 993 | write_register (regnum, val); |
32178cab MS |
994 | return; |
995 | } | |
996 | ||
39f77062 | 997 | save_ptid = inferior_ptid; |
32178cab | 998 | |
39f77062 | 999 | inferior_ptid = ptid; |
32178cab | 1000 | |
5ebd2499 | 1001 | write_register (regnum, val); |
32178cab | 1002 | |
39f77062 | 1003 | inferior_ptid = save_ptid; |
32178cab MS |
1004 | } |
1005 | ||
1006 | /* SUPPLY_REGISTER() | |
1007 | ||
5ebd2499 | 1008 | Record that register REGNUM contains VAL. This is used when the |
32178cab MS |
1009 | value is obtained from the inferior or core dump, so there is no |
1010 | need to store the value there. | |
1011 | ||
1012 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
5ebd2499 | 1013 | We just set its value to all zeros. We might want to record this |
32178cab MS |
1014 | fact, and report it to the users of read_register and friends. */ |
1015 | ||
1016 | void | |
1aaa5f99 | 1017 | supply_register (int regnum, const void *val) |
32178cab MS |
1018 | { |
1019 | #if 1 | |
39f77062 | 1020 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
1021 | { |
1022 | registers_changed (); | |
39f77062 | 1023 | registers_ptid = inferior_ptid; |
32178cab MS |
1024 | } |
1025 | #endif | |
1026 | ||
7302a204 | 1027 | set_register_cached (regnum, 1); |
32178cab | 1028 | if (val) |
3fadccb3 | 1029 | memcpy (register_buffer (current_regcache, regnum), val, |
5ebd2499 | 1030 | REGISTER_RAW_SIZE (regnum)); |
32178cab | 1031 | else |
3fadccb3 | 1032 | memset (register_buffer (current_regcache, regnum), '\000', |
5ebd2499 | 1033 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
1034 | |
1035 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
1036 | some registers, that the rest of the code would like to ignore. */ | |
1037 | ||
61a0eb5b AC |
1038 | /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is |
1039 | going to be deprecated. Instead architectures will leave the raw | |
1040 | register value as is and instead clean things up as they pass | |
d8124050 | 1041 | through the method gdbarch_pseudo_register_read() clean up the |
61a0eb5b AC |
1042 | values. */ |
1043 | ||
4ee3352d | 1044 | #ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE |
0b434a00 AC |
1045 | DEPRECATED_CLEAN_UP_REGISTER_VALUE \ |
1046 | (regnum, register_buffer (current_regcache, regnum)); | |
32178cab MS |
1047 | #endif |
1048 | } | |
1049 | ||
193cb69f AC |
1050 | void |
1051 | regcache_collect (int regnum, void *buf) | |
1052 | { | |
3fadccb3 AC |
1053 | memcpy (buf, register_buffer (current_regcache, regnum), |
1054 | REGISTER_RAW_SIZE (regnum)); | |
193cb69f AC |
1055 | } |
1056 | ||
1057 | ||
8227c0ff AC |
1058 | /* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special |
1059 | handling for registers PC, SP, and FP. */ | |
32178cab | 1060 | |
4e052eda AC |
1061 | /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(), |
1062 | read_pc_pid(), read_pc(), generic_target_write_pc(), | |
1063 | write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(), | |
8227c0ff AC |
1064 | generic_target_write_sp(), write_sp(), generic_target_read_fp() and |
1065 | read_fp(), will eventually be moved out of the reg-cache into | |
1066 | either frame.[hc] or to the multi-arch framework. The are not part | |
1067 | of the raw register cache. */ | |
4e052eda | 1068 | |
32178cab MS |
1069 | /* This routine is getting awfully cluttered with #if's. It's probably |
1070 | time to turn this into READ_PC and define it in the tm.h file. | |
1071 | Ditto for write_pc. | |
1072 | ||
1073 | 1999-06-08: The following were re-written so that it assumes the | |
8e1a459b | 1074 | existence of a TARGET_READ_PC et.al. macro. A default generic |
32178cab MS |
1075 | version of that macro is made available where needed. |
1076 | ||
1077 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
1078 | by the multi-arch framework, it will eventually be possible to | |
1079 | eliminate the intermediate read_pc_pid(). The client would call | |
1080 | TARGET_READ_PC directly. (cagney). */ | |
1081 | ||
32178cab | 1082 | CORE_ADDR |
39f77062 | 1083 | generic_target_read_pc (ptid_t ptid) |
32178cab MS |
1084 | { |
1085 | #ifdef PC_REGNUM | |
1086 | if (PC_REGNUM >= 0) | |
1087 | { | |
39f77062 | 1088 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid)); |
32178cab MS |
1089 | return pc_val; |
1090 | } | |
1091 | #endif | |
8e65ff28 AC |
1092 | internal_error (__FILE__, __LINE__, |
1093 | "generic_target_read_pc"); | |
32178cab MS |
1094 | return 0; |
1095 | } | |
1096 | ||
1097 | CORE_ADDR | |
39f77062 | 1098 | read_pc_pid (ptid_t ptid) |
32178cab | 1099 | { |
39f77062 | 1100 | ptid_t saved_inferior_ptid; |
32178cab MS |
1101 | CORE_ADDR pc_val; |
1102 | ||
39f77062 KB |
1103 | /* In case ptid != inferior_ptid. */ |
1104 | saved_inferior_ptid = inferior_ptid; | |
1105 | inferior_ptid = ptid; | |
32178cab | 1106 | |
39f77062 | 1107 | pc_val = TARGET_READ_PC (ptid); |
32178cab | 1108 | |
39f77062 | 1109 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
1110 | return pc_val; |
1111 | } | |
1112 | ||
1113 | CORE_ADDR | |
1114 | read_pc (void) | |
1115 | { | |
39f77062 | 1116 | return read_pc_pid (inferior_ptid); |
32178cab MS |
1117 | } |
1118 | ||
32178cab | 1119 | void |
39f77062 | 1120 | generic_target_write_pc (CORE_ADDR pc, ptid_t ptid) |
32178cab MS |
1121 | { |
1122 | #ifdef PC_REGNUM | |
1123 | if (PC_REGNUM >= 0) | |
39f77062 | 1124 | write_register_pid (PC_REGNUM, pc, ptid); |
32178cab | 1125 | if (NPC_REGNUM >= 0) |
39f77062 | 1126 | write_register_pid (NPC_REGNUM, pc + 4, ptid); |
32178cab | 1127 | #else |
8e65ff28 AC |
1128 | internal_error (__FILE__, __LINE__, |
1129 | "generic_target_write_pc"); | |
32178cab MS |
1130 | #endif |
1131 | } | |
1132 | ||
1133 | void | |
39f77062 | 1134 | write_pc_pid (CORE_ADDR pc, ptid_t ptid) |
32178cab | 1135 | { |
39f77062 | 1136 | ptid_t saved_inferior_ptid; |
32178cab | 1137 | |
39f77062 KB |
1138 | /* In case ptid != inferior_ptid. */ |
1139 | saved_inferior_ptid = inferior_ptid; | |
1140 | inferior_ptid = ptid; | |
32178cab | 1141 | |
39f77062 | 1142 | TARGET_WRITE_PC (pc, ptid); |
32178cab | 1143 | |
39f77062 | 1144 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
1145 | } |
1146 | ||
1147 | void | |
1148 | write_pc (CORE_ADDR pc) | |
1149 | { | |
39f77062 | 1150 | write_pc_pid (pc, inferior_ptid); |
32178cab MS |
1151 | } |
1152 | ||
1153 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
1154 | ||
32178cab MS |
1155 | CORE_ADDR |
1156 | generic_target_read_sp (void) | |
1157 | { | |
1158 | #ifdef SP_REGNUM | |
1159 | if (SP_REGNUM >= 0) | |
1160 | return read_register (SP_REGNUM); | |
1161 | #endif | |
8e65ff28 AC |
1162 | internal_error (__FILE__, __LINE__, |
1163 | "generic_target_read_sp"); | |
32178cab MS |
1164 | } |
1165 | ||
1166 | CORE_ADDR | |
1167 | read_sp (void) | |
1168 | { | |
1169 | return TARGET_READ_SP (); | |
1170 | } | |
1171 | ||
32178cab MS |
1172 | void |
1173 | generic_target_write_sp (CORE_ADDR val) | |
1174 | { | |
1175 | #ifdef SP_REGNUM | |
1176 | if (SP_REGNUM >= 0) | |
1177 | { | |
1178 | write_register (SP_REGNUM, val); | |
1179 | return; | |
1180 | } | |
1181 | #endif | |
8e65ff28 AC |
1182 | internal_error (__FILE__, __LINE__, |
1183 | "generic_target_write_sp"); | |
32178cab MS |
1184 | } |
1185 | ||
1186 | void | |
1187 | write_sp (CORE_ADDR val) | |
1188 | { | |
1189 | TARGET_WRITE_SP (val); | |
1190 | } | |
1191 | ||
32178cab MS |
1192 | CORE_ADDR |
1193 | generic_target_read_fp (void) | |
1194 | { | |
1195 | #ifdef FP_REGNUM | |
1196 | if (FP_REGNUM >= 0) | |
1197 | return read_register (FP_REGNUM); | |
1198 | #endif | |
8e65ff28 AC |
1199 | internal_error (__FILE__, __LINE__, |
1200 | "generic_target_read_fp"); | |
32178cab MS |
1201 | } |
1202 | ||
1203 | CORE_ADDR | |
1204 | read_fp (void) | |
1205 | { | |
1206 | return TARGET_READ_FP (); | |
1207 | } | |
1208 | ||
705152c5 MS |
1209 | /* ARGSUSED */ |
1210 | static void | |
1211 | reg_flush_command (char *command, int from_tty) | |
1212 | { | |
1213 | /* Force-flush the register cache. */ | |
1214 | registers_changed (); | |
1215 | if (from_tty) | |
1216 | printf_filtered ("Register cache flushed.\n"); | |
1217 | } | |
1218 | ||
32178cab MS |
1219 | static void |
1220 | build_regcache (void) | |
3fadccb3 AC |
1221 | { |
1222 | current_regcache = regcache_xmalloc (current_gdbarch); | |
1223 | current_regcache->passthrough_p = 1; | |
1224 | registers = deprecated_grub_regcache_for_registers (current_regcache); | |
1225 | register_valid = deprecated_grub_regcache_for_register_valid (current_regcache); | |
1226 | } | |
1227 | ||
32178cab MS |
1228 | void |
1229 | _initialize_regcache (void) | |
1230 | { | |
3fadccb3 AC |
1231 | regcache_descr_handle = register_gdbarch_data (init_regcache_descr, |
1232 | xfree_regcache_descr); | |
1233 | REGISTER_GDBARCH_SWAP (current_regcache); | |
32178cab MS |
1234 | register_gdbarch_swap (®isters, sizeof (registers), NULL); |
1235 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
1236 | register_gdbarch_swap (NULL, 0, build_regcache); | |
705152c5 MS |
1237 | |
1238 | add_com ("flushregs", class_maintenance, reg_flush_command, | |
1239 | "Force gdb to flush its register cache (maintainer command)"); | |
39f77062 KB |
1240 | |
1241 | /* Initialize the thread/process associated with the current set of | |
1242 | registers. For now, -1 is special, and means `no current process'. */ | |
1243 | registers_ptid = pid_to_ptid (-1); | |
32178cab | 1244 | } |