Rename gdbarch_update() to gdbarch_update_p()
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab
MS
1/* Cache and manage the values of registers for GDB, the GNU debugger.
2 Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
27
28/*
29 * DATA STRUCTURE
30 *
31 * Here is the actual register cache.
32 */
33
34/* NOTE: this is a write-back cache. There is no "dirty" bit for
35 recording if the register values have been changed (eg. by the
36 user). Therefore all registers must be written back to the
37 target when appropriate. */
38
39/* REGISTERS contains the cached register values (in target byte order). */
40
41char *registers;
42
43/* REGISTER_VALID is 0 if the register needs to be fetched,
44 1 if it has been fetched, and
45 -1 if the register value was not available.
46 "Not available" means don't try to fetch it again. */
47
48signed char *register_valid;
49
50/* The thread/process associated with the current set of registers.
51 For now, -1 is special, and means `no current process'. */
52
53static int registers_pid = -1;
54
55/*
56 * FUNCTIONS:
57 */
58
59/* REGISTER_CACHED()
60
61 Returns 0 if the value is not in the cache (needs fetch).
62 >0 if the value is in the cache.
63 <0 if the value is permanently unavailable (don't ask again). */
64
65int
66register_cached (int regnum)
67{
68 return register_valid[regnum];
69}
70
71/* FIND_SAVED_REGISTER ()
72
73 Return the address in which frame FRAME's value of register REGNUM
74 has been saved in memory. Or return zero if it has not been saved.
75 If REGNUM specifies the SP, the value we return is actually
76 the SP value, not an address where it was saved. */
77
78CORE_ADDR
79find_saved_register (struct frame_info *frame, int regnum)
80{
81 register struct frame_info *frame1 = NULL;
82 register CORE_ADDR addr = 0;
83
84 if (frame == NULL) /* No regs saved if want current frame */
85 return 0;
86
87#ifdef HAVE_REGISTER_WINDOWS
88 /* We assume that a register in a register window will only be saved
89 in one place (since the name changes and/or disappears as you go
90 towards inner frames), so we only call get_frame_saved_regs on
91 the current frame. This is directly in contradiction to the
92 usage below, which assumes that registers used in a frame must be
93 saved in a lower (more interior) frame. This change is a result
94 of working on a register window machine; get_frame_saved_regs
95 always returns the registers saved within a frame, within the
96 context (register namespace) of that frame. */
97
98 /* However, note that we don't want this to return anything if
99 nothing is saved (if there's a frame inside of this one). Also,
100 callers to this routine asking for the stack pointer want the
101 stack pointer saved for *this* frame; this is returned from the
102 next frame. */
103
104 if (REGISTER_IN_WINDOW_P (regnum))
105 {
106 frame1 = get_next_frame (frame);
107 if (!frame1)
108 return 0; /* Registers of this frame are active. */
109
110 /* Get the SP from the next frame in; it will be this
111 current frame. */
112 if (regnum != SP_REGNUM)
113 frame1 = frame;
114
115 FRAME_INIT_SAVED_REGS (frame1);
116 return frame1->saved_regs[regnum]; /* ... which might be zero */
117 }
118#endif /* HAVE_REGISTER_WINDOWS */
119
120 /* Note that this next routine assumes that registers used in
121 frame x will be saved only in the frame that x calls and
122 frames interior to it. This is not true on the sparc, but the
123 above macro takes care of it, so we should be all right. */
124 while (1)
125 {
126 QUIT;
127 frame1 = get_prev_frame (frame1);
128 if (frame1 == 0 || frame1 == frame)
129 break;
130 FRAME_INIT_SAVED_REGS (frame1);
131 if (frame1->saved_regs[regnum])
132 addr = frame1->saved_regs[regnum];
133 }
134
135 return addr;
136}
137
138/* DEFAULT_GET_SAVED_REGISTER ()
139
140 Find register number REGNUM relative to FRAME and put its (raw,
141 target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the
142 variable was optimized out (and thus can't be fetched). Set *LVAL
143 to lval_memory, lval_register, or not_lval, depending on whether
144 the value was fetched from memory, from a register, or in a strange
145 and non-modifiable way (e.g. a frame pointer which was calculated
146 rather than fetched). Set *ADDRP to the address, either in memory
147 on as a REGISTER_BYTE offset into the registers array.
148
149 Note that this implementation never sets *LVAL to not_lval. But
150 it can be replaced by defining GET_SAVED_REGISTER and supplying
151 your own.
152
153 The argument RAW_BUFFER must point to aligned memory. */
154
155static void
156default_get_saved_register (char *raw_buffer,
157 int *optimized,
158 CORE_ADDR *addrp,
159 struct frame_info *frame,
160 int regnum,
161 enum lval_type *lval)
162{
163 CORE_ADDR addr;
164
165 if (!target_has_registers)
166 error ("No registers.");
167
168 /* Normal systems don't optimize out things with register numbers. */
169 if (optimized != NULL)
170 *optimized = 0;
171 addr = find_saved_register (frame, regnum);
172 if (addr != 0)
173 {
174 if (lval != NULL)
175 *lval = lval_memory;
176 if (regnum == SP_REGNUM)
177 {
178 if (raw_buffer != NULL)
179 {
180 /* Put it back in target format. */
181 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
182 (LONGEST) addr);
183 }
184 if (addrp != NULL)
185 *addrp = 0;
186 return;
187 }
188 if (raw_buffer != NULL)
189 target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
190 }
191 else
192 {
193 if (lval != NULL)
194 *lval = lval_register;
195 addr = REGISTER_BYTE (regnum);
196 if (raw_buffer != NULL)
197 read_register_gen (regnum, raw_buffer);
198 }
199 if (addrp != NULL)
200 *addrp = addr;
201}
202
203#if !defined (GET_SAVED_REGISTER)
204#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
205 default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
206#endif
207
208void
209get_saved_register (char *raw_buffer,
210 int *optimized,
211 CORE_ADDR *addrp,
212 struct frame_info *frame,
213 int regnum,
214 enum lval_type *lval)
215{
216 GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
217}
218
219/* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
220
221 Copy the bytes of register REGNUM, relative to the input stack frame,
222 into our memory at MYADDR, in target byte order.
223 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
224
225 Returns 1 if could not be read, 0 if could. */
226
227/* FIXME: This function increases the confusion between FP_REGNUM
228 and the virtual/pseudo-frame pointer. */
229
230static int
231read_relative_register_raw_bytes_for_frame (int regnum,
232 char *myaddr,
233 struct frame_info *frame)
234{
235 int optim;
236 if (regnum == FP_REGNUM && frame)
237 {
238 /* Put it back in target format. */
239 store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
240 (LONGEST) FRAME_FP (frame));
241
242 return 0;
243 }
244
245 get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
246 regnum, (enum lval_type *) NULL);
247
248 if (register_valid[regnum] < 0)
249 return 1; /* register value not available */
250
251 return optim;
252}
253
254/* READ_RELATIVE_REGISTER_RAW_BYTES
255
256 Copy the bytes of register REGNUM, relative to the current stack
257 frame, into our memory at MYADDR, in target byte order.
258 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
259
260 Returns 1 if could not be read, 0 if could. */
261
262int
263read_relative_register_raw_bytes (int regnum, char *myaddr)
264{
265 return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
266 selected_frame);
267}
268
269
270/* Low level examining and depositing of registers.
271
272 The caller is responsible for making sure that the inferior is
273 stopped before calling the fetching routines, or it will get
274 garbage. (a change from GDB version 3, in which the caller got the
275 value from the last stop). */
276
277/* REGISTERS_CHANGED ()
278
279 Indicate that registers may have changed, so invalidate the cache. */
280
281void
282registers_changed (void)
283{
284 int i;
32178cab
MS
285
286 registers_pid = -1;
287
288 /* Force cleanup of any alloca areas if using C alloca instead of
289 a builtin alloca. This particular call is used to clean up
290 areas allocated by low level target code which may build up
291 during lengthy interactions between gdb and the target before
292 gdb gives control to the user (ie watchpoints). */
293 alloca (0);
294
fcdc5976
MS
295 for (i = 0; i < ARCH_NUM_REGS; i++)
296 register_valid[i] = 0;
297
298 /* Assume that if all the hardware regs have changed,
299 then so have the pseudo-registers. */
300 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
32178cab
MS
301 register_valid[i] = 0;
302
303 if (registers_changed_hook)
304 registers_changed_hook ();
305}
306
307/* REGISTERS_FETCHED ()
308
309 Indicate that all registers have been fetched, so mark them all valid. */
310
311
312void
313registers_fetched (void)
314{
315 int i;
32178cab 316
fcdc5976 317 for (i = 0; i < ARCH_NUM_REGS; i++)
32178cab 318 register_valid[i] = 1;
fcdc5976
MS
319 /* Do not assume that the pseudo-regs have also been fetched.
320 Fetching all real regs might not account for all pseudo-regs. */
32178cab
MS
321}
322
323/* read_register_bytes and write_register_bytes are generally a *BAD*
324 idea. They are inefficient because they need to check for partial
325 updates, which can only be done by scanning through all of the
326 registers and seeing if the bytes that are being read/written fall
327 inside of an invalid register. [The main reason this is necessary
328 is that register sizes can vary, so a simple index won't suffice.]
329 It is far better to call read_register_gen and write_register_gen
330 if you want to get at the raw register contents, as it only takes a
331 regno as an argument, and therefore can't do a partial register
332 update.
333
334 Prior to the recent fixes to check for partial updates, both read
335 and write_register_bytes always checked to see if any registers
336 were stale, and then called target_fetch_registers (-1) to update
337 the whole set. This caused really slowed things down for remote
338 targets. */
339
340/* Copy INLEN bytes of consecutive data from registers
341 starting with the INREGBYTE'th byte of register data
342 into memory at MYADDR. */
343
344void
345read_register_bytes (int inregbyte, char *myaddr, int inlen)
346{
347 int inregend = inregbyte + inlen;
348 int regno;
349
350 if (registers_pid != inferior_pid)
351 {
352 registers_changed ();
353 registers_pid = inferior_pid;
354 }
355
356 /* See if we are trying to read bytes from out-of-date registers. If so,
357 update just those registers. */
358
fcdc5976 359 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
360 {
361 int regstart, regend;
362
363 if (register_valid[regno])
364 continue;
365
366 if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
367 continue;
368
369 regstart = REGISTER_BYTE (regno);
370 regend = regstart + REGISTER_RAW_SIZE (regno);
371
372 if (regend <= inregbyte || inregend <= regstart)
373 /* The range the user wants to read doesn't overlap with regno. */
374 continue;
375
fcdc5976 376 /* We've found an uncached register where at least one byte will be read.
32178cab 377 Update it from the target. */
fcdc5976
MS
378 if (regno < NUM_REGS)
379 target_fetch_registers (regno);
f4160335 380 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 381 FETCH_PSEUDO_REGISTER (regno);
32178cab
MS
382
383 if (!register_valid[regno])
384 error ("read_register_bytes: Couldn't update register %d.", regno);
385 }
386
387 if (myaddr != NULL)
388 memcpy (myaddr, &registers[inregbyte], inlen);
389}
390
391/* Read register REGNO into memory at MYADDR, which must be large
392 enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the
393 register is known to be the size of a CORE_ADDR or smaller,
394 read_register can be used instead. */
395
396void
397read_register_gen (int regno, char *myaddr)
398{
399 if (registers_pid != inferior_pid)
400 {
401 registers_changed ();
402 registers_pid = inferior_pid;
403 }
404
405 if (!register_valid[regno])
fcdc5976
MS
406 {
407 if (regno < NUM_REGS)
408 target_fetch_registers (regno);
409 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 410 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 411 }
32178cab
MS
412 memcpy (myaddr, &registers[REGISTER_BYTE (regno)],
413 REGISTER_RAW_SIZE (regno));
414}
415
416/* Write register REGNO at MYADDR to the target. MYADDR points at
417 REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */
418
419/* Registers we shouldn't try to store. */
420#if !defined (CANNOT_STORE_REGISTER)
421#define CANNOT_STORE_REGISTER(regno) 0
422#endif
423
424void
425write_register_gen (int regno, char *myaddr)
426{
427 int size;
428
429 /* On the sparc, writing %g0 is a no-op, so we don't even want to
430 change the registers array if something writes to this register. */
431 if (CANNOT_STORE_REGISTER (regno))
432 return;
433
434 if (registers_pid != inferior_pid)
435 {
436 registers_changed ();
437 registers_pid = inferior_pid;
438 }
439
440 size = REGISTER_RAW_SIZE (regno);
441
442 /* If we have a valid copy of the register, and new value == old value,
443 then don't bother doing the actual store. */
444
445 if (register_valid[regno]
446 && memcmp (&registers[REGISTER_BYTE (regno)], myaddr, size) == 0)
447 return;
448
fcdc5976
MS
449 if (regno < NUM_REGS)
450 target_prepare_to_store ();
32178cab
MS
451
452 memcpy (&registers[REGISTER_BYTE (regno)], myaddr, size);
453
454 register_valid[regno] = 1;
455
fcdc5976
MS
456 if (regno < NUM_REGS)
457 target_store_registers (regno);
458 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 459 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
460}
461
462/* Copy INLEN bytes of consecutive data from memory at MYADDR
463 into registers starting with the MYREGSTART'th byte of register data. */
464
465void
466write_register_bytes (int myregstart, char *myaddr, int inlen)
467{
468 int myregend = myregstart + inlen;
469 int regno;
470
471 target_prepare_to_store ();
472
473 /* Scan through the registers updating any that are covered by the
474 range myregstart<=>myregend using write_register_gen, which does
475 nice things like handling threads, and avoiding updates when the
476 new and old contents are the same. */
477
fcdc5976 478 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
479 {
480 int regstart, regend;
481
482 regstart = REGISTER_BYTE (regno);
483 regend = regstart + REGISTER_RAW_SIZE (regno);
484
485 /* Is this register completely outside the range the user is writing? */
486 if (myregend <= regstart || regend <= myregstart)
487 /* do nothing */ ;
488
489 /* Is this register completely within the range the user is writing? */
490 else if (myregstart <= regstart && regend <= myregend)
491 write_register_gen (regno, myaddr + (regstart - myregstart));
492
493 /* The register partially overlaps the range being written. */
494 else
495 {
496 char regbuf[MAX_REGISTER_RAW_SIZE];
497 /* What's the overlap between this register's bytes and
498 those the caller wants to write? */
499 int overlapstart = max (regstart, myregstart);
500 int overlapend = min (regend, myregend);
501
502 /* We may be doing a partial update of an invalid register.
503 Update it from the target before scribbling on it. */
504 read_register_gen (regno, regbuf);
505
506 memcpy (registers + overlapstart,
507 myaddr + (overlapstart - myregstart),
508 overlapend - overlapstart);
509
fcdc5976
MS
510 if (regno < NUM_REGS)
511 target_store_registers (regno);
512 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 513 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
514 }
515 }
516}
517
518
519/* Return the raw contents of register REGNO, regarding it as an
173155e8 520 UNSIGNED integer. */
32178cab 521
173155e8 522ULONGEST
32178cab
MS
523read_register (int regno)
524{
525 if (registers_pid != inferior_pid)
526 {
527 registers_changed ();
528 registers_pid = inferior_pid;
529 }
530
531 if (!register_valid[regno])
fcdc5976
MS
532 {
533 if (regno < NUM_REGS)
534 target_fetch_registers (regno);
f4160335 535 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 536 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 537 }
32178cab 538
173155e8 539 return (extract_unsigned_integer (&registers[REGISTER_BYTE (regno)],
32178cab
MS
540 REGISTER_RAW_SIZE (regno)));
541}
542
173155e8 543ULONGEST
32178cab
MS
544read_register_pid (int regno, int pid)
545{
546 int save_pid;
547 CORE_ADDR retval;
548
549 if (pid == inferior_pid)
550 return read_register (regno);
551
552 save_pid = inferior_pid;
553
554 inferior_pid = pid;
555
556 retval = read_register (regno);
557
558 inferior_pid = save_pid;
559
560 return retval;
561}
562
173155e8
AC
563/* Return the raw contents of register REGNO, regarding it a SIGNED
564 integer. */
565
566LONGEST
567read_signed_register (int regno)
568{
569 if (registers_pid != inferior_pid)
570 {
571 registers_changed ();
572 registers_pid = inferior_pid;
573 }
574
575 if (!register_valid[regno])
576 target_fetch_registers (regno);
577
578 return (extract_signed_integer (&registers[REGISTER_BYTE (regno)],
579 REGISTER_RAW_SIZE (regno)));
580}
581
582LONGEST
583read_signed_register_pid (int regno, int pid)
584{
585 int save_pid;
586 LONGEST retval;
587
588 if (pid == inferior_pid)
589 return read_signed_register (regno);
590
591 save_pid = inferior_pid;
592
593 inferior_pid = pid;
594
595 retval = read_signed_register (regno);
596
597 inferior_pid = save_pid;
598
599 return retval;
600}
601
32178cab
MS
602/* Store VALUE, into the raw contents of register number REGNO. */
603
604void
605write_register (int regno, LONGEST val)
606{
607 PTR buf;
608 int size;
609
610 /* On the sparc, writing %g0 is a no-op, so we don't even want to
611 change the registers array if something writes to this register. */
612 if (CANNOT_STORE_REGISTER (regno))
613 return;
614
615 if (registers_pid != inferior_pid)
616 {
617 registers_changed ();
618 registers_pid = inferior_pid;
619 }
620
621 size = REGISTER_RAW_SIZE (regno);
622 buf = alloca (size);
623 store_signed_integer (buf, size, (LONGEST) val);
624
625 /* If we have a valid copy of the register, and new value == old value,
626 then don't bother doing the actual store. */
627
628 if (register_valid[regno]
629 && memcmp (&registers[REGISTER_BYTE (regno)], buf, size) == 0)
630 return;
631
fcdc5976
MS
632 if (regno < NUM_REGS)
633 target_prepare_to_store ();
32178cab
MS
634
635 memcpy (&registers[REGISTER_BYTE (regno)], buf, size);
636
637 register_valid[regno] = 1;
638
fcdc5976
MS
639 if (regno < NUM_REGS)
640 target_store_registers (regno);
641 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 642 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
643}
644
645void
646write_register_pid (int regno, CORE_ADDR val, int pid)
647{
648 int save_pid;
649
650 if (pid == inferior_pid)
651 {
652 write_register (regno, val);
653 return;
654 }
655
656 save_pid = inferior_pid;
657
658 inferior_pid = pid;
659
660 write_register (regno, val);
661
662 inferior_pid = save_pid;
663}
664
665/* SUPPLY_REGISTER()
666
667 Record that register REGNO contains VAL. This is used when the
668 value is obtained from the inferior or core dump, so there is no
669 need to store the value there.
670
671 If VAL is a NULL pointer, then it's probably an unsupported register.
672 We just set it's value to all zeros. We might want to record this
673 fact, and report it to the users of read_register and friends. */
674
675void
676supply_register (int regno, char *val)
677{
678#if 1
679 if (registers_pid != inferior_pid)
680 {
681 registers_changed ();
682 registers_pid = inferior_pid;
683 }
684#endif
685
686 register_valid[regno] = 1;
687 if (val)
688 memcpy (&registers[REGISTER_BYTE (regno)], val,
689 REGISTER_RAW_SIZE (regno));
690 else
691 memset (&registers[REGISTER_BYTE (regno)], '\000',
692 REGISTER_RAW_SIZE (regno));
693
694 /* On some architectures, e.g. HPPA, there are a few stray bits in
695 some registers, that the rest of the code would like to ignore. */
696
697#ifdef CLEAN_UP_REGISTER_VALUE
698 CLEAN_UP_REGISTER_VALUE (regno, &registers[REGISTER_BYTE (regno)]);
699#endif
700}
701
702/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
703 Special handling for registers PC, SP, and FP. */
704
705/* This routine is getting awfully cluttered with #if's. It's probably
706 time to turn this into READ_PC and define it in the tm.h file.
707 Ditto for write_pc.
708
709 1999-06-08: The following were re-written so that it assumes the
710 existance of a TARGET_READ_PC et.al. macro. A default generic
711 version of that macro is made available where needed.
712
713 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
714 by the multi-arch framework, it will eventually be possible to
715 eliminate the intermediate read_pc_pid(). The client would call
716 TARGET_READ_PC directly. (cagney). */
717
718#ifndef TARGET_READ_PC
719#define TARGET_READ_PC generic_target_read_pc
720#endif
721
722CORE_ADDR
723generic_target_read_pc (int pid)
724{
725#ifdef PC_REGNUM
726 if (PC_REGNUM >= 0)
727 {
728 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
729 return pc_val;
730 }
731#endif
732 internal_error ("generic_target_read_pc");
733 return 0;
734}
735
736CORE_ADDR
737read_pc_pid (int pid)
738{
739 int saved_inferior_pid;
740 CORE_ADDR pc_val;
741
742 /* In case pid != inferior_pid. */
743 saved_inferior_pid = inferior_pid;
744 inferior_pid = pid;
745
746 pc_val = TARGET_READ_PC (pid);
747
748 inferior_pid = saved_inferior_pid;
749 return pc_val;
750}
751
752CORE_ADDR
753read_pc (void)
754{
755 return read_pc_pid (inferior_pid);
756}
757
758#ifndef TARGET_WRITE_PC
759#define TARGET_WRITE_PC generic_target_write_pc
760#endif
761
762void
763generic_target_write_pc (CORE_ADDR pc, int pid)
764{
765#ifdef PC_REGNUM
766 if (PC_REGNUM >= 0)
767 write_register_pid (PC_REGNUM, pc, pid);
768 if (NPC_REGNUM >= 0)
769 write_register_pid (NPC_REGNUM, pc + 4, pid);
770 if (NNPC_REGNUM >= 0)
771 write_register_pid (NNPC_REGNUM, pc + 8, pid);
772#else
773 internal_error ("generic_target_write_pc");
774#endif
775}
776
777void
778write_pc_pid (CORE_ADDR pc, int pid)
779{
780 int saved_inferior_pid;
781
782 /* In case pid != inferior_pid. */
783 saved_inferior_pid = inferior_pid;
784 inferior_pid = pid;
785
786 TARGET_WRITE_PC (pc, pid);
787
788 inferior_pid = saved_inferior_pid;
789}
790
791void
792write_pc (CORE_ADDR pc)
793{
794 write_pc_pid (pc, inferior_pid);
795}
796
797/* Cope with strage ways of getting to the stack and frame pointers */
798
799#ifndef TARGET_READ_SP
800#define TARGET_READ_SP generic_target_read_sp
801#endif
802
803CORE_ADDR
804generic_target_read_sp (void)
805{
806#ifdef SP_REGNUM
807 if (SP_REGNUM >= 0)
808 return read_register (SP_REGNUM);
809#endif
810 internal_error ("generic_target_read_sp");
811}
812
813CORE_ADDR
814read_sp (void)
815{
816 return TARGET_READ_SP ();
817}
818
819#ifndef TARGET_WRITE_SP
820#define TARGET_WRITE_SP generic_target_write_sp
821#endif
822
823void
824generic_target_write_sp (CORE_ADDR val)
825{
826#ifdef SP_REGNUM
827 if (SP_REGNUM >= 0)
828 {
829 write_register (SP_REGNUM, val);
830 return;
831 }
832#endif
833 internal_error ("generic_target_write_sp");
834}
835
836void
837write_sp (CORE_ADDR val)
838{
839 TARGET_WRITE_SP (val);
840}
841
842#ifndef TARGET_READ_FP
843#define TARGET_READ_FP generic_target_read_fp
844#endif
845
846CORE_ADDR
847generic_target_read_fp (void)
848{
849#ifdef FP_REGNUM
850 if (FP_REGNUM >= 0)
851 return read_register (FP_REGNUM);
852#endif
853 internal_error ("generic_target_read_fp");
854}
855
856CORE_ADDR
857read_fp (void)
858{
859 return TARGET_READ_FP ();
860}
861
862#ifndef TARGET_WRITE_FP
863#define TARGET_WRITE_FP generic_target_write_fp
864#endif
865
866void
867generic_target_write_fp (CORE_ADDR val)
868{
869#ifdef FP_REGNUM
870 if (FP_REGNUM >= 0)
871 {
872 write_register (FP_REGNUM, val);
873 return;
874 }
875#endif
876 internal_error ("generic_target_write_fp");
877}
878
879void
880write_fp (CORE_ADDR val)
881{
882 TARGET_WRITE_FP (val);
883}
884
885static void
886build_regcache (void)
887{
888 /* We allocate some extra slop since we do a lot of memcpy's around
889 `registers', and failing-soft is better than failing hard. */
890 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
fcdc5976
MS
891 int sizeof_register_valid =
892 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
32178cab
MS
893 registers = xmalloc (sizeof_registers);
894 memset (registers, 0, sizeof_registers);
895 register_valid = xmalloc (sizeof_register_valid);
896 memset (register_valid, 0, sizeof_register_valid);
897}
898
899void
900_initialize_regcache (void)
901{
902 build_regcache ();
903
904 register_gdbarch_swap (&registers, sizeof (registers), NULL);
905 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
906 register_gdbarch_swap (NULL, 0, build_regcache);
907}
This page took 0.063197 seconds and 4 git commands to generate.