2002-08-09 Michael Snyder <msnyder@redhat.com>
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab 1/* Cache and manage the values of registers for GDB, the GNU debugger.
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2
3 Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000,
4 2001, 2002 Free Software Foundation, Inc.
32178cab
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5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include "defs.h"
32178cab
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24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
705152c5 27#include "gdbcmd.h"
4e052eda 28#include "regcache.h"
61a0eb5b 29#include "gdb_assert.h"
b66d6d2e 30#include "gdb_string.h"
32178cab
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31
32/*
33 * DATA STRUCTURE
34 *
35 * Here is the actual register cache.
36 */
37
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38/* Per-architecture object describing the layout of a register cache.
39 Computed once when the architecture is created */
40
41struct gdbarch_data *regcache_descr_handle;
42
43struct regcache_descr
44{
45 /* The architecture this descriptor belongs to. */
46 struct gdbarch *gdbarch;
47
48 /* Is this a ``legacy'' register cache? Such caches reserve space
49 for raw and pseudo registers and allow access to both. */
50 int legacy_p;
51
52 /* The raw register cache. This should contain just [0
53 .. NUM_RAW_REGISTERS). However, for older targets, it contains
54 space for the full [0 .. NUM_RAW_REGISTERS +
55 NUM_PSEUDO_REGISTERS). */
56 int nr_raw_registers;
57 long sizeof_raw_registers;
58 long sizeof_raw_register_valid_p;
59
d138e37a
AC
60 /* The cooked register space. Each cooked register in the range
61 [0..NR_RAW_REGISTERS) is direct-mapped onto the corresponding raw
62 register. The remaining [NR_RAW_REGISTERS
63 .. NR_COOKED_REGISTERS) (a.k.a. pseudo regiters) are mapped onto
64 both raw registers and memory by the architecture methods
65 gdbarch_register_read and gdbarch_register_write. */
66 int nr_cooked_registers;
67
68 /* Offset and size (in 8 bit bytes), of reach register in the
69 register cache. All registers (including those in the range
70 [NR_RAW_REGISTERS .. NR_COOKED_REGISTERS) are given an offset.
71 Assigning all registers an offset makes it possible to keep
72 legacy code, such as that found in read_register_bytes() and
73 write_register_bytes() working. */
3fadccb3 74 long *register_offset;
3fadccb3 75 long *sizeof_register;
3fadccb3 76
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77 /* Useful constant. Largest of all the registers. */
78 long max_register_size;
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79};
80
81static void *
82init_legacy_regcache_descr (struct gdbarch *gdbarch)
83{
84 int i;
85 struct regcache_descr *descr;
86 /* FIXME: cagney/2002-05-11: gdbarch_data() should take that
87 ``gdbarch'' as a parameter. */
88 gdb_assert (gdbarch != NULL);
89
90 descr = XMALLOC (struct regcache_descr);
91 descr->gdbarch = gdbarch;
92 descr->legacy_p = 1;
93
94 /* FIXME: cagney/2002-05-11: Shouldn't be including pseudo-registers
95 in the register buffer. Unfortunatly some architectures do. */
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96 descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS;
97 descr->nr_raw_registers = descr->nr_cooked_registers;
98 descr->sizeof_raw_register_valid_p = descr->nr_cooked_registers;
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99
100 /* FIXME: cagney/2002-05-11: Instead of using REGISTER_BYTE() this
101 code should compute the offets et.al. at runtime. This currently
102 isn't possible because some targets overlap register locations -
103 see the mess in read_register_bytes() and write_register_bytes()
104 registers. */
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105 descr->sizeof_register = XCALLOC (descr->nr_cooked_registers, long);
106 descr->register_offset = XCALLOC (descr->nr_cooked_registers, long);
3fadccb3 107 descr->max_register_size = 0;
d138e37a 108 for (i = 0; i < descr->nr_cooked_registers; i++)
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AC
109 {
110 descr->register_offset[i] = REGISTER_BYTE (i);
111 descr->sizeof_register[i] = REGISTER_RAW_SIZE (i);
112 if (descr->max_register_size < REGISTER_RAW_SIZE (i))
113 descr->max_register_size = REGISTER_RAW_SIZE (i);
114 }
115
116 /* Come up with the real size of the registers buffer. */
117 descr->sizeof_raw_registers = REGISTER_BYTES; /* OK use. */
d138e37a 118 for (i = 0; i < descr->nr_cooked_registers; i++)
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119 {
120 long regend;
121 /* Keep extending the buffer so that there is always enough
122 space for all registers. The comparison is necessary since
123 legacy code is free to put registers in random places in the
124 buffer separated by holes. Once REGISTER_BYTE() is killed
125 this can be greatly simplified. */
126 /* FIXME: cagney/2001-12-04: This code shouldn't need to use
127 REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the
128 buffer out so that certain registers just happen to overlap.
129 Ulgh! New targets use gdbarch's register read/write and
130 entirely avoid this uglyness. */
131 regend = descr->register_offset[i] + descr->sizeof_register[i];
132 if (descr->sizeof_raw_registers < regend)
133 descr->sizeof_raw_registers = regend;
134 }
135 return descr;
136}
137
138static void *
139init_regcache_descr (struct gdbarch *gdbarch)
140{
141 int i;
142 struct regcache_descr *descr;
143 gdb_assert (gdbarch != NULL);
144
145 /* If an old style architecture, construct the register cache
146 description using all the register macros. */
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147 if (!gdbarch_pseudo_register_read_p (gdbarch)
148 && !gdbarch_pseudo_register_write_p (gdbarch))
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149 return init_legacy_regcache_descr (gdbarch);
150
151 descr = XMALLOC (struct regcache_descr);
152 descr->gdbarch = gdbarch;
153 descr->legacy_p = 0;
154
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AC
155 /* Total size of the register space. The raw registers are mapped
156 directly onto the raw register cache while the pseudo's are
3fadccb3 157 either mapped onto raw-registers or memory. */
d138e37a 158 descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS;
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AC
159
160 /* Construct a strictly RAW register cache. Don't allow pseudo's
161 into the register cache. */
162 descr->nr_raw_registers = NUM_REGS;
163 descr->sizeof_raw_register_valid_p = NUM_REGS;
164
165 /* Lay out the register cache. The pseud-registers are included in
166 the layout even though their value isn't stored in the register
167 cache. Some code, via read_register_bytes() access a register
168 using an offset/length rather than a register number.
169
170 NOTE: cagney/2002-05-22: Only REGISTER_VIRTUAL_TYPE() needs to be
171 used when constructing the register cache. It is assumed that
172 register raw size, virtual size and type length of the type are
173 all the same. */
174
175 {
176 long offset = 0;
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177 descr->sizeof_register = XCALLOC (descr->nr_cooked_registers, long);
178 descr->register_offset = XCALLOC (descr->nr_cooked_registers, long);
3fadccb3 179 descr->max_register_size = 0;
d138e37a 180 for (i = 0; i < descr->nr_cooked_registers; i++)
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181 {
182 descr->sizeof_register[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
183 descr->register_offset[i] = offset;
184 offset += descr->sizeof_register[i];
185 if (descr->max_register_size < descr->sizeof_register[i])
186 descr->max_register_size = descr->sizeof_register[i];
187 }
188 /* Set the real size of the register cache buffer. */
189 /* FIXME: cagney/2002-05-22: Should only need to allocate space
190 for the raw registers. Unfortunatly some code still accesses
191 the register array directly using the global registers[].
192 Until that code has been purged, play safe and over allocating
193 the register buffer. Ulgh! */
194 descr->sizeof_raw_registers = offset;
195 /* = descr->register_offset[descr->nr_raw_registers]; */
196 }
197
198#if 0
199 /* Sanity check. Confirm that the assumptions about gdbarch are
200 true. The REGCACHE_DESCR_HANDLE is set before doing the checks
201 so that targets using the generic methods supplied by regcache
202 don't go into infinite recursion trying to, again, create the
203 regcache. */
204 set_gdbarch_data (gdbarch, regcache_descr_handle, descr);
d138e37a 205 for (i = 0; i < descr->nr_cooked_registers; i++)
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206 {
207 gdb_assert (descr->sizeof_register[i] == REGISTER_RAW_SIZE (i));
208 gdb_assert (descr->sizeof_register[i] == REGISTER_VIRTUAL_SIZE (i));
209 gdb_assert (descr->register_offset[i] == REGISTER_BYTE (i));
210 }
211 /* gdb_assert (descr->sizeof_raw_registers == REGISTER_BYTES (i)); */
212#endif
213
214 return descr;
215}
216
217static struct regcache_descr *
218regcache_descr (struct gdbarch *gdbarch)
219{
220 return gdbarch_data (gdbarch, regcache_descr_handle);
221}
222
223static void
224xfree_regcache_descr (struct gdbarch *gdbarch, void *ptr)
225{
226 struct regcache_descr *descr = ptr;
227 if (descr == NULL)
228 return;
229 xfree (descr->register_offset);
230 xfree (descr->sizeof_register);
231 descr->register_offset = NULL;
232 descr->sizeof_register = NULL;
233 xfree (descr);
234}
235
236/* The register cache for storing raw register values. */
237
238struct regcache
239{
240 struct regcache_descr *descr;
241 char *raw_registers;
242 char *raw_register_valid_p;
243 /* If a value isn't in the cache should the corresponding target be
244 queried for a value. */
245 int passthrough_p;
246};
247
248struct regcache *
249regcache_xmalloc (struct gdbarch *gdbarch)
250{
251 struct regcache_descr *descr;
252 struct regcache *regcache;
253 gdb_assert (gdbarch != NULL);
254 descr = regcache_descr (gdbarch);
255 regcache = XMALLOC (struct regcache);
256 regcache->descr = descr;
257 regcache->raw_registers
258 = XCALLOC (descr->sizeof_raw_registers, char);
259 regcache->raw_register_valid_p
260 = XCALLOC (descr->sizeof_raw_register_valid_p, char);
261 regcache->passthrough_p = 0;
262 return regcache;
263}
264
265void
266regcache_xfree (struct regcache *regcache)
267{
268 if (regcache == NULL)
269 return;
270 xfree (regcache->raw_registers);
271 xfree (regcache->raw_register_valid_p);
272 xfree (regcache);
273}
274
36160dc4
AC
275void
276do_regcache_xfree (void *data)
277{
278 regcache_xfree (data);
279}
280
281struct cleanup *
282make_cleanup_regcache_xfree (struct regcache *regcache)
283{
284 return make_cleanup (do_regcache_xfree, regcache);
285}
286
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AC
287void
288regcache_cpy (struct regcache *dst, struct regcache *src)
289{
290 int i;
291 char *buf;
292 gdb_assert (src != NULL && dst != NULL);
293 gdb_assert (src->descr->gdbarch == dst->descr->gdbarch);
294 gdb_assert (src != dst);
295 /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite.
296 It keeps the existing code working where things rely on going
297 through to the register cache. */
298 if (src == current_regcache && src->descr->legacy_p)
299 {
300 /* ULGH!!!! Old way. Use REGISTER bytes and let code below
301 untangle fetch. */
302 read_register_bytes (0, dst->raw_registers, REGISTER_BYTES);
303 return;
304 }
305 /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite.
306 It keeps the existing code working where things rely on going
307 through to the register cache. */
308 if (dst == current_regcache && dst->descr->legacy_p)
309 {
310 /* ULGH!!!! Old way. Use REGISTER bytes and let code below
311 untangle fetch. */
312 write_register_bytes (0, src->raw_registers, REGISTER_BYTES);
313 return;
314 }
315 buf = alloca (src->descr->max_register_size);
316 for (i = 0; i < src->descr->nr_raw_registers; i++)
317 {
318 /* Should we worry about the valid bit here? */
0818c12a
AC
319 regcache_raw_read (src, i, buf);
320 regcache_raw_write (dst, i, buf);
3fadccb3
AC
321 }
322}
323
324void
325regcache_cpy_no_passthrough (struct regcache *dst, struct regcache *src)
326{
327 int i;
328 gdb_assert (src != NULL && dst != NULL);
329 gdb_assert (src->descr->gdbarch == dst->descr->gdbarch);
330 /* NOTE: cagney/2002-05-17: Don't let the caller do a no-passthrough
331 move of data into the current_regcache(). Doing this would be
332 silly - it would mean that valid_p would be completly invalid. */
333 gdb_assert (dst != current_regcache);
334 memcpy (dst->raw_registers, src->raw_registers,
335 dst->descr->sizeof_raw_registers);
336 memcpy (dst->raw_register_valid_p, src->raw_register_valid_p,
337 dst->descr->sizeof_raw_register_valid_p);
338}
339
340struct regcache *
341regcache_dup (struct regcache *src)
342{
343 struct regcache *newbuf;
344 gdb_assert (current_regcache != NULL);
345 newbuf = regcache_xmalloc (src->descr->gdbarch);
346 regcache_cpy (newbuf, src);
347 return newbuf;
348}
349
350struct regcache *
351regcache_dup_no_passthrough (struct regcache *src)
352{
353 struct regcache *newbuf;
354 gdb_assert (current_regcache != NULL);
355 newbuf = regcache_xmalloc (src->descr->gdbarch);
356 regcache_cpy_no_passthrough (newbuf, src);
357 return newbuf;
358}
359
360int
361regcache_valid_p (struct regcache *regcache, int regnum)
362{
363 gdb_assert (regcache != NULL);
364 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
365 return regcache->raw_register_valid_p[regnum];
366}
367
368CORE_ADDR
0818c12a 369regcache_raw_read_as_address (struct regcache *regcache, int regnum)
3fadccb3
AC
370{
371 char *buf;
372 gdb_assert (regcache != NULL);
373 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
374 buf = alloca (regcache->descr->sizeof_register[regnum]);
0818c12a 375 regcache_raw_read (regcache, regnum, buf);
3fadccb3
AC
376 return extract_address (buf, regcache->descr->sizeof_register[regnum]);
377}
378
379char *
380deprecated_grub_regcache_for_registers (struct regcache *regcache)
381{
382 return regcache->raw_registers;
383}
384
385char *
386deprecated_grub_regcache_for_register_valid (struct regcache *regcache)
387{
388 return regcache->raw_register_valid_p;
389}
390
391/* Global structure containing the current regcache. */
392/* FIXME: cagney/2002-05-11: The two global arrays registers[] and
393 register_valid[] currently point into this structure. */
394struct regcache *current_regcache;
395
5ebd2499 396/* NOTE: this is a write-through cache. There is no "dirty" bit for
32178cab
MS
397 recording if the register values have been changed (eg. by the
398 user). Therefore all registers must be written back to the
399 target when appropriate. */
400
401/* REGISTERS contains the cached register values (in target byte order). */
402
403char *registers;
404
405/* REGISTER_VALID is 0 if the register needs to be fetched,
406 1 if it has been fetched, and
407 -1 if the register value was not available.
c97dcfc7
AC
408
409 "Not available" indicates that the target is not not able to supply
410 the register at this state. The register may become available at a
411 later time (after the next resume). This often occures when GDB is
412 manipulating a target that contains only a snapshot of the entire
413 system being debugged - some of the registers in such a system may
414 not have been saved. */
32178cab
MS
415
416signed char *register_valid;
417
39f77062 418/* The thread/process associated with the current set of registers. */
32178cab 419
39f77062 420static ptid_t registers_ptid;
32178cab
MS
421
422/*
423 * FUNCTIONS:
424 */
425
426/* REGISTER_CACHED()
427
428 Returns 0 if the value is not in the cache (needs fetch).
429 >0 if the value is in the cache.
430 <0 if the value is permanently unavailable (don't ask again). */
431
432int
433register_cached (int regnum)
434{
435 return register_valid[regnum];
436}
437
7302a204
ND
438/* Record that REGNUM's value is cached if STATE is >0, uncached but
439 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
440
441void
442set_register_cached (int regnum, int state)
443{
444 register_valid[regnum] = state;
445}
446
2dc4e391
DT
447/* REGISTER_CHANGED
448
449 invalidate a single register REGNUM in the cache */
450void
451register_changed (int regnum)
452{
7302a204
ND
453 set_register_cached (regnum, 0);
454}
455
456/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
457 else return a pointer to the start of the cache buffer. */
458
193cb69f 459static char *
3fadccb3 460register_buffer (struct regcache *regcache, int regnum)
7302a204 461{
3fadccb3 462 return regcache->raw_registers + regcache->descr->register_offset[regnum];
7302a204
ND
463}
464
465/* Return whether register REGNUM is a real register. */
466
467static int
468real_register (int regnum)
469{
470 return regnum >= 0 && regnum < NUM_REGS;
471}
472
32178cab
MS
473/* Low level examining and depositing of registers.
474
475 The caller is responsible for making sure that the inferior is
476 stopped before calling the fetching routines, or it will get
477 garbage. (a change from GDB version 3, in which the caller got the
478 value from the last stop). */
479
480/* REGISTERS_CHANGED ()
481
482 Indicate that registers may have changed, so invalidate the cache. */
483
484void
485registers_changed (void)
486{
487 int i;
32178cab 488
39f77062 489 registers_ptid = pid_to_ptid (-1);
32178cab
MS
490
491 /* Force cleanup of any alloca areas if using C alloca instead of
492 a builtin alloca. This particular call is used to clean up
493 areas allocated by low level target code which may build up
494 during lengthy interactions between gdb and the target before
495 gdb gives control to the user (ie watchpoints). */
496 alloca (0);
497
31e9866e 498 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
7302a204 499 set_register_cached (i, 0);
32178cab
MS
500
501 if (registers_changed_hook)
502 registers_changed_hook ();
503}
504
505/* REGISTERS_FETCHED ()
506
507 Indicate that all registers have been fetched, so mark them all valid. */
508
31e9866e
AC
509/* NOTE: cagney/2001-12-04: This function does not set valid on the
510 pseudo-register range since pseudo registers are always supplied
511 using supply_register(). */
512/* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target
513 code was blatting the registers[] array and then calling this.
514 Since targets should only be using supply_register() the need for
515 this function/hack is eliminated. */
32178cab
MS
516
517void
518registers_fetched (void)
519{
520 int i;
32178cab 521
a728f042 522 for (i = 0; i < NUM_REGS; i++)
7302a204 523 set_register_cached (i, 1);
fcdc5976 524 /* Do not assume that the pseudo-regs have also been fetched.
31e9866e 525 Fetching all real regs NEVER accounts for pseudo-regs. */
32178cab
MS
526}
527
528/* read_register_bytes and write_register_bytes are generally a *BAD*
529 idea. They are inefficient because they need to check for partial
530 updates, which can only be done by scanning through all of the
531 registers and seeing if the bytes that are being read/written fall
532 inside of an invalid register. [The main reason this is necessary
533 is that register sizes can vary, so a simple index won't suffice.]
534 It is far better to call read_register_gen and write_register_gen
535 if you want to get at the raw register contents, as it only takes a
5ebd2499 536 regnum as an argument, and therefore can't do a partial register
32178cab
MS
537 update.
538
539 Prior to the recent fixes to check for partial updates, both read
540 and write_register_bytes always checked to see if any registers
541 were stale, and then called target_fetch_registers (-1) to update
542 the whole set. This caused really slowed things down for remote
543 targets. */
544
545/* Copy INLEN bytes of consecutive data from registers
546 starting with the INREGBYTE'th byte of register data
547 into memory at MYADDR. */
548
549void
61a0eb5b 550read_register_bytes (int in_start, char *in_buf, int in_len)
32178cab 551{
61a0eb5b 552 int in_end = in_start + in_len;
5ebd2499 553 int regnum;
61a0eb5b 554 char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
555
556 /* See if we are trying to read bytes from out-of-date registers. If so,
557 update just those registers. */
558
5ebd2499 559 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab 560 {
61a0eb5b
AC
561 int reg_start;
562 int reg_end;
563 int reg_len;
564 int start;
565 int end;
566 int byte;
32178cab 567
61a0eb5b
AC
568 reg_start = REGISTER_BYTE (regnum);
569 reg_len = REGISTER_RAW_SIZE (regnum);
570 reg_end = reg_start + reg_len;
32178cab 571
61a0eb5b 572 if (reg_end <= in_start || in_end <= reg_start)
5ebd2499 573 /* The range the user wants to read doesn't overlap with regnum. */
32178cab
MS
574 continue;
575
275f450c
AC
576 if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0')
577 /* Force the cache to fetch the entire register. */
578 read_register_gen (regnum, reg_buf);
579 else
580 /* Legacy note: even though this register is ``invalid'' we
581 still need to return something. It would appear that some
582 code relies on apparent gaps in the register array also
583 being returned. */
584 /* FIXME: cagney/2001-08-18: This is just silly. It defeats
585 the entire register read/write flow of control. Must
586 resist temptation to return 0xdeadbeef. */
587 memcpy (reg_buf, registers + reg_start, reg_len);
32178cab 588
61a0eb5b
AC
589 /* Legacy note: This function, for some reason, allows a NULL
590 input buffer. If the buffer is NULL, the registers are still
591 fetched, just the final transfer is skipped. */
592 if (in_buf == NULL)
593 continue;
594
595 /* start = max (reg_start, in_start) */
596 if (reg_start > in_start)
597 start = reg_start;
598 else
599 start = in_start;
600
601 /* end = min (reg_end, in_end) */
602 if (reg_end < in_end)
603 end = reg_end;
604 else
605 end = in_end;
606
607 /* Transfer just the bytes common to both IN_BUF and REG_BUF */
608 for (byte = start; byte < end; byte++)
165cd47f 609 {
61a0eb5b 610 in_buf[byte - in_start] = reg_buf[byte - reg_start];
165cd47f 611 }
32178cab 612 }
32178cab
MS
613}
614
5ebd2499
ND
615/* Read register REGNUM into memory at MYADDR, which must be large
616 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
32178cab
MS
617 register is known to be the size of a CORE_ADDR or smaller,
618 read_register can be used instead. */
619
61a0eb5b
AC
620static void
621legacy_read_register_gen (int regnum, char *myaddr)
32178cab 622{
61a0eb5b 623 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
39f77062 624 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
625 {
626 registers_changed ();
39f77062 627 registers_ptid = inferior_ptid;
32178cab
MS
628 }
629
7302a204 630 if (!register_cached (regnum))
5c27f28a 631 target_fetch_registers (regnum);
7302a204 632
3fadccb3 633 memcpy (myaddr, register_buffer (current_regcache, regnum),
5ebd2499 634 REGISTER_RAW_SIZE (regnum));
32178cab
MS
635}
636
61a0eb5b 637void
1aaa5f99 638regcache_raw_read (struct regcache *regcache, int regnum, void *buf)
61a0eb5b 639{
3fadccb3
AC
640 gdb_assert (regcache != NULL && buf != NULL);
641 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
642 if (regcache->descr->legacy_p
643 && regcache->passthrough_p)
644 {
645 gdb_assert (regcache == current_regcache);
646 /* For moment, just use underlying legacy code. Ulgh!!! This
647 silently and very indirectly updates the regcache's regcache
648 via the global register_valid[]. */
649 legacy_read_register_gen (regnum, buf);
650 return;
651 }
652 /* Make certain that the register cache is up-to-date with respect
653 to the current thread. This switching shouldn't be necessary
654 only there is still only one target side register cache. Sigh!
655 On the bright side, at least there is a regcache object. */
656 if (regcache->passthrough_p)
657 {
658 gdb_assert (regcache == current_regcache);
659 if (! ptid_equal (registers_ptid, inferior_ptid))
660 {
661 registers_changed ();
662 registers_ptid = inferior_ptid;
663 }
664 if (!register_cached (regnum))
5c27f28a 665 target_fetch_registers (regnum);
3fadccb3
AC
666 }
667 /* Copy the value directly into the register cache. */
668 memcpy (buf, (regcache->raw_registers
669 + regcache->descr->register_offset[regnum]),
670 regcache->descr->sizeof_register[regnum]);
61a0eb5b
AC
671}
672
673void
674read_register_gen (int regnum, char *buf)
675{
3fadccb3
AC
676 gdb_assert (current_regcache != NULL);
677 gdb_assert (current_regcache->descr->gdbarch == current_gdbarch);
678 if (current_regcache->descr->legacy_p)
61a0eb5b
AC
679 {
680 legacy_read_register_gen (regnum, buf);
681 return;
682 }
68365089
AC
683 regcache_cooked_read (current_regcache, regnum, buf);
684}
685
686void
29e1842b 687regcache_cooked_read (struct regcache *regcache, int regnum, void *buf)
68365089 688{
d138e37a 689 gdb_assert (regnum >= 0);
68365089
AC
690 gdb_assert (regnum < regcache->descr->nr_cooked_registers);
691 if (regnum < regcache->descr->nr_raw_registers)
692 regcache_raw_read (regcache, regnum, buf);
d138e37a 693 else
68365089
AC
694 gdbarch_pseudo_register_read (regcache->descr->gdbarch, regcache,
695 regnum, buf);
61a0eb5b
AC
696}
697
5ebd2499
ND
698/* Write register REGNUM at MYADDR to the target. MYADDR points at
699 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
32178cab 700
61a0eb5b 701static void
1aaa5f99 702legacy_write_register_gen (int regnum, const void *myaddr)
32178cab
MS
703{
704 int size;
61a0eb5b 705 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
32178cab
MS
706
707 /* On the sparc, writing %g0 is a no-op, so we don't even want to
708 change the registers array if something writes to this register. */
5ebd2499 709 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
710 return;
711
39f77062 712 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
713 {
714 registers_changed ();
39f77062 715 registers_ptid = inferior_ptid;
32178cab
MS
716 }
717
5ebd2499 718 size = REGISTER_RAW_SIZE (regnum);
32178cab 719
7302a204 720 if (real_register (regnum))
1297a2f0
MS
721 {
722 /* If we have a valid copy of the register, and new value == old
723 value, then don't bother doing the actual store. */
724 if (register_cached (regnum)
3fadccb3
AC
725 && (memcmp (register_buffer (current_regcache, regnum), myaddr, size)
726 == 0))
1297a2f0
MS
727 return;
728 else
729 target_prepare_to_store ();
730 }
32178cab 731
3fadccb3 732 memcpy (register_buffer (current_regcache, regnum), myaddr, size);
32178cab 733
7302a204 734 set_register_cached (regnum, 1);
5c27f28a 735 target_store_registers (regnum);
32178cab
MS
736}
737
61a0eb5b 738void
1aaa5f99 739regcache_raw_write (struct regcache *regcache, int regnum, const void *buf)
61a0eb5b 740{
3fadccb3
AC
741 gdb_assert (regcache != NULL && buf != NULL);
742 gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers);
743
744 if (regcache->passthrough_p
745 && regcache->descr->legacy_p)
746 {
747 /* For moment, just use underlying legacy code. Ulgh!!! This
748 silently and very indirectly updates the regcache's buffers
749 via the globals register_valid[] and registers[]. */
750 gdb_assert (regcache == current_regcache);
751 legacy_write_register_gen (regnum, buf);
752 return;
753 }
754
755 /* On the sparc, writing %g0 is a no-op, so we don't even want to
756 change the registers array if something writes to this register. */
757 if (CANNOT_STORE_REGISTER (regnum))
758 return;
759
760 /* Handle the simple case first -> not write through so just store
761 value in cache. */
762 if (!regcache->passthrough_p)
763 {
764 memcpy ((regcache->raw_registers
765 + regcache->descr->register_offset[regnum]), buf,
766 regcache->descr->sizeof_register[regnum]);
767 regcache->raw_register_valid_p[regnum] = 1;
768 return;
769 }
770
771 /* Make certain that the correct cache is selected. */
772 gdb_assert (regcache == current_regcache);
773 if (! ptid_equal (registers_ptid, inferior_ptid))
774 {
775 registers_changed ();
776 registers_ptid = inferior_ptid;
777 }
778
779 /* If we have a valid copy of the register, and new value == old
780 value, then don't bother doing the actual store. */
781 if (regcache_valid_p (regcache, regnum)
782 && (memcmp (register_buffer (regcache, regnum), buf,
783 regcache->descr->sizeof_register[regnum]) == 0))
784 return;
785
786 target_prepare_to_store ();
787 memcpy (register_buffer (regcache, regnum), buf,
788 regcache->descr->sizeof_register[regnum]);
789 regcache->raw_register_valid_p[regnum] = 1;
5c27f28a 790 target_store_registers (regnum);
61a0eb5b
AC
791}
792
793void
794write_register_gen (int regnum, char *buf)
795{
3fadccb3
AC
796 gdb_assert (current_regcache != NULL);
797 gdb_assert (current_regcache->descr->gdbarch == current_gdbarch);
798 if (current_regcache->descr->legacy_p)
61a0eb5b
AC
799 {
800 legacy_write_register_gen (regnum, buf);
801 return;
802 }
68365089
AC
803 regcache_cooked_write (current_regcache, regnum, buf);
804}
805
806void
29e1842b 807regcache_cooked_write (struct regcache *regcache, int regnum, const void *buf)
68365089 808{
d138e37a 809 gdb_assert (regnum >= 0);
68365089
AC
810 gdb_assert (regnum < regcache->descr->nr_cooked_registers);
811 if (regnum < regcache->descr->nr_raw_registers)
812 regcache_raw_write (regcache, regnum, buf);
d138e37a 813 else
68365089 814 gdbarch_pseudo_register_write (regcache->descr->gdbarch, regcache,
d8124050 815 regnum, buf);
61a0eb5b
AC
816}
817
32178cab
MS
818/* Copy INLEN bytes of consecutive data from memory at MYADDR
819 into registers starting with the MYREGSTART'th byte of register data. */
820
821void
822write_register_bytes (int myregstart, char *myaddr, int inlen)
823{
824 int myregend = myregstart + inlen;
5ebd2499 825 int regnum;
32178cab
MS
826
827 target_prepare_to_store ();
828
829 /* Scan through the registers updating any that are covered by the
830 range myregstart<=>myregend using write_register_gen, which does
831 nice things like handling threads, and avoiding updates when the
832 new and old contents are the same. */
833
5ebd2499 834 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
835 {
836 int regstart, regend;
837
5ebd2499
ND
838 regstart = REGISTER_BYTE (regnum);
839 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
840
841 /* Is this register completely outside the range the user is writing? */
842 if (myregend <= regstart || regend <= myregstart)
843 /* do nothing */ ;
844
845 /* Is this register completely within the range the user is writing? */
846 else if (myregstart <= regstart && regend <= myregend)
5ebd2499 847 write_register_gen (regnum, myaddr + (regstart - myregstart));
32178cab
MS
848
849 /* The register partially overlaps the range being written. */
850 else
851 {
e6cbd02a 852 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
853 /* What's the overlap between this register's bytes and
854 those the caller wants to write? */
855 int overlapstart = max (regstart, myregstart);
856 int overlapend = min (regend, myregend);
857
858 /* We may be doing a partial update of an invalid register.
859 Update it from the target before scribbling on it. */
5ebd2499 860 read_register_gen (regnum, regbuf);
32178cab
MS
861
862 memcpy (registers + overlapstart,
863 myaddr + (overlapstart - myregstart),
864 overlapend - overlapstart);
865
5c27f28a 866 target_store_registers (regnum);
32178cab
MS
867 }
868 }
869}
870
871
5ebd2499 872/* Return the contents of register REGNUM as an unsigned integer. */
32178cab 873
173155e8 874ULONGEST
5ebd2499 875read_register (int regnum)
32178cab 876{
61a0eb5b
AC
877 char *buf = alloca (REGISTER_RAW_SIZE (regnum));
878 read_register_gen (regnum, buf);
879 return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
32178cab
MS
880}
881
173155e8 882ULONGEST
39f77062 883read_register_pid (int regnum, ptid_t ptid)
32178cab 884{
39f77062 885 ptid_t save_ptid;
32178cab
MS
886 int save_pid;
887 CORE_ADDR retval;
888
39f77062 889 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 890 return read_register (regnum);
32178cab 891
39f77062 892 save_ptid = inferior_ptid;
32178cab 893
39f77062 894 inferior_ptid = ptid;
32178cab 895
5ebd2499 896 retval = read_register (regnum);
32178cab 897
39f77062 898 inferior_ptid = save_ptid;
32178cab
MS
899
900 return retval;
901}
902
5ebd2499 903/* Return the contents of register REGNUM as a signed integer. */
173155e8
AC
904
905LONGEST
5ebd2499 906read_signed_register (int regnum)
173155e8 907{
61a0eb5b
AC
908 void *buf = alloca (REGISTER_RAW_SIZE (regnum));
909 read_register_gen (regnum, buf);
910 return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
173155e8
AC
911}
912
913LONGEST
39f77062 914read_signed_register_pid (int regnum, ptid_t ptid)
173155e8 915{
39f77062 916 ptid_t save_ptid;
173155e8
AC
917 LONGEST retval;
918
39f77062 919 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 920 return read_signed_register (regnum);
173155e8 921
39f77062 922 save_ptid = inferior_ptid;
173155e8 923
39f77062 924 inferior_ptid = ptid;
173155e8 925
5ebd2499 926 retval = read_signed_register (regnum);
173155e8 927
39f77062 928 inferior_ptid = save_ptid;
173155e8
AC
929
930 return retval;
931}
932
5ebd2499 933/* Store VALUE into the raw contents of register number REGNUM. */
32178cab
MS
934
935void
5ebd2499 936write_register (int regnum, LONGEST val)
32178cab 937{
61a0eb5b 938 void *buf;
32178cab 939 int size;
5ebd2499 940 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
941 buf = alloca (size);
942 store_signed_integer (buf, size, (LONGEST) val);
61a0eb5b 943 write_register_gen (regnum, buf);
32178cab
MS
944}
945
946void
39f77062 947write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
32178cab 948{
39f77062 949 ptid_t save_ptid;
32178cab 950
39f77062 951 if (ptid_equal (ptid, inferior_ptid))
32178cab 952 {
5ebd2499 953 write_register (regnum, val);
32178cab
MS
954 return;
955 }
956
39f77062 957 save_ptid = inferior_ptid;
32178cab 958
39f77062 959 inferior_ptid = ptid;
32178cab 960
5ebd2499 961 write_register (regnum, val);
32178cab 962
39f77062 963 inferior_ptid = save_ptid;
32178cab
MS
964}
965
966/* SUPPLY_REGISTER()
967
5ebd2499 968 Record that register REGNUM contains VAL. This is used when the
32178cab
MS
969 value is obtained from the inferior or core dump, so there is no
970 need to store the value there.
971
972 If VAL is a NULL pointer, then it's probably an unsupported register.
5ebd2499 973 We just set its value to all zeros. We might want to record this
32178cab
MS
974 fact, and report it to the users of read_register and friends. */
975
976void
1aaa5f99 977supply_register (int regnum, const void *val)
32178cab
MS
978{
979#if 1
39f77062 980 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
981 {
982 registers_changed ();
39f77062 983 registers_ptid = inferior_ptid;
32178cab
MS
984 }
985#endif
986
7302a204 987 set_register_cached (regnum, 1);
32178cab 988 if (val)
3fadccb3 989 memcpy (register_buffer (current_regcache, regnum), val,
5ebd2499 990 REGISTER_RAW_SIZE (regnum));
32178cab 991 else
3fadccb3 992 memset (register_buffer (current_regcache, regnum), '\000',
5ebd2499 993 REGISTER_RAW_SIZE (regnum));
32178cab
MS
994
995 /* On some architectures, e.g. HPPA, there are a few stray bits in
996 some registers, that the rest of the code would like to ignore. */
997
61a0eb5b
AC
998 /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
999 going to be deprecated. Instead architectures will leave the raw
1000 register value as is and instead clean things up as they pass
d8124050 1001 through the method gdbarch_pseudo_register_read() clean up the
61a0eb5b
AC
1002 values. */
1003
4ee3352d 1004#ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE
0b434a00
AC
1005 DEPRECATED_CLEAN_UP_REGISTER_VALUE \
1006 (regnum, register_buffer (current_regcache, regnum));
32178cab
MS
1007#endif
1008}
1009
193cb69f
AC
1010void
1011regcache_collect (int regnum, void *buf)
1012{
3fadccb3
AC
1013 memcpy (buf, register_buffer (current_regcache, regnum),
1014 REGISTER_RAW_SIZE (regnum));
193cb69f
AC
1015}
1016
1017
8227c0ff
AC
1018/* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special
1019 handling for registers PC, SP, and FP. */
32178cab 1020
4e052eda
AC
1021/* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
1022 read_pc_pid(), read_pc(), generic_target_write_pc(),
1023 write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
8227c0ff
AC
1024 generic_target_write_sp(), write_sp(), generic_target_read_fp() and
1025 read_fp(), will eventually be moved out of the reg-cache into
1026 either frame.[hc] or to the multi-arch framework. The are not part
1027 of the raw register cache. */
4e052eda 1028
32178cab
MS
1029/* This routine is getting awfully cluttered with #if's. It's probably
1030 time to turn this into READ_PC and define it in the tm.h file.
1031 Ditto for write_pc.
1032
1033 1999-06-08: The following were re-written so that it assumes the
8e1a459b 1034 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
1035 version of that macro is made available where needed.
1036
1037 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
1038 by the multi-arch framework, it will eventually be possible to
1039 eliminate the intermediate read_pc_pid(). The client would call
1040 TARGET_READ_PC directly. (cagney). */
1041
32178cab 1042CORE_ADDR
39f77062 1043generic_target_read_pc (ptid_t ptid)
32178cab
MS
1044{
1045#ifdef PC_REGNUM
1046 if (PC_REGNUM >= 0)
1047 {
39f77062 1048 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
32178cab
MS
1049 return pc_val;
1050 }
1051#endif
8e65ff28
AC
1052 internal_error (__FILE__, __LINE__,
1053 "generic_target_read_pc");
32178cab
MS
1054 return 0;
1055}
1056
1057CORE_ADDR
39f77062 1058read_pc_pid (ptid_t ptid)
32178cab 1059{
39f77062 1060 ptid_t saved_inferior_ptid;
32178cab
MS
1061 CORE_ADDR pc_val;
1062
39f77062
KB
1063 /* In case ptid != inferior_ptid. */
1064 saved_inferior_ptid = inferior_ptid;
1065 inferior_ptid = ptid;
32178cab 1066
39f77062 1067 pc_val = TARGET_READ_PC (ptid);
32178cab 1068
39f77062 1069 inferior_ptid = saved_inferior_ptid;
32178cab
MS
1070 return pc_val;
1071}
1072
1073CORE_ADDR
1074read_pc (void)
1075{
39f77062 1076 return read_pc_pid (inferior_ptid);
32178cab
MS
1077}
1078
32178cab 1079void
39f77062 1080generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
32178cab
MS
1081{
1082#ifdef PC_REGNUM
1083 if (PC_REGNUM >= 0)
39f77062 1084 write_register_pid (PC_REGNUM, pc, ptid);
32178cab 1085 if (NPC_REGNUM >= 0)
39f77062 1086 write_register_pid (NPC_REGNUM, pc + 4, ptid);
32178cab 1087#else
8e65ff28
AC
1088 internal_error (__FILE__, __LINE__,
1089 "generic_target_write_pc");
32178cab
MS
1090#endif
1091}
1092
1093void
39f77062 1094write_pc_pid (CORE_ADDR pc, ptid_t ptid)
32178cab 1095{
39f77062 1096 ptid_t saved_inferior_ptid;
32178cab 1097
39f77062
KB
1098 /* In case ptid != inferior_ptid. */
1099 saved_inferior_ptid = inferior_ptid;
1100 inferior_ptid = ptid;
32178cab 1101
39f77062 1102 TARGET_WRITE_PC (pc, ptid);
32178cab 1103
39f77062 1104 inferior_ptid = saved_inferior_ptid;
32178cab
MS
1105}
1106
1107void
1108write_pc (CORE_ADDR pc)
1109{
39f77062 1110 write_pc_pid (pc, inferior_ptid);
32178cab
MS
1111}
1112
1113/* Cope with strage ways of getting to the stack and frame pointers */
1114
32178cab
MS
1115CORE_ADDR
1116generic_target_read_sp (void)
1117{
1118#ifdef SP_REGNUM
1119 if (SP_REGNUM >= 0)
1120 return read_register (SP_REGNUM);
1121#endif
8e65ff28
AC
1122 internal_error (__FILE__, __LINE__,
1123 "generic_target_read_sp");
32178cab
MS
1124}
1125
1126CORE_ADDR
1127read_sp (void)
1128{
1129 return TARGET_READ_SP ();
1130}
1131
32178cab
MS
1132void
1133generic_target_write_sp (CORE_ADDR val)
1134{
1135#ifdef SP_REGNUM
1136 if (SP_REGNUM >= 0)
1137 {
1138 write_register (SP_REGNUM, val);
1139 return;
1140 }
1141#endif
8e65ff28
AC
1142 internal_error (__FILE__, __LINE__,
1143 "generic_target_write_sp");
32178cab
MS
1144}
1145
1146void
1147write_sp (CORE_ADDR val)
1148{
1149 TARGET_WRITE_SP (val);
1150}
1151
32178cab
MS
1152CORE_ADDR
1153generic_target_read_fp (void)
1154{
1155#ifdef FP_REGNUM
1156 if (FP_REGNUM >= 0)
1157 return read_register (FP_REGNUM);
1158#endif
8e65ff28
AC
1159 internal_error (__FILE__, __LINE__,
1160 "generic_target_read_fp");
32178cab
MS
1161}
1162
1163CORE_ADDR
1164read_fp (void)
1165{
1166 return TARGET_READ_FP ();
1167}
1168
705152c5
MS
1169/* ARGSUSED */
1170static void
1171reg_flush_command (char *command, int from_tty)
1172{
1173 /* Force-flush the register cache. */
1174 registers_changed ();
1175 if (from_tty)
1176 printf_filtered ("Register cache flushed.\n");
1177}
1178
32178cab
MS
1179static void
1180build_regcache (void)
3fadccb3
AC
1181{
1182 current_regcache = regcache_xmalloc (current_gdbarch);
1183 current_regcache->passthrough_p = 1;
1184 registers = deprecated_grub_regcache_for_registers (current_regcache);
1185 register_valid = deprecated_grub_regcache_for_register_valid (current_regcache);
1186}
1187
32178cab
MS
1188void
1189_initialize_regcache (void)
1190{
3fadccb3
AC
1191 regcache_descr_handle = register_gdbarch_data (init_regcache_descr,
1192 xfree_regcache_descr);
1193 REGISTER_GDBARCH_SWAP (current_regcache);
32178cab
MS
1194 register_gdbarch_swap (&registers, sizeof (registers), NULL);
1195 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
1196 register_gdbarch_swap (NULL, 0, build_regcache);
705152c5
MS
1197
1198 add_com ("flushregs", class_maintenance, reg_flush_command,
1199 "Force gdb to flush its register cache (maintainer command)");
39f77062
KB
1200
1201 /* Initialize the thread/process associated with the current set of
1202 registers. For now, -1 is special, and means `no current process'. */
1203 registers_ptid = pid_to_ptid (-1);
32178cab 1204}
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