* aix5ppc-core.c: Define macros for the default architecture and
[deliverable/binutils-gdb.git] / gdb / remote-m32r-sdi.c
CommitLineData
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1/* Remote debugging interface for M32R/SDI.
2
9b254dd1
DJ
3 Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
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5
6 Contributed by Renesas Technology Co.
7 Written by Kei Sakamoto <sakamoto.kei@renesas.com>.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
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14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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23
24#include "defs.h"
25#include "gdbcmd.h"
26#include "gdbcore.h"
27#include "inferior.h"
28#include "target.h"
29#include "regcache.h"
30#include "gdb_string.h"
31#include <ctype.h>
32#include <signal.h>
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33#ifdef __MINGW32__
34#include <winsock.h>
35#else
b4b4b794 36#include <netinet/in.h>
cbba9205 37#endif
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38#include <sys/types.h>
39#include <sys/time.h>
40#include <signal.h>
41#include <time.h>
42
43
44#include "serial.h"
45
46/* Descriptor for I/O to remote machine. */
47
48static struct serial *sdi_desc = NULL;
49
50#define SDI_TIMEOUT 30
51
52
53#define SDIPORT 3232
54
55static char chip_name[64];
56
57static int step_mode;
58static unsigned long last_pc_addr = 0xffffffff;
59static unsigned char last_pc_addr_data[2];
60
61static int mmu_on = 0;
62
63static int use_ib_breakpoints = 1;
64
65#define MAX_BREAKPOINTS 1024
66static int max_ib_breakpoints;
67static unsigned long bp_address[MAX_BREAKPOINTS];
68static unsigned char bp_data[MAX_BREAKPOINTS][4];
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69
70/* dbt -> nop */
71static const unsigned char dbt_bp_entry[] = {
72 0x10, 0xe0, 0x70, 0x00
73};
74
75#define MAX_ACCESS_BREAKS 4
76static int max_access_breaks;
77static unsigned long ab_address[MAX_ACCESS_BREAKS];
78static unsigned int ab_type[MAX_ACCESS_BREAKS];
79static unsigned int ab_size[MAX_ACCESS_BREAKS];
80static CORE_ADDR hit_watchpoint_addr = 0;
81
82static int interrupted = 0;
83
84/* Forward data declarations */
85extern struct target_ops m32r_ops;
86
87
88/* Commands */
89#define SDI_OPEN 1
90#define SDI_CLOSE 2
91#define SDI_RELEASE 3
92#define SDI_READ_CPU_REG 4
93#define SDI_WRITE_CPU_REG 5
94#define SDI_READ_MEMORY 6
95#define SDI_WRITE_MEMORY 7
96#define SDI_EXEC_CPU 8
97#define SDI_STOP_CPU 9
98#define SDI_WAIT_FOR_READY 10
99#define SDI_GET_ATTR 11
100#define SDI_SET_ATTR 12
101#define SDI_STATUS 13
102
103/* Attributes */
104#define SDI_ATTR_NAME 1
105#define SDI_ATTR_BRK 2
106#define SDI_ATTR_ABRK 3
107#define SDI_ATTR_CACHE 4
108#define SDI_CACHE_TYPE_M32102 0
109#define SDI_CACHE_TYPE_CHAOS 1
110#define SDI_ATTR_MEM_ACCESS 5
111#define SDI_MEM_ACCESS_DEBUG_DMA 0
112#define SDI_MEM_ACCESS_MON_CODE 1
113
114/* Registers */
115#define SDI_REG_R0 0
116#define SDI_REG_R1 1
117#define SDI_REG_R2 2
118#define SDI_REG_R3 3
119#define SDI_REG_R4 4
120#define SDI_REG_R5 5
121#define SDI_REG_R6 6
122#define SDI_REG_R7 7
123#define SDI_REG_R8 8
124#define SDI_REG_R9 9
125#define SDI_REG_R10 10
126#define SDI_REG_R11 11
127#define SDI_REG_R12 12
128#define SDI_REG_FP 13
129#define SDI_REG_LR 14
130#define SDI_REG_SP 15
131#define SDI_REG_PSW 16
132#define SDI_REG_CBR 17
133#define SDI_REG_SPI 18
134#define SDI_REG_SPU 19
135#define SDI_REG_CR4 20
136#define SDI_REG_EVB 21
137#define SDI_REG_BPC 22
138#define SDI_REG_CR7 23
139#define SDI_REG_BBPSW 24
140#define SDI_REG_CR9 25
141#define SDI_REG_CR10 26
142#define SDI_REG_CR11 27
143#define SDI_REG_CR12 28
144#define SDI_REG_WR 29
145#define SDI_REG_BBPC 30
146#define SDI_REG_PBP 31
147#define SDI_REG_ACCH 32
148#define SDI_REG_ACCL 33
149#define SDI_REG_ACC1H 34
150#define SDI_REG_ACC1L 35
151
152
153/* Low level communication functions */
154
155/* Check an ack packet from the target */
156static int
157get_ack (void)
158{
159 int c;
160
717eb1cf 161 if (!sdi_desc)
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162 return -1;
163
164 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
165
166 if (c < 0)
167 return -1;
168
717eb1cf 169 if (c != '+') /* error */
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170 return -1;
171
172 return 0;
173}
174
175/* Send data to the target and check an ack packet */
176static int
177send_data (void *buf, int len)
178{
179 int ret;
180
717eb1cf 181 if (!sdi_desc)
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182 return -1;
183
184 if (serial_write (sdi_desc, buf, len) != 0)
185 return -1;
186
187 if (get_ack () == -1)
188 return -1;
189
190 return len;
191}
192
193/* Receive data from the target */
194static int
195recv_data (void *buf, int len)
196{
197 int total = 0;
198 int c;
199
717eb1cf 200 if (!sdi_desc)
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201 return -1;
202
203 while (total < len)
204 {
205 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
206
207 if (c < 0)
208 return -1;
209
210 ((unsigned char *) buf)[total++] = c;
211 }
212
213 return len;
214}
215
216/* Store unsigned long parameter on packet */
217static void
218store_long_parameter (void *buf, long val)
219{
220 val = htonl (val);
221 memcpy (buf, &val, 4);
222}
223
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224static int
225send_cmd (unsigned char cmd)
226{
227 unsigned char buf[1];
228 buf[0] = cmd;
229 return send_data (buf, 1);
230}
231
232static int
233send_one_arg_cmd (unsigned char cmd, unsigned char arg1)
234{
235 unsigned char buf[2];
236 buf[0] = cmd;
237 buf[1] = arg1;
238 return send_data (buf, 2);
239}
240
241static int
242send_two_arg_cmd (unsigned char cmd, unsigned char arg1, unsigned long arg2)
243{
244 unsigned char buf[6];
245 buf[0] = cmd;
246 buf[1] = arg1;
247 store_long_parameter (buf + 2, arg2);
248 return send_data (buf, 6);
249}
250
251static int
252send_three_arg_cmd (unsigned char cmd, unsigned long arg1, unsigned long arg2,
253 unsigned long arg3)
254{
255 unsigned char buf[13];
256 buf[0] = cmd;
257 store_long_parameter (buf + 1, arg1);
258 store_long_parameter (buf + 5, arg2);
259 store_long_parameter (buf + 9, arg3);
260 return send_data (buf, 13);
261}
262
263static unsigned char
264recv_char_data (void)
265{
266 unsigned char val;
267 recv_data (&val, 1);
268 return val;
269}
270
271static unsigned long
272recv_long_data (void)
273{
274 unsigned long val;
275 recv_data (&val, 4);
276 return ntohl (val);
277}
278
279
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280/* Check if MMU is on */
281static void
282check_mmu_status (void)
283{
284 unsigned long val;
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285
286 /* Read PC address */
e22f895c 287 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC) == -1)
b4b4b794 288 return;
e22f895c 289 val = recv_long_data ();
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290 if ((val & 0xc0000000) == 0x80000000)
291 {
292 mmu_on = 1;
293 return;
294 }
295
296 /* Read EVB address */
e22f895c 297 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_EVB) == -1)
b4b4b794 298 return;
e22f895c 299 val = recv_long_data ();
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300 if ((val & 0xc0000000) == 0x80000000)
301 {
302 mmu_on = 1;
303 return;
304 }
305
306 mmu_on = 0;
307}
308
309
310/* This is called not only when we first attach, but also when the
311 user types "run" after having attached. */
312static void
717eb1cf 313m32r_create_inferior (char *execfile, char *args, char **env, int from_tty)
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314{
315 CORE_ADDR entry_pt;
316
317 if (args && *args)
8a3fe4f8 318 error (_("Cannot pass arguments to remote STDEBUG process"));
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319
320 if (execfile == 0 || exec_bfd == 0)
8a3fe4f8 321 error (_("No executable file specified"));
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322
323 if (remote_debug)
324 fprintf_unfiltered (gdb_stdlog, "m32r_create_inferior(%s,%s)\n", execfile,
325 args);
326
327 entry_pt = bfd_get_start_address (exec_bfd);
328
329 /* The "process" (board) is already stopped awaiting our commands, and
330 the program is already downloaded. We just set its PC and go. */
331
332 clear_proceed_status ();
333
334 /* Tell wait_for_inferior that we've started a new process. */
335 init_wait_for_inferior ();
336
337 /* Set up the "saved terminal modes" of the inferior
338 based on what modes we are starting it with. */
339 target_terminal_init ();
340
341 /* Install inferior's terminal modes. */
342 target_terminal_inferior ();
343
281b533b 344 write_pc (entry_pt);
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345}
346
347/* Open a connection to a remote debugger.
348 NAME is the filename used for communication. */
349
350static void
351m32r_open (char *args, int from_tty)
352{
353 struct hostent *host_ent;
354 struct sockaddr_in server_addr;
355 char *port_str, hostname[256];
356 int port;
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357 int i, n;
358 int yes = 1;
359
360 if (remote_debug)
361 fprintf_unfiltered (gdb_stdlog, "m32r_open(%d)\n", from_tty);
362
363 target_preopen (from_tty);
364
365 push_target (&m32r_ops);
366
367 if (args == NULL)
368 sprintf (hostname, "localhost:%d", SDIPORT);
369 else
370 {
371 port_str = strchr (args, ':');
372 if (port_str == NULL)
717eb1cf 373 sprintf (hostname, "%s:%d", args, SDIPORT);
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374 else
375 strcpy (hostname, args);
376 }
377
378 sdi_desc = serial_open (hostname);
379 if (!sdi_desc)
8a3fe4f8 380 error (_("Connection refused."));
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381
382 if (get_ack () == -1)
8a3fe4f8 383 error (_("Cannot connect to SDI target."));
b4b4b794 384
e22f895c 385 if (send_cmd (SDI_OPEN) == -1)
8a3fe4f8 386 error (_("Cannot connect to SDI target."));
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387
388 /* Get maximum number of ib breakpoints */
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389 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_BRK);
390 max_ib_breakpoints = recv_char_data ();
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391 if (remote_debug)
392 printf_filtered ("Max IB Breakpoints = %d\n", max_ib_breakpoints);
393
394 /* Initialize breakpoints. */
395 for (i = 0; i < MAX_BREAKPOINTS; i++)
396 bp_address[i] = 0xffffffff;
397
398 /* Get maximum number of access breaks. */
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399 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_ABRK);
400 max_access_breaks = recv_char_data ();
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401 if (remote_debug)
402 printf_filtered ("Max Access Breaks = %d\n", max_access_breaks);
403
404 /* Initialize access breask. */
405 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
406 ab_address[i] = 0x00000000;
407
408 check_mmu_status ();
409
410 /* Get the name of chip on target board. */
e22f895c 411 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_NAME);
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412 recv_data (chip_name, 64);
413
414 if (from_tty)
415 printf_filtered ("Remote %s connected to %s\n", target_shortname,
416 chip_name);
417}
418
419/* Close out all files and local state before this target loses control. */
420
421static void
422m32r_close (int quitting)
423{
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424 if (remote_debug)
425 fprintf_unfiltered (gdb_stdlog, "m32r_close(%d)\n", quitting);
426
427 if (sdi_desc)
428 {
e22f895c 429 send_cmd (SDI_CLOSE);
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430 serial_close (sdi_desc);
431 sdi_desc = NULL;
432 }
433
434 inferior_ptid = null_ptid;
435 return;
436}
437
438/* Tell the remote machine to resume. */
439
440static void
441m32r_resume (ptid_t ptid, int step, enum target_signal sig)
442{
443 unsigned long pc_addr, bp_addr, ab_addr;
e22f895c 444 int ib_breakpoints;
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445 unsigned char buf[13];
446 int i;
447
448 if (remote_debug)
449 {
450 if (step)
451 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(step)\n");
452 else
453 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(cont)\n");
454 }
455
456 check_mmu_status ();
457
458 pc_addr = read_pc ();
459 if (remote_debug)
460 fprintf_unfiltered (gdb_stdlog, "pc <= 0x%lx\n", pc_addr);
461
462 /* At pc address there is a parallel instruction with +2 offset,
463 so we have to make it a serial instruction or avoid it. */
464 if (pc_addr == last_pc_addr)
465 {
466 /* Avoid a parallel nop. */
467 if (last_pc_addr_data[0] == 0xf0 && last_pc_addr_data[1] == 0x00)
468 {
469 pc_addr += 2;
470 /* Now we can forget this instruction. */
471 last_pc_addr = 0xffffffff;
472 }
473 /* Clear a parallel bit. */
474 else
475 {
476 buf[0] = SDI_WRITE_MEMORY;
4c6b5505 477 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
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478 store_long_parameter (buf + 1, pc_addr);
479 else
480 store_long_parameter (buf + 1, pc_addr - 1);
481 store_long_parameter (buf + 5, 1);
482 buf[9] = last_pc_addr_data[0] & 0x7f;
483 send_data (buf, 10);
484 }
485 }
486
487 /* Set PC. */
e22f895c 488 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
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489
490 /* step mode. */
491 step_mode = step;
492 if (step)
493 {
494 /* Set PBP. */
e22f895c 495 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, pc_addr | 1);
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496 }
497 else
498 {
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499 /* Unset PBP. */
500 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, 0x00000000);
501 }
502
503 if (use_ib_breakpoints)
504 ib_breakpoints = max_ib_breakpoints;
505 else
506 ib_breakpoints = 0;
507
508 /* Set ib breakpoints. */
509 for (i = 0; i < ib_breakpoints; i++)
510 {
511 bp_addr = bp_address[i];
b4b4b794 512
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513 if (bp_addr == 0xffffffff)
514 continue;
515
516 /* Set PBP. */
4c6b5505 517 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
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518 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
519 0x00000006);
b4b4b794 520 else
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521 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
522 0x06000000);
523
524 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8080 + 4 * i, 4, bp_addr);
525 }
526
527 /* Set dbt breakpoints. */
528 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
529 {
530 bp_addr = bp_address[i];
531
532 if (bp_addr == 0xffffffff)
533 continue;
534
535 if (!mmu_on)
536 bp_addr &= 0x7fffffff;
b4b4b794 537
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538 /* Write DBT instruction. */
539 buf[0] = SDI_WRITE_MEMORY;
492e5c6b 540 store_long_parameter (buf + 1, (bp_addr & 0xfffffffc));
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541 store_long_parameter (buf + 5, 4);
542 if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc))
b4b4b794 543 {
4c6b5505 544 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 545 {
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546 buf[9] = dbt_bp_entry[0];
547 buf[10] = dbt_bp_entry[1];
548 buf[11] = dbt_bp_entry[2];
549 buf[12] = dbt_bp_entry[3];
550 }
551 else
552 {
553 buf[9] = dbt_bp_entry[3];
554 buf[10] = dbt_bp_entry[2];
555 buf[11] = dbt_bp_entry[1];
556 buf[12] = dbt_bp_entry[0];
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557 }
558 }
e22f895c 559 else
b4b4b794 560 {
4c6b5505 561 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 562 {
e22f895c 563 if ((bp_addr & 2) == 0)
b4b4b794 564 {
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565 buf[9] = dbt_bp_entry[0];
566 buf[10] = dbt_bp_entry[1];
567 buf[11] = bp_data[i][2] & 0x7f;
568 buf[12] = bp_data[i][3];
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569 }
570 else
571 {
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572 buf[9] = bp_data[i][0];
573 buf[10] = bp_data[i][1];
574 buf[11] = dbt_bp_entry[0];
575 buf[12] = dbt_bp_entry[1];
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576 }
577 }
e22f895c 578 else
b4b4b794 579 {
e22f895c 580 if ((bp_addr & 2) == 0)
b4b4b794 581 {
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582 buf[9] = bp_data[i][0];
583 buf[10] = bp_data[i][1] & 0x7f;
584 buf[11] = dbt_bp_entry[1];
585 buf[12] = dbt_bp_entry[0];
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586 }
587 else
588 {
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589 buf[9] = dbt_bp_entry[1];
590 buf[10] = dbt_bp_entry[0];
591 buf[11] = bp_data[i][2];
592 buf[12] = bp_data[i][3];
b4b4b794 593 }
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594 }
595 }
596 send_data (buf, 13);
597 }
b4b4b794 598
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599 /* Set access breaks. */
600 for (i = 0; i < max_access_breaks; i++)
601 {
602 ab_addr = ab_address[i];
b4b4b794 603
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604 if (ab_addr == 0x00000000)
605 continue;
b4b4b794 606
e22f895c 607 /* DBC register */
4c6b5505 608 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
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609 {
610 switch (ab_type[i])
611 {
612 case 0: /* write watch */
613 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
614 0x00000086);
615 break;
616 case 1: /* read watch */
617 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
618 0x00000046);
619 break;
620 case 2: /* access watch */
621 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
622 0x00000006);
623 break;
624 }
625 }
626 else
627 {
628 switch (ab_type[i])
629 {
630 case 0: /* write watch */
631 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
632 0x86000000);
633 break;
634 case 1: /* read watch */
635 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
636 0x46000000);
637 break;
638 case 2: /* access watch */
639 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
640 0x06000000);
641 break;
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642 }
643 }
644
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645 /* DBAH register */
646 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8180 + 4 * i, 4, ab_addr);
647
648 /* DBAL register */
649 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8200 + 4 * i, 4,
650 0xffffffff);
651
652 /* DBD register */
653 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8280 + 4 * i, 4,
654 0x00000000);
655
656 /* DBDM register */
657 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8300 + 4 * i, 4,
658 0x00000000);
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659 }
660
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661 /* Resume program. */
662 send_cmd (SDI_EXEC_CPU);
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663
664 /* Without this, some commands which require an active target (such as kill)
665 won't work. This variable serves (at least) double duty as both the pid
666 of the target process (if it has such), and as a flag indicating that a
667 target is active. These functions should be split out into seperate
668 variables, especially since GDB will someday have a notion of debugging
669 several processes. */
670 inferior_ptid = pid_to_ptid (32);
671
672 return;
673}
674
675/* Wait until the remote machine stops, then return,
676 storing status in STATUS just as `wait' would. */
677
678static void
679gdb_cntrl_c (int signo)
680{
681 if (remote_debug)
682 fprintf_unfiltered (gdb_stdlog, "interrupt\n");
683 interrupted = 1;
684}
685
686static ptid_t
687m32r_wait (ptid_t ptid, struct target_waitstatus *status)
688{
689 static RETSIGTYPE (*prev_sigint) ();
690 unsigned long bp_addr, pc_addr;
e22f895c 691 int ib_breakpoints;
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692 long i;
693 unsigned char buf[13];
694 unsigned long val;
695 int ret, c;
696
697 if (remote_debug)
698 fprintf_unfiltered (gdb_stdlog, "m32r_wait()\n");
699
700 status->kind = TARGET_WAITKIND_EXITED;
701 status->value.sig = 0;
702
703 interrupted = 0;
704 prev_sigint = signal (SIGINT, gdb_cntrl_c);
705
706 /* Wait for ready */
707 buf[0] = SDI_WAIT_FOR_READY;
708 if (serial_write (sdi_desc, buf, 1) != 0)
8a3fe4f8 709 error (_("Remote connection closed"));
b4b4b794
KI
710
711 while (1)
712 {
713 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
714 if (c < 0)
8a3fe4f8 715 error (_("Remote connection closed"));
b4b4b794 716
717eb1cf 717 if (c == '-') /* error */
b4b4b794
KI
718 {
719 status->kind = TARGET_WAITKIND_STOPPED;
720 status->value.sig = TARGET_SIGNAL_HUP;
721 return inferior_ptid;
722 }
723 else if (c == '+') /* stopped */
724 break;
725
726 if (interrupted)
727 ret = serial_write (sdi_desc, "!", 1); /* packet to interrupt */
728 else
729 ret = serial_write (sdi_desc, ".", 1); /* packet to wait */
730 if (ret != 0)
8a3fe4f8 731 error (_("Remote connection closed"));
b4b4b794
KI
732 }
733
734 status->kind = TARGET_WAITKIND_STOPPED;
735 if (interrupted)
736 status->value.sig = TARGET_SIGNAL_INT;
737 else
738 status->value.sig = TARGET_SIGNAL_TRAP;
739
740 interrupted = 0;
741 signal (SIGINT, prev_sigint);
742
743 check_mmu_status ();
744
745 /* Recover parallel bit. */
746 if (last_pc_addr != 0xffffffff)
747 {
748 buf[0] = SDI_WRITE_MEMORY;
4c6b5505 749 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794
KI
750 store_long_parameter (buf + 1, last_pc_addr);
751 else
752 store_long_parameter (buf + 1, last_pc_addr - 1);
753 store_long_parameter (buf + 5, 1);
754 buf[9] = last_pc_addr_data[0];
755 send_data (buf, 10);
756 last_pc_addr = 0xffffffff;
757 }
758
e22f895c
KI
759 if (use_ib_breakpoints)
760 ib_breakpoints = max_ib_breakpoints;
761 else
762 ib_breakpoints = 0;
b4b4b794 763
e22f895c
KI
764 /* Set back pc by 2 if m32r is stopped with dbt. */
765 last_pc_addr = 0xffffffff;
766 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC);
767 pc_addr = recv_long_data () - 2;
768 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
769 {
770 if (pc_addr == bp_address[i])
b4b4b794 771 {
e22f895c
KI
772 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
773
774 /* If there is a parallel instruction with +2 offset at pc
775 address, we have to take care of it later. */
776 if ((pc_addr & 0x2) != 0)
b4b4b794 777 {
4c6b5505 778 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 779 {
e22f895c 780 if ((bp_data[i][2] & 0x80) != 0)
b4b4b794 781 {
e22f895c
KI
782 last_pc_addr = pc_addr;
783 last_pc_addr_data[0] = bp_data[i][2];
784 last_pc_addr_data[1] = bp_data[i][3];
b4b4b794 785 }
e22f895c
KI
786 }
787 else
788 {
789 if ((bp_data[i][1] & 0x80) != 0)
b4b4b794 790 {
e22f895c
KI
791 last_pc_addr = pc_addr;
792 last_pc_addr_data[0] = bp_data[i][1];
793 last_pc_addr_data[1] = bp_data[i][0];
b4b4b794
KI
794 }
795 }
b4b4b794 796 }
e22f895c 797 break;
b4b4b794 798 }
e22f895c 799 }
b4b4b794 800
e22f895c
KI
801 /* Remove ib breakpoints. */
802 for (i = 0; i < ib_breakpoints; i++)
803 {
804 if (bp_address[i] != 0xffffffff)
805 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
806 0x00000000);
807 }
808 /* Remove dbt breakpoints. */
809 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
810 {
811 bp_addr = bp_address[i];
812 if (bp_addr != 0xffffffff)
b4b4b794 813 {
e22f895c
KI
814 if (!mmu_on)
815 bp_addr &= 0x7fffffff;
492e5c6b 816 buf[0] = SDI_WRITE_MEMORY;
e22f895c
KI
817 store_long_parameter (buf + 1, bp_addr & 0xfffffffc);
818 store_long_parameter (buf + 5, 4);
819 buf[9] = bp_data[i][0];
820 buf[10] = bp_data[i][1];
821 buf[11] = bp_data[i][2];
822 buf[12] = bp_data[i][3];
823 send_data (buf, 13);
b4b4b794 824 }
e22f895c 825 }
b4b4b794 826
e22f895c
KI
827 /* Remove access breaks. */
828 hit_watchpoint_addr = 0;
829 for (i = 0; i < max_access_breaks; i++)
830 {
831 if (ab_address[i] != 0x00000000)
b4b4b794 832 {
e22f895c
KI
833 buf[0] = SDI_READ_MEMORY;
834 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
835 store_long_parameter (buf + 5, 4);
836 serial_write (sdi_desc, buf, 9);
837 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
838 if (c != '-' && recv_data (buf, 4) != -1)
b4b4b794 839 {
4c6b5505 840 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 841 {
e22f895c
KI
842 if ((buf[3] & 0x1) == 0x1)
843 hit_watchpoint_addr = ab_address[i];
844 }
845 else
846 {
847 if ((buf[0] & 0x1) == 0x1)
848 hit_watchpoint_addr = ab_address[i];
b4b4b794 849 }
b4b4b794 850 }
b4b4b794 851
e22f895c
KI
852 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
853 0x00000000);
854 }
b4b4b794 855 }
e22f895c
KI
856
857 if (remote_debug)
858 fprintf_unfiltered (gdb_stdlog, "pc => 0x%lx\n", pc_addr);
b4b4b794
KI
859
860 return inferior_ptid;
861}
862
863/* Terminate the open connection to the remote debugger.
864 Use this when you want to detach and do something else
865 with your gdb. */
866static void
867m32r_detach (char *args, int from_tty)
868{
869 if (remote_debug)
870 fprintf_unfiltered (gdb_stdlog, "m32r_detach(%d)\n", from_tty);
871
872 m32r_resume (inferior_ptid, 0, 0);
873
874 /* calls m32r_close to do the real work */
875 pop_target ();
876 if (from_tty)
877 fprintf_unfiltered (gdb_stdlog, "Ending remote %s debugging\n",
878 target_shortname);
879}
880
881/* Return the id of register number REGNO. */
882
883static int
884get_reg_id (int regno)
885{
886 switch (regno)
887 {
888 case 20:
889 return SDI_REG_BBPC;
890 case 21:
891 return SDI_REG_BPC;
892 case 22:
893 return SDI_REG_ACCL;
894 case 23:
895 return SDI_REG_ACCH;
896 case 24:
897 return SDI_REG_EVB;
898 }
899
900 return regno;
901}
902
903/* Read the remote registers into the block REGS. */
904
56be3814 905static void m32r_fetch_register (struct regcache *, int);
b4b4b794
KI
906
907static void
56be3814 908m32r_fetch_registers (struct regcache *regcache)
b4b4b794
KI
909{
910 int regno;
911
40a6adc1
MD
912 for (regno = 0;
913 regno < gdbarch_num_regs (get_regcache_arch (regcache));
914 regno++)
56be3814 915 m32r_fetch_register (regcache, regno);
b4b4b794
KI
916}
917
918/* Fetch register REGNO, or all registers if REGNO is -1.
919 Returns errno value. */
920static void
56be3814 921m32r_fetch_register (struct regcache *regcache, int regno)
b4b4b794
KI
922{
923 unsigned long val, val2, regid;
b4b4b794
KI
924
925 if (regno == -1)
56be3814 926 m32r_fetch_registers (regcache);
b4b4b794
KI
927 else
928 {
929 char buffer[MAX_REGISTER_SIZE];
930
931 regid = get_reg_id (regno);
e22f895c
KI
932 send_one_arg_cmd (SDI_READ_CPU_REG, regid);
933 val = recv_long_data ();
b4b4b794
KI
934
935 if (regid == SDI_REG_PSW)
936 {
e22f895c
KI
937 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
938 val2 = recv_long_data ();
3e41d55f 939 val = ((0x00cf & val2) << 8) | ((0xcf00 & val) >> 8);
b4b4b794
KI
940 }
941
942 if (remote_debug)
943 fprintf_unfiltered (gdb_stdlog, "m32r_fetch_register(%d,0x%08lx)\n",
944 regno, val);
945
946 /* We got the number the register holds, but gdb expects to see a
947 value in the target byte ordering. */
948 store_unsigned_integer (buffer, 4, val);
56be3814 949 regcache_raw_supply (regcache, regno, buffer);
b4b4b794
KI
950 }
951 return;
952}
953
954/* Store the remote registers from the contents of the block REGS. */
955
56be3814 956static void m32r_store_register (struct regcache *, int);
b4b4b794
KI
957
958static void
56be3814 959m32r_store_registers (struct regcache *regcache)
b4b4b794
KI
960{
961 int regno;
962
40a6adc1
MD
963 for (regno = 0;
964 regno < gdbarch_num_regs (get_regcache_arch (regcache));
965 regno++)
56be3814 966 m32r_store_register (regcache, regno);
b4b4b794
KI
967
968 registers_changed ();
969}
970
971/* Store register REGNO, or all if REGNO == 0.
972 Return errno value. */
973static void
56be3814 974m32r_store_register (struct regcache *regcache, int regno)
b4b4b794
KI
975{
976 int regid;
977 ULONGEST regval, tmp;
b4b4b794
KI
978
979 if (regno == -1)
56be3814 980 m32r_store_registers (regcache);
b4b4b794
KI
981 else
982 {
56be3814 983 regcache_cooked_read_unsigned (regcache, regno, &regval);
b4b4b794
KI
984 regid = get_reg_id (regno);
985
986 if (regid == SDI_REG_PSW)
987 {
988 unsigned long psw, bbpsw;
989
e22f895c
KI
990 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_PSW);
991 psw = recv_long_data ();
b4b4b794 992
e22f895c
KI
993 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
994 bbpsw = recv_long_data ();
b4b4b794 995
3e41d55f 996 tmp = (0x00cf & psw) | ((0x00cf & regval) << 8);
e22f895c 997 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PSW, tmp);
b4b4b794 998
3e41d55f 999 tmp = (0x0030 & bbpsw) | ((0xcf00 & regval) >> 8);
e22f895c 1000 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BBPSW, tmp);
b4b4b794
KI
1001 }
1002 else
1003 {
e22f895c 1004 send_two_arg_cmd (SDI_WRITE_CPU_REG, regid, regval);
b4b4b794
KI
1005 }
1006
1007 if (remote_debug)
1008 fprintf_unfiltered (gdb_stdlog, "m32r_store_register(%d,0x%08lu)\n",
1009 regno, (unsigned long) regval);
1010 }
1011}
1012
1013/* Get ready to modify the registers array. On machines which store
1014 individual registers, this doesn't need to do anything. On machines
1015 which store all the registers in one fell swoop, this makes sure
1016 that registers contains all the registers from the program being
1017 debugged. */
1018
1019static void
316f2060 1020m32r_prepare_to_store (struct regcache *regcache)
b4b4b794
KI
1021{
1022 /* Do nothing, since we can store individual regs */
1023 if (remote_debug)
1024 fprintf_unfiltered (gdb_stdlog, "m32r_prepare_to_store()\n");
1025}
1026
1027static void
1028m32r_files_info (struct target_ops *target)
1029{
1030 char *file = "nothing";
1031
1032 if (exec_bfd)
1033 {
1034 file = bfd_get_filename (exec_bfd);
1035 printf_filtered ("\tAttached to %s running program %s\n",
1036 chip_name, file);
1037 }
1038}
1039
1040/* Read/Write memory. */
1041static int
16ac4ab5 1042m32r_xfer_memory (CORE_ADDR memaddr, gdb_byte *myaddr, int len,
b4b4b794
KI
1043 int write,
1044 struct mem_attrib *attrib, struct target_ops *target)
1045{
1046 unsigned long taddr;
1047 unsigned char buf[0x2000];
1048 int ret, c;
1049
1050 taddr = memaddr;
1051
1052 if (!mmu_on)
1053 {
1054 if ((taddr & 0xa0000000) == 0x80000000)
1055 taddr &= 0x7fffffff;
1056 }
1057
1058 if (remote_debug)
1059 {
1060 if (write)
ec20a626
UW
1061 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,write)\n",
1062 paddr (memaddr), len);
b4b4b794 1063 else
ec20a626
UW
1064 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,read)\n",
1065 paddr (memaddr), len);
b4b4b794
KI
1066 }
1067
1068 if (write)
1069 {
1070 buf[0] = SDI_WRITE_MEMORY;
1071 store_long_parameter (buf + 1, taddr);
1072 store_long_parameter (buf + 5, len);
1073 if (len < 0x1000)
1074 {
1075 memcpy (buf + 9, myaddr, len);
1076 ret = send_data (buf, len + 9) - 9;
1077 }
1078 else
1079 {
1080 if (serial_write (sdi_desc, buf, 9) != 0)
1081 {
1082 if (remote_debug)
1083 fprintf_unfiltered (gdb_stdlog,
1084 "m32r_xfer_memory() failed\n");
1085 return 0;
1086 }
1087 ret = send_data (myaddr, len);
1088 }
1089 }
1090 else
1091 {
1092 buf[0] = SDI_READ_MEMORY;
1093 store_long_parameter (buf + 1, taddr);
1094 store_long_parameter (buf + 5, len);
1095 if (serial_write (sdi_desc, buf, 9) != 0)
1096 {
1097 if (remote_debug)
1098 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1099 return 0;
1100 }
1101
1102 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1103 if (c < 0 || c == '-')
1104 {
1105 if (remote_debug)
1106 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1107 return 0;
1108 }
1109
1110 ret = recv_data (myaddr, len);
1111 }
1112
1113 if (ret <= 0)
1114 {
1115 if (remote_debug)
1116 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() fails\n");
1117 return 0;
1118 }
1119
1120 return ret;
1121}
1122
1123static void
1124m32r_kill (void)
1125{
1126 if (remote_debug)
1127 fprintf_unfiltered (gdb_stdlog, "m32r_kill()\n");
1128
1129 inferior_ptid = null_ptid;
1130
1131 return;
1132}
1133
1134/* Clean up when a program exits.
1135
1136 The program actually lives on in the remote processor's RAM, and may be
1137 run again without a download. Don't leave it full of breakpoint
1138 instructions. */
1139
1140static void
1141m32r_mourn_inferior (void)
1142{
1143 if (remote_debug)
1144 fprintf_unfiltered (gdb_stdlog, "m32r_mourn_inferior()\n");
1145
1146 remove_breakpoints ();
1147 generic_mourn_inferior ();
1148}
1149
1150static int
8181d85f 1151m32r_insert_breakpoint (struct bp_target_info *bp_tgt)
b4b4b794 1152{
8181d85f 1153 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1154 int ib_breakpoints;
1155 unsigned char buf[13];
1156 int i, c;
1157
1158 if (remote_debug)
ec20a626
UW
1159 fprintf_unfiltered (gdb_stdlog, "m32r_insert_breakpoint(%s,...)\n",
1160 paddr (addr));
b4b4b794
KI
1161
1162 if (use_ib_breakpoints)
1163 ib_breakpoints = max_ib_breakpoints;
1164 else
1165 ib_breakpoints = 0;
1166
1167 for (i = 0; i < MAX_BREAKPOINTS; i++)
1168 {
1169 if (bp_address[i] == 0xffffffff)
1170 {
1171 bp_address[i] = addr;
1172 if (i >= ib_breakpoints)
1173 {
1174 buf[0] = SDI_READ_MEMORY;
1175 if (mmu_on)
1176 store_long_parameter (buf + 1, addr & 0xfffffffc);
1177 else
1178 store_long_parameter (buf + 1, addr & 0x7ffffffc);
1179 store_long_parameter (buf + 5, 4);
1180 serial_write (sdi_desc, buf, 9);
1181 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1182 if (c != '-')
1183 recv_data (bp_data[i], 4);
1184 }
1185 return 0;
1186 }
1187 }
1188
8a3fe4f8 1189 error (_("Too many breakpoints"));
b4b4b794
KI
1190 return 1;
1191}
1192
1193static int
8181d85f 1194m32r_remove_breakpoint (struct bp_target_info *bp_tgt)
b4b4b794 1195{
8181d85f 1196 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1197 int i;
1198
1199 if (remote_debug)
ec20a626
UW
1200 fprintf_unfiltered (gdb_stdlog, "m32r_remove_breakpoint(%s)\n",
1201 paddr (addr));
b4b4b794
KI
1202
1203 for (i = 0; i < MAX_BREAKPOINTS; i++)
1204 {
1205 if (bp_address[i] == addr)
1206 {
1207 bp_address[i] = 0xffffffff;
1208 break;
1209 }
1210 }
1211
1212 return 0;
1213}
1214
1215static void
1216m32r_load (char *args, int from_tty)
1217{
1218 struct cleanup *old_chain;
1219 asection *section;
1220 bfd *pbfd;
1221 bfd_vma entry;
1222 char *filename;
1223 int quiet;
1224 int nostart;
2b71414d 1225 struct timeval start_time, end_time;
b4b4b794
KI
1226 unsigned long data_count; /* Number of bytes transferred to memory */
1227 int ret;
1228 static RETSIGTYPE (*prev_sigint) ();
1229
1230 /* for direct tcp connections, we can do a fast binary download */
1231 quiet = 0;
1232 nostart = 0;
1233 filename = NULL;
1234
1235 while (*args != '\000')
1236 {
1237 char *arg;
1238
1239 while (isspace (*args))
1240 args++;
1241
1242 arg = args;
1243
1244 while ((*args != '\000') && !isspace (*args))
1245 args++;
1246
1247 if (*args != '\000')
1248 *args++ = '\000';
1249
1250 if (*arg != '-')
1251 filename = arg;
1252 else if (strncmp (arg, "-quiet", strlen (arg)) == 0)
1253 quiet = 1;
1254 else if (strncmp (arg, "-nostart", strlen (arg)) == 0)
1255 nostart = 1;
1256 else
8a3fe4f8 1257 error (_("Unknown option `%s'"), arg);
b4b4b794
KI
1258 }
1259
1260 if (!filename)
1261 filename = get_exec_file (1);
1262
1263 pbfd = bfd_openr (filename, gnutarget);
1264 if (pbfd == NULL)
1265 {
1266 perror_with_name (filename);
1267 return;
1268 }
1269 old_chain = make_cleanup_bfd_close (pbfd);
1270
1271 if (!bfd_check_format (pbfd, bfd_object))
8a3fe4f8 1272 error (_("\"%s\" is not an object file: %s"), filename,
b4b4b794
KI
1273 bfd_errmsg (bfd_get_error ()));
1274
2b71414d 1275 gettimeofday (&start_time, NULL);
b4b4b794
KI
1276 data_count = 0;
1277
1278 interrupted = 0;
1279 prev_sigint = signal (SIGINT, gdb_cntrl_c);
1280
1281 for (section = pbfd->sections; section; section = section->next)
1282 {
1283 if (bfd_get_section_flags (pbfd, section) & SEC_LOAD)
1284 {
1285 bfd_vma section_address;
1286 bfd_size_type section_size;
1287 file_ptr fptr;
1288 int n;
1289
1290 section_address = bfd_section_lma (pbfd, section);
2c500098 1291 section_size = bfd_get_section_size (section);
b4b4b794
KI
1292
1293 if (!mmu_on)
1294 {
1295 if ((section_address & 0xa0000000) == 0x80000000)
1296 section_address &= 0x7fffffff;
1297 }
1298
1299 if (!quiet)
1300 printf_filtered ("[Loading section %s at 0x%lx (%d bytes)]\n",
1301 bfd_get_section_name (pbfd, section),
ec20a626
UW
1302 (unsigned long) section_address,
1303 (int) section_size);
b4b4b794
KI
1304
1305 fptr = 0;
1306
1307 data_count += section_size;
1308
1309 n = 0;
1310 while (section_size > 0)
1311 {
1312 char unsigned buf[0x1000 + 9];
1313 int count;
1314
1315 count = min (section_size, 0x1000);
1316
1317 buf[0] = SDI_WRITE_MEMORY;
1318 store_long_parameter (buf + 1, section_address);
1319 store_long_parameter (buf + 5, count);
1320
1321 bfd_get_section_contents (pbfd, section, buf + 9, fptr, count);
1322 if (send_data (buf, count + 9) <= 0)
8a3fe4f8 1323 error (_("Error while downloading %s section."),
b4b4b794
KI
1324 bfd_get_section_name (pbfd, section));
1325
1326 if (!quiet)
1327 {
1328 printf_unfiltered (".");
1329 if (n++ > 60)
1330 {
1331 printf_unfiltered ("\n");
1332 n = 0;
1333 }
1334 gdb_flush (gdb_stdout);
1335 }
1336
1337 section_address += count;
1338 fptr += count;
1339 section_size -= count;
1340
1341 if (interrupted)
1342 break;
1343 }
1344
1345 if (!quiet && !interrupted)
1346 {
1347 printf_unfiltered ("done.\n");
1348 gdb_flush (gdb_stdout);
1349 }
1350 }
1351
1352 if (interrupted)
1353 {
1354 printf_unfiltered ("Interrupted.\n");
1355 break;
1356 }
1357 }
1358
1359 interrupted = 0;
1360 signal (SIGINT, prev_sigint);
1361
2b71414d 1362 gettimeofday (&end_time, NULL);
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1363
1364 /* Make the PC point at the start address */
1365 if (exec_bfd)
1366 write_pc (bfd_get_start_address (exec_bfd));
1367
1368 inferior_ptid = null_ptid; /* No process now */
1369
1370 /* This is necessary because many things were based on the PC at the time
1371 that we attached to the monitor, which is no longer valid now that we
1372 have loaded new code (and just changed the PC). Another way to do this
1373 might be to call normal_stop, except that the stack may not be valid,
1374 and things would get horribly confused... */
1375
1376 clear_symtab_users ();
1377
1378 if (!nostart)
1379 {
1380 entry = bfd_get_start_address (pbfd);
1381
1382 if (!quiet)
ec20a626
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1383 printf_unfiltered ("[Starting %s at 0x%lx]\n", filename,
1384 (unsigned long) entry);
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1385 }
1386
2b71414d
DJ
1387 print_transfer_performance (gdb_stdout, data_count, 0, &start_time,
1388 &end_time);
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1389
1390 do_cleanups (old_chain);
1391}
1392
1393static void
1394m32r_stop (void)
1395{
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1396 if (remote_debug)
1397 fprintf_unfiltered (gdb_stdlog, "m32r_stop()\n");
1398
e22f895c 1399 send_cmd (SDI_STOP_CPU);
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1400
1401 return;
1402}
1403
1404
37814c18
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1405/* Tell whether this target can support a hardware breakpoint. CNT
1406 is the number of hardware breakpoints already installed. This
1407 implements the TARGET_CAN_USE_HARDWARE_WATCHPOINT macro. */
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1408
1409int
37814c18 1410m32r_can_use_hw_watchpoint (int type, int cnt, int othertype)
b4b4b794 1411{
37814c18 1412 return sdi_desc != NULL && cnt < max_access_breaks;
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1413}
1414
1415/* Set a data watchpoint. ADDR and LEN should be obvious. TYPE is 0
1416 for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
1417 watchpoint. */
1418
1419int
37814c18 1420m32r_insert_watchpoint (CORE_ADDR addr, int len, int type)
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1421{
1422 int i;
1423
1424 if (remote_debug)
ec20a626
UW
1425 fprintf_unfiltered (gdb_stdlog, "m32r_insert_watchpoint(%s,%d,%d)\n",
1426 paddr (addr), len, type);
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1427
1428 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1429 {
1430 if (ab_address[i] == 0x00000000)
1431 {
1432 ab_address[i] = addr;
1433 ab_size[i] = len;
1434 ab_type[i] = type;
1435 return 0;
1436 }
1437 }
1438
8a3fe4f8 1439 error (_("Too many watchpoints"));
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1440 return 1;
1441}
1442
1443int
1444m32r_remove_watchpoint (CORE_ADDR addr, int len, int type)
1445{
1446 int i;
1447
1448 if (remote_debug)
ec20a626
UW
1449 fprintf_unfiltered (gdb_stdlog, "m32r_remove_watchpoint(%s,%d,%d)\n",
1450 paddr (addr), len, type);
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1451
1452 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1453 {
1454 if (ab_address[i] == addr)
1455 {
1456 ab_address[i] = 0x00000000;
1457 break;
1458 }
1459 }
1460
1461 return 0;
1462}
1463
4aa7a7f5
JJ
1464int
1465m32r_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
b4b4b794 1466{
4aa7a7f5
JJ
1467 int rc = 0;
1468 if (hit_watchpoint_addr != 0x00000000)
1469 {
1470 *addr_p = hit_watchpoint_addr;
1471 rc = 1;
1472 }
1473 return rc;
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1474}
1475
1476int
1477m32r_stopped_by_watchpoint (void)
1478{
4aa7a7f5
JJ
1479 CORE_ADDR addr;
1480 return m32r_stopped_data_address (&current_target, &addr);
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1481}
1482
1483
1484static void
1485sdireset_command (char *args, int from_tty)
1486{
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1487 if (remote_debug)
1488 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1489
e22f895c 1490 send_cmd (SDI_OPEN);
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1491
1492 inferior_ptid = null_ptid;
1493}
1494
1495
1496static void
1497sdistatus_command (char *args, int from_tty)
1498{
1499 unsigned char buf[4096];
1500 int i, c;
1501
1502 if (remote_debug)
1503 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1504
1505 if (!sdi_desc)
1506 return;
1507
e22f895c 1508 send_cmd (SDI_STATUS);
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1509 for (i = 0; i < 4096; i++)
1510 {
1511 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1512 if (c < 0)
717eb1cf 1513 return;
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1514 buf[i] = c;
1515 if (c == 0)
717eb1cf
AC
1516 break;
1517 }
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1518
1519 printf_filtered ("%s", buf);
1520}
1521
1522
1523static void
1524debug_chaos_command (char *args, int from_tty)
1525{
1526 unsigned char buf[3];
1527
1528 buf[0] = SDI_SET_ATTR;
1529 buf[1] = SDI_ATTR_CACHE;
1530 buf[2] = SDI_CACHE_TYPE_CHAOS;
1531 send_data (buf, 3);
1532}
1533
1534
1535static void
1536use_debug_dma_command (char *args, int from_tty)
1537{
1538 unsigned char buf[3];
1539
1540 buf[0] = SDI_SET_ATTR;
1541 buf[1] = SDI_ATTR_MEM_ACCESS;
1542 buf[2] = SDI_MEM_ACCESS_DEBUG_DMA;
1543 send_data (buf, 3);
1544}
1545
1546static void
1547use_mon_code_command (char *args, int from_tty)
1548{
1549 unsigned char buf[3];
1550
1551 buf[0] = SDI_SET_ATTR;
1552 buf[1] = SDI_ATTR_MEM_ACCESS;
1553 buf[2] = SDI_MEM_ACCESS_MON_CODE;
1554 send_data (buf, 3);
1555}
1556
1557
1558static void
1559use_ib_breakpoints_command (char *args, int from_tty)
1560{
1561 use_ib_breakpoints = 1;
1562}
1563
1564static void
1565use_dbt_breakpoints_command (char *args, int from_tty)
1566{
1567 use_ib_breakpoints = 0;
1568}
1569
1570
1571/* Define the target subroutine names */
1572
1573struct target_ops m32r_ops;
1574
1575static void
1576init_m32r_ops (void)
1577{
1578 m32r_ops.to_shortname = "m32rsdi";
1579 m32r_ops.to_longname = "Remote M32R debugging over SDI interface";
1580 m32r_ops.to_doc = "Use an M32R board using SDI debugging protocol.";
1581 m32r_ops.to_open = m32r_open;
1582 m32r_ops.to_close = m32r_close;
1583 m32r_ops.to_detach = m32r_detach;
1584 m32r_ops.to_resume = m32r_resume;
1585 m32r_ops.to_wait = m32r_wait;
1586 m32r_ops.to_fetch_registers = m32r_fetch_register;
1587 m32r_ops.to_store_registers = m32r_store_register;
1588 m32r_ops.to_prepare_to_store = m32r_prepare_to_store;
c8e73a31 1589 m32r_ops.deprecated_xfer_memory = m32r_xfer_memory;
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1590 m32r_ops.to_files_info = m32r_files_info;
1591 m32r_ops.to_insert_breakpoint = m32r_insert_breakpoint;
1592 m32r_ops.to_remove_breakpoint = m32r_remove_breakpoint;
37814c18
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1593 m32r_ops.to_can_use_hw_breakpoint = m32r_can_use_hw_watchpoint;
1594 m32r_ops.to_insert_watchpoint = m32r_insert_watchpoint;
1595 m32r_ops.to_remove_watchpoint = m32r_remove_watchpoint;
1596 m32r_ops.to_stopped_by_watchpoint = m32r_stopped_by_watchpoint;
1597 m32r_ops.to_stopped_data_address = m32r_stopped_data_address;
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1598 m32r_ops.to_kill = m32r_kill;
1599 m32r_ops.to_load = m32r_load;
1600 m32r_ops.to_create_inferior = m32r_create_inferior;
1601 m32r_ops.to_mourn_inferior = m32r_mourn_inferior;
1602 m32r_ops.to_stop = m32r_stop;
49d03eab 1603 m32r_ops.to_log_command = serial_log_command;
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1604 m32r_ops.to_stratum = process_stratum;
1605 m32r_ops.to_has_all_memory = 1;
1606 m32r_ops.to_has_memory = 1;
1607 m32r_ops.to_has_stack = 1;
1608 m32r_ops.to_has_registers = 1;
1609 m32r_ops.to_has_execution = 1;
1610 m32r_ops.to_magic = OPS_MAGIC;
1611};
1612
1613
1614extern initialize_file_ftype _initialize_remote_m32r;
1615
1616void
1617_initialize_remote_m32r (void)
1618{
1619 int i;
1620
1621 init_m32r_ops ();
1622
1623 /* Initialize breakpoints. */
1624 for (i = 0; i < MAX_BREAKPOINTS; i++)
1625 bp_address[i] = 0xffffffff;
1626
1627 /* Initialize access breaks. */
1628 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1629 ab_address[i] = 0x00000000;
1630
1631 add_target (&m32r_ops);
1632
1633 add_com ("sdireset", class_obscure, sdireset_command,
1bedd215 1634 _("Reset SDI connection."));
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1635
1636 add_com ("sdistatus", class_obscure, sdistatus_command,
1bedd215 1637 _("Show status of SDI connection."));
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1638
1639 add_com ("debug_chaos", class_obscure, debug_chaos_command,
1bedd215 1640 _("Debug M32R/Chaos."));
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1641
1642 add_com ("use_debug_dma", class_obscure, use_debug_dma_command,
1bedd215 1643 _("Use debug DMA mem access."));
b4b4b794 1644 add_com ("use_mon_code", class_obscure, use_mon_code_command,
1bedd215 1645 _("Use mon code mem access."));
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1646
1647 add_com ("use_ib_break", class_obscure, use_ib_breakpoints_command,
1bedd215 1648 _("Set breakpoints by IB break."));
b4b4b794 1649 add_com ("use_dbt_break", class_obscure, use_dbt_breakpoints_command,
1bedd215 1650 _("Set breakpoints by dbt."));
b4b4b794 1651}
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