2012-03-08 Luis Machado <lgustavo@codesourcery.com>
[deliverable/binutils-gdb.git] / gdb / remote-m32r-sdi.c
CommitLineData
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1/* Remote debugging interface for M32R/SDI.
2
0b302171 3 Copyright (C) 2003-2012 Free Software Foundation, Inc.
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4
5 Contributed by Renesas Technology Co.
6 Written by Kei Sakamoto <sakamoto.kei@renesas.com>.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
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13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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22
23#include "defs.h"
24#include "gdbcmd.h"
25#include "gdbcore.h"
26#include "inferior.h"
27#include "target.h"
28#include "regcache.h"
29#include "gdb_string.h"
e5ef4d75 30#include "gdbthread.h"
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31#include <ctype.h>
32#include <signal.h>
cbba9205 33#ifdef __MINGW32__
b467f580 34#include <winsock2.h>
cbba9205 35#else
b4b4b794 36#include <netinet/in.h>
cbba9205 37#endif
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38#include <sys/types.h>
39#include <sys/time.h>
40#include <signal.h>
41#include <time.h>
42
43
44#include "serial.h"
45
46/* Descriptor for I/O to remote machine. */
47
48static struct serial *sdi_desc = NULL;
49
50#define SDI_TIMEOUT 30
51
52
53#define SDIPORT 3232
54
55static char chip_name[64];
56
57static int step_mode;
58static unsigned long last_pc_addr = 0xffffffff;
59static unsigned char last_pc_addr_data[2];
60
61static int mmu_on = 0;
62
63static int use_ib_breakpoints = 1;
64
65#define MAX_BREAKPOINTS 1024
66static int max_ib_breakpoints;
67static unsigned long bp_address[MAX_BREAKPOINTS];
68static unsigned char bp_data[MAX_BREAKPOINTS][4];
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69
70/* dbt -> nop */
71static const unsigned char dbt_bp_entry[] = {
72 0x10, 0xe0, 0x70, 0x00
73};
74
75#define MAX_ACCESS_BREAKS 4
76static int max_access_breaks;
77static unsigned long ab_address[MAX_ACCESS_BREAKS];
78static unsigned int ab_type[MAX_ACCESS_BREAKS];
79static unsigned int ab_size[MAX_ACCESS_BREAKS];
80static CORE_ADDR hit_watchpoint_addr = 0;
81
82static int interrupted = 0;
83
84/* Forward data declarations */
85extern struct target_ops m32r_ops;
86
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87/* This is the ptid we use while we're connected to the remote. Its
88 value is arbitrary, as the target doesn't have a notion of
89 processes or threads, but we need something non-null to place in
90 inferior_ptid. */
91static ptid_t remote_m32r_ptid;
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92
93/* Commands */
94#define SDI_OPEN 1
95#define SDI_CLOSE 2
96#define SDI_RELEASE 3
97#define SDI_READ_CPU_REG 4
98#define SDI_WRITE_CPU_REG 5
99#define SDI_READ_MEMORY 6
100#define SDI_WRITE_MEMORY 7
101#define SDI_EXEC_CPU 8
102#define SDI_STOP_CPU 9
103#define SDI_WAIT_FOR_READY 10
104#define SDI_GET_ATTR 11
105#define SDI_SET_ATTR 12
106#define SDI_STATUS 13
107
108/* Attributes */
109#define SDI_ATTR_NAME 1
110#define SDI_ATTR_BRK 2
111#define SDI_ATTR_ABRK 3
112#define SDI_ATTR_CACHE 4
113#define SDI_CACHE_TYPE_M32102 0
114#define SDI_CACHE_TYPE_CHAOS 1
115#define SDI_ATTR_MEM_ACCESS 5
116#define SDI_MEM_ACCESS_DEBUG_DMA 0
117#define SDI_MEM_ACCESS_MON_CODE 1
118
119/* Registers */
120#define SDI_REG_R0 0
121#define SDI_REG_R1 1
122#define SDI_REG_R2 2
123#define SDI_REG_R3 3
124#define SDI_REG_R4 4
125#define SDI_REG_R5 5
126#define SDI_REG_R6 6
127#define SDI_REG_R7 7
128#define SDI_REG_R8 8
129#define SDI_REG_R9 9
130#define SDI_REG_R10 10
131#define SDI_REG_R11 11
132#define SDI_REG_R12 12
133#define SDI_REG_FP 13
134#define SDI_REG_LR 14
135#define SDI_REG_SP 15
136#define SDI_REG_PSW 16
137#define SDI_REG_CBR 17
138#define SDI_REG_SPI 18
139#define SDI_REG_SPU 19
140#define SDI_REG_CR4 20
141#define SDI_REG_EVB 21
142#define SDI_REG_BPC 22
143#define SDI_REG_CR7 23
144#define SDI_REG_BBPSW 24
145#define SDI_REG_CR9 25
146#define SDI_REG_CR10 26
147#define SDI_REG_CR11 27
148#define SDI_REG_CR12 28
149#define SDI_REG_WR 29
150#define SDI_REG_BBPC 30
151#define SDI_REG_PBP 31
152#define SDI_REG_ACCH 32
153#define SDI_REG_ACCL 33
154#define SDI_REG_ACC1H 34
155#define SDI_REG_ACC1L 35
156
157
0df8b418 158/* Low level communication functions. */
b4b4b794 159
0df8b418 160/* Check an ack packet from the target. */
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161static int
162get_ack (void)
163{
164 int c;
165
717eb1cf 166 if (!sdi_desc)
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167 return -1;
168
169 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
170
171 if (c < 0)
172 return -1;
173
717eb1cf 174 if (c != '+') /* error */
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175 return -1;
176
177 return 0;
178}
179
0df8b418 180/* Send data to the target and check an ack packet. */
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181static int
182send_data (void *buf, int len)
183{
184 int ret;
185
717eb1cf 186 if (!sdi_desc)
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187 return -1;
188
189 if (serial_write (sdi_desc, buf, len) != 0)
190 return -1;
191
192 if (get_ack () == -1)
193 return -1;
194
195 return len;
196}
197
0df8b418 198/* Receive data from the target. */
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199static int
200recv_data (void *buf, int len)
201{
202 int total = 0;
203 int c;
204
717eb1cf 205 if (!sdi_desc)
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206 return -1;
207
208 while (total < len)
209 {
210 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
211
212 if (c < 0)
213 return -1;
214
215 ((unsigned char *) buf)[total++] = c;
216 }
217
218 return len;
219}
220
0df8b418 221/* Store unsigned long parameter on packet. */
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222static void
223store_long_parameter (void *buf, long val)
224{
225 val = htonl (val);
226 memcpy (buf, &val, 4);
227}
228
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229static int
230send_cmd (unsigned char cmd)
231{
232 unsigned char buf[1];
123f5f96 233
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234 buf[0] = cmd;
235 return send_data (buf, 1);
236}
237
238static int
239send_one_arg_cmd (unsigned char cmd, unsigned char arg1)
240{
241 unsigned char buf[2];
123f5f96 242
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243 buf[0] = cmd;
244 buf[1] = arg1;
245 return send_data (buf, 2);
246}
247
248static int
249send_two_arg_cmd (unsigned char cmd, unsigned char arg1, unsigned long arg2)
250{
251 unsigned char buf[6];
123f5f96 252
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253 buf[0] = cmd;
254 buf[1] = arg1;
255 store_long_parameter (buf + 2, arg2);
256 return send_data (buf, 6);
257}
258
259static int
260send_three_arg_cmd (unsigned char cmd, unsigned long arg1, unsigned long arg2,
261 unsigned long arg3)
262{
263 unsigned char buf[13];
123f5f96 264
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265 buf[0] = cmd;
266 store_long_parameter (buf + 1, arg1);
267 store_long_parameter (buf + 5, arg2);
268 store_long_parameter (buf + 9, arg3);
269 return send_data (buf, 13);
270}
271
272static unsigned char
273recv_char_data (void)
274{
275 unsigned char val;
123f5f96 276
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277 recv_data (&val, 1);
278 return val;
279}
280
281static unsigned long
282recv_long_data (void)
283{
284 unsigned long val;
123f5f96 285
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286 recv_data (&val, 4);
287 return ntohl (val);
288}
289
290
0df8b418 291/* Check if MMU is on. */
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292static void
293check_mmu_status (void)
294{
295 unsigned long val;
b4b4b794 296
0df8b418 297 /* Read PC address. */
e22f895c 298 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC) == -1)
b4b4b794 299 return;
e22f895c 300 val = recv_long_data ();
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301 if ((val & 0xc0000000) == 0x80000000)
302 {
303 mmu_on = 1;
304 return;
305 }
306
0df8b418 307 /* Read EVB address. */
e22f895c 308 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_EVB) == -1)
b4b4b794 309 return;
e22f895c 310 val = recv_long_data ();
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311 if ((val & 0xc0000000) == 0x80000000)
312 {
313 mmu_on = 1;
314 return;
315 }
316
317 mmu_on = 0;
318}
319
320
321/* This is called not only when we first attach, but also when the
322 user types "run" after having attached. */
323static void
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324m32r_create_inferior (struct target_ops *ops, char *execfile,
325 char *args, char **env, int from_tty)
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326{
327 CORE_ADDR entry_pt;
328
329 if (args && *args)
8a3fe4f8 330 error (_("Cannot pass arguments to remote STDEBUG process"));
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331
332 if (execfile == 0 || exec_bfd == 0)
8a3fe4f8 333 error (_("No executable file specified"));
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334
335 if (remote_debug)
336 fprintf_unfiltered (gdb_stdlog, "m32r_create_inferior(%s,%s)\n", execfile,
337 args);
338
339 entry_pt = bfd_get_start_address (exec_bfd);
340
341 /* The "process" (board) is already stopped awaiting our commands, and
342 the program is already downloaded. We just set its PC and go. */
343
344 clear_proceed_status ();
345
346 /* Tell wait_for_inferior that we've started a new process. */
347 init_wait_for_inferior ();
348
349 /* Set up the "saved terminal modes" of the inferior
350 based on what modes we are starting it with. */
351 target_terminal_init ();
352
353 /* Install inferior's terminal modes. */
354 target_terminal_inferior ();
355
fb14de7b 356 regcache_write_pc (get_current_regcache (), entry_pt);
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357}
358
359/* Open a connection to a remote debugger.
360 NAME is the filename used for communication. */
361
362static void
363m32r_open (char *args, int from_tty)
364{
365 struct hostent *host_ent;
366 struct sockaddr_in server_addr;
367 char *port_str, hostname[256];
368 int port;
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369 int i, n;
370 int yes = 1;
371
372 if (remote_debug)
373 fprintf_unfiltered (gdb_stdlog, "m32r_open(%d)\n", from_tty);
374
375 target_preopen (from_tty);
376
377 push_target (&m32r_ops);
378
379 if (args == NULL)
380 sprintf (hostname, "localhost:%d", SDIPORT);
381 else
382 {
383 port_str = strchr (args, ':');
384 if (port_str == NULL)
717eb1cf 385 sprintf (hostname, "%s:%d", args, SDIPORT);
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386 else
387 strcpy (hostname, args);
388 }
389
390 sdi_desc = serial_open (hostname);
391 if (!sdi_desc)
8a3fe4f8 392 error (_("Connection refused."));
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393
394 if (get_ack () == -1)
8a3fe4f8 395 error (_("Cannot connect to SDI target."));
b4b4b794 396
e22f895c 397 if (send_cmd (SDI_OPEN) == -1)
8a3fe4f8 398 error (_("Cannot connect to SDI target."));
b4b4b794 399
0df8b418 400 /* Get maximum number of ib breakpoints. */
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401 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_BRK);
402 max_ib_breakpoints = recv_char_data ();
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403 if (remote_debug)
404 printf_filtered ("Max IB Breakpoints = %d\n", max_ib_breakpoints);
405
0df8b418 406 /* Initialize breakpoints. */
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407 for (i = 0; i < MAX_BREAKPOINTS; i++)
408 bp_address[i] = 0xffffffff;
409
0df8b418 410 /* Get maximum number of access breaks. */
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411 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_ABRK);
412 max_access_breaks = recv_char_data ();
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413 if (remote_debug)
414 printf_filtered ("Max Access Breaks = %d\n", max_access_breaks);
415
0df8b418 416 /* Initialize access breask. */
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417 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
418 ab_address[i] = 0x00000000;
419
420 check_mmu_status ();
421
0df8b418 422 /* Get the name of chip on target board. */
e22f895c 423 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_NAME);
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424 recv_data (chip_name, 64);
425
426 if (from_tty)
427 printf_filtered ("Remote %s connected to %s\n", target_shortname,
428 chip_name);
429}
430
0df8b418 431/* Close out all files and local state before this target loses control. */
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432
433static void
434m32r_close (int quitting)
435{
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436 if (remote_debug)
437 fprintf_unfiltered (gdb_stdlog, "m32r_close(%d)\n", quitting);
438
439 if (sdi_desc)
440 {
e22f895c 441 send_cmd (SDI_CLOSE);
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442 serial_close (sdi_desc);
443 sdi_desc = NULL;
444 }
445
446 inferior_ptid = null_ptid;
e5ef4d75 447 delete_thread_silent (remote_m32r_ptid);
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448 return;
449}
450
451/* Tell the remote machine to resume. */
452
453static void
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454m32r_resume (struct target_ops *ops,
455 ptid_t ptid, int step, enum target_signal sig)
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456{
457 unsigned long pc_addr, bp_addr, ab_addr;
e22f895c 458 int ib_breakpoints;
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459 unsigned char buf[13];
460 int i;
461
462 if (remote_debug)
463 {
464 if (step)
465 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(step)\n");
466 else
467 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(cont)\n");
468 }
469
470 check_mmu_status ();
471
fb14de7b 472 pc_addr = regcache_read_pc (get_current_regcache ());
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473 if (remote_debug)
474 fprintf_unfiltered (gdb_stdlog, "pc <= 0x%lx\n", pc_addr);
475
476 /* At pc address there is a parallel instruction with +2 offset,
0df8b418 477 so we have to make it a serial instruction or avoid it. */
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478 if (pc_addr == last_pc_addr)
479 {
0df8b418 480 /* Avoid a parallel nop. */
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481 if (last_pc_addr_data[0] == 0xf0 && last_pc_addr_data[1] == 0x00)
482 {
483 pc_addr += 2;
0df8b418 484 /* Now we can forget this instruction. */
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485 last_pc_addr = 0xffffffff;
486 }
0df8b418 487 /* Clear a parallel bit. */
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488 else
489 {
490 buf[0] = SDI_WRITE_MEMORY;
1cf3db46 491 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
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492 store_long_parameter (buf + 1, pc_addr);
493 else
494 store_long_parameter (buf + 1, pc_addr - 1);
495 store_long_parameter (buf + 5, 1);
496 buf[9] = last_pc_addr_data[0] & 0x7f;
497 send_data (buf, 10);
498 }
499 }
500
0df8b418 501 /* Set PC. */
e22f895c 502 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
b4b4b794 503
0df8b418 504 /* step mode. */
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505 step_mode = step;
506 if (step)
507 {
0df8b418 508 /* Set PBP. */
e22f895c 509 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, pc_addr | 1);
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510 }
511 else
512 {
0df8b418 513 /* Unset PBP. */
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514 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, 0x00000000);
515 }
516
517 if (use_ib_breakpoints)
518 ib_breakpoints = max_ib_breakpoints;
519 else
520 ib_breakpoints = 0;
521
0df8b418 522 /* Set ib breakpoints. */
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523 for (i = 0; i < ib_breakpoints; i++)
524 {
525 bp_addr = bp_address[i];
b4b4b794 526
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527 if (bp_addr == 0xffffffff)
528 continue;
529
0df8b418 530 /* Set PBP. */
1cf3db46 531 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
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532 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
533 0x00000006);
b4b4b794 534 else
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535 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
536 0x06000000);
537
538 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8080 + 4 * i, 4, bp_addr);
539 }
540
0df8b418 541 /* Set dbt breakpoints. */
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542 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
543 {
544 bp_addr = bp_address[i];
545
546 if (bp_addr == 0xffffffff)
547 continue;
548
549 if (!mmu_on)
550 bp_addr &= 0x7fffffff;
b4b4b794 551
0df8b418 552 /* Write DBT instruction. */
e22f895c 553 buf[0] = SDI_WRITE_MEMORY;
492e5c6b 554 store_long_parameter (buf + 1, (bp_addr & 0xfffffffc));
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555 store_long_parameter (buf + 5, 4);
556 if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc))
b4b4b794 557 {
1cf3db46 558 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 559 {
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560 buf[9] = dbt_bp_entry[0];
561 buf[10] = dbt_bp_entry[1];
562 buf[11] = dbt_bp_entry[2];
563 buf[12] = dbt_bp_entry[3];
564 }
565 else
566 {
567 buf[9] = dbt_bp_entry[3];
568 buf[10] = dbt_bp_entry[2];
569 buf[11] = dbt_bp_entry[1];
570 buf[12] = dbt_bp_entry[0];
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571 }
572 }
e22f895c 573 else
b4b4b794 574 {
1cf3db46 575 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 576 {
e22f895c 577 if ((bp_addr & 2) == 0)
b4b4b794 578 {
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579 buf[9] = dbt_bp_entry[0];
580 buf[10] = dbt_bp_entry[1];
581 buf[11] = bp_data[i][2] & 0x7f;
582 buf[12] = bp_data[i][3];
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583 }
584 else
585 {
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586 buf[9] = bp_data[i][0];
587 buf[10] = bp_data[i][1];
588 buf[11] = dbt_bp_entry[0];
589 buf[12] = dbt_bp_entry[1];
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590 }
591 }
e22f895c 592 else
b4b4b794 593 {
e22f895c 594 if ((bp_addr & 2) == 0)
b4b4b794 595 {
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596 buf[9] = bp_data[i][0];
597 buf[10] = bp_data[i][1] & 0x7f;
598 buf[11] = dbt_bp_entry[1];
599 buf[12] = dbt_bp_entry[0];
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600 }
601 else
602 {
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603 buf[9] = dbt_bp_entry[1];
604 buf[10] = dbt_bp_entry[0];
605 buf[11] = bp_data[i][2];
606 buf[12] = bp_data[i][3];
b4b4b794 607 }
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608 }
609 }
610 send_data (buf, 13);
611 }
b4b4b794 612
0df8b418 613 /* Set access breaks. */
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614 for (i = 0; i < max_access_breaks; i++)
615 {
616 ab_addr = ab_address[i];
b4b4b794 617
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618 if (ab_addr == 0x00000000)
619 continue;
b4b4b794 620
0df8b418 621 /* DBC register. */
1cf3db46 622 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
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623 {
624 switch (ab_type[i])
625 {
626 case 0: /* write watch */
627 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
628 0x00000086);
629 break;
630 case 1: /* read watch */
631 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
632 0x00000046);
633 break;
634 case 2: /* access watch */
635 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
636 0x00000006);
637 break;
638 }
639 }
640 else
641 {
642 switch (ab_type[i])
643 {
644 case 0: /* write watch */
645 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
646 0x86000000);
647 break;
648 case 1: /* read watch */
649 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
650 0x46000000);
651 break;
652 case 2: /* access watch */
653 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
654 0x06000000);
655 break;
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656 }
657 }
658
0df8b418 659 /* DBAH register. */
e22f895c
KI
660 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8180 + 4 * i, 4, ab_addr);
661
0df8b418 662 /* DBAL register. */
e22f895c
KI
663 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8200 + 4 * i, 4,
664 0xffffffff);
665
0df8b418 666 /* DBD register. */
e22f895c
KI
667 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8280 + 4 * i, 4,
668 0x00000000);
669
0df8b418 670 /* DBDM register. */
e22f895c
KI
671 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8300 + 4 * i, 4,
672 0x00000000);
b4b4b794
KI
673 }
674
0df8b418 675 /* Resume program. */
e22f895c 676 send_cmd (SDI_EXEC_CPU);
b4b4b794
KI
677
678 /* Without this, some commands which require an active target (such as kill)
679 won't work. This variable serves (at least) double duty as both the pid
680 of the target process (if it has such), and as a flag indicating that a
681 target is active. These functions should be split out into seperate
682 variables, especially since GDB will someday have a notion of debugging
683 several processes. */
e5ef4d75
PA
684 inferior_ptid = remote_m32r_ptid;
685 add_thread_silent (remote_m32r_ptid);
b4b4b794
KI
686
687 return;
688}
689
690/* Wait until the remote machine stops, then return,
691 storing status in STATUS just as `wait' would. */
692
693static void
694gdb_cntrl_c (int signo)
695{
696 if (remote_debug)
697 fprintf_unfiltered (gdb_stdlog, "interrupt\n");
698 interrupted = 1;
699}
700
701static ptid_t
117de6a9 702m32r_wait (struct target_ops *ops,
61439e34 703 ptid_t ptid, struct target_waitstatus *status, int options)
b4b4b794
KI
704{
705 static RETSIGTYPE (*prev_sigint) ();
706 unsigned long bp_addr, pc_addr;
e22f895c 707 int ib_breakpoints;
b4b4b794
KI
708 long i;
709 unsigned char buf[13];
710 unsigned long val;
711 int ret, c;
712
713 if (remote_debug)
714 fprintf_unfiltered (gdb_stdlog, "m32r_wait()\n");
715
716 status->kind = TARGET_WAITKIND_EXITED;
423ec54c 717 status->value.sig = TARGET_SIGNAL_0;
b4b4b794
KI
718
719 interrupted = 0;
720 prev_sigint = signal (SIGINT, gdb_cntrl_c);
721
0df8b418 722 /* Wait for ready. */
b4b4b794
KI
723 buf[0] = SDI_WAIT_FOR_READY;
724 if (serial_write (sdi_desc, buf, 1) != 0)
8a3fe4f8 725 error (_("Remote connection closed"));
b4b4b794
KI
726
727 while (1)
728 {
729 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
730 if (c < 0)
8a3fe4f8 731 error (_("Remote connection closed"));
b4b4b794 732
717eb1cf 733 if (c == '-') /* error */
b4b4b794
KI
734 {
735 status->kind = TARGET_WAITKIND_STOPPED;
736 status->value.sig = TARGET_SIGNAL_HUP;
737 return inferior_ptid;
738 }
739 else if (c == '+') /* stopped */
740 break;
741
742 if (interrupted)
743 ret = serial_write (sdi_desc, "!", 1); /* packet to interrupt */
744 else
745 ret = serial_write (sdi_desc, ".", 1); /* packet to wait */
746 if (ret != 0)
8a3fe4f8 747 error (_("Remote connection closed"));
b4b4b794
KI
748 }
749
750 status->kind = TARGET_WAITKIND_STOPPED;
751 if (interrupted)
752 status->value.sig = TARGET_SIGNAL_INT;
753 else
754 status->value.sig = TARGET_SIGNAL_TRAP;
755
756 interrupted = 0;
757 signal (SIGINT, prev_sigint);
758
759 check_mmu_status ();
760
0df8b418 761 /* Recover parallel bit. */
b4b4b794
KI
762 if (last_pc_addr != 0xffffffff)
763 {
764 buf[0] = SDI_WRITE_MEMORY;
1cf3db46 765 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794
KI
766 store_long_parameter (buf + 1, last_pc_addr);
767 else
768 store_long_parameter (buf + 1, last_pc_addr - 1);
769 store_long_parameter (buf + 5, 1);
770 buf[9] = last_pc_addr_data[0];
771 send_data (buf, 10);
772 last_pc_addr = 0xffffffff;
773 }
774
e22f895c
KI
775 if (use_ib_breakpoints)
776 ib_breakpoints = max_ib_breakpoints;
777 else
778 ib_breakpoints = 0;
b4b4b794 779
0df8b418 780 /* Set back pc by 2 if m32r is stopped with dbt. */
e22f895c
KI
781 last_pc_addr = 0xffffffff;
782 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC);
783 pc_addr = recv_long_data () - 2;
784 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
785 {
786 if (pc_addr == bp_address[i])
b4b4b794 787 {
e22f895c
KI
788 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
789
790 /* If there is a parallel instruction with +2 offset at pc
0df8b418 791 address, we have to take care of it later. */
e22f895c 792 if ((pc_addr & 0x2) != 0)
b4b4b794 793 {
1cf3db46 794 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 795 {
e22f895c 796 if ((bp_data[i][2] & 0x80) != 0)
b4b4b794 797 {
e22f895c
KI
798 last_pc_addr = pc_addr;
799 last_pc_addr_data[0] = bp_data[i][2];
800 last_pc_addr_data[1] = bp_data[i][3];
b4b4b794 801 }
e22f895c
KI
802 }
803 else
804 {
805 if ((bp_data[i][1] & 0x80) != 0)
b4b4b794 806 {
e22f895c
KI
807 last_pc_addr = pc_addr;
808 last_pc_addr_data[0] = bp_data[i][1];
809 last_pc_addr_data[1] = bp_data[i][0];
b4b4b794
KI
810 }
811 }
b4b4b794 812 }
e22f895c 813 break;
b4b4b794 814 }
e22f895c 815 }
b4b4b794 816
0df8b418 817 /* Remove ib breakpoints. */
e22f895c
KI
818 for (i = 0; i < ib_breakpoints; i++)
819 {
820 if (bp_address[i] != 0xffffffff)
821 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
822 0x00000000);
823 }
0df8b418 824 /* Remove dbt breakpoints. */
e22f895c
KI
825 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
826 {
827 bp_addr = bp_address[i];
828 if (bp_addr != 0xffffffff)
b4b4b794 829 {
e22f895c
KI
830 if (!mmu_on)
831 bp_addr &= 0x7fffffff;
492e5c6b 832 buf[0] = SDI_WRITE_MEMORY;
e22f895c
KI
833 store_long_parameter (buf + 1, bp_addr & 0xfffffffc);
834 store_long_parameter (buf + 5, 4);
835 buf[9] = bp_data[i][0];
836 buf[10] = bp_data[i][1];
837 buf[11] = bp_data[i][2];
838 buf[12] = bp_data[i][3];
839 send_data (buf, 13);
b4b4b794 840 }
e22f895c 841 }
b4b4b794 842
0df8b418 843 /* Remove access breaks. */
e22f895c
KI
844 hit_watchpoint_addr = 0;
845 for (i = 0; i < max_access_breaks; i++)
846 {
847 if (ab_address[i] != 0x00000000)
b4b4b794 848 {
e22f895c
KI
849 buf[0] = SDI_READ_MEMORY;
850 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
851 store_long_parameter (buf + 5, 4);
852 serial_write (sdi_desc, buf, 9);
853 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
854 if (c != '-' && recv_data (buf, 4) != -1)
b4b4b794 855 {
1cf3db46 856 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 857 {
e22f895c
KI
858 if ((buf[3] & 0x1) == 0x1)
859 hit_watchpoint_addr = ab_address[i];
860 }
861 else
862 {
863 if ((buf[0] & 0x1) == 0x1)
864 hit_watchpoint_addr = ab_address[i];
b4b4b794 865 }
b4b4b794 866 }
b4b4b794 867
e22f895c
KI
868 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
869 0x00000000);
870 }
b4b4b794 871 }
e22f895c
KI
872
873 if (remote_debug)
874 fprintf_unfiltered (gdb_stdlog, "pc => 0x%lx\n", pc_addr);
b4b4b794
KI
875
876 return inferior_ptid;
877}
878
879/* Terminate the open connection to the remote debugger.
880 Use this when you want to detach and do something else
881 with your gdb. */
882static void
136d6dae 883m32r_detach (struct target_ops *ops, char *args, int from_tty)
b4b4b794
KI
884{
885 if (remote_debug)
886 fprintf_unfiltered (gdb_stdlog, "m32r_detach(%d)\n", from_tty);
887
423ec54c 888 m32r_resume (ops, inferior_ptid, 0, TARGET_SIGNAL_0);
b4b4b794 889
0df8b418 890 /* Calls m32r_close to do the real work. */
b4b4b794
KI
891 pop_target ();
892 if (from_tty)
893 fprintf_unfiltered (gdb_stdlog, "Ending remote %s debugging\n",
894 target_shortname);
895}
896
0df8b418 897/* Return the id of register number REGNO. */
b4b4b794
KI
898
899static int
900get_reg_id (int regno)
901{
902 switch (regno)
903 {
904 case 20:
905 return SDI_REG_BBPC;
906 case 21:
907 return SDI_REG_BPC;
908 case 22:
909 return SDI_REG_ACCL;
910 case 23:
911 return SDI_REG_ACCH;
912 case 24:
913 return SDI_REG_EVB;
914 }
915
916 return regno;
917}
918
b4b4b794
KI
919/* Fetch register REGNO, or all registers if REGNO is -1.
920 Returns errno value. */
921static void
28439f5e
PA
922m32r_fetch_register (struct target_ops *ops,
923 struct regcache *regcache, int regno)
b4b4b794 924{
e17a4113
UW
925 struct gdbarch *gdbarch = get_regcache_arch (regcache);
926 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b4b4b794 927 unsigned long val, val2, regid;
b4b4b794
KI
928
929 if (regno == -1)
28439f5e
PA
930 {
931 for (regno = 0;
932 regno < gdbarch_num_regs (get_regcache_arch (regcache));
933 regno++)
934 m32r_fetch_register (ops, regcache, regno);
935 }
b4b4b794
KI
936 else
937 {
938 char buffer[MAX_REGISTER_SIZE];
939
940 regid = get_reg_id (regno);
e22f895c
KI
941 send_one_arg_cmd (SDI_READ_CPU_REG, regid);
942 val = recv_long_data ();
b4b4b794
KI
943
944 if (regid == SDI_REG_PSW)
945 {
e22f895c
KI
946 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
947 val2 = recv_long_data ();
3e41d55f 948 val = ((0x00cf & val2) << 8) | ((0xcf00 & val) >> 8);
b4b4b794
KI
949 }
950
951 if (remote_debug)
952 fprintf_unfiltered (gdb_stdlog, "m32r_fetch_register(%d,0x%08lx)\n",
953 regno, val);
954
955 /* We got the number the register holds, but gdb expects to see a
956 value in the target byte ordering. */
e17a4113 957 store_unsigned_integer (buffer, 4, byte_order, val);
56be3814 958 regcache_raw_supply (regcache, regno, buffer);
b4b4b794
KI
959 }
960 return;
961}
962
b4b4b794
KI
963/* Store register REGNO, or all if REGNO == 0.
964 Return errno value. */
965static void
28439f5e
PA
966m32r_store_register (struct target_ops *ops,
967 struct regcache *regcache, int regno)
b4b4b794
KI
968{
969 int regid;
970 ULONGEST regval, tmp;
b4b4b794
KI
971
972 if (regno == -1)
28439f5e
PA
973 {
974 for (regno = 0;
975 regno < gdbarch_num_regs (get_regcache_arch (regcache));
976 regno++)
977 m32r_store_register (ops, regcache, regno);
978 }
b4b4b794
KI
979 else
980 {
56be3814 981 regcache_cooked_read_unsigned (regcache, regno, &regval);
b4b4b794
KI
982 regid = get_reg_id (regno);
983
984 if (regid == SDI_REG_PSW)
985 {
986 unsigned long psw, bbpsw;
987
e22f895c
KI
988 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_PSW);
989 psw = recv_long_data ();
b4b4b794 990
e22f895c
KI
991 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
992 bbpsw = recv_long_data ();
b4b4b794 993
3e41d55f 994 tmp = (0x00cf & psw) | ((0x00cf & regval) << 8);
e22f895c 995 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PSW, tmp);
b4b4b794 996
3e41d55f 997 tmp = (0x0030 & bbpsw) | ((0xcf00 & regval) >> 8);
e22f895c 998 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BBPSW, tmp);
b4b4b794
KI
999 }
1000 else
1001 {
e22f895c 1002 send_two_arg_cmd (SDI_WRITE_CPU_REG, regid, regval);
b4b4b794
KI
1003 }
1004
1005 if (remote_debug)
1006 fprintf_unfiltered (gdb_stdlog, "m32r_store_register(%d,0x%08lu)\n",
1007 regno, (unsigned long) regval);
1008 }
1009}
1010
1011/* Get ready to modify the registers array. On machines which store
1012 individual registers, this doesn't need to do anything. On machines
1013 which store all the registers in one fell swoop, this makes sure
1014 that registers contains all the registers from the program being
1015 debugged. */
1016
1017static void
316f2060 1018m32r_prepare_to_store (struct regcache *regcache)
b4b4b794 1019{
0df8b418 1020 /* Do nothing, since we can store individual regs. */
b4b4b794
KI
1021 if (remote_debug)
1022 fprintf_unfiltered (gdb_stdlog, "m32r_prepare_to_store()\n");
1023}
1024
1025static void
1026m32r_files_info (struct target_ops *target)
1027{
0d18d720 1028 const char *file = "nothing";
b4b4b794
KI
1029
1030 if (exec_bfd)
1031 {
1032 file = bfd_get_filename (exec_bfd);
1033 printf_filtered ("\tAttached to %s running program %s\n",
1034 chip_name, file);
1035 }
1036}
1037
1038/* Read/Write memory. */
1039static int
16ac4ab5 1040m32r_xfer_memory (CORE_ADDR memaddr, gdb_byte *myaddr, int len,
b4b4b794
KI
1041 int write,
1042 struct mem_attrib *attrib, struct target_ops *target)
1043{
1044 unsigned long taddr;
1045 unsigned char buf[0x2000];
1046 int ret, c;
1047
1048 taddr = memaddr;
1049
1050 if (!mmu_on)
1051 {
1052 if ((taddr & 0xa0000000) == 0x80000000)
1053 taddr &= 0x7fffffff;
1054 }
1055
1056 if (remote_debug)
1057 {
1058 if (write)
ec20a626 1059 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,write)\n",
5af949e3 1060 paddress (target_gdbarch, memaddr), len);
b4b4b794 1061 else
ec20a626 1062 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,read)\n",
5af949e3 1063 paddress (target_gdbarch, memaddr), len);
b4b4b794
KI
1064 }
1065
1066 if (write)
1067 {
1068 buf[0] = SDI_WRITE_MEMORY;
1069 store_long_parameter (buf + 1, taddr);
1070 store_long_parameter (buf + 5, len);
1071 if (len < 0x1000)
1072 {
1073 memcpy (buf + 9, myaddr, len);
1074 ret = send_data (buf, len + 9) - 9;
1075 }
1076 else
1077 {
1078 if (serial_write (sdi_desc, buf, 9) != 0)
1079 {
1080 if (remote_debug)
1081 fprintf_unfiltered (gdb_stdlog,
1082 "m32r_xfer_memory() failed\n");
1083 return 0;
1084 }
1085 ret = send_data (myaddr, len);
1086 }
1087 }
1088 else
1089 {
1090 buf[0] = SDI_READ_MEMORY;
1091 store_long_parameter (buf + 1, taddr);
1092 store_long_parameter (buf + 5, len);
1093 if (serial_write (sdi_desc, buf, 9) != 0)
1094 {
1095 if (remote_debug)
1096 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1097 return 0;
1098 }
1099
1100 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1101 if (c < 0 || c == '-')
1102 {
1103 if (remote_debug)
1104 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1105 return 0;
1106 }
1107
1108 ret = recv_data (myaddr, len);
1109 }
1110
1111 if (ret <= 0)
1112 {
1113 if (remote_debug)
1114 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() fails\n");
1115 return 0;
1116 }
1117
1118 return ret;
1119}
1120
1121static void
7d85a9c0 1122m32r_kill (struct target_ops *ops)
b4b4b794
KI
1123{
1124 if (remote_debug)
1125 fprintf_unfiltered (gdb_stdlog, "m32r_kill()\n");
1126
1127 inferior_ptid = null_ptid;
e5ef4d75 1128 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1129
1130 return;
1131}
1132
1133/* Clean up when a program exits.
1134
1135 The program actually lives on in the remote processor's RAM, and may be
1136 run again without a download. Don't leave it full of breakpoint
1137 instructions. */
1138
1139static void
136d6dae 1140m32r_mourn_inferior (struct target_ops *ops)
b4b4b794
KI
1141{
1142 if (remote_debug)
1143 fprintf_unfiltered (gdb_stdlog, "m32r_mourn_inferior()\n");
1144
1145 remove_breakpoints ();
1146 generic_mourn_inferior ();
1147}
1148
1149static int
a6d9a66e
UW
1150m32r_insert_breakpoint (struct gdbarch *gdbarch,
1151 struct bp_target_info *bp_tgt)
b4b4b794 1152{
8181d85f 1153 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1154 int ib_breakpoints;
1155 unsigned char buf[13];
1156 int i, c;
1157
1158 if (remote_debug)
ec20a626 1159 fprintf_unfiltered (gdb_stdlog, "m32r_insert_breakpoint(%s,...)\n",
5af949e3 1160 paddress (gdbarch, addr));
b4b4b794
KI
1161
1162 if (use_ib_breakpoints)
1163 ib_breakpoints = max_ib_breakpoints;
1164 else
1165 ib_breakpoints = 0;
1166
1167 for (i = 0; i < MAX_BREAKPOINTS; i++)
1168 {
1169 if (bp_address[i] == 0xffffffff)
1170 {
1171 bp_address[i] = addr;
1172 if (i >= ib_breakpoints)
1173 {
1174 buf[0] = SDI_READ_MEMORY;
1175 if (mmu_on)
1176 store_long_parameter (buf + 1, addr & 0xfffffffc);
1177 else
1178 store_long_parameter (buf + 1, addr & 0x7ffffffc);
1179 store_long_parameter (buf + 5, 4);
1180 serial_write (sdi_desc, buf, 9);
1181 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1182 if (c != '-')
1183 recv_data (bp_data[i], 4);
1184 }
1185 return 0;
1186 }
1187 }
1188
8a3fe4f8 1189 error (_("Too many breakpoints"));
b4b4b794
KI
1190 return 1;
1191}
1192
1193static int
a6d9a66e
UW
1194m32r_remove_breakpoint (struct gdbarch *gdbarch,
1195 struct bp_target_info *bp_tgt)
b4b4b794 1196{
8181d85f 1197 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1198 int i;
1199
1200 if (remote_debug)
ec20a626 1201 fprintf_unfiltered (gdb_stdlog, "m32r_remove_breakpoint(%s)\n",
5af949e3 1202 paddress (gdbarch, addr));
b4b4b794
KI
1203
1204 for (i = 0; i < MAX_BREAKPOINTS; i++)
1205 {
1206 if (bp_address[i] == addr)
1207 {
1208 bp_address[i] = 0xffffffff;
1209 break;
1210 }
1211 }
1212
1213 return 0;
1214}
1215
1216static void
1217m32r_load (char *args, int from_tty)
1218{
1219 struct cleanup *old_chain;
1220 asection *section;
1221 bfd *pbfd;
1222 bfd_vma entry;
1223 char *filename;
1224 int quiet;
1225 int nostart;
2b71414d 1226 struct timeval start_time, end_time;
0df8b418 1227 unsigned long data_count; /* Number of bytes transferred to memory. */
b4b4b794
KI
1228 int ret;
1229 static RETSIGTYPE (*prev_sigint) ();
1230
0df8b418 1231 /* for direct tcp connections, we can do a fast binary download. */
b4b4b794
KI
1232 quiet = 0;
1233 nostart = 0;
1234 filename = NULL;
1235
1236 while (*args != '\000')
1237 {
1238 char *arg;
1239
1240 while (isspace (*args))
1241 args++;
1242
1243 arg = args;
1244
1245 while ((*args != '\000') && !isspace (*args))
1246 args++;
1247
1248 if (*args != '\000')
1249 *args++ = '\000';
1250
1251 if (*arg != '-')
1252 filename = arg;
1253 else if (strncmp (arg, "-quiet", strlen (arg)) == 0)
1254 quiet = 1;
1255 else if (strncmp (arg, "-nostart", strlen (arg)) == 0)
1256 nostart = 1;
1257 else
8a3fe4f8 1258 error (_("Unknown option `%s'"), arg);
b4b4b794
KI
1259 }
1260
1261 if (!filename)
1262 filename = get_exec_file (1);
1263
1264 pbfd = bfd_openr (filename, gnutarget);
1265 if (pbfd == NULL)
1266 {
1267 perror_with_name (filename);
1268 return;
1269 }
1270 old_chain = make_cleanup_bfd_close (pbfd);
1271
1272 if (!bfd_check_format (pbfd, bfd_object))
8a3fe4f8 1273 error (_("\"%s\" is not an object file: %s"), filename,
b4b4b794
KI
1274 bfd_errmsg (bfd_get_error ()));
1275
2b71414d 1276 gettimeofday (&start_time, NULL);
b4b4b794
KI
1277 data_count = 0;
1278
1279 interrupted = 0;
1280 prev_sigint = signal (SIGINT, gdb_cntrl_c);
1281
1282 for (section = pbfd->sections; section; section = section->next)
1283 {
1284 if (bfd_get_section_flags (pbfd, section) & SEC_LOAD)
1285 {
1286 bfd_vma section_address;
1287 bfd_size_type section_size;
1288 file_ptr fptr;
1289 int n;
1290
1291 section_address = bfd_section_lma (pbfd, section);
2c500098 1292 section_size = bfd_get_section_size (section);
b4b4b794
KI
1293
1294 if (!mmu_on)
1295 {
1296 if ((section_address & 0xa0000000) == 0x80000000)
1297 section_address &= 0x7fffffff;
1298 }
1299
1300 if (!quiet)
1301 printf_filtered ("[Loading section %s at 0x%lx (%d bytes)]\n",
1302 bfd_get_section_name (pbfd, section),
ec20a626
UW
1303 (unsigned long) section_address,
1304 (int) section_size);
b4b4b794
KI
1305
1306 fptr = 0;
1307
1308 data_count += section_size;
1309
1310 n = 0;
1311 while (section_size > 0)
1312 {
1313 char unsigned buf[0x1000 + 9];
1314 int count;
1315
1316 count = min (section_size, 0x1000);
1317
1318 buf[0] = SDI_WRITE_MEMORY;
1319 store_long_parameter (buf + 1, section_address);
1320 store_long_parameter (buf + 5, count);
1321
1322 bfd_get_section_contents (pbfd, section, buf + 9, fptr, count);
1323 if (send_data (buf, count + 9) <= 0)
8a3fe4f8 1324 error (_("Error while downloading %s section."),
b4b4b794
KI
1325 bfd_get_section_name (pbfd, section));
1326
1327 if (!quiet)
1328 {
1329 printf_unfiltered (".");
1330 if (n++ > 60)
1331 {
1332 printf_unfiltered ("\n");
1333 n = 0;
1334 }
1335 gdb_flush (gdb_stdout);
1336 }
1337
1338 section_address += count;
1339 fptr += count;
1340 section_size -= count;
1341
1342 if (interrupted)
1343 break;
1344 }
1345
1346 if (!quiet && !interrupted)
1347 {
1348 printf_unfiltered ("done.\n");
1349 gdb_flush (gdb_stdout);
1350 }
1351 }
1352
1353 if (interrupted)
1354 {
1355 printf_unfiltered ("Interrupted.\n");
1356 break;
1357 }
1358 }
1359
1360 interrupted = 0;
1361 signal (SIGINT, prev_sigint);
1362
2b71414d 1363 gettimeofday (&end_time, NULL);
b4b4b794 1364
0df8b418 1365 /* Make the PC point at the start address. */
b4b4b794 1366 if (exec_bfd)
fb14de7b
UW
1367 regcache_write_pc (get_current_regcache (),
1368 bfd_get_start_address (exec_bfd));
b4b4b794 1369
0df8b418 1370 inferior_ptid = null_ptid; /* No process now. */
e5ef4d75 1371 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1372
1373 /* This is necessary because many things were based on the PC at the time
1374 that we attached to the monitor, which is no longer valid now that we
1375 have loaded new code (and just changed the PC). Another way to do this
1376 might be to call normal_stop, except that the stack may not be valid,
0df8b418 1377 and things would get horribly confused... */
b4b4b794 1378
c1e56572 1379 clear_symtab_users (0);
b4b4b794
KI
1380
1381 if (!nostart)
1382 {
1383 entry = bfd_get_start_address (pbfd);
1384
1385 if (!quiet)
ec20a626
UW
1386 printf_unfiltered ("[Starting %s at 0x%lx]\n", filename,
1387 (unsigned long) entry);
b4b4b794
KI
1388 }
1389
2b71414d
DJ
1390 print_transfer_performance (gdb_stdout, data_count, 0, &start_time,
1391 &end_time);
b4b4b794
KI
1392
1393 do_cleanups (old_chain);
1394}
1395
1396static void
f9c72d52 1397m32r_stop (ptid_t ptid)
b4b4b794 1398{
b4b4b794
KI
1399 if (remote_debug)
1400 fprintf_unfiltered (gdb_stdlog, "m32r_stop()\n");
1401
e22f895c 1402 send_cmd (SDI_STOP_CPU);
b4b4b794
KI
1403
1404 return;
1405}
1406
1407
37814c18
KI
1408/* Tell whether this target can support a hardware breakpoint. CNT
1409 is the number of hardware breakpoints already installed. This
d92524f1 1410 implements the target_can_use_hardware_watchpoint macro. */
b4b4b794 1411
63807e1d 1412static int
37814c18 1413m32r_can_use_hw_watchpoint (int type, int cnt, int othertype)
b4b4b794 1414{
37814c18 1415 return sdi_desc != NULL && cnt < max_access_breaks;
b4b4b794
KI
1416}
1417
1418/* Set a data watchpoint. ADDR and LEN should be obvious. TYPE is 0
1419 for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
0df8b418 1420 watchpoint. */
b4b4b794 1421
63807e1d 1422static int
0cf6dd15
TJB
1423m32r_insert_watchpoint (CORE_ADDR addr, int len, int type,
1424 struct expression *cond)
b4b4b794
KI
1425{
1426 int i;
1427
1428 if (remote_debug)
ec20a626 1429 fprintf_unfiltered (gdb_stdlog, "m32r_insert_watchpoint(%s,%d,%d)\n",
5af949e3 1430 paddress (target_gdbarch, addr), len, type);
b4b4b794
KI
1431
1432 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1433 {
1434 if (ab_address[i] == 0x00000000)
1435 {
1436 ab_address[i] = addr;
1437 ab_size[i] = len;
1438 ab_type[i] = type;
1439 return 0;
1440 }
1441 }
1442
8a3fe4f8 1443 error (_("Too many watchpoints"));
b4b4b794
KI
1444 return 1;
1445}
1446
63807e1d 1447static int
0cf6dd15
TJB
1448m32r_remove_watchpoint (CORE_ADDR addr, int len, int type,
1449 struct expression *cond)
b4b4b794
KI
1450{
1451 int i;
1452
1453 if (remote_debug)
ec20a626 1454 fprintf_unfiltered (gdb_stdlog, "m32r_remove_watchpoint(%s,%d,%d)\n",
5af949e3 1455 paddress (target_gdbarch, addr), len, type);
b4b4b794
KI
1456
1457 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1458 {
1459 if (ab_address[i] == addr)
1460 {
1461 ab_address[i] = 0x00000000;
1462 break;
1463 }
1464 }
1465
1466 return 0;
1467}
1468
63807e1d 1469static int
4aa7a7f5 1470m32r_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
b4b4b794 1471{
4aa7a7f5 1472 int rc = 0;
123f5f96 1473
4aa7a7f5
JJ
1474 if (hit_watchpoint_addr != 0x00000000)
1475 {
1476 *addr_p = hit_watchpoint_addr;
1477 rc = 1;
1478 }
1479 return rc;
b4b4b794
KI
1480}
1481
63807e1d 1482static int
b4b4b794
KI
1483m32r_stopped_by_watchpoint (void)
1484{
4aa7a7f5 1485 CORE_ADDR addr;
123f5f96 1486
4aa7a7f5 1487 return m32r_stopped_data_address (&current_target, &addr);
b4b4b794
KI
1488}
1489
4d6c6261
PA
1490/* Check to see if a thread is still alive. */
1491
1492static int
28439f5e 1493m32r_thread_alive (struct target_ops *ops, ptid_t ptid)
4d6c6261
PA
1494{
1495 if (ptid_equal (ptid, remote_m32r_ptid))
1496 /* The main task is always alive. */
1497 return 1;
1498
1499 return 0;
1500}
1501
1502/* Convert a thread ID to a string. Returns the string in a static
1503 buffer. */
1504
1505static char *
117de6a9 1506m32r_pid_to_str (struct target_ops *ops, ptid_t ptid)
4d6c6261
PA
1507{
1508 static char buf[64];
1509
1510 if (ptid_equal (remote_m32r_ptid, ptid))
1511 {
1512 xsnprintf (buf, sizeof buf, "Thread <main>");
1513 return buf;
1514 }
1515
1516 return normal_pid_to_str (ptid);
1517}
b4b4b794
KI
1518
1519static void
1520sdireset_command (char *args, int from_tty)
1521{
b4b4b794
KI
1522 if (remote_debug)
1523 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1524
e22f895c 1525 send_cmd (SDI_OPEN);
b4b4b794
KI
1526
1527 inferior_ptid = null_ptid;
e5ef4d75 1528 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1529}
1530
1531
1532static void
1533sdistatus_command (char *args, int from_tty)
1534{
1535 unsigned char buf[4096];
1536 int i, c;
1537
1538 if (remote_debug)
1539 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1540
1541 if (!sdi_desc)
1542 return;
1543
e22f895c 1544 send_cmd (SDI_STATUS);
b4b4b794
KI
1545 for (i = 0; i < 4096; i++)
1546 {
1547 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1548 if (c < 0)
717eb1cf 1549 return;
b4b4b794
KI
1550 buf[i] = c;
1551 if (c == 0)
717eb1cf
AC
1552 break;
1553 }
b4b4b794
KI
1554
1555 printf_filtered ("%s", buf);
1556}
1557
1558
1559static void
1560debug_chaos_command (char *args, int from_tty)
1561{
1562 unsigned char buf[3];
1563
1564 buf[0] = SDI_SET_ATTR;
1565 buf[1] = SDI_ATTR_CACHE;
1566 buf[2] = SDI_CACHE_TYPE_CHAOS;
1567 send_data (buf, 3);
1568}
1569
1570
1571static void
1572use_debug_dma_command (char *args, int from_tty)
1573{
1574 unsigned char buf[3];
1575
1576 buf[0] = SDI_SET_ATTR;
1577 buf[1] = SDI_ATTR_MEM_ACCESS;
1578 buf[2] = SDI_MEM_ACCESS_DEBUG_DMA;
1579 send_data (buf, 3);
1580}
1581
1582static void
1583use_mon_code_command (char *args, int from_tty)
1584{
1585 unsigned char buf[3];
1586
1587 buf[0] = SDI_SET_ATTR;
1588 buf[1] = SDI_ATTR_MEM_ACCESS;
1589 buf[2] = SDI_MEM_ACCESS_MON_CODE;
1590 send_data (buf, 3);
1591}
1592
1593
1594static void
1595use_ib_breakpoints_command (char *args, int from_tty)
1596{
1597 use_ib_breakpoints = 1;
1598}
1599
1600static void
1601use_dbt_breakpoints_command (char *args, int from_tty)
1602{
1603 use_ib_breakpoints = 0;
1604}
1605
c35b1492
PA
1606static int
1607m32r_return_one (struct target_ops *target)
1608{
1609 return 1;
1610}
b4b4b794 1611
aeaec162
TT
1612/* Implementation of the to_has_execution method. */
1613
1614static int
1615m32r_has_execution (struct target_ops *target, ptid_t the_ptid)
1616{
1617 return 1;
1618}
1619
0df8b418 1620/* Define the target subroutine names. */
b4b4b794
KI
1621
1622struct target_ops m32r_ops;
1623
1624static void
1625init_m32r_ops (void)
1626{
1627 m32r_ops.to_shortname = "m32rsdi";
1628 m32r_ops.to_longname = "Remote M32R debugging over SDI interface";
1629 m32r_ops.to_doc = "Use an M32R board using SDI debugging protocol.";
1630 m32r_ops.to_open = m32r_open;
1631 m32r_ops.to_close = m32r_close;
1632 m32r_ops.to_detach = m32r_detach;
1633 m32r_ops.to_resume = m32r_resume;
1634 m32r_ops.to_wait = m32r_wait;
1635 m32r_ops.to_fetch_registers = m32r_fetch_register;
1636 m32r_ops.to_store_registers = m32r_store_register;
1637 m32r_ops.to_prepare_to_store = m32r_prepare_to_store;
c8e73a31 1638 m32r_ops.deprecated_xfer_memory = m32r_xfer_memory;
b4b4b794
KI
1639 m32r_ops.to_files_info = m32r_files_info;
1640 m32r_ops.to_insert_breakpoint = m32r_insert_breakpoint;
1641 m32r_ops.to_remove_breakpoint = m32r_remove_breakpoint;
37814c18
KI
1642 m32r_ops.to_can_use_hw_breakpoint = m32r_can_use_hw_watchpoint;
1643 m32r_ops.to_insert_watchpoint = m32r_insert_watchpoint;
1644 m32r_ops.to_remove_watchpoint = m32r_remove_watchpoint;
1645 m32r_ops.to_stopped_by_watchpoint = m32r_stopped_by_watchpoint;
1646 m32r_ops.to_stopped_data_address = m32r_stopped_data_address;
b4b4b794
KI
1647 m32r_ops.to_kill = m32r_kill;
1648 m32r_ops.to_load = m32r_load;
1649 m32r_ops.to_create_inferior = m32r_create_inferior;
1650 m32r_ops.to_mourn_inferior = m32r_mourn_inferior;
1651 m32r_ops.to_stop = m32r_stop;
49d03eab 1652 m32r_ops.to_log_command = serial_log_command;
4d6c6261
PA
1653 m32r_ops.to_thread_alive = m32r_thread_alive;
1654 m32r_ops.to_pid_to_str = m32r_pid_to_str;
b4b4b794 1655 m32r_ops.to_stratum = process_stratum;
c35b1492
PA
1656 m32r_ops.to_has_all_memory = m32r_return_one;
1657 m32r_ops.to_has_memory = m32r_return_one;
1658 m32r_ops.to_has_stack = m32r_return_one;
1659 m32r_ops.to_has_registers = m32r_return_one;
aeaec162 1660 m32r_ops.to_has_execution = m32r_has_execution;
b4b4b794
KI
1661 m32r_ops.to_magic = OPS_MAGIC;
1662};
1663
1664
1665extern initialize_file_ftype _initialize_remote_m32r;
1666
1667void
1668_initialize_remote_m32r (void)
1669{
1670 int i;
1671
1672 init_m32r_ops ();
1673
0df8b418 1674 /* Initialize breakpoints. */
b4b4b794
KI
1675 for (i = 0; i < MAX_BREAKPOINTS; i++)
1676 bp_address[i] = 0xffffffff;
1677
0df8b418 1678 /* Initialize access breaks. */
b4b4b794
KI
1679 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1680 ab_address[i] = 0x00000000;
1681
1682 add_target (&m32r_ops);
1683
1684 add_com ("sdireset", class_obscure, sdireset_command,
1bedd215 1685 _("Reset SDI connection."));
b4b4b794
KI
1686
1687 add_com ("sdistatus", class_obscure, sdistatus_command,
1bedd215 1688 _("Show status of SDI connection."));
b4b4b794
KI
1689
1690 add_com ("debug_chaos", class_obscure, debug_chaos_command,
1bedd215 1691 _("Debug M32R/Chaos."));
b4b4b794
KI
1692
1693 add_com ("use_debug_dma", class_obscure, use_debug_dma_command,
1bedd215 1694 _("Use debug DMA mem access."));
b4b4b794 1695 add_com ("use_mon_code", class_obscure, use_mon_code_command,
1bedd215 1696 _("Use mon code mem access."));
b4b4b794
KI
1697
1698 add_com ("use_ib_break", class_obscure, use_ib_breakpoints_command,
1bedd215 1699 _("Set breakpoints by IB break."));
b4b4b794 1700 add_com ("use_dbt_break", class_obscure, use_dbt_breakpoints_command,
1bedd215 1701 _("Set breakpoints by dbt."));
e5ef4d75
PA
1702
1703 /* Yes, 42000 is arbitrary. The only sense out of it, is that it
1704 isn't 0. */
1705 remote_m32r_ptid = ptid_build (42000, 0, 42000);
b4b4b794 1706}
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