* target.h (struct target_ops): Make to_has_all_memory,
[deliverable/binutils-gdb.git] / gdb / remote-m32r-sdi.c
CommitLineData
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1/* Remote debugging interface for M32R/SDI.
2
0fb0cc75 3 Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
9b254dd1 4 Free Software Foundation, Inc.
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5
6 Contributed by Renesas Technology Co.
7 Written by Kei Sakamoto <sakamoto.kei@renesas.com>.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
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14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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23
24#include "defs.h"
25#include "gdbcmd.h"
26#include "gdbcore.h"
27#include "inferior.h"
28#include "target.h"
29#include "regcache.h"
30#include "gdb_string.h"
e5ef4d75 31#include "gdbthread.h"
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32#include <ctype.h>
33#include <signal.h>
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34#ifdef __MINGW32__
35#include <winsock.h>
36#else
b4b4b794 37#include <netinet/in.h>
cbba9205 38#endif
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39#include <sys/types.h>
40#include <sys/time.h>
41#include <signal.h>
42#include <time.h>
43
44
45#include "serial.h"
46
47/* Descriptor for I/O to remote machine. */
48
49static struct serial *sdi_desc = NULL;
50
51#define SDI_TIMEOUT 30
52
53
54#define SDIPORT 3232
55
56static char chip_name[64];
57
58static int step_mode;
59static unsigned long last_pc_addr = 0xffffffff;
60static unsigned char last_pc_addr_data[2];
61
62static int mmu_on = 0;
63
64static int use_ib_breakpoints = 1;
65
66#define MAX_BREAKPOINTS 1024
67static int max_ib_breakpoints;
68static unsigned long bp_address[MAX_BREAKPOINTS];
69static unsigned char bp_data[MAX_BREAKPOINTS][4];
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70
71/* dbt -> nop */
72static const unsigned char dbt_bp_entry[] = {
73 0x10, 0xe0, 0x70, 0x00
74};
75
76#define MAX_ACCESS_BREAKS 4
77static int max_access_breaks;
78static unsigned long ab_address[MAX_ACCESS_BREAKS];
79static unsigned int ab_type[MAX_ACCESS_BREAKS];
80static unsigned int ab_size[MAX_ACCESS_BREAKS];
81static CORE_ADDR hit_watchpoint_addr = 0;
82
83static int interrupted = 0;
84
85/* Forward data declarations */
86extern struct target_ops m32r_ops;
87
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88/* This is the ptid we use while we're connected to the remote. Its
89 value is arbitrary, as the target doesn't have a notion of
90 processes or threads, but we need something non-null to place in
91 inferior_ptid. */
92static ptid_t remote_m32r_ptid;
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93
94/* Commands */
95#define SDI_OPEN 1
96#define SDI_CLOSE 2
97#define SDI_RELEASE 3
98#define SDI_READ_CPU_REG 4
99#define SDI_WRITE_CPU_REG 5
100#define SDI_READ_MEMORY 6
101#define SDI_WRITE_MEMORY 7
102#define SDI_EXEC_CPU 8
103#define SDI_STOP_CPU 9
104#define SDI_WAIT_FOR_READY 10
105#define SDI_GET_ATTR 11
106#define SDI_SET_ATTR 12
107#define SDI_STATUS 13
108
109/* Attributes */
110#define SDI_ATTR_NAME 1
111#define SDI_ATTR_BRK 2
112#define SDI_ATTR_ABRK 3
113#define SDI_ATTR_CACHE 4
114#define SDI_CACHE_TYPE_M32102 0
115#define SDI_CACHE_TYPE_CHAOS 1
116#define SDI_ATTR_MEM_ACCESS 5
117#define SDI_MEM_ACCESS_DEBUG_DMA 0
118#define SDI_MEM_ACCESS_MON_CODE 1
119
120/* Registers */
121#define SDI_REG_R0 0
122#define SDI_REG_R1 1
123#define SDI_REG_R2 2
124#define SDI_REG_R3 3
125#define SDI_REG_R4 4
126#define SDI_REG_R5 5
127#define SDI_REG_R6 6
128#define SDI_REG_R7 7
129#define SDI_REG_R8 8
130#define SDI_REG_R9 9
131#define SDI_REG_R10 10
132#define SDI_REG_R11 11
133#define SDI_REG_R12 12
134#define SDI_REG_FP 13
135#define SDI_REG_LR 14
136#define SDI_REG_SP 15
137#define SDI_REG_PSW 16
138#define SDI_REG_CBR 17
139#define SDI_REG_SPI 18
140#define SDI_REG_SPU 19
141#define SDI_REG_CR4 20
142#define SDI_REG_EVB 21
143#define SDI_REG_BPC 22
144#define SDI_REG_CR7 23
145#define SDI_REG_BBPSW 24
146#define SDI_REG_CR9 25
147#define SDI_REG_CR10 26
148#define SDI_REG_CR11 27
149#define SDI_REG_CR12 28
150#define SDI_REG_WR 29
151#define SDI_REG_BBPC 30
152#define SDI_REG_PBP 31
153#define SDI_REG_ACCH 32
154#define SDI_REG_ACCL 33
155#define SDI_REG_ACC1H 34
156#define SDI_REG_ACC1L 35
157
158
159/* Low level communication functions */
160
161/* Check an ack packet from the target */
162static int
163get_ack (void)
164{
165 int c;
166
717eb1cf 167 if (!sdi_desc)
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168 return -1;
169
170 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
171
172 if (c < 0)
173 return -1;
174
717eb1cf 175 if (c != '+') /* error */
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176 return -1;
177
178 return 0;
179}
180
181/* Send data to the target and check an ack packet */
182static int
183send_data (void *buf, int len)
184{
185 int ret;
186
717eb1cf 187 if (!sdi_desc)
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188 return -1;
189
190 if (serial_write (sdi_desc, buf, len) != 0)
191 return -1;
192
193 if (get_ack () == -1)
194 return -1;
195
196 return len;
197}
198
199/* Receive data from the target */
200static int
201recv_data (void *buf, int len)
202{
203 int total = 0;
204 int c;
205
717eb1cf 206 if (!sdi_desc)
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207 return -1;
208
209 while (total < len)
210 {
211 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
212
213 if (c < 0)
214 return -1;
215
216 ((unsigned char *) buf)[total++] = c;
217 }
218
219 return len;
220}
221
222/* Store unsigned long parameter on packet */
223static void
224store_long_parameter (void *buf, long val)
225{
226 val = htonl (val);
227 memcpy (buf, &val, 4);
228}
229
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230static int
231send_cmd (unsigned char cmd)
232{
233 unsigned char buf[1];
234 buf[0] = cmd;
235 return send_data (buf, 1);
236}
237
238static int
239send_one_arg_cmd (unsigned char cmd, unsigned char arg1)
240{
241 unsigned char buf[2];
242 buf[0] = cmd;
243 buf[1] = arg1;
244 return send_data (buf, 2);
245}
246
247static int
248send_two_arg_cmd (unsigned char cmd, unsigned char arg1, unsigned long arg2)
249{
250 unsigned char buf[6];
251 buf[0] = cmd;
252 buf[1] = arg1;
253 store_long_parameter (buf + 2, arg2);
254 return send_data (buf, 6);
255}
256
257static int
258send_three_arg_cmd (unsigned char cmd, unsigned long arg1, unsigned long arg2,
259 unsigned long arg3)
260{
261 unsigned char buf[13];
262 buf[0] = cmd;
263 store_long_parameter (buf + 1, arg1);
264 store_long_parameter (buf + 5, arg2);
265 store_long_parameter (buf + 9, arg3);
266 return send_data (buf, 13);
267}
268
269static unsigned char
270recv_char_data (void)
271{
272 unsigned char val;
273 recv_data (&val, 1);
274 return val;
275}
276
277static unsigned long
278recv_long_data (void)
279{
280 unsigned long val;
281 recv_data (&val, 4);
282 return ntohl (val);
283}
284
285
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286/* Check if MMU is on */
287static void
288check_mmu_status (void)
289{
290 unsigned long val;
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291
292 /* Read PC address */
e22f895c 293 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC) == -1)
b4b4b794 294 return;
e22f895c 295 val = recv_long_data ();
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296 if ((val & 0xc0000000) == 0x80000000)
297 {
298 mmu_on = 1;
299 return;
300 }
301
302 /* Read EVB address */
e22f895c 303 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_EVB) == -1)
b4b4b794 304 return;
e22f895c 305 val = recv_long_data ();
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306 if ((val & 0xc0000000) == 0x80000000)
307 {
308 mmu_on = 1;
309 return;
310 }
311
312 mmu_on = 0;
313}
314
315
316/* This is called not only when we first attach, but also when the
317 user types "run" after having attached. */
318static void
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319m32r_create_inferior (struct target_ops *ops, char *execfile,
320 char *args, char **env, int from_tty)
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321{
322 CORE_ADDR entry_pt;
323
324 if (args && *args)
8a3fe4f8 325 error (_("Cannot pass arguments to remote STDEBUG process"));
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326
327 if (execfile == 0 || exec_bfd == 0)
8a3fe4f8 328 error (_("No executable file specified"));
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329
330 if (remote_debug)
331 fprintf_unfiltered (gdb_stdlog, "m32r_create_inferior(%s,%s)\n", execfile,
332 args);
333
334 entry_pt = bfd_get_start_address (exec_bfd);
335
336 /* The "process" (board) is already stopped awaiting our commands, and
337 the program is already downloaded. We just set its PC and go. */
338
339 clear_proceed_status ();
340
341 /* Tell wait_for_inferior that we've started a new process. */
342 init_wait_for_inferior ();
343
344 /* Set up the "saved terminal modes" of the inferior
345 based on what modes we are starting it with. */
346 target_terminal_init ();
347
348 /* Install inferior's terminal modes. */
349 target_terminal_inferior ();
350
fb14de7b 351 regcache_write_pc (get_current_regcache (), entry_pt);
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352}
353
354/* Open a connection to a remote debugger.
355 NAME is the filename used for communication. */
356
357static void
358m32r_open (char *args, int from_tty)
359{
360 struct hostent *host_ent;
361 struct sockaddr_in server_addr;
362 char *port_str, hostname[256];
363 int port;
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364 int i, n;
365 int yes = 1;
366
367 if (remote_debug)
368 fprintf_unfiltered (gdb_stdlog, "m32r_open(%d)\n", from_tty);
369
370 target_preopen (from_tty);
371
372 push_target (&m32r_ops);
373
374 if (args == NULL)
375 sprintf (hostname, "localhost:%d", SDIPORT);
376 else
377 {
378 port_str = strchr (args, ':');
379 if (port_str == NULL)
717eb1cf 380 sprintf (hostname, "%s:%d", args, SDIPORT);
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381 else
382 strcpy (hostname, args);
383 }
384
385 sdi_desc = serial_open (hostname);
386 if (!sdi_desc)
8a3fe4f8 387 error (_("Connection refused."));
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388
389 if (get_ack () == -1)
8a3fe4f8 390 error (_("Cannot connect to SDI target."));
b4b4b794 391
e22f895c 392 if (send_cmd (SDI_OPEN) == -1)
8a3fe4f8 393 error (_("Cannot connect to SDI target."));
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394
395 /* Get maximum number of ib breakpoints */
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396 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_BRK);
397 max_ib_breakpoints = recv_char_data ();
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398 if (remote_debug)
399 printf_filtered ("Max IB Breakpoints = %d\n", max_ib_breakpoints);
400
401 /* Initialize breakpoints. */
402 for (i = 0; i < MAX_BREAKPOINTS; i++)
403 bp_address[i] = 0xffffffff;
404
405 /* Get maximum number of access breaks. */
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406 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_ABRK);
407 max_access_breaks = recv_char_data ();
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408 if (remote_debug)
409 printf_filtered ("Max Access Breaks = %d\n", max_access_breaks);
410
411 /* Initialize access breask. */
412 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
413 ab_address[i] = 0x00000000;
414
415 check_mmu_status ();
416
417 /* Get the name of chip on target board. */
e22f895c 418 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_NAME);
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419 recv_data (chip_name, 64);
420
421 if (from_tty)
422 printf_filtered ("Remote %s connected to %s\n", target_shortname,
423 chip_name);
424}
425
426/* Close out all files and local state before this target loses control. */
427
428static void
429m32r_close (int quitting)
430{
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431 if (remote_debug)
432 fprintf_unfiltered (gdb_stdlog, "m32r_close(%d)\n", quitting);
433
434 if (sdi_desc)
435 {
e22f895c 436 send_cmd (SDI_CLOSE);
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437 serial_close (sdi_desc);
438 sdi_desc = NULL;
439 }
440
441 inferior_ptid = null_ptid;
e5ef4d75 442 delete_thread_silent (remote_m32r_ptid);
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443 return;
444}
445
446/* Tell the remote machine to resume. */
447
448static void
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449m32r_resume (struct target_ops *ops,
450 ptid_t ptid, int step, enum target_signal sig)
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451{
452 unsigned long pc_addr, bp_addr, ab_addr;
e22f895c 453 int ib_breakpoints;
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454 unsigned char buf[13];
455 int i;
456
457 if (remote_debug)
458 {
459 if (step)
460 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(step)\n");
461 else
462 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(cont)\n");
463 }
464
465 check_mmu_status ();
466
fb14de7b 467 pc_addr = regcache_read_pc (get_current_regcache ());
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468 if (remote_debug)
469 fprintf_unfiltered (gdb_stdlog, "pc <= 0x%lx\n", pc_addr);
470
471 /* At pc address there is a parallel instruction with +2 offset,
472 so we have to make it a serial instruction or avoid it. */
473 if (pc_addr == last_pc_addr)
474 {
475 /* Avoid a parallel nop. */
476 if (last_pc_addr_data[0] == 0xf0 && last_pc_addr_data[1] == 0x00)
477 {
478 pc_addr += 2;
479 /* Now we can forget this instruction. */
480 last_pc_addr = 0xffffffff;
481 }
482 /* Clear a parallel bit. */
483 else
484 {
485 buf[0] = SDI_WRITE_MEMORY;
1cf3db46 486 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
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487 store_long_parameter (buf + 1, pc_addr);
488 else
489 store_long_parameter (buf + 1, pc_addr - 1);
490 store_long_parameter (buf + 5, 1);
491 buf[9] = last_pc_addr_data[0] & 0x7f;
492 send_data (buf, 10);
493 }
494 }
495
496 /* Set PC. */
e22f895c 497 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
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498
499 /* step mode. */
500 step_mode = step;
501 if (step)
502 {
503 /* Set PBP. */
e22f895c 504 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, pc_addr | 1);
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505 }
506 else
507 {
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508 /* Unset PBP. */
509 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, 0x00000000);
510 }
511
512 if (use_ib_breakpoints)
513 ib_breakpoints = max_ib_breakpoints;
514 else
515 ib_breakpoints = 0;
516
517 /* Set ib breakpoints. */
518 for (i = 0; i < ib_breakpoints; i++)
519 {
520 bp_addr = bp_address[i];
b4b4b794 521
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522 if (bp_addr == 0xffffffff)
523 continue;
524
525 /* Set PBP. */
1cf3db46 526 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
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527 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
528 0x00000006);
b4b4b794 529 else
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530 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
531 0x06000000);
532
533 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8080 + 4 * i, 4, bp_addr);
534 }
535
536 /* Set dbt breakpoints. */
537 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
538 {
539 bp_addr = bp_address[i];
540
541 if (bp_addr == 0xffffffff)
542 continue;
543
544 if (!mmu_on)
545 bp_addr &= 0x7fffffff;
b4b4b794 546
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547 /* Write DBT instruction. */
548 buf[0] = SDI_WRITE_MEMORY;
492e5c6b 549 store_long_parameter (buf + 1, (bp_addr & 0xfffffffc));
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550 store_long_parameter (buf + 5, 4);
551 if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc))
b4b4b794 552 {
1cf3db46 553 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 554 {
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555 buf[9] = dbt_bp_entry[0];
556 buf[10] = dbt_bp_entry[1];
557 buf[11] = dbt_bp_entry[2];
558 buf[12] = dbt_bp_entry[3];
559 }
560 else
561 {
562 buf[9] = dbt_bp_entry[3];
563 buf[10] = dbt_bp_entry[2];
564 buf[11] = dbt_bp_entry[1];
565 buf[12] = dbt_bp_entry[0];
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566 }
567 }
e22f895c 568 else
b4b4b794 569 {
1cf3db46 570 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 571 {
e22f895c 572 if ((bp_addr & 2) == 0)
b4b4b794 573 {
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574 buf[9] = dbt_bp_entry[0];
575 buf[10] = dbt_bp_entry[1];
576 buf[11] = bp_data[i][2] & 0x7f;
577 buf[12] = bp_data[i][3];
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578 }
579 else
580 {
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581 buf[9] = bp_data[i][0];
582 buf[10] = bp_data[i][1];
583 buf[11] = dbt_bp_entry[0];
584 buf[12] = dbt_bp_entry[1];
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585 }
586 }
e22f895c 587 else
b4b4b794 588 {
e22f895c 589 if ((bp_addr & 2) == 0)
b4b4b794 590 {
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591 buf[9] = bp_data[i][0];
592 buf[10] = bp_data[i][1] & 0x7f;
593 buf[11] = dbt_bp_entry[1];
594 buf[12] = dbt_bp_entry[0];
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595 }
596 else
597 {
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598 buf[9] = dbt_bp_entry[1];
599 buf[10] = dbt_bp_entry[0];
600 buf[11] = bp_data[i][2];
601 buf[12] = bp_data[i][3];
b4b4b794 602 }
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603 }
604 }
605 send_data (buf, 13);
606 }
b4b4b794 607
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608 /* Set access breaks. */
609 for (i = 0; i < max_access_breaks; i++)
610 {
611 ab_addr = ab_address[i];
b4b4b794 612
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613 if (ab_addr == 0x00000000)
614 continue;
b4b4b794 615
e22f895c 616 /* DBC register */
1cf3db46 617 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
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618 {
619 switch (ab_type[i])
620 {
621 case 0: /* write watch */
622 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
623 0x00000086);
624 break;
625 case 1: /* read watch */
626 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
627 0x00000046);
628 break;
629 case 2: /* access watch */
630 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
631 0x00000006);
632 break;
633 }
634 }
635 else
636 {
637 switch (ab_type[i])
638 {
639 case 0: /* write watch */
640 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
641 0x86000000);
642 break;
643 case 1: /* read watch */
644 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
645 0x46000000);
646 break;
647 case 2: /* access watch */
648 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
649 0x06000000);
650 break;
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651 }
652 }
653
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654 /* DBAH register */
655 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8180 + 4 * i, 4, ab_addr);
656
657 /* DBAL register */
658 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8200 + 4 * i, 4,
659 0xffffffff);
660
661 /* DBD register */
662 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8280 + 4 * i, 4,
663 0x00000000);
664
665 /* DBDM register */
666 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8300 + 4 * i, 4,
667 0x00000000);
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668 }
669
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670 /* Resume program. */
671 send_cmd (SDI_EXEC_CPU);
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672
673 /* Without this, some commands which require an active target (such as kill)
674 won't work. This variable serves (at least) double duty as both the pid
675 of the target process (if it has such), and as a flag indicating that a
676 target is active. These functions should be split out into seperate
677 variables, especially since GDB will someday have a notion of debugging
678 several processes. */
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PA
679 inferior_ptid = remote_m32r_ptid;
680 add_thread_silent (remote_m32r_ptid);
b4b4b794
KI
681
682 return;
683}
684
685/* Wait until the remote machine stops, then return,
686 storing status in STATUS just as `wait' would. */
687
688static void
689gdb_cntrl_c (int signo)
690{
691 if (remote_debug)
692 fprintf_unfiltered (gdb_stdlog, "interrupt\n");
693 interrupted = 1;
694}
695
696static ptid_t
117de6a9 697m32r_wait (struct target_ops *ops,
61439e34 698 ptid_t ptid, struct target_waitstatus *status, int options)
b4b4b794
KI
699{
700 static RETSIGTYPE (*prev_sigint) ();
701 unsigned long bp_addr, pc_addr;
e22f895c 702 int ib_breakpoints;
b4b4b794
KI
703 long i;
704 unsigned char buf[13];
705 unsigned long val;
706 int ret, c;
707
708 if (remote_debug)
709 fprintf_unfiltered (gdb_stdlog, "m32r_wait()\n");
710
711 status->kind = TARGET_WAITKIND_EXITED;
712 status->value.sig = 0;
713
714 interrupted = 0;
715 prev_sigint = signal (SIGINT, gdb_cntrl_c);
716
717 /* Wait for ready */
718 buf[0] = SDI_WAIT_FOR_READY;
719 if (serial_write (sdi_desc, buf, 1) != 0)
8a3fe4f8 720 error (_("Remote connection closed"));
b4b4b794
KI
721
722 while (1)
723 {
724 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
725 if (c < 0)
8a3fe4f8 726 error (_("Remote connection closed"));
b4b4b794 727
717eb1cf 728 if (c == '-') /* error */
b4b4b794
KI
729 {
730 status->kind = TARGET_WAITKIND_STOPPED;
731 status->value.sig = TARGET_SIGNAL_HUP;
732 return inferior_ptid;
733 }
734 else if (c == '+') /* stopped */
735 break;
736
737 if (interrupted)
738 ret = serial_write (sdi_desc, "!", 1); /* packet to interrupt */
739 else
740 ret = serial_write (sdi_desc, ".", 1); /* packet to wait */
741 if (ret != 0)
8a3fe4f8 742 error (_("Remote connection closed"));
b4b4b794
KI
743 }
744
745 status->kind = TARGET_WAITKIND_STOPPED;
746 if (interrupted)
747 status->value.sig = TARGET_SIGNAL_INT;
748 else
749 status->value.sig = TARGET_SIGNAL_TRAP;
750
751 interrupted = 0;
752 signal (SIGINT, prev_sigint);
753
754 check_mmu_status ();
755
756 /* Recover parallel bit. */
757 if (last_pc_addr != 0xffffffff)
758 {
759 buf[0] = SDI_WRITE_MEMORY;
1cf3db46 760 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794
KI
761 store_long_parameter (buf + 1, last_pc_addr);
762 else
763 store_long_parameter (buf + 1, last_pc_addr - 1);
764 store_long_parameter (buf + 5, 1);
765 buf[9] = last_pc_addr_data[0];
766 send_data (buf, 10);
767 last_pc_addr = 0xffffffff;
768 }
769
e22f895c
KI
770 if (use_ib_breakpoints)
771 ib_breakpoints = max_ib_breakpoints;
772 else
773 ib_breakpoints = 0;
b4b4b794 774
e22f895c
KI
775 /* Set back pc by 2 if m32r is stopped with dbt. */
776 last_pc_addr = 0xffffffff;
777 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC);
778 pc_addr = recv_long_data () - 2;
779 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
780 {
781 if (pc_addr == bp_address[i])
b4b4b794 782 {
e22f895c
KI
783 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
784
785 /* If there is a parallel instruction with +2 offset at pc
786 address, we have to take care of it later. */
787 if ((pc_addr & 0x2) != 0)
b4b4b794 788 {
1cf3db46 789 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 790 {
e22f895c 791 if ((bp_data[i][2] & 0x80) != 0)
b4b4b794 792 {
e22f895c
KI
793 last_pc_addr = pc_addr;
794 last_pc_addr_data[0] = bp_data[i][2];
795 last_pc_addr_data[1] = bp_data[i][3];
b4b4b794 796 }
e22f895c
KI
797 }
798 else
799 {
800 if ((bp_data[i][1] & 0x80) != 0)
b4b4b794 801 {
e22f895c
KI
802 last_pc_addr = pc_addr;
803 last_pc_addr_data[0] = bp_data[i][1];
804 last_pc_addr_data[1] = bp_data[i][0];
b4b4b794
KI
805 }
806 }
b4b4b794 807 }
e22f895c 808 break;
b4b4b794 809 }
e22f895c 810 }
b4b4b794 811
e22f895c
KI
812 /* Remove ib breakpoints. */
813 for (i = 0; i < ib_breakpoints; i++)
814 {
815 if (bp_address[i] != 0xffffffff)
816 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
817 0x00000000);
818 }
819 /* Remove dbt breakpoints. */
820 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
821 {
822 bp_addr = bp_address[i];
823 if (bp_addr != 0xffffffff)
b4b4b794 824 {
e22f895c
KI
825 if (!mmu_on)
826 bp_addr &= 0x7fffffff;
492e5c6b 827 buf[0] = SDI_WRITE_MEMORY;
e22f895c
KI
828 store_long_parameter (buf + 1, bp_addr & 0xfffffffc);
829 store_long_parameter (buf + 5, 4);
830 buf[9] = bp_data[i][0];
831 buf[10] = bp_data[i][1];
832 buf[11] = bp_data[i][2];
833 buf[12] = bp_data[i][3];
834 send_data (buf, 13);
b4b4b794 835 }
e22f895c 836 }
b4b4b794 837
e22f895c
KI
838 /* Remove access breaks. */
839 hit_watchpoint_addr = 0;
840 for (i = 0; i < max_access_breaks; i++)
841 {
842 if (ab_address[i] != 0x00000000)
b4b4b794 843 {
e22f895c
KI
844 buf[0] = SDI_READ_MEMORY;
845 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
846 store_long_parameter (buf + 5, 4);
847 serial_write (sdi_desc, buf, 9);
848 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
849 if (c != '-' && recv_data (buf, 4) != -1)
b4b4b794 850 {
1cf3db46 851 if (gdbarch_byte_order (target_gdbarch) == BFD_ENDIAN_BIG)
b4b4b794 852 {
e22f895c
KI
853 if ((buf[3] & 0x1) == 0x1)
854 hit_watchpoint_addr = ab_address[i];
855 }
856 else
857 {
858 if ((buf[0] & 0x1) == 0x1)
859 hit_watchpoint_addr = ab_address[i];
b4b4b794 860 }
b4b4b794 861 }
b4b4b794 862
e22f895c
KI
863 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
864 0x00000000);
865 }
b4b4b794 866 }
e22f895c
KI
867
868 if (remote_debug)
869 fprintf_unfiltered (gdb_stdlog, "pc => 0x%lx\n", pc_addr);
b4b4b794
KI
870
871 return inferior_ptid;
872}
873
874/* Terminate the open connection to the remote debugger.
875 Use this when you want to detach and do something else
876 with your gdb. */
877static void
136d6dae 878m32r_detach (struct target_ops *ops, char *args, int from_tty)
b4b4b794
KI
879{
880 if (remote_debug)
881 fprintf_unfiltered (gdb_stdlog, "m32r_detach(%d)\n", from_tty);
882
28439f5e 883 m32r_resume (ops, inferior_ptid, 0, 0);
b4b4b794
KI
884
885 /* calls m32r_close to do the real work */
886 pop_target ();
887 if (from_tty)
888 fprintf_unfiltered (gdb_stdlog, "Ending remote %s debugging\n",
889 target_shortname);
890}
891
892/* Return the id of register number REGNO. */
893
894static int
895get_reg_id (int regno)
896{
897 switch (regno)
898 {
899 case 20:
900 return SDI_REG_BBPC;
901 case 21:
902 return SDI_REG_BPC;
903 case 22:
904 return SDI_REG_ACCL;
905 case 23:
906 return SDI_REG_ACCH;
907 case 24:
908 return SDI_REG_EVB;
909 }
910
911 return regno;
912}
913
b4b4b794
KI
914/* Fetch register REGNO, or all registers if REGNO is -1.
915 Returns errno value. */
916static void
28439f5e
PA
917m32r_fetch_register (struct target_ops *ops,
918 struct regcache *regcache, int regno)
b4b4b794
KI
919{
920 unsigned long val, val2, regid;
b4b4b794
KI
921
922 if (regno == -1)
28439f5e
PA
923 {
924 for (regno = 0;
925 regno < gdbarch_num_regs (get_regcache_arch (regcache));
926 regno++)
927 m32r_fetch_register (ops, regcache, regno);
928 }
b4b4b794
KI
929 else
930 {
931 char buffer[MAX_REGISTER_SIZE];
932
933 regid = get_reg_id (regno);
e22f895c
KI
934 send_one_arg_cmd (SDI_READ_CPU_REG, regid);
935 val = recv_long_data ();
b4b4b794
KI
936
937 if (regid == SDI_REG_PSW)
938 {
e22f895c
KI
939 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
940 val2 = recv_long_data ();
3e41d55f 941 val = ((0x00cf & val2) << 8) | ((0xcf00 & val) >> 8);
b4b4b794
KI
942 }
943
944 if (remote_debug)
945 fprintf_unfiltered (gdb_stdlog, "m32r_fetch_register(%d,0x%08lx)\n",
946 regno, val);
947
948 /* We got the number the register holds, but gdb expects to see a
949 value in the target byte ordering. */
950 store_unsigned_integer (buffer, 4, val);
56be3814 951 regcache_raw_supply (regcache, regno, buffer);
b4b4b794
KI
952 }
953 return;
954}
955
b4b4b794
KI
956/* Store register REGNO, or all if REGNO == 0.
957 Return errno value. */
958static void
28439f5e
PA
959m32r_store_register (struct target_ops *ops,
960 struct regcache *regcache, int regno)
b4b4b794
KI
961{
962 int regid;
963 ULONGEST regval, tmp;
b4b4b794
KI
964
965 if (regno == -1)
28439f5e
PA
966 {
967 for (regno = 0;
968 regno < gdbarch_num_regs (get_regcache_arch (regcache));
969 regno++)
970 m32r_store_register (ops, regcache, regno);
971 }
b4b4b794
KI
972 else
973 {
56be3814 974 regcache_cooked_read_unsigned (regcache, regno, &regval);
b4b4b794
KI
975 regid = get_reg_id (regno);
976
977 if (regid == SDI_REG_PSW)
978 {
979 unsigned long psw, bbpsw;
980
e22f895c
KI
981 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_PSW);
982 psw = recv_long_data ();
b4b4b794 983
e22f895c
KI
984 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
985 bbpsw = recv_long_data ();
b4b4b794 986
3e41d55f 987 tmp = (0x00cf & psw) | ((0x00cf & regval) << 8);
e22f895c 988 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PSW, tmp);
b4b4b794 989
3e41d55f 990 tmp = (0x0030 & bbpsw) | ((0xcf00 & regval) >> 8);
e22f895c 991 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BBPSW, tmp);
b4b4b794
KI
992 }
993 else
994 {
e22f895c 995 send_two_arg_cmd (SDI_WRITE_CPU_REG, regid, regval);
b4b4b794
KI
996 }
997
998 if (remote_debug)
999 fprintf_unfiltered (gdb_stdlog, "m32r_store_register(%d,0x%08lu)\n",
1000 regno, (unsigned long) regval);
1001 }
1002}
1003
1004/* Get ready to modify the registers array. On machines which store
1005 individual registers, this doesn't need to do anything. On machines
1006 which store all the registers in one fell swoop, this makes sure
1007 that registers contains all the registers from the program being
1008 debugged. */
1009
1010static void
316f2060 1011m32r_prepare_to_store (struct regcache *regcache)
b4b4b794
KI
1012{
1013 /* Do nothing, since we can store individual regs */
1014 if (remote_debug)
1015 fprintf_unfiltered (gdb_stdlog, "m32r_prepare_to_store()\n");
1016}
1017
1018static void
1019m32r_files_info (struct target_ops *target)
1020{
1021 char *file = "nothing";
1022
1023 if (exec_bfd)
1024 {
1025 file = bfd_get_filename (exec_bfd);
1026 printf_filtered ("\tAttached to %s running program %s\n",
1027 chip_name, file);
1028 }
1029}
1030
1031/* Read/Write memory. */
1032static int
16ac4ab5 1033m32r_xfer_memory (CORE_ADDR memaddr, gdb_byte *myaddr, int len,
b4b4b794
KI
1034 int write,
1035 struct mem_attrib *attrib, struct target_ops *target)
1036{
1037 unsigned long taddr;
1038 unsigned char buf[0x2000];
1039 int ret, c;
1040
1041 taddr = memaddr;
1042
1043 if (!mmu_on)
1044 {
1045 if ((taddr & 0xa0000000) == 0x80000000)
1046 taddr &= 0x7fffffff;
1047 }
1048
1049 if (remote_debug)
1050 {
1051 if (write)
ec20a626
UW
1052 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,write)\n",
1053 paddr (memaddr), len);
b4b4b794 1054 else
ec20a626
UW
1055 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,read)\n",
1056 paddr (memaddr), len);
b4b4b794
KI
1057 }
1058
1059 if (write)
1060 {
1061 buf[0] = SDI_WRITE_MEMORY;
1062 store_long_parameter (buf + 1, taddr);
1063 store_long_parameter (buf + 5, len);
1064 if (len < 0x1000)
1065 {
1066 memcpy (buf + 9, myaddr, len);
1067 ret = send_data (buf, len + 9) - 9;
1068 }
1069 else
1070 {
1071 if (serial_write (sdi_desc, buf, 9) != 0)
1072 {
1073 if (remote_debug)
1074 fprintf_unfiltered (gdb_stdlog,
1075 "m32r_xfer_memory() failed\n");
1076 return 0;
1077 }
1078 ret = send_data (myaddr, len);
1079 }
1080 }
1081 else
1082 {
1083 buf[0] = SDI_READ_MEMORY;
1084 store_long_parameter (buf + 1, taddr);
1085 store_long_parameter (buf + 5, len);
1086 if (serial_write (sdi_desc, buf, 9) != 0)
1087 {
1088 if (remote_debug)
1089 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1090 return 0;
1091 }
1092
1093 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1094 if (c < 0 || c == '-')
1095 {
1096 if (remote_debug)
1097 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1098 return 0;
1099 }
1100
1101 ret = recv_data (myaddr, len);
1102 }
1103
1104 if (ret <= 0)
1105 {
1106 if (remote_debug)
1107 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() fails\n");
1108 return 0;
1109 }
1110
1111 return ret;
1112}
1113
1114static void
7d85a9c0 1115m32r_kill (struct target_ops *ops)
b4b4b794
KI
1116{
1117 if (remote_debug)
1118 fprintf_unfiltered (gdb_stdlog, "m32r_kill()\n");
1119
1120 inferior_ptid = null_ptid;
e5ef4d75 1121 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1122
1123 return;
1124}
1125
1126/* Clean up when a program exits.
1127
1128 The program actually lives on in the remote processor's RAM, and may be
1129 run again without a download. Don't leave it full of breakpoint
1130 instructions. */
1131
1132static void
136d6dae 1133m32r_mourn_inferior (struct target_ops *ops)
b4b4b794
KI
1134{
1135 if (remote_debug)
1136 fprintf_unfiltered (gdb_stdlog, "m32r_mourn_inferior()\n");
1137
1138 remove_breakpoints ();
1139 generic_mourn_inferior ();
1140}
1141
1142static int
8181d85f 1143m32r_insert_breakpoint (struct bp_target_info *bp_tgt)
b4b4b794 1144{
8181d85f 1145 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1146 int ib_breakpoints;
1147 unsigned char buf[13];
1148 int i, c;
1149
1150 if (remote_debug)
ec20a626
UW
1151 fprintf_unfiltered (gdb_stdlog, "m32r_insert_breakpoint(%s,...)\n",
1152 paddr (addr));
b4b4b794
KI
1153
1154 if (use_ib_breakpoints)
1155 ib_breakpoints = max_ib_breakpoints;
1156 else
1157 ib_breakpoints = 0;
1158
1159 for (i = 0; i < MAX_BREAKPOINTS; i++)
1160 {
1161 if (bp_address[i] == 0xffffffff)
1162 {
1163 bp_address[i] = addr;
1164 if (i >= ib_breakpoints)
1165 {
1166 buf[0] = SDI_READ_MEMORY;
1167 if (mmu_on)
1168 store_long_parameter (buf + 1, addr & 0xfffffffc);
1169 else
1170 store_long_parameter (buf + 1, addr & 0x7ffffffc);
1171 store_long_parameter (buf + 5, 4);
1172 serial_write (sdi_desc, buf, 9);
1173 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1174 if (c != '-')
1175 recv_data (bp_data[i], 4);
1176 }
1177 return 0;
1178 }
1179 }
1180
8a3fe4f8 1181 error (_("Too many breakpoints"));
b4b4b794
KI
1182 return 1;
1183}
1184
1185static int
8181d85f 1186m32r_remove_breakpoint (struct bp_target_info *bp_tgt)
b4b4b794 1187{
8181d85f 1188 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1189 int i;
1190
1191 if (remote_debug)
ec20a626
UW
1192 fprintf_unfiltered (gdb_stdlog, "m32r_remove_breakpoint(%s)\n",
1193 paddr (addr));
b4b4b794
KI
1194
1195 for (i = 0; i < MAX_BREAKPOINTS; i++)
1196 {
1197 if (bp_address[i] == addr)
1198 {
1199 bp_address[i] = 0xffffffff;
1200 break;
1201 }
1202 }
1203
1204 return 0;
1205}
1206
1207static void
1208m32r_load (char *args, int from_tty)
1209{
1210 struct cleanup *old_chain;
1211 asection *section;
1212 bfd *pbfd;
1213 bfd_vma entry;
1214 char *filename;
1215 int quiet;
1216 int nostart;
2b71414d 1217 struct timeval start_time, end_time;
b4b4b794
KI
1218 unsigned long data_count; /* Number of bytes transferred to memory */
1219 int ret;
1220 static RETSIGTYPE (*prev_sigint) ();
1221
1222 /* for direct tcp connections, we can do a fast binary download */
1223 quiet = 0;
1224 nostart = 0;
1225 filename = NULL;
1226
1227 while (*args != '\000')
1228 {
1229 char *arg;
1230
1231 while (isspace (*args))
1232 args++;
1233
1234 arg = args;
1235
1236 while ((*args != '\000') && !isspace (*args))
1237 args++;
1238
1239 if (*args != '\000')
1240 *args++ = '\000';
1241
1242 if (*arg != '-')
1243 filename = arg;
1244 else if (strncmp (arg, "-quiet", strlen (arg)) == 0)
1245 quiet = 1;
1246 else if (strncmp (arg, "-nostart", strlen (arg)) == 0)
1247 nostart = 1;
1248 else
8a3fe4f8 1249 error (_("Unknown option `%s'"), arg);
b4b4b794
KI
1250 }
1251
1252 if (!filename)
1253 filename = get_exec_file (1);
1254
1255 pbfd = bfd_openr (filename, gnutarget);
1256 if (pbfd == NULL)
1257 {
1258 perror_with_name (filename);
1259 return;
1260 }
1261 old_chain = make_cleanup_bfd_close (pbfd);
1262
1263 if (!bfd_check_format (pbfd, bfd_object))
8a3fe4f8 1264 error (_("\"%s\" is not an object file: %s"), filename,
b4b4b794
KI
1265 bfd_errmsg (bfd_get_error ()));
1266
2b71414d 1267 gettimeofday (&start_time, NULL);
b4b4b794
KI
1268 data_count = 0;
1269
1270 interrupted = 0;
1271 prev_sigint = signal (SIGINT, gdb_cntrl_c);
1272
1273 for (section = pbfd->sections; section; section = section->next)
1274 {
1275 if (bfd_get_section_flags (pbfd, section) & SEC_LOAD)
1276 {
1277 bfd_vma section_address;
1278 bfd_size_type section_size;
1279 file_ptr fptr;
1280 int n;
1281
1282 section_address = bfd_section_lma (pbfd, section);
2c500098 1283 section_size = bfd_get_section_size (section);
b4b4b794
KI
1284
1285 if (!mmu_on)
1286 {
1287 if ((section_address & 0xa0000000) == 0x80000000)
1288 section_address &= 0x7fffffff;
1289 }
1290
1291 if (!quiet)
1292 printf_filtered ("[Loading section %s at 0x%lx (%d bytes)]\n",
1293 bfd_get_section_name (pbfd, section),
ec20a626
UW
1294 (unsigned long) section_address,
1295 (int) section_size);
b4b4b794
KI
1296
1297 fptr = 0;
1298
1299 data_count += section_size;
1300
1301 n = 0;
1302 while (section_size > 0)
1303 {
1304 char unsigned buf[0x1000 + 9];
1305 int count;
1306
1307 count = min (section_size, 0x1000);
1308
1309 buf[0] = SDI_WRITE_MEMORY;
1310 store_long_parameter (buf + 1, section_address);
1311 store_long_parameter (buf + 5, count);
1312
1313 bfd_get_section_contents (pbfd, section, buf + 9, fptr, count);
1314 if (send_data (buf, count + 9) <= 0)
8a3fe4f8 1315 error (_("Error while downloading %s section."),
b4b4b794
KI
1316 bfd_get_section_name (pbfd, section));
1317
1318 if (!quiet)
1319 {
1320 printf_unfiltered (".");
1321 if (n++ > 60)
1322 {
1323 printf_unfiltered ("\n");
1324 n = 0;
1325 }
1326 gdb_flush (gdb_stdout);
1327 }
1328
1329 section_address += count;
1330 fptr += count;
1331 section_size -= count;
1332
1333 if (interrupted)
1334 break;
1335 }
1336
1337 if (!quiet && !interrupted)
1338 {
1339 printf_unfiltered ("done.\n");
1340 gdb_flush (gdb_stdout);
1341 }
1342 }
1343
1344 if (interrupted)
1345 {
1346 printf_unfiltered ("Interrupted.\n");
1347 break;
1348 }
1349 }
1350
1351 interrupted = 0;
1352 signal (SIGINT, prev_sigint);
1353
2b71414d 1354 gettimeofday (&end_time, NULL);
b4b4b794
KI
1355
1356 /* Make the PC point at the start address */
1357 if (exec_bfd)
fb14de7b
UW
1358 regcache_write_pc (get_current_regcache (),
1359 bfd_get_start_address (exec_bfd));
b4b4b794
KI
1360
1361 inferior_ptid = null_ptid; /* No process now */
e5ef4d75 1362 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1363
1364 /* This is necessary because many things were based on the PC at the time
1365 that we attached to the monitor, which is no longer valid now that we
1366 have loaded new code (and just changed the PC). Another way to do this
1367 might be to call normal_stop, except that the stack may not be valid,
1368 and things would get horribly confused... */
1369
1370 clear_symtab_users ();
1371
1372 if (!nostart)
1373 {
1374 entry = bfd_get_start_address (pbfd);
1375
1376 if (!quiet)
ec20a626
UW
1377 printf_unfiltered ("[Starting %s at 0x%lx]\n", filename,
1378 (unsigned long) entry);
b4b4b794
KI
1379 }
1380
2b71414d
DJ
1381 print_transfer_performance (gdb_stdout, data_count, 0, &start_time,
1382 &end_time);
b4b4b794
KI
1383
1384 do_cleanups (old_chain);
1385}
1386
1387static void
f9c72d52 1388m32r_stop (ptid_t ptid)
b4b4b794 1389{
b4b4b794
KI
1390 if (remote_debug)
1391 fprintf_unfiltered (gdb_stdlog, "m32r_stop()\n");
1392
e22f895c 1393 send_cmd (SDI_STOP_CPU);
b4b4b794
KI
1394
1395 return;
1396}
1397
1398
37814c18
KI
1399/* Tell whether this target can support a hardware breakpoint. CNT
1400 is the number of hardware breakpoints already installed. This
d92524f1 1401 implements the target_can_use_hardware_watchpoint macro. */
b4b4b794 1402
63807e1d 1403static int
37814c18 1404m32r_can_use_hw_watchpoint (int type, int cnt, int othertype)
b4b4b794 1405{
37814c18 1406 return sdi_desc != NULL && cnt < max_access_breaks;
b4b4b794
KI
1407}
1408
1409/* Set a data watchpoint. ADDR and LEN should be obvious. TYPE is 0
1410 for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
1411 watchpoint. */
1412
63807e1d 1413static int
37814c18 1414m32r_insert_watchpoint (CORE_ADDR addr, int len, int type)
b4b4b794
KI
1415{
1416 int i;
1417
1418 if (remote_debug)
ec20a626
UW
1419 fprintf_unfiltered (gdb_stdlog, "m32r_insert_watchpoint(%s,%d,%d)\n",
1420 paddr (addr), len, type);
b4b4b794
KI
1421
1422 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1423 {
1424 if (ab_address[i] == 0x00000000)
1425 {
1426 ab_address[i] = addr;
1427 ab_size[i] = len;
1428 ab_type[i] = type;
1429 return 0;
1430 }
1431 }
1432
8a3fe4f8 1433 error (_("Too many watchpoints"));
b4b4b794
KI
1434 return 1;
1435}
1436
63807e1d 1437static int
b4b4b794
KI
1438m32r_remove_watchpoint (CORE_ADDR addr, int len, int type)
1439{
1440 int i;
1441
1442 if (remote_debug)
ec20a626
UW
1443 fprintf_unfiltered (gdb_stdlog, "m32r_remove_watchpoint(%s,%d,%d)\n",
1444 paddr (addr), len, type);
b4b4b794
KI
1445
1446 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1447 {
1448 if (ab_address[i] == addr)
1449 {
1450 ab_address[i] = 0x00000000;
1451 break;
1452 }
1453 }
1454
1455 return 0;
1456}
1457
63807e1d 1458static int
4aa7a7f5 1459m32r_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
b4b4b794 1460{
4aa7a7f5
JJ
1461 int rc = 0;
1462 if (hit_watchpoint_addr != 0x00000000)
1463 {
1464 *addr_p = hit_watchpoint_addr;
1465 rc = 1;
1466 }
1467 return rc;
b4b4b794
KI
1468}
1469
63807e1d 1470static int
b4b4b794
KI
1471m32r_stopped_by_watchpoint (void)
1472{
4aa7a7f5
JJ
1473 CORE_ADDR addr;
1474 return m32r_stopped_data_address (&current_target, &addr);
b4b4b794
KI
1475}
1476
4d6c6261
PA
1477/* Check to see if a thread is still alive. */
1478
1479static int
28439f5e 1480m32r_thread_alive (struct target_ops *ops, ptid_t ptid)
4d6c6261
PA
1481{
1482 if (ptid_equal (ptid, remote_m32r_ptid))
1483 /* The main task is always alive. */
1484 return 1;
1485
1486 return 0;
1487}
1488
1489/* Convert a thread ID to a string. Returns the string in a static
1490 buffer. */
1491
1492static char *
117de6a9 1493m32r_pid_to_str (struct target_ops *ops, ptid_t ptid)
4d6c6261
PA
1494{
1495 static char buf[64];
1496
1497 if (ptid_equal (remote_m32r_ptid, ptid))
1498 {
1499 xsnprintf (buf, sizeof buf, "Thread <main>");
1500 return buf;
1501 }
1502
1503 return normal_pid_to_str (ptid);
1504}
b4b4b794
KI
1505
1506static void
1507sdireset_command (char *args, int from_tty)
1508{
b4b4b794
KI
1509 if (remote_debug)
1510 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1511
e22f895c 1512 send_cmd (SDI_OPEN);
b4b4b794
KI
1513
1514 inferior_ptid = null_ptid;
e5ef4d75 1515 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1516}
1517
1518
1519static void
1520sdistatus_command (char *args, int from_tty)
1521{
1522 unsigned char buf[4096];
1523 int i, c;
1524
1525 if (remote_debug)
1526 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1527
1528 if (!sdi_desc)
1529 return;
1530
e22f895c 1531 send_cmd (SDI_STATUS);
b4b4b794
KI
1532 for (i = 0; i < 4096; i++)
1533 {
1534 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1535 if (c < 0)
717eb1cf 1536 return;
b4b4b794
KI
1537 buf[i] = c;
1538 if (c == 0)
717eb1cf
AC
1539 break;
1540 }
b4b4b794
KI
1541
1542 printf_filtered ("%s", buf);
1543}
1544
1545
1546static void
1547debug_chaos_command (char *args, int from_tty)
1548{
1549 unsigned char buf[3];
1550
1551 buf[0] = SDI_SET_ATTR;
1552 buf[1] = SDI_ATTR_CACHE;
1553 buf[2] = SDI_CACHE_TYPE_CHAOS;
1554 send_data (buf, 3);
1555}
1556
1557
1558static void
1559use_debug_dma_command (char *args, int from_tty)
1560{
1561 unsigned char buf[3];
1562
1563 buf[0] = SDI_SET_ATTR;
1564 buf[1] = SDI_ATTR_MEM_ACCESS;
1565 buf[2] = SDI_MEM_ACCESS_DEBUG_DMA;
1566 send_data (buf, 3);
1567}
1568
1569static void
1570use_mon_code_command (char *args, int from_tty)
1571{
1572 unsigned char buf[3];
1573
1574 buf[0] = SDI_SET_ATTR;
1575 buf[1] = SDI_ATTR_MEM_ACCESS;
1576 buf[2] = SDI_MEM_ACCESS_MON_CODE;
1577 send_data (buf, 3);
1578}
1579
1580
1581static void
1582use_ib_breakpoints_command (char *args, int from_tty)
1583{
1584 use_ib_breakpoints = 1;
1585}
1586
1587static void
1588use_dbt_breakpoints_command (char *args, int from_tty)
1589{
1590 use_ib_breakpoints = 0;
1591}
1592
c35b1492
PA
1593static int
1594m32r_return_one (struct target_ops *target)
1595{
1596 return 1;
1597}
b4b4b794
KI
1598
1599/* Define the target subroutine names */
1600
1601struct target_ops m32r_ops;
1602
1603static void
1604init_m32r_ops (void)
1605{
1606 m32r_ops.to_shortname = "m32rsdi";
1607 m32r_ops.to_longname = "Remote M32R debugging over SDI interface";
1608 m32r_ops.to_doc = "Use an M32R board using SDI debugging protocol.";
1609 m32r_ops.to_open = m32r_open;
1610 m32r_ops.to_close = m32r_close;
1611 m32r_ops.to_detach = m32r_detach;
1612 m32r_ops.to_resume = m32r_resume;
1613 m32r_ops.to_wait = m32r_wait;
1614 m32r_ops.to_fetch_registers = m32r_fetch_register;
1615 m32r_ops.to_store_registers = m32r_store_register;
1616 m32r_ops.to_prepare_to_store = m32r_prepare_to_store;
c8e73a31 1617 m32r_ops.deprecated_xfer_memory = m32r_xfer_memory;
b4b4b794
KI
1618 m32r_ops.to_files_info = m32r_files_info;
1619 m32r_ops.to_insert_breakpoint = m32r_insert_breakpoint;
1620 m32r_ops.to_remove_breakpoint = m32r_remove_breakpoint;
37814c18
KI
1621 m32r_ops.to_can_use_hw_breakpoint = m32r_can_use_hw_watchpoint;
1622 m32r_ops.to_insert_watchpoint = m32r_insert_watchpoint;
1623 m32r_ops.to_remove_watchpoint = m32r_remove_watchpoint;
1624 m32r_ops.to_stopped_by_watchpoint = m32r_stopped_by_watchpoint;
1625 m32r_ops.to_stopped_data_address = m32r_stopped_data_address;
b4b4b794
KI
1626 m32r_ops.to_kill = m32r_kill;
1627 m32r_ops.to_load = m32r_load;
1628 m32r_ops.to_create_inferior = m32r_create_inferior;
1629 m32r_ops.to_mourn_inferior = m32r_mourn_inferior;
1630 m32r_ops.to_stop = m32r_stop;
49d03eab 1631 m32r_ops.to_log_command = serial_log_command;
4d6c6261
PA
1632 m32r_ops.to_thread_alive = m32r_thread_alive;
1633 m32r_ops.to_pid_to_str = m32r_pid_to_str;
b4b4b794 1634 m32r_ops.to_stratum = process_stratum;
c35b1492
PA
1635 m32r_ops.to_has_all_memory = m32r_return_one;
1636 m32r_ops.to_has_memory = m32r_return_one;
1637 m32r_ops.to_has_stack = m32r_return_one;
1638 m32r_ops.to_has_registers = m32r_return_one;
1639 m32r_ops.to_has_execution = m32r_return_one;
b4b4b794
KI
1640 m32r_ops.to_magic = OPS_MAGIC;
1641};
1642
1643
1644extern initialize_file_ftype _initialize_remote_m32r;
1645
1646void
1647_initialize_remote_m32r (void)
1648{
1649 int i;
1650
1651 init_m32r_ops ();
1652
1653 /* Initialize breakpoints. */
1654 for (i = 0; i < MAX_BREAKPOINTS; i++)
1655 bp_address[i] = 0xffffffff;
1656
1657 /* Initialize access breaks. */
1658 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1659 ab_address[i] = 0x00000000;
1660
1661 add_target (&m32r_ops);
1662
1663 add_com ("sdireset", class_obscure, sdireset_command,
1bedd215 1664 _("Reset SDI connection."));
b4b4b794
KI
1665
1666 add_com ("sdistatus", class_obscure, sdistatus_command,
1bedd215 1667 _("Show status of SDI connection."));
b4b4b794
KI
1668
1669 add_com ("debug_chaos", class_obscure, debug_chaos_command,
1bedd215 1670 _("Debug M32R/Chaos."));
b4b4b794
KI
1671
1672 add_com ("use_debug_dma", class_obscure, use_debug_dma_command,
1bedd215 1673 _("Use debug DMA mem access."));
b4b4b794 1674 add_com ("use_mon_code", class_obscure, use_mon_code_command,
1bedd215 1675 _("Use mon code mem access."));
b4b4b794
KI
1676
1677 add_com ("use_ib_break", class_obscure, use_ib_breakpoints_command,
1bedd215 1678 _("Set breakpoints by IB break."));
b4b4b794 1679 add_com ("use_dbt_break", class_obscure, use_dbt_breakpoints_command,
1bedd215 1680 _("Set breakpoints by dbt."));
e5ef4d75
PA
1681
1682 /* Yes, 42000 is arbitrary. The only sense out of it, is that it
1683 isn't 0. */
1684 remote_m32r_ptid = ptid_build (42000, 0, 42000);
b4b4b794 1685}
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