* gdbarch.sh (target_gdbarch): Remove macro.
[deliverable/binutils-gdb.git] / gdb / remote-m32r-sdi.c
CommitLineData
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1/* Remote debugging interface for M32R/SDI.
2
0b302171 3 Copyright (C) 2003-2012 Free Software Foundation, Inc.
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4
5 Contributed by Renesas Technology Co.
6 Written by Kei Sakamoto <sakamoto.kei@renesas.com>.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
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13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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22
23#include "defs.h"
24#include "gdbcmd.h"
25#include "gdbcore.h"
26#include "inferior.h"
27#include "target.h"
28#include "regcache.h"
29#include "gdb_string.h"
e5ef4d75 30#include "gdbthread.h"
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31#include <ctype.h>
32#include <signal.h>
cbba9205 33#ifdef __MINGW32__
b467f580 34#include <winsock2.h>
cbba9205 35#else
b4b4b794 36#include <netinet/in.h>
cbba9205 37#endif
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38#include <sys/types.h>
39#include <sys/time.h>
40#include <signal.h>
41#include <time.h>
cbb099e8 42#include "gdb_bfd.h"
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43
44
45#include "serial.h"
46
47/* Descriptor for I/O to remote machine. */
48
49static struct serial *sdi_desc = NULL;
50
51#define SDI_TIMEOUT 30
52
53
54#define SDIPORT 3232
55
56static char chip_name[64];
57
58static int step_mode;
59static unsigned long last_pc_addr = 0xffffffff;
60static unsigned char last_pc_addr_data[2];
61
62static int mmu_on = 0;
63
64static int use_ib_breakpoints = 1;
65
66#define MAX_BREAKPOINTS 1024
67static int max_ib_breakpoints;
68static unsigned long bp_address[MAX_BREAKPOINTS];
69static unsigned char bp_data[MAX_BREAKPOINTS][4];
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70
71/* dbt -> nop */
72static const unsigned char dbt_bp_entry[] = {
73 0x10, 0xe0, 0x70, 0x00
74};
75
76#define MAX_ACCESS_BREAKS 4
77static int max_access_breaks;
78static unsigned long ab_address[MAX_ACCESS_BREAKS];
79static unsigned int ab_type[MAX_ACCESS_BREAKS];
80static unsigned int ab_size[MAX_ACCESS_BREAKS];
81static CORE_ADDR hit_watchpoint_addr = 0;
82
83static int interrupted = 0;
84
85/* Forward data declarations */
86extern struct target_ops m32r_ops;
87
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88/* This is the ptid we use while we're connected to the remote. Its
89 value is arbitrary, as the target doesn't have a notion of
90 processes or threads, but we need something non-null to place in
91 inferior_ptid. */
92static ptid_t remote_m32r_ptid;
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93
94/* Commands */
95#define SDI_OPEN 1
96#define SDI_CLOSE 2
97#define SDI_RELEASE 3
98#define SDI_READ_CPU_REG 4
99#define SDI_WRITE_CPU_REG 5
100#define SDI_READ_MEMORY 6
101#define SDI_WRITE_MEMORY 7
102#define SDI_EXEC_CPU 8
103#define SDI_STOP_CPU 9
104#define SDI_WAIT_FOR_READY 10
105#define SDI_GET_ATTR 11
106#define SDI_SET_ATTR 12
107#define SDI_STATUS 13
108
109/* Attributes */
110#define SDI_ATTR_NAME 1
111#define SDI_ATTR_BRK 2
112#define SDI_ATTR_ABRK 3
113#define SDI_ATTR_CACHE 4
114#define SDI_CACHE_TYPE_M32102 0
115#define SDI_CACHE_TYPE_CHAOS 1
116#define SDI_ATTR_MEM_ACCESS 5
117#define SDI_MEM_ACCESS_DEBUG_DMA 0
118#define SDI_MEM_ACCESS_MON_CODE 1
119
120/* Registers */
121#define SDI_REG_R0 0
122#define SDI_REG_R1 1
123#define SDI_REG_R2 2
124#define SDI_REG_R3 3
125#define SDI_REG_R4 4
126#define SDI_REG_R5 5
127#define SDI_REG_R6 6
128#define SDI_REG_R7 7
129#define SDI_REG_R8 8
130#define SDI_REG_R9 9
131#define SDI_REG_R10 10
132#define SDI_REG_R11 11
133#define SDI_REG_R12 12
134#define SDI_REG_FP 13
135#define SDI_REG_LR 14
136#define SDI_REG_SP 15
137#define SDI_REG_PSW 16
138#define SDI_REG_CBR 17
139#define SDI_REG_SPI 18
140#define SDI_REG_SPU 19
141#define SDI_REG_CR4 20
142#define SDI_REG_EVB 21
143#define SDI_REG_BPC 22
144#define SDI_REG_CR7 23
145#define SDI_REG_BBPSW 24
146#define SDI_REG_CR9 25
147#define SDI_REG_CR10 26
148#define SDI_REG_CR11 27
149#define SDI_REG_CR12 28
150#define SDI_REG_WR 29
151#define SDI_REG_BBPC 30
152#define SDI_REG_PBP 31
153#define SDI_REG_ACCH 32
154#define SDI_REG_ACCL 33
155#define SDI_REG_ACC1H 34
156#define SDI_REG_ACC1L 35
157
158
0df8b418 159/* Low level communication functions. */
b4b4b794 160
0df8b418 161/* Check an ack packet from the target. */
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162static int
163get_ack (void)
164{
165 int c;
166
717eb1cf 167 if (!sdi_desc)
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168 return -1;
169
170 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
171
172 if (c < 0)
173 return -1;
174
717eb1cf 175 if (c != '+') /* error */
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176 return -1;
177
178 return 0;
179}
180
0df8b418 181/* Send data to the target and check an ack packet. */
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182static int
183send_data (void *buf, int len)
184{
717eb1cf 185 if (!sdi_desc)
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186 return -1;
187
188 if (serial_write (sdi_desc, buf, len) != 0)
189 return -1;
190
191 if (get_ack () == -1)
192 return -1;
193
194 return len;
195}
196
0df8b418 197/* Receive data from the target. */
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198static int
199recv_data (void *buf, int len)
200{
201 int total = 0;
202 int c;
203
717eb1cf 204 if (!sdi_desc)
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205 return -1;
206
207 while (total < len)
208 {
209 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
210
211 if (c < 0)
212 return -1;
213
214 ((unsigned char *) buf)[total++] = c;
215 }
216
217 return len;
218}
219
0df8b418 220/* Store unsigned long parameter on packet. */
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221static void
222store_long_parameter (void *buf, long val)
223{
224 val = htonl (val);
225 memcpy (buf, &val, 4);
226}
227
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228static int
229send_cmd (unsigned char cmd)
230{
231 unsigned char buf[1];
123f5f96 232
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233 buf[0] = cmd;
234 return send_data (buf, 1);
235}
236
237static int
238send_one_arg_cmd (unsigned char cmd, unsigned char arg1)
239{
240 unsigned char buf[2];
123f5f96 241
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242 buf[0] = cmd;
243 buf[1] = arg1;
244 return send_data (buf, 2);
245}
246
247static int
248send_two_arg_cmd (unsigned char cmd, unsigned char arg1, unsigned long arg2)
249{
250 unsigned char buf[6];
123f5f96 251
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252 buf[0] = cmd;
253 buf[1] = arg1;
254 store_long_parameter (buf + 2, arg2);
255 return send_data (buf, 6);
256}
257
258static int
259send_three_arg_cmd (unsigned char cmd, unsigned long arg1, unsigned long arg2,
260 unsigned long arg3)
261{
262 unsigned char buf[13];
123f5f96 263
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264 buf[0] = cmd;
265 store_long_parameter (buf + 1, arg1);
266 store_long_parameter (buf + 5, arg2);
267 store_long_parameter (buf + 9, arg3);
268 return send_data (buf, 13);
269}
270
271static unsigned char
272recv_char_data (void)
273{
274 unsigned char val;
123f5f96 275
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276 recv_data (&val, 1);
277 return val;
278}
279
280static unsigned long
281recv_long_data (void)
282{
283 unsigned long val;
123f5f96 284
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285 recv_data (&val, 4);
286 return ntohl (val);
287}
288
289
0df8b418 290/* Check if MMU is on. */
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291static void
292check_mmu_status (void)
293{
294 unsigned long val;
b4b4b794 295
0df8b418 296 /* Read PC address. */
e22f895c 297 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC) == -1)
b4b4b794 298 return;
e22f895c 299 val = recv_long_data ();
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300 if ((val & 0xc0000000) == 0x80000000)
301 {
302 mmu_on = 1;
303 return;
304 }
305
0df8b418 306 /* Read EVB address. */
e22f895c 307 if (send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_EVB) == -1)
b4b4b794 308 return;
e22f895c 309 val = recv_long_data ();
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310 if ((val & 0xc0000000) == 0x80000000)
311 {
312 mmu_on = 1;
313 return;
314 }
315
316 mmu_on = 0;
317}
318
319
320/* This is called not only when we first attach, but also when the
321 user types "run" after having attached. */
322static void
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323m32r_create_inferior (struct target_ops *ops, char *execfile,
324 char *args, char **env, int from_tty)
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325{
326 CORE_ADDR entry_pt;
327
328 if (args && *args)
8a3fe4f8 329 error (_("Cannot pass arguments to remote STDEBUG process"));
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330
331 if (execfile == 0 || exec_bfd == 0)
8a3fe4f8 332 error (_("No executable file specified"));
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333
334 if (remote_debug)
335 fprintf_unfiltered (gdb_stdlog, "m32r_create_inferior(%s,%s)\n", execfile,
336 args);
337
338 entry_pt = bfd_get_start_address (exec_bfd);
339
340 /* The "process" (board) is already stopped awaiting our commands, and
341 the program is already downloaded. We just set its PC and go. */
342
343 clear_proceed_status ();
344
345 /* Tell wait_for_inferior that we've started a new process. */
346 init_wait_for_inferior ();
347
348 /* Set up the "saved terminal modes" of the inferior
349 based on what modes we are starting it with. */
350 target_terminal_init ();
351
352 /* Install inferior's terminal modes. */
353 target_terminal_inferior ();
354
fb14de7b 355 regcache_write_pc (get_current_regcache (), entry_pt);
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356}
357
358/* Open a connection to a remote debugger.
359 NAME is the filename used for communication. */
360
361static void
362m32r_open (char *args, int from_tty)
363{
364 struct hostent *host_ent;
365 struct sockaddr_in server_addr;
366 char *port_str, hostname[256];
367 int port;
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368 int i, n;
369 int yes = 1;
370
371 if (remote_debug)
372 fprintf_unfiltered (gdb_stdlog, "m32r_open(%d)\n", from_tty);
373
374 target_preopen (from_tty);
375
376 push_target (&m32r_ops);
377
378 if (args == NULL)
379 sprintf (hostname, "localhost:%d", SDIPORT);
380 else
381 {
382 port_str = strchr (args, ':');
383 if (port_str == NULL)
717eb1cf 384 sprintf (hostname, "%s:%d", args, SDIPORT);
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385 else
386 strcpy (hostname, args);
387 }
388
389 sdi_desc = serial_open (hostname);
390 if (!sdi_desc)
8a3fe4f8 391 error (_("Connection refused."));
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392
393 if (get_ack () == -1)
8a3fe4f8 394 error (_("Cannot connect to SDI target."));
b4b4b794 395
e22f895c 396 if (send_cmd (SDI_OPEN) == -1)
8a3fe4f8 397 error (_("Cannot connect to SDI target."));
b4b4b794 398
0df8b418 399 /* Get maximum number of ib breakpoints. */
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400 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_BRK);
401 max_ib_breakpoints = recv_char_data ();
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402 if (remote_debug)
403 printf_filtered ("Max IB Breakpoints = %d\n", max_ib_breakpoints);
404
0df8b418 405 /* Initialize breakpoints. */
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406 for (i = 0; i < MAX_BREAKPOINTS; i++)
407 bp_address[i] = 0xffffffff;
408
0df8b418 409 /* Get maximum number of access breaks. */
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410 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_ABRK);
411 max_access_breaks = recv_char_data ();
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412 if (remote_debug)
413 printf_filtered ("Max Access Breaks = %d\n", max_access_breaks);
414
0df8b418 415 /* Initialize access breask. */
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416 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
417 ab_address[i] = 0x00000000;
418
419 check_mmu_status ();
420
0df8b418 421 /* Get the name of chip on target board. */
e22f895c 422 send_one_arg_cmd (SDI_GET_ATTR, SDI_ATTR_NAME);
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423 recv_data (chip_name, 64);
424
425 if (from_tty)
426 printf_filtered ("Remote %s connected to %s\n", target_shortname,
427 chip_name);
428}
429
0df8b418 430/* Close out all files and local state before this target loses control. */
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431
432static void
433m32r_close (int quitting)
434{
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435 if (remote_debug)
436 fprintf_unfiltered (gdb_stdlog, "m32r_close(%d)\n", quitting);
437
438 if (sdi_desc)
439 {
e22f895c 440 send_cmd (SDI_CLOSE);
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441 serial_close (sdi_desc);
442 sdi_desc = NULL;
443 }
444
445 inferior_ptid = null_ptid;
e5ef4d75 446 delete_thread_silent (remote_m32r_ptid);
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447 return;
448}
449
450/* Tell the remote machine to resume. */
451
452static void
28439f5e 453m32r_resume (struct target_ops *ops,
2ea28649 454 ptid_t ptid, int step, enum gdb_signal sig)
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455{
456 unsigned long pc_addr, bp_addr, ab_addr;
e22f895c 457 int ib_breakpoints;
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458 unsigned char buf[13];
459 int i;
460
461 if (remote_debug)
462 {
463 if (step)
464 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(step)\n");
465 else
466 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(cont)\n");
467 }
468
469 check_mmu_status ();
470
fb14de7b 471 pc_addr = regcache_read_pc (get_current_regcache ());
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472 if (remote_debug)
473 fprintf_unfiltered (gdb_stdlog, "pc <= 0x%lx\n", pc_addr);
474
475 /* At pc address there is a parallel instruction with +2 offset,
0df8b418 476 so we have to make it a serial instruction or avoid it. */
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477 if (pc_addr == last_pc_addr)
478 {
0df8b418 479 /* Avoid a parallel nop. */
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480 if (last_pc_addr_data[0] == 0xf0 && last_pc_addr_data[1] == 0x00)
481 {
482 pc_addr += 2;
0df8b418 483 /* Now we can forget this instruction. */
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484 last_pc_addr = 0xffffffff;
485 }
0df8b418 486 /* Clear a parallel bit. */
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487 else
488 {
489 buf[0] = SDI_WRITE_MEMORY;
f5656ead 490 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
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491 store_long_parameter (buf + 1, pc_addr);
492 else
493 store_long_parameter (buf + 1, pc_addr - 1);
494 store_long_parameter (buf + 5, 1);
495 buf[9] = last_pc_addr_data[0] & 0x7f;
496 send_data (buf, 10);
497 }
498 }
499
0df8b418 500 /* Set PC. */
e22f895c 501 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
b4b4b794 502
0df8b418 503 /* step mode. */
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504 step_mode = step;
505 if (step)
506 {
0df8b418 507 /* Set PBP. */
e22f895c 508 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, pc_addr | 1);
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509 }
510 else
511 {
0df8b418 512 /* Unset PBP. */
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513 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PBP, 0x00000000);
514 }
515
516 if (use_ib_breakpoints)
517 ib_breakpoints = max_ib_breakpoints;
518 else
519 ib_breakpoints = 0;
520
0df8b418 521 /* Set ib breakpoints. */
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522 for (i = 0; i < ib_breakpoints; i++)
523 {
524 bp_addr = bp_address[i];
b4b4b794 525
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526 if (bp_addr == 0xffffffff)
527 continue;
528
0df8b418 529 /* Set PBP. */
f5656ead 530 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
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531 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
532 0x00000006);
b4b4b794 533 else
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534 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
535 0x06000000);
536
537 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8080 + 4 * i, 4, bp_addr);
538 }
539
0df8b418 540 /* Set dbt breakpoints. */
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541 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
542 {
543 bp_addr = bp_address[i];
544
545 if (bp_addr == 0xffffffff)
546 continue;
547
548 if (!mmu_on)
549 bp_addr &= 0x7fffffff;
b4b4b794 550
0df8b418 551 /* Write DBT instruction. */
e22f895c 552 buf[0] = SDI_WRITE_MEMORY;
492e5c6b 553 store_long_parameter (buf + 1, (bp_addr & 0xfffffffc));
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554 store_long_parameter (buf + 5, 4);
555 if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc))
b4b4b794 556 {
f5656ead 557 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
b4b4b794 558 {
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559 buf[9] = dbt_bp_entry[0];
560 buf[10] = dbt_bp_entry[1];
561 buf[11] = dbt_bp_entry[2];
562 buf[12] = dbt_bp_entry[3];
563 }
564 else
565 {
566 buf[9] = dbt_bp_entry[3];
567 buf[10] = dbt_bp_entry[2];
568 buf[11] = dbt_bp_entry[1];
569 buf[12] = dbt_bp_entry[0];
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570 }
571 }
e22f895c 572 else
b4b4b794 573 {
f5656ead 574 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
b4b4b794 575 {
e22f895c 576 if ((bp_addr & 2) == 0)
b4b4b794 577 {
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578 buf[9] = dbt_bp_entry[0];
579 buf[10] = dbt_bp_entry[1];
580 buf[11] = bp_data[i][2] & 0x7f;
581 buf[12] = bp_data[i][3];
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582 }
583 else
584 {
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585 buf[9] = bp_data[i][0];
586 buf[10] = bp_data[i][1];
587 buf[11] = dbt_bp_entry[0];
588 buf[12] = dbt_bp_entry[1];
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589 }
590 }
e22f895c 591 else
b4b4b794 592 {
e22f895c 593 if ((bp_addr & 2) == 0)
b4b4b794 594 {
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595 buf[9] = bp_data[i][0];
596 buf[10] = bp_data[i][1] & 0x7f;
597 buf[11] = dbt_bp_entry[1];
598 buf[12] = dbt_bp_entry[0];
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599 }
600 else
601 {
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602 buf[9] = dbt_bp_entry[1];
603 buf[10] = dbt_bp_entry[0];
604 buf[11] = bp_data[i][2];
605 buf[12] = bp_data[i][3];
b4b4b794 606 }
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607 }
608 }
609 send_data (buf, 13);
610 }
b4b4b794 611
0df8b418 612 /* Set access breaks. */
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613 for (i = 0; i < max_access_breaks; i++)
614 {
615 ab_addr = ab_address[i];
b4b4b794 616
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617 if (ab_addr == 0x00000000)
618 continue;
b4b4b794 619
0df8b418 620 /* DBC register. */
f5656ead 621 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
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622 {
623 switch (ab_type[i])
624 {
625 case 0: /* write watch */
626 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
627 0x00000086);
628 break;
629 case 1: /* read watch */
630 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
631 0x00000046);
632 break;
633 case 2: /* access watch */
634 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
635 0x00000006);
636 break;
637 }
638 }
639 else
640 {
641 switch (ab_type[i])
642 {
643 case 0: /* write watch */
644 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
645 0x86000000);
646 break;
647 case 1: /* read watch */
648 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
649 0x46000000);
650 break;
651 case 2: /* access watch */
652 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
653 0x06000000);
654 break;
b4b4b794
KI
655 }
656 }
657
0df8b418 658 /* DBAH register. */
e22f895c
KI
659 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8180 + 4 * i, 4, ab_addr);
660
0df8b418 661 /* DBAL register. */
e22f895c
KI
662 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8200 + 4 * i, 4,
663 0xffffffff);
664
0df8b418 665 /* DBD register. */
e22f895c
KI
666 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8280 + 4 * i, 4,
667 0x00000000);
668
0df8b418 669 /* DBDM register. */
e22f895c
KI
670 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8300 + 4 * i, 4,
671 0x00000000);
b4b4b794
KI
672 }
673
0df8b418 674 /* Resume program. */
e22f895c 675 send_cmd (SDI_EXEC_CPU);
b4b4b794
KI
676
677 /* Without this, some commands which require an active target (such as kill)
678 won't work. This variable serves (at least) double duty as both the pid
679 of the target process (if it has such), and as a flag indicating that a
680 target is active. These functions should be split out into seperate
681 variables, especially since GDB will someday have a notion of debugging
682 several processes. */
e5ef4d75
PA
683 inferior_ptid = remote_m32r_ptid;
684 add_thread_silent (remote_m32r_ptid);
b4b4b794
KI
685
686 return;
687}
688
689/* Wait until the remote machine stops, then return,
690 storing status in STATUS just as `wait' would. */
691
692static void
693gdb_cntrl_c (int signo)
694{
695 if (remote_debug)
696 fprintf_unfiltered (gdb_stdlog, "interrupt\n");
697 interrupted = 1;
698}
699
700static ptid_t
117de6a9 701m32r_wait (struct target_ops *ops,
61439e34 702 ptid_t ptid, struct target_waitstatus *status, int options)
b4b4b794
KI
703{
704 static RETSIGTYPE (*prev_sigint) ();
705 unsigned long bp_addr, pc_addr;
e22f895c 706 int ib_breakpoints;
b4b4b794
KI
707 long i;
708 unsigned char buf[13];
b4b4b794
KI
709 int ret, c;
710
711 if (remote_debug)
712 fprintf_unfiltered (gdb_stdlog, "m32r_wait()\n");
713
714 status->kind = TARGET_WAITKIND_EXITED;
a493e3e2 715 status->value.sig = GDB_SIGNAL_0;
b4b4b794
KI
716
717 interrupted = 0;
718 prev_sigint = signal (SIGINT, gdb_cntrl_c);
719
0df8b418 720 /* Wait for ready. */
b4b4b794
KI
721 buf[0] = SDI_WAIT_FOR_READY;
722 if (serial_write (sdi_desc, buf, 1) != 0)
8a3fe4f8 723 error (_("Remote connection closed"));
b4b4b794
KI
724
725 while (1)
726 {
727 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
728 if (c < 0)
8a3fe4f8 729 error (_("Remote connection closed"));
b4b4b794 730
717eb1cf 731 if (c == '-') /* error */
b4b4b794
KI
732 {
733 status->kind = TARGET_WAITKIND_STOPPED;
a493e3e2 734 status->value.sig = GDB_SIGNAL_HUP;
b4b4b794
KI
735 return inferior_ptid;
736 }
737 else if (c == '+') /* stopped */
738 break;
739
740 if (interrupted)
741 ret = serial_write (sdi_desc, "!", 1); /* packet to interrupt */
742 else
743 ret = serial_write (sdi_desc, ".", 1); /* packet to wait */
744 if (ret != 0)
8a3fe4f8 745 error (_("Remote connection closed"));
b4b4b794
KI
746 }
747
748 status->kind = TARGET_WAITKIND_STOPPED;
749 if (interrupted)
a493e3e2 750 status->value.sig = GDB_SIGNAL_INT;
b4b4b794 751 else
a493e3e2 752 status->value.sig = GDB_SIGNAL_TRAP;
b4b4b794
KI
753
754 interrupted = 0;
755 signal (SIGINT, prev_sigint);
756
757 check_mmu_status ();
758
0df8b418 759 /* Recover parallel bit. */
b4b4b794
KI
760 if (last_pc_addr != 0xffffffff)
761 {
762 buf[0] = SDI_WRITE_MEMORY;
f5656ead 763 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
b4b4b794
KI
764 store_long_parameter (buf + 1, last_pc_addr);
765 else
766 store_long_parameter (buf + 1, last_pc_addr - 1);
767 store_long_parameter (buf + 5, 1);
768 buf[9] = last_pc_addr_data[0];
769 send_data (buf, 10);
770 last_pc_addr = 0xffffffff;
771 }
772
e22f895c
KI
773 if (use_ib_breakpoints)
774 ib_breakpoints = max_ib_breakpoints;
775 else
776 ib_breakpoints = 0;
b4b4b794 777
0df8b418 778 /* Set back pc by 2 if m32r is stopped with dbt. */
e22f895c
KI
779 last_pc_addr = 0xffffffff;
780 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BPC);
781 pc_addr = recv_long_data () - 2;
782 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
783 {
784 if (pc_addr == bp_address[i])
b4b4b794 785 {
e22f895c
KI
786 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BPC, pc_addr);
787
788 /* If there is a parallel instruction with +2 offset at pc
0df8b418 789 address, we have to take care of it later. */
e22f895c 790 if ((pc_addr & 0x2) != 0)
b4b4b794 791 {
f5656ead 792 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
b4b4b794 793 {
e22f895c 794 if ((bp_data[i][2] & 0x80) != 0)
b4b4b794 795 {
e22f895c
KI
796 last_pc_addr = pc_addr;
797 last_pc_addr_data[0] = bp_data[i][2];
798 last_pc_addr_data[1] = bp_data[i][3];
b4b4b794 799 }
e22f895c
KI
800 }
801 else
802 {
803 if ((bp_data[i][1] & 0x80) != 0)
b4b4b794 804 {
e22f895c
KI
805 last_pc_addr = pc_addr;
806 last_pc_addr_data[0] = bp_data[i][1];
807 last_pc_addr_data[1] = bp_data[i][0];
b4b4b794
KI
808 }
809 }
b4b4b794 810 }
e22f895c 811 break;
b4b4b794 812 }
e22f895c 813 }
b4b4b794 814
0df8b418 815 /* Remove ib breakpoints. */
e22f895c
KI
816 for (i = 0; i < ib_breakpoints; i++)
817 {
818 if (bp_address[i] != 0xffffffff)
819 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
820 0x00000000);
821 }
0df8b418 822 /* Remove dbt breakpoints. */
e22f895c
KI
823 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
824 {
825 bp_addr = bp_address[i];
826 if (bp_addr != 0xffffffff)
b4b4b794 827 {
e22f895c
KI
828 if (!mmu_on)
829 bp_addr &= 0x7fffffff;
492e5c6b 830 buf[0] = SDI_WRITE_MEMORY;
e22f895c
KI
831 store_long_parameter (buf + 1, bp_addr & 0xfffffffc);
832 store_long_parameter (buf + 5, 4);
833 buf[9] = bp_data[i][0];
834 buf[10] = bp_data[i][1];
835 buf[11] = bp_data[i][2];
836 buf[12] = bp_data[i][3];
837 send_data (buf, 13);
b4b4b794 838 }
e22f895c 839 }
b4b4b794 840
0df8b418 841 /* Remove access breaks. */
e22f895c
KI
842 hit_watchpoint_addr = 0;
843 for (i = 0; i < max_access_breaks; i++)
844 {
845 if (ab_address[i] != 0x00000000)
b4b4b794 846 {
e22f895c
KI
847 buf[0] = SDI_READ_MEMORY;
848 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
849 store_long_parameter (buf + 5, 4);
850 serial_write (sdi_desc, buf, 9);
851 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
852 if (c != '-' && recv_data (buf, 4) != -1)
b4b4b794 853 {
f5656ead 854 if (gdbarch_byte_order (target_gdbarch ()) == BFD_ENDIAN_BIG)
b4b4b794 855 {
e22f895c
KI
856 if ((buf[3] & 0x1) == 0x1)
857 hit_watchpoint_addr = ab_address[i];
858 }
859 else
860 {
861 if ((buf[0] & 0x1) == 0x1)
862 hit_watchpoint_addr = ab_address[i];
b4b4b794 863 }
b4b4b794 864 }
b4b4b794 865
e22f895c
KI
866 send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8100 + 4 * i, 4,
867 0x00000000);
868 }
b4b4b794 869 }
e22f895c
KI
870
871 if (remote_debug)
872 fprintf_unfiltered (gdb_stdlog, "pc => 0x%lx\n", pc_addr);
b4b4b794
KI
873
874 return inferior_ptid;
875}
876
877/* Terminate the open connection to the remote debugger.
878 Use this when you want to detach and do something else
879 with your gdb. */
880static void
136d6dae 881m32r_detach (struct target_ops *ops, char *args, int from_tty)
b4b4b794
KI
882{
883 if (remote_debug)
884 fprintf_unfiltered (gdb_stdlog, "m32r_detach(%d)\n", from_tty);
885
a493e3e2 886 m32r_resume (ops, inferior_ptid, 0, GDB_SIGNAL_0);
b4b4b794 887
0df8b418 888 /* Calls m32r_close to do the real work. */
b4b4b794
KI
889 pop_target ();
890 if (from_tty)
891 fprintf_unfiltered (gdb_stdlog, "Ending remote %s debugging\n",
892 target_shortname);
893}
894
0df8b418 895/* Return the id of register number REGNO. */
b4b4b794
KI
896
897static int
898get_reg_id (int regno)
899{
900 switch (regno)
901 {
902 case 20:
903 return SDI_REG_BBPC;
904 case 21:
905 return SDI_REG_BPC;
906 case 22:
907 return SDI_REG_ACCL;
908 case 23:
909 return SDI_REG_ACCH;
910 case 24:
911 return SDI_REG_EVB;
912 }
913
914 return regno;
915}
916
b4b4b794
KI
917/* Fetch register REGNO, or all registers if REGNO is -1.
918 Returns errno value. */
919static void
28439f5e
PA
920m32r_fetch_register (struct target_ops *ops,
921 struct regcache *regcache, int regno)
b4b4b794 922{
e17a4113
UW
923 struct gdbarch *gdbarch = get_regcache_arch (regcache);
924 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b4b4b794 925 unsigned long val, val2, regid;
b4b4b794
KI
926
927 if (regno == -1)
28439f5e
PA
928 {
929 for (regno = 0;
930 regno < gdbarch_num_regs (get_regcache_arch (regcache));
931 regno++)
932 m32r_fetch_register (ops, regcache, regno);
933 }
b4b4b794
KI
934 else
935 {
936 char buffer[MAX_REGISTER_SIZE];
937
938 regid = get_reg_id (regno);
e22f895c
KI
939 send_one_arg_cmd (SDI_READ_CPU_REG, regid);
940 val = recv_long_data ();
b4b4b794
KI
941
942 if (regid == SDI_REG_PSW)
943 {
e22f895c
KI
944 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
945 val2 = recv_long_data ();
3e41d55f 946 val = ((0x00cf & val2) << 8) | ((0xcf00 & val) >> 8);
b4b4b794
KI
947 }
948
949 if (remote_debug)
950 fprintf_unfiltered (gdb_stdlog, "m32r_fetch_register(%d,0x%08lx)\n",
951 regno, val);
952
953 /* We got the number the register holds, but gdb expects to see a
954 value in the target byte ordering. */
e17a4113 955 store_unsigned_integer (buffer, 4, byte_order, val);
56be3814 956 regcache_raw_supply (regcache, regno, buffer);
b4b4b794
KI
957 }
958 return;
959}
960
b4b4b794
KI
961/* Store register REGNO, or all if REGNO == 0.
962 Return errno value. */
963static void
28439f5e
PA
964m32r_store_register (struct target_ops *ops,
965 struct regcache *regcache, int regno)
b4b4b794
KI
966{
967 int regid;
968 ULONGEST regval, tmp;
b4b4b794
KI
969
970 if (regno == -1)
28439f5e
PA
971 {
972 for (regno = 0;
973 regno < gdbarch_num_regs (get_regcache_arch (regcache));
974 regno++)
975 m32r_store_register (ops, regcache, regno);
976 }
b4b4b794
KI
977 else
978 {
56be3814 979 regcache_cooked_read_unsigned (regcache, regno, &regval);
b4b4b794
KI
980 regid = get_reg_id (regno);
981
982 if (regid == SDI_REG_PSW)
983 {
984 unsigned long psw, bbpsw;
985
e22f895c
KI
986 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_PSW);
987 psw = recv_long_data ();
b4b4b794 988
e22f895c
KI
989 send_one_arg_cmd (SDI_READ_CPU_REG, SDI_REG_BBPSW);
990 bbpsw = recv_long_data ();
b4b4b794 991
3e41d55f 992 tmp = (0x00cf & psw) | ((0x00cf & regval) << 8);
e22f895c 993 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_PSW, tmp);
b4b4b794 994
3e41d55f 995 tmp = (0x0030 & bbpsw) | ((0xcf00 & regval) >> 8);
e22f895c 996 send_two_arg_cmd (SDI_WRITE_CPU_REG, SDI_REG_BBPSW, tmp);
b4b4b794
KI
997 }
998 else
999 {
e22f895c 1000 send_two_arg_cmd (SDI_WRITE_CPU_REG, regid, regval);
b4b4b794
KI
1001 }
1002
1003 if (remote_debug)
1004 fprintf_unfiltered (gdb_stdlog, "m32r_store_register(%d,0x%08lu)\n",
1005 regno, (unsigned long) regval);
1006 }
1007}
1008
1009/* Get ready to modify the registers array. On machines which store
1010 individual registers, this doesn't need to do anything. On machines
1011 which store all the registers in one fell swoop, this makes sure
1012 that registers contains all the registers from the program being
1013 debugged. */
1014
1015static void
316f2060 1016m32r_prepare_to_store (struct regcache *regcache)
b4b4b794 1017{
0df8b418 1018 /* Do nothing, since we can store individual regs. */
b4b4b794
KI
1019 if (remote_debug)
1020 fprintf_unfiltered (gdb_stdlog, "m32r_prepare_to_store()\n");
1021}
1022
1023static void
1024m32r_files_info (struct target_ops *target)
1025{
0d18d720 1026 const char *file = "nothing";
b4b4b794
KI
1027
1028 if (exec_bfd)
1029 {
1030 file = bfd_get_filename (exec_bfd);
1031 printf_filtered ("\tAttached to %s running program %s\n",
1032 chip_name, file);
1033 }
1034}
1035
1036/* Read/Write memory. */
1037static int
16ac4ab5 1038m32r_xfer_memory (CORE_ADDR memaddr, gdb_byte *myaddr, int len,
b4b4b794
KI
1039 int write,
1040 struct mem_attrib *attrib, struct target_ops *target)
1041{
1042 unsigned long taddr;
1043 unsigned char buf[0x2000];
1044 int ret, c;
1045
1046 taddr = memaddr;
1047
1048 if (!mmu_on)
1049 {
1050 if ((taddr & 0xa0000000) == 0x80000000)
1051 taddr &= 0x7fffffff;
1052 }
1053
1054 if (remote_debug)
1055 {
1056 if (write)
ec20a626 1057 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,write)\n",
f5656ead 1058 paddress (target_gdbarch (), memaddr), len);
b4b4b794 1059 else
ec20a626 1060 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%s,%d,read)\n",
f5656ead 1061 paddress (target_gdbarch (), memaddr), len);
b4b4b794
KI
1062 }
1063
1064 if (write)
1065 {
1066 buf[0] = SDI_WRITE_MEMORY;
1067 store_long_parameter (buf + 1, taddr);
1068 store_long_parameter (buf + 5, len);
1069 if (len < 0x1000)
1070 {
1071 memcpy (buf + 9, myaddr, len);
1072 ret = send_data (buf, len + 9) - 9;
1073 }
1074 else
1075 {
1076 if (serial_write (sdi_desc, buf, 9) != 0)
1077 {
1078 if (remote_debug)
1079 fprintf_unfiltered (gdb_stdlog,
1080 "m32r_xfer_memory() failed\n");
1081 return 0;
1082 }
1083 ret = send_data (myaddr, len);
1084 }
1085 }
1086 else
1087 {
1088 buf[0] = SDI_READ_MEMORY;
1089 store_long_parameter (buf + 1, taddr);
1090 store_long_parameter (buf + 5, len);
1091 if (serial_write (sdi_desc, buf, 9) != 0)
1092 {
1093 if (remote_debug)
1094 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1095 return 0;
1096 }
1097
1098 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1099 if (c < 0 || c == '-')
1100 {
1101 if (remote_debug)
1102 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1103 return 0;
1104 }
1105
1106 ret = recv_data (myaddr, len);
1107 }
1108
1109 if (ret <= 0)
1110 {
1111 if (remote_debug)
1112 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() fails\n");
1113 return 0;
1114 }
1115
1116 return ret;
1117}
1118
1119static void
7d85a9c0 1120m32r_kill (struct target_ops *ops)
b4b4b794
KI
1121{
1122 if (remote_debug)
1123 fprintf_unfiltered (gdb_stdlog, "m32r_kill()\n");
1124
1125 inferior_ptid = null_ptid;
e5ef4d75 1126 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1127
1128 return;
1129}
1130
1131/* Clean up when a program exits.
1132
1133 The program actually lives on in the remote processor's RAM, and may be
1134 run again without a download. Don't leave it full of breakpoint
1135 instructions. */
1136
1137static void
136d6dae 1138m32r_mourn_inferior (struct target_ops *ops)
b4b4b794
KI
1139{
1140 if (remote_debug)
1141 fprintf_unfiltered (gdb_stdlog, "m32r_mourn_inferior()\n");
1142
1143 remove_breakpoints ();
1144 generic_mourn_inferior ();
1145}
1146
1147static int
a6d9a66e
UW
1148m32r_insert_breakpoint (struct gdbarch *gdbarch,
1149 struct bp_target_info *bp_tgt)
b4b4b794 1150{
8181d85f 1151 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1152 int ib_breakpoints;
1153 unsigned char buf[13];
1154 int i, c;
1155
1156 if (remote_debug)
ec20a626 1157 fprintf_unfiltered (gdb_stdlog, "m32r_insert_breakpoint(%s,...)\n",
5af949e3 1158 paddress (gdbarch, addr));
b4b4b794
KI
1159
1160 if (use_ib_breakpoints)
1161 ib_breakpoints = max_ib_breakpoints;
1162 else
1163 ib_breakpoints = 0;
1164
1165 for (i = 0; i < MAX_BREAKPOINTS; i++)
1166 {
1167 if (bp_address[i] == 0xffffffff)
1168 {
1169 bp_address[i] = addr;
1170 if (i >= ib_breakpoints)
1171 {
1172 buf[0] = SDI_READ_MEMORY;
1173 if (mmu_on)
1174 store_long_parameter (buf + 1, addr & 0xfffffffc);
1175 else
1176 store_long_parameter (buf + 1, addr & 0x7ffffffc);
1177 store_long_parameter (buf + 5, 4);
1178 serial_write (sdi_desc, buf, 9);
1179 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1180 if (c != '-')
1181 recv_data (bp_data[i], 4);
1182 }
1183 return 0;
1184 }
1185 }
1186
8a3fe4f8 1187 error (_("Too many breakpoints"));
b4b4b794
KI
1188 return 1;
1189}
1190
1191static int
a6d9a66e
UW
1192m32r_remove_breakpoint (struct gdbarch *gdbarch,
1193 struct bp_target_info *bp_tgt)
b4b4b794 1194{
8181d85f 1195 CORE_ADDR addr = bp_tgt->placed_address;
b4b4b794
KI
1196 int i;
1197
1198 if (remote_debug)
ec20a626 1199 fprintf_unfiltered (gdb_stdlog, "m32r_remove_breakpoint(%s)\n",
5af949e3 1200 paddress (gdbarch, addr));
b4b4b794
KI
1201
1202 for (i = 0; i < MAX_BREAKPOINTS; i++)
1203 {
1204 if (bp_address[i] == addr)
1205 {
1206 bp_address[i] = 0xffffffff;
1207 break;
1208 }
1209 }
1210
1211 return 0;
1212}
1213
1214static void
1215m32r_load (char *args, int from_tty)
1216{
1217 struct cleanup *old_chain;
1218 asection *section;
1219 bfd *pbfd;
1220 bfd_vma entry;
1221 char *filename;
1222 int quiet;
1223 int nostart;
2b71414d 1224 struct timeval start_time, end_time;
0df8b418 1225 unsigned long data_count; /* Number of bytes transferred to memory. */
b4b4b794
KI
1226 static RETSIGTYPE (*prev_sigint) ();
1227
0df8b418 1228 /* for direct tcp connections, we can do a fast binary download. */
b4b4b794
KI
1229 quiet = 0;
1230 nostart = 0;
1231 filename = NULL;
1232
1233 while (*args != '\000')
1234 {
1235 char *arg;
1236
1237 while (isspace (*args))
1238 args++;
1239
1240 arg = args;
1241
1242 while ((*args != '\000') && !isspace (*args))
1243 args++;
1244
1245 if (*args != '\000')
1246 *args++ = '\000';
1247
1248 if (*arg != '-')
1249 filename = arg;
1250 else if (strncmp (arg, "-quiet", strlen (arg)) == 0)
1251 quiet = 1;
1252 else if (strncmp (arg, "-nostart", strlen (arg)) == 0)
1253 nostart = 1;
1254 else
8a3fe4f8 1255 error (_("Unknown option `%s'"), arg);
b4b4b794
KI
1256 }
1257
1258 if (!filename)
1259 filename = get_exec_file (1);
1260
1c00ec6b 1261 pbfd = gdb_bfd_open (filename, gnutarget, -1);
b4b4b794
KI
1262 if (pbfd == NULL)
1263 {
1264 perror_with_name (filename);
1265 return;
1266 }
f9a062ff 1267 old_chain = make_cleanup_bfd_unref (pbfd);
b4b4b794
KI
1268
1269 if (!bfd_check_format (pbfd, bfd_object))
8a3fe4f8 1270 error (_("\"%s\" is not an object file: %s"), filename,
b4b4b794
KI
1271 bfd_errmsg (bfd_get_error ()));
1272
2b71414d 1273 gettimeofday (&start_time, NULL);
b4b4b794
KI
1274 data_count = 0;
1275
1276 interrupted = 0;
1277 prev_sigint = signal (SIGINT, gdb_cntrl_c);
1278
1279 for (section = pbfd->sections; section; section = section->next)
1280 {
1281 if (bfd_get_section_flags (pbfd, section) & SEC_LOAD)
1282 {
1283 bfd_vma section_address;
1284 bfd_size_type section_size;
1285 file_ptr fptr;
1286 int n;
1287
1288 section_address = bfd_section_lma (pbfd, section);
2c500098 1289 section_size = bfd_get_section_size (section);
b4b4b794
KI
1290
1291 if (!mmu_on)
1292 {
1293 if ((section_address & 0xa0000000) == 0x80000000)
1294 section_address &= 0x7fffffff;
1295 }
1296
1297 if (!quiet)
1298 printf_filtered ("[Loading section %s at 0x%lx (%d bytes)]\n",
1299 bfd_get_section_name (pbfd, section),
ec20a626
UW
1300 (unsigned long) section_address,
1301 (int) section_size);
b4b4b794
KI
1302
1303 fptr = 0;
1304
1305 data_count += section_size;
1306
1307 n = 0;
1308 while (section_size > 0)
1309 {
1310 char unsigned buf[0x1000 + 9];
1311 int count;
1312
1313 count = min (section_size, 0x1000);
1314
1315 buf[0] = SDI_WRITE_MEMORY;
1316 store_long_parameter (buf + 1, section_address);
1317 store_long_parameter (buf + 5, count);
1318
1319 bfd_get_section_contents (pbfd, section, buf + 9, fptr, count);
1320 if (send_data (buf, count + 9) <= 0)
8a3fe4f8 1321 error (_("Error while downloading %s section."),
b4b4b794
KI
1322 bfd_get_section_name (pbfd, section));
1323
1324 if (!quiet)
1325 {
1326 printf_unfiltered (".");
1327 if (n++ > 60)
1328 {
1329 printf_unfiltered ("\n");
1330 n = 0;
1331 }
1332 gdb_flush (gdb_stdout);
1333 }
1334
1335 section_address += count;
1336 fptr += count;
1337 section_size -= count;
1338
1339 if (interrupted)
1340 break;
1341 }
1342
1343 if (!quiet && !interrupted)
1344 {
1345 printf_unfiltered ("done.\n");
1346 gdb_flush (gdb_stdout);
1347 }
1348 }
1349
1350 if (interrupted)
1351 {
1352 printf_unfiltered ("Interrupted.\n");
1353 break;
1354 }
1355 }
1356
1357 interrupted = 0;
1358 signal (SIGINT, prev_sigint);
1359
2b71414d 1360 gettimeofday (&end_time, NULL);
b4b4b794 1361
0df8b418 1362 /* Make the PC point at the start address. */
b4b4b794 1363 if (exec_bfd)
fb14de7b
UW
1364 regcache_write_pc (get_current_regcache (),
1365 bfd_get_start_address (exec_bfd));
b4b4b794 1366
0df8b418 1367 inferior_ptid = null_ptid; /* No process now. */
e5ef4d75 1368 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1369
1370 /* This is necessary because many things were based on the PC at the time
1371 that we attached to the monitor, which is no longer valid now that we
1372 have loaded new code (and just changed the PC). Another way to do this
1373 might be to call normal_stop, except that the stack may not be valid,
0df8b418 1374 and things would get horribly confused... */
b4b4b794 1375
c1e56572 1376 clear_symtab_users (0);
b4b4b794
KI
1377
1378 if (!nostart)
1379 {
1380 entry = bfd_get_start_address (pbfd);
1381
1382 if (!quiet)
ec20a626
UW
1383 printf_unfiltered ("[Starting %s at 0x%lx]\n", filename,
1384 (unsigned long) entry);
b4b4b794
KI
1385 }
1386
2b71414d
DJ
1387 print_transfer_performance (gdb_stdout, data_count, 0, &start_time,
1388 &end_time);
b4b4b794
KI
1389
1390 do_cleanups (old_chain);
1391}
1392
1393static void
f9c72d52 1394m32r_stop (ptid_t ptid)
b4b4b794 1395{
b4b4b794
KI
1396 if (remote_debug)
1397 fprintf_unfiltered (gdb_stdlog, "m32r_stop()\n");
1398
e22f895c 1399 send_cmd (SDI_STOP_CPU);
b4b4b794
KI
1400
1401 return;
1402}
1403
1404
37814c18
KI
1405/* Tell whether this target can support a hardware breakpoint. CNT
1406 is the number of hardware breakpoints already installed. This
d92524f1 1407 implements the target_can_use_hardware_watchpoint macro. */
b4b4b794 1408
63807e1d 1409static int
37814c18 1410m32r_can_use_hw_watchpoint (int type, int cnt, int othertype)
b4b4b794 1411{
37814c18 1412 return sdi_desc != NULL && cnt < max_access_breaks;
b4b4b794
KI
1413}
1414
1415/* Set a data watchpoint. ADDR and LEN should be obvious. TYPE is 0
1416 for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
0df8b418 1417 watchpoint. */
b4b4b794 1418
63807e1d 1419static int
0cf6dd15
TJB
1420m32r_insert_watchpoint (CORE_ADDR addr, int len, int type,
1421 struct expression *cond)
b4b4b794
KI
1422{
1423 int i;
1424
1425 if (remote_debug)
ec20a626 1426 fprintf_unfiltered (gdb_stdlog, "m32r_insert_watchpoint(%s,%d,%d)\n",
f5656ead 1427 paddress (target_gdbarch (), addr), len, type);
b4b4b794
KI
1428
1429 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1430 {
1431 if (ab_address[i] == 0x00000000)
1432 {
1433 ab_address[i] = addr;
1434 ab_size[i] = len;
1435 ab_type[i] = type;
1436 return 0;
1437 }
1438 }
1439
8a3fe4f8 1440 error (_("Too many watchpoints"));
b4b4b794
KI
1441 return 1;
1442}
1443
63807e1d 1444static int
0cf6dd15
TJB
1445m32r_remove_watchpoint (CORE_ADDR addr, int len, int type,
1446 struct expression *cond)
b4b4b794
KI
1447{
1448 int i;
1449
1450 if (remote_debug)
ec20a626 1451 fprintf_unfiltered (gdb_stdlog, "m32r_remove_watchpoint(%s,%d,%d)\n",
f5656ead 1452 paddress (target_gdbarch (), addr), len, type);
b4b4b794
KI
1453
1454 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1455 {
1456 if (ab_address[i] == addr)
1457 {
1458 ab_address[i] = 0x00000000;
1459 break;
1460 }
1461 }
1462
1463 return 0;
1464}
1465
63807e1d 1466static int
4aa7a7f5 1467m32r_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
b4b4b794 1468{
4aa7a7f5 1469 int rc = 0;
123f5f96 1470
4aa7a7f5
JJ
1471 if (hit_watchpoint_addr != 0x00000000)
1472 {
1473 *addr_p = hit_watchpoint_addr;
1474 rc = 1;
1475 }
1476 return rc;
b4b4b794
KI
1477}
1478
63807e1d 1479static int
b4b4b794
KI
1480m32r_stopped_by_watchpoint (void)
1481{
4aa7a7f5 1482 CORE_ADDR addr;
123f5f96 1483
4aa7a7f5 1484 return m32r_stopped_data_address (&current_target, &addr);
b4b4b794
KI
1485}
1486
4d6c6261
PA
1487/* Check to see if a thread is still alive. */
1488
1489static int
28439f5e 1490m32r_thread_alive (struct target_ops *ops, ptid_t ptid)
4d6c6261
PA
1491{
1492 if (ptid_equal (ptid, remote_m32r_ptid))
1493 /* The main task is always alive. */
1494 return 1;
1495
1496 return 0;
1497}
1498
1499/* Convert a thread ID to a string. Returns the string in a static
1500 buffer. */
1501
1502static char *
117de6a9 1503m32r_pid_to_str (struct target_ops *ops, ptid_t ptid)
4d6c6261
PA
1504{
1505 static char buf[64];
1506
1507 if (ptid_equal (remote_m32r_ptid, ptid))
1508 {
1509 xsnprintf (buf, sizeof buf, "Thread <main>");
1510 return buf;
1511 }
1512
1513 return normal_pid_to_str (ptid);
1514}
b4b4b794
KI
1515
1516static void
1517sdireset_command (char *args, int from_tty)
1518{
b4b4b794
KI
1519 if (remote_debug)
1520 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1521
e22f895c 1522 send_cmd (SDI_OPEN);
b4b4b794
KI
1523
1524 inferior_ptid = null_ptid;
e5ef4d75 1525 delete_thread_silent (remote_m32r_ptid);
b4b4b794
KI
1526}
1527
1528
1529static void
1530sdistatus_command (char *args, int from_tty)
1531{
1532 unsigned char buf[4096];
1533 int i, c;
1534
1535 if (remote_debug)
1536 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1537
1538 if (!sdi_desc)
1539 return;
1540
e22f895c 1541 send_cmd (SDI_STATUS);
b4b4b794
KI
1542 for (i = 0; i < 4096; i++)
1543 {
1544 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1545 if (c < 0)
717eb1cf 1546 return;
b4b4b794
KI
1547 buf[i] = c;
1548 if (c == 0)
717eb1cf
AC
1549 break;
1550 }
b4b4b794
KI
1551
1552 printf_filtered ("%s", buf);
1553}
1554
1555
1556static void
1557debug_chaos_command (char *args, int from_tty)
1558{
1559 unsigned char buf[3];
1560
1561 buf[0] = SDI_SET_ATTR;
1562 buf[1] = SDI_ATTR_CACHE;
1563 buf[2] = SDI_CACHE_TYPE_CHAOS;
1564 send_data (buf, 3);
1565}
1566
1567
1568static void
1569use_debug_dma_command (char *args, int from_tty)
1570{
1571 unsigned char buf[3];
1572
1573 buf[0] = SDI_SET_ATTR;
1574 buf[1] = SDI_ATTR_MEM_ACCESS;
1575 buf[2] = SDI_MEM_ACCESS_DEBUG_DMA;
1576 send_data (buf, 3);
1577}
1578
1579static void
1580use_mon_code_command (char *args, int from_tty)
1581{
1582 unsigned char buf[3];
1583
1584 buf[0] = SDI_SET_ATTR;
1585 buf[1] = SDI_ATTR_MEM_ACCESS;
1586 buf[2] = SDI_MEM_ACCESS_MON_CODE;
1587 send_data (buf, 3);
1588}
1589
1590
1591static void
1592use_ib_breakpoints_command (char *args, int from_tty)
1593{
1594 use_ib_breakpoints = 1;
1595}
1596
1597static void
1598use_dbt_breakpoints_command (char *args, int from_tty)
1599{
1600 use_ib_breakpoints = 0;
1601}
1602
c35b1492
PA
1603static int
1604m32r_return_one (struct target_ops *target)
1605{
1606 return 1;
1607}
b4b4b794 1608
aeaec162
TT
1609/* Implementation of the to_has_execution method. */
1610
1611static int
1612m32r_has_execution (struct target_ops *target, ptid_t the_ptid)
1613{
1614 return 1;
1615}
1616
0df8b418 1617/* Define the target subroutine names. */
b4b4b794
KI
1618
1619struct target_ops m32r_ops;
1620
1621static void
1622init_m32r_ops (void)
1623{
1624 m32r_ops.to_shortname = "m32rsdi";
1625 m32r_ops.to_longname = "Remote M32R debugging over SDI interface";
1626 m32r_ops.to_doc = "Use an M32R board using SDI debugging protocol.";
1627 m32r_ops.to_open = m32r_open;
1628 m32r_ops.to_close = m32r_close;
1629 m32r_ops.to_detach = m32r_detach;
1630 m32r_ops.to_resume = m32r_resume;
1631 m32r_ops.to_wait = m32r_wait;
1632 m32r_ops.to_fetch_registers = m32r_fetch_register;
1633 m32r_ops.to_store_registers = m32r_store_register;
1634 m32r_ops.to_prepare_to_store = m32r_prepare_to_store;
c8e73a31 1635 m32r_ops.deprecated_xfer_memory = m32r_xfer_memory;
b4b4b794
KI
1636 m32r_ops.to_files_info = m32r_files_info;
1637 m32r_ops.to_insert_breakpoint = m32r_insert_breakpoint;
1638 m32r_ops.to_remove_breakpoint = m32r_remove_breakpoint;
37814c18
KI
1639 m32r_ops.to_can_use_hw_breakpoint = m32r_can_use_hw_watchpoint;
1640 m32r_ops.to_insert_watchpoint = m32r_insert_watchpoint;
1641 m32r_ops.to_remove_watchpoint = m32r_remove_watchpoint;
1642 m32r_ops.to_stopped_by_watchpoint = m32r_stopped_by_watchpoint;
1643 m32r_ops.to_stopped_data_address = m32r_stopped_data_address;
b4b4b794
KI
1644 m32r_ops.to_kill = m32r_kill;
1645 m32r_ops.to_load = m32r_load;
1646 m32r_ops.to_create_inferior = m32r_create_inferior;
1647 m32r_ops.to_mourn_inferior = m32r_mourn_inferior;
1648 m32r_ops.to_stop = m32r_stop;
49d03eab 1649 m32r_ops.to_log_command = serial_log_command;
4d6c6261
PA
1650 m32r_ops.to_thread_alive = m32r_thread_alive;
1651 m32r_ops.to_pid_to_str = m32r_pid_to_str;
b4b4b794 1652 m32r_ops.to_stratum = process_stratum;
c35b1492
PA
1653 m32r_ops.to_has_all_memory = m32r_return_one;
1654 m32r_ops.to_has_memory = m32r_return_one;
1655 m32r_ops.to_has_stack = m32r_return_one;
1656 m32r_ops.to_has_registers = m32r_return_one;
aeaec162 1657 m32r_ops.to_has_execution = m32r_has_execution;
b4b4b794
KI
1658 m32r_ops.to_magic = OPS_MAGIC;
1659};
1660
1661
1662extern initialize_file_ftype _initialize_remote_m32r;
1663
1664void
1665_initialize_remote_m32r (void)
1666{
1667 int i;
1668
1669 init_m32r_ops ();
1670
0df8b418 1671 /* Initialize breakpoints. */
b4b4b794
KI
1672 for (i = 0; i < MAX_BREAKPOINTS; i++)
1673 bp_address[i] = 0xffffffff;
1674
0df8b418 1675 /* Initialize access breaks. */
b4b4b794
KI
1676 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1677 ab_address[i] = 0x00000000;
1678
1679 add_target (&m32r_ops);
1680
1681 add_com ("sdireset", class_obscure, sdireset_command,
1bedd215 1682 _("Reset SDI connection."));
b4b4b794
KI
1683
1684 add_com ("sdistatus", class_obscure, sdistatus_command,
1bedd215 1685 _("Show status of SDI connection."));
b4b4b794
KI
1686
1687 add_com ("debug_chaos", class_obscure, debug_chaos_command,
1bedd215 1688 _("Debug M32R/Chaos."));
b4b4b794
KI
1689
1690 add_com ("use_debug_dma", class_obscure, use_debug_dma_command,
1bedd215 1691 _("Use debug DMA mem access."));
b4b4b794 1692 add_com ("use_mon_code", class_obscure, use_mon_code_command,
1bedd215 1693 _("Use mon code mem access."));
b4b4b794
KI
1694
1695 add_com ("use_ib_break", class_obscure, use_ib_breakpoints_command,
1bedd215 1696 _("Set breakpoints by IB break."));
b4b4b794 1697 add_com ("use_dbt_break", class_obscure, use_dbt_breakpoints_command,
1bedd215 1698 _("Set breakpoints by dbt."));
e5ef4d75
PA
1699
1700 /* Yes, 42000 is arbitrary. The only sense out of it, is that it
1701 isn't 0. */
1702 remote_m32r_ptid = ptid_build (42000, 0, 42000);
b4b4b794 1703}
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